1> [!IMPORTANT]
2> This build documentation is specific only to RISC-V SpacemiT SOCs.
3
4## Build llama.cpp locally (for riscv64)
5
61. Prepare Toolchain For RISCV
7~~~
8wget https://archive.spacemit.com/toolchain/spacemit-toolchain-linux-glibc-x86_64-v1.1.2.tar.xz
9~~~
10
112. Build
12Below is the build script: it requires utilizing RISC-V vector instructions for acceleration. Ensure the `GGML_CPU_RISCV64_SPACEMIT` compilation option is enabled. The currently supported optimization version is `RISCV64_SPACEMIT_IME1`, corresponding to the `RISCV64_SPACEMIT_IME_SPEC` compilation option. Compiler configurations are defined in the `riscv64-spacemit-linux-gnu-gcc.cmake` file. Please ensure you have installed the RISC-V compiler and set the environment variable via `export RISCV_ROOT_PATH={your_compiler_path}`.
13```bash
14
15cmake -B build \
16 -DCMAKE_BUILD_TYPE=Release \
17 -DGGML_CPU_RISCV64_SPACEMIT=ON \
18 -DLLAMA_OPENSSL=OFF \
19 -DGGML_RVV=ON \
20 -DGGML_RV_ZFH=ON \
21 -DGGML_RV_ZICBOP=ON \
22 -DGGML_RV_ZIHINTPAUSE=ON \
23 -DRISCV64_SPACEMIT_IME_SPEC=RISCV64_SPACEMIT_IME1 \
24 -DCMAKE_TOOLCHAIN_FILE=${PWD}/cmake/riscv64-spacemit-linux-gnu-gcc.cmake \
25 -DCMAKE_INSTALL_PREFIX=build/installed
26
27cmake --build build --parallel $(nproc) --config Release
28
29pushd build
30make install
31popd
32```
33
34## Simulation
35You can use QEMU to perform emulation on non-RISC-V architectures.
36
371. Download QEMU
38~~~
39wget https://archive.spacemit.com/spacemit-ai/qemu/jdsk-qemu-v0.0.14.tar.gz
40~~~
41
422. Run Simulation
43After build your llama.cpp, you can run the executable file via QEMU for simulation, for example:
44~~~
45export QEMU_ROOT_PATH={your QEMU file path}
46export RISCV_ROOT_PATH_IME1={your RISC-V compiler path}
47
48${QEMU_ROOT_PATH}/bin/qemu-riscv64 -L ${RISCV_ROOT_PATH_IME1}/sysroot -cpu max,vlen=256,elen=64,vext_spec=v1.0 ${PWD}/build/bin/llama-cli -m ${PWD}/models/Qwen2.5-0.5B-Instruct-Q4_0.gguf -t 1
49~~~
50## Performance
51#### Quantization Support For Matrix
52~~~
53model name : Spacemit(R) X60
54isa : rv64imafdcv_zicbom_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zfhmin_zca_zcd_zba_zbb_zbc_zbs_zkt_zve32f_zve32x_zve64d_zve64f_zve64x_zvfh_zvfhmin_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt
55mmu : sv39
56uarch : spacemit,x60
57mvendorid : 0x710
58marchid : 0x8000000058000001
59~~~
60
61Q4_0
62| Model | Size | Params | backend | threads | test | t/s |
63| -----------| -------- | ------ | ------- | ------- | ---- |------|
64Qwen2.5 0.5B |403.20 MiB|630.17 M| cpu | 4 | pp512|64.12 ± 0.26|
65Qwen2.5 0.5B |403.20 MiB|630.17 M| cpu | 4 | tg128|10.03 ± 0.01|
66Qwen2.5 1.5B |1011.16 MiB| 1.78 B | cpu | 4 | pp512|24.16 ± 0.02|
67Qwen2.5 1.5B |1011.16 MiB| 1.78 B | cpu | 4 | tg128|3.83 ± 0.06|
68Qwen2.5 3B | 1.86 GiB | 3.40 B | cpu | 4 | pp512|12.08 ± 0.02|
69Qwen2.5 3B | 1.86 GiB | 3.40 B | cpu | 4 | tg128|2.23 ± 0.02|
70
71Q4_1
72| Model | Size | Params | backend | threads | test | t/s |
73| -----------| -------- | ------ | ------- | ------- | ---- |------|
74Qwen2.5 0.5B |351.50 MiB|494.03 M| cpu | 4 | pp512|62.07 ± 0.12|
75Qwen2.5 0.5B |351.50 MiB|494.03 M| cpu | 4 | tg128|9.91 ± 0.01|
76Qwen2.5 1.5B |964.06 MiB| 1.54 B | cpu | 4 | pp512|22.95 ± 0.25|
77Qwen2.5 1.5B |964.06 MiB| 1.54 B | cpu | 4 | tg128|4.01 ± 0.15|
78Qwen2.5 3B | 1.85 GiB | 3.09 B | cpu | 4 | pp512|11.55 ± 0.16|
79Qwen2.5 3B | 1.85 GiB | 3.09 B | cpu | 4 | tg128|2.25 ± 0.04|
80
81
82Q4_K
83| Model | Size | Params | backend | threads | test | t/s |
84| -----------| -------- | ------ | ------- | ------- | ---- |------|
85Qwen2.5 0.5B |462.96 MiB|630.17 M| cpu | 4 | pp512|9.29 ± 0.05|
86Qwen2.5 0.5B |462.96 MiB|630.17 M| cpu | 4 | tg128|5.67 ± 0.04|
87Qwen2.5 1.5B | 1.04 GiB | 1.78 B | cpu | 4 | pp512|10.38 ± 0.10|
88Qwen2.5 1.5B | 1.04 GiB | 1.78 B | cpu | 4 | tg128|3.17 ± 0.08|
89Qwen2.5 3B | 1.95 GiB | 3.40 B | cpu | 4 | pp512|4.23 ± 0.04|
90Qwen2.5 3B | 1.95 GiB | 3.40 B | cpu | 4 | tg128|1.73 ± 0.00|