luna - wolfssl/wolfcrypt/src/port/arm/armv8-32-aes-asm.S

    1/* armv8-32-aes-asm
    2 *
    3 * Copyright (C) 2006-2026 wolfSSL Inc.
    4 *
    5 * This file is part of wolfSSL.
    6 *
    7 * wolfSSL is free software; you can redistribute it and/or modify
    8 * it under the terms of the GNU General Public License as published by
    9 * the Free Software Foundation; either version 3 of the License, or
   10 * (at your option) any later version.
   11 *
   12 * wolfSSL is distributed in the hope that it will be useful,
   13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
   14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   15 * GNU General Public License for more details.
   16 *
   17 * You should have received a copy of the GNU General Public License
   18 * along with this program; if not, write to the Free Software
   19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
   20 */
   21
   22/* Generated using (from wolfssl):
   23 *   cd ../scripts
   24 *   ruby ./aes/aes.rb arm32 \
   25 *       ../wolfssl/wolfcrypt/src/port/arm/armv8-32-aes-asm.S
   26 */
   27
   28#include <wolfssl/wolfcrypt/libwolfssl_sources_asm.h>
   29
   30#ifdef WOLFSSL_ARMASM
   31#if !defined(__aarch64__) && !defined(WOLFSSL_ARMASM_THUMB2)
   32#ifndef WOLFSSL_ARMASM_INLINE
   33#ifndef NO_AES
   34#ifndef WOLFSSL_ARMASM_NO_HW_CRYPTO
   35	.text
   36	.align	4
   37	.globl	AES_set_key_AARCH32
   38	.type	AES_set_key_AARCH32, %function
   39AES_set_key_AARCH32:
   40	push	{r4, r5, r6, r7, r8, r9, r10, r11, lr}
   41	cmp	r1, #24
   42	blt	L_aes_set_key_arm32_crypto_start_128
   43	bgt	L_aes_set_key_arm32_crypto_start_256
   44	ldr	r4, [r0], #4
   45	ldr	r5, [r0], #4
   46	ldr	r6, [r0], #4
   47	ldr	r7, [r0], #4
   48	ldr	r8, [r0], #4
   49	ldr	r9, [r0], #4
   50#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
   51	stm	r2!, {r4, r5}
   52#else
   53	strd	r4, r5, [r2], #8
   54#endif
   55#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
   56	stm	r2!, {r6, r7}
   57#else
   58	strd	r6, r7, [r2], #8
   59#endif
   60#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
   61	stm	r2!, {r8, r9}
   62#else
   63	strd	r8, r9, [r2], #8
   64#endif
   65	vdup.32	q1, r9
   66	vmov.i32	q0, #0
   67	aese.8	q0, q1
   68	vmov.i32	r12, s0
   69	ror	r12, r12, #8
   70	eor	r4, r4, #1
   71	eor	r4, r4, r12
   72	eor	r5, r5, r4
   73	eor	r6, r6, r5
   74	eor	r7, r7, r6
   75	eor	r8, r8, r7
   76	eor	r9, r9, r8
   77#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
   78	stm	r2!, {r4, r5}
   79#else
   80	strd	r4, r5, [r2], #8
   81#endif
   82#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
   83	stm	r2!, {r6, r7}
   84#else
   85	strd	r6, r7, [r2], #8
   86#endif
   87#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
   88	stm	r2!, {r8, r9}
   89#else
   90	strd	r8, r9, [r2], #8
   91#endif
   92	vdup.32	q1, r9
   93	vmov.i32	q0, #0
   94	aese.8	q0, q1
   95	vmov.i32	r12, s0
   96	ror	r12, r12, #8
   97	eor	r4, r4, #2
   98	eor	r4, r4, r12
   99	eor	r5, r5, r4
  100	eor	r6, r6, r5
  101	eor	r7, r7, r6
  102	eor	r8, r8, r7
  103	eor	r9, r9, r8
  104#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  105	stm	r2!, {r4, r5}
  106#else
  107	strd	r4, r5, [r2], #8
  108#endif
  109#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  110	stm	r2!, {r6, r7}
  111#else
  112	strd	r6, r7, [r2], #8
  113#endif
  114#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  115	stm	r2!, {r8, r9}
  116#else
  117	strd	r8, r9, [r2], #8
  118#endif
  119	vdup.32	q1, r9
  120	vmov.i32	q0, #0
  121	aese.8	q0, q1
  122	vmov.i32	r12, s0
  123	ror	r12, r12, #8
  124	eor	r4, r4, #4
  125	eor	r4, r4, r12
  126	eor	r5, r5, r4
  127	eor	r6, r6, r5
  128	eor	r7, r7, r6
  129	eor	r8, r8, r7
  130	eor	r9, r9, r8
  131#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  132	stm	r2!, {r4, r5}
  133#else
  134	strd	r4, r5, [r2], #8
  135#endif
  136#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  137	stm	r2!, {r6, r7}
  138#else
  139	strd	r6, r7, [r2], #8
  140#endif
  141#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  142	stm	r2!, {r8, r9}
  143#else
  144	strd	r8, r9, [r2], #8
  145#endif
  146	vdup.32	q1, r9
  147	vmov.i32	q0, #0
  148	aese.8	q0, q1
  149	vmov.i32	r12, s0
  150	ror	r12, r12, #8
  151	eor	r4, r4, #8
  152	eor	r4, r4, r12
  153	eor	r5, r5, r4
  154	eor	r6, r6, r5
  155	eor	r7, r7, r6
  156	eor	r8, r8, r7
  157	eor	r9, r9, r8
  158#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  159	stm	r2!, {r4, r5}
  160#else
  161	strd	r4, r5, [r2], #8
  162#endif
  163#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  164	stm	r2!, {r6, r7}
  165#else
  166	strd	r6, r7, [r2], #8
  167#endif
  168#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  169	stm	r2!, {r8, r9}
  170#else
  171	strd	r8, r9, [r2], #8
  172#endif
  173	vdup.32	q1, r9
  174	vmov.i32	q0, #0
  175	aese.8	q0, q1
  176	vmov.i32	r12, s0
  177	ror	r12, r12, #8
  178	eor	r4, r4, #16
  179	eor	r4, r4, r12
  180	eor	r5, r5, r4
  181	eor	r6, r6, r5
  182	eor	r7, r7, r6
  183	eor	r8, r8, r7
  184	eor	r9, r9, r8
  185#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  186	stm	r2!, {r4, r5}
  187#else
  188	strd	r4, r5, [r2], #8
  189#endif
  190#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  191	stm	r2!, {r6, r7}
  192#else
  193	strd	r6, r7, [r2], #8
  194#endif
  195#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  196	stm	r2!, {r8, r9}
  197#else
  198	strd	r8, r9, [r2], #8
  199#endif
  200	vdup.32	q1, r9
  201	vmov.i32	q0, #0
  202	aese.8	q0, q1
  203	vmov.i32	r12, s0
  204	ror	r12, r12, #8
  205	eor	r4, r4, #32
  206	eor	r4, r4, r12
  207	eor	r5, r5, r4
  208	eor	r6, r6, r5
  209	eor	r7, r7, r6
  210	eor	r8, r8, r7
  211	eor	r9, r9, r8
  212#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  213	stm	r2!, {r4, r5}
  214#else
  215	strd	r4, r5, [r2], #8
  216#endif
  217#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  218	stm	r2!, {r6, r7}
  219#else
  220	strd	r6, r7, [r2], #8
  221#endif
  222#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  223	stm	r2!, {r8, r9}
  224#else
  225	strd	r8, r9, [r2], #8
  226#endif
  227	vdup.32	q1, r9
  228	vmov.i32	q0, #0
  229	aese.8	q0, q1
  230	vmov.i32	r12, s0
  231	ror	r12, r12, #8
  232	eor	r4, r4, #0x40
  233	eor	r4, r4, r12
  234	eor	r5, r5, r4
  235	eor	r6, r6, r5
  236	eor	r7, r7, r6
  237	eor	r8, r8, r7
  238	eor	r9, r9, r8
  239#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  240	stm	r2!, {r4, r5}
  241#else
  242	strd	r4, r5, [r2], #8
  243#endif
  244#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  245	stm	r2!, {r6, r7}
  246#else
  247	strd	r6, r7, [r2], #8
  248#endif
  249#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  250	stm	r2!, {r8, r9}
  251#else
  252	strd	r8, r9, [r2], #8
  253#endif
  254	vdup.32	q1, r9
  255	vmov.i32	q0, #0
  256	aese.8	q0, q1
  257	vmov.i32	r12, s0
  258	ror	r12, r12, #8
  259	eor	r4, r4, #0x80
  260	eor	r4, r4, r12
  261	eor	r5, r5, r4
  262	eor	r6, r6, r5
  263	eor	r7, r7, r6
  264#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  265	stm	r2!, {r4, r5}
  266#else
  267	strd	r4, r5, [r2], #8
  268#endif
  269#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  270	stm	r2!, {r6, r7}
  271#else
  272	strd	r6, r7, [r2], #8
  273#endif
  274	cmp	r3, #0
  275	beq	L_aes_set_key_arm32_crypto_done
  276	sub	r2, r2, #0xd0
  277	vld1.32	{q0}, [r2]
  278	add	r2, r2, #0xc0
  279	vld1.32	{q1}, [r2]
  280	sub	r2, r2, #0xc0
  281	vst1.32	{q1}, [r2]
  282	add	r2, r2, #0xc0
  283	vst1.32	{q0}, [r2]
  284	sub	r2, r2, #0xb0
  285	vld1.32	{q0}, [r2]
  286	add	r2, r2, #0xa0
  287	vld1.32	{q1}, [r2]
  288	sub	r2, r2, #0xa0
  289	aesimc.8	q0, q0
  290	aesimc.8	q1, q1
  291	vst1.32	{q1}, [r2]
  292	add	r2, r2, #0xa0
  293	vst1.32	{q0}, [r2]
  294	sub	r2, r2, #0x90
  295	vld1.32	{q0}, [r2]
  296	add	r2, r2, #0x80
  297	vld1.32	{q1}, [r2]
  298	sub	r2, r2, #0x80
  299	aesimc.8	q0, q0
  300	aesimc.8	q1, q1
  301	vst1.32	{q1}, [r2]
  302	add	r2, r2, #0x80
  303	vst1.32	{q0}, [r2]
  304	sub	r2, r2, #0x70
  305	vld1.32	{q0}, [r2]
  306	add	r2, r2, #0x60
  307	vld1.32	{q1}, [r2]
  308	sub	r2, r2, #0x60
  309	aesimc.8	q0, q0
  310	aesimc.8	q1, q1
  311	vst1.32	{q1}, [r2]
  312	add	r2, r2, #0x60
  313	vst1.32	{q0}, [r2]
  314	sub	r2, r2, #0x50
  315	vld1.32	{q0}, [r2]
  316	add	r2, r2, #0x40
  317	vld1.32	{q1}, [r2]
  318	sub	r2, r2, #0x40
  319	aesimc.8	q0, q0
  320	aesimc.8	q1, q1
  321	vst1.32	{q1}, [r2]
  322	add	r2, r2, #0x40
  323	vst1.32	{q0}, [r2]
  324	sub	r2, r2, #48
  325	vld1.32	{q0}, [r2]
  326	add	r2, r2, #32
  327	vld1.32	{q1}, [r2]
  328	sub	r2, r2, #32
  329	aesimc.8	q0, q0
  330	aesimc.8	q1, q1
  331	vst1.32	{q1}, [r2]
  332	add	r2, r2, #32
  333	vst1.32	{q0}, [r2]
  334	sub	r2, r2, #16
  335	vld1.32	{q0}, [r2]
  336	aesimc.8	q0, q0
  337	vst1.32	{q0}, [r2]
  338	b	L_aes_set_key_arm32_crypto_done
  339L_aes_set_key_arm32_crypto_start_256:
  340	ldr	r4, [r0], #4
  341	ldr	r5, [r0], #4
  342	ldr	r6, [r0], #4
  343	ldr	r7, [r0], #4
  344	ldr	r8, [r0], #4
  345	ldr	r9, [r0], #4
  346	ldr	r10, [r0], #4
  347	ldr	r11, [r0], #4
  348#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  349	stm	r2!, {r4, r5}
  350#else
  351	strd	r4, r5, [r2], #8
  352#endif
  353#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  354	stm	r2!, {r6, r7}
  355#else
  356	strd	r6, r7, [r2], #8
  357#endif
  358#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  359	stm	r2!, {r8, r9}
  360#else
  361	strd	r8, r9, [r2], #8
  362#endif
  363#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  364	stm	r2!, {r10, r11}
  365#else
  366	strd	r10, r11, [r2], #8
  367#endif
  368	vdup.32	q1, r11
  369	vmov.i32	q0, #0
  370	aese.8	q0, q1
  371	vmov.i32	r12, s0
  372	ror	r12, r12, #8
  373	eor	r4, r4, #1
  374	eor	r4, r4, r12
  375	eor	r5, r5, r4
  376	eor	r6, r6, r5
  377	eor	r7, r7, r6
  378	vdup.32	q1, r7
  379	vmov.i32	q0, #0
  380	aese.8	q0, q1
  381	vmov.i32	r12, s0
  382	eor	r8, r8, r12
  383	eor	r9, r9, r8
  384	eor	r10, r10, r9
  385	eor	r11, r11, r10
  386#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  387	stm	r2!, {r4, r5}
  388#else
  389	strd	r4, r5, [r2], #8
  390#endif
  391#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  392	stm	r2!, {r6, r7}
  393#else
  394	strd	r6, r7, [r2], #8
  395#endif
  396#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  397	stm	r2!, {r8, r9}
  398#else
  399	strd	r8, r9, [r2], #8
  400#endif
  401#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  402	stm	r2!, {r10, r11}
  403#else
  404	strd	r10, r11, [r2], #8
  405#endif
  406	vdup.32	q1, r11
  407	vmov.i32	q0, #0
  408	aese.8	q0, q1
  409	vmov.i32	r12, s0
  410	ror	r12, r12, #8
  411	eor	r4, r4, #2
  412	eor	r4, r4, r12
  413	eor	r5, r5, r4
  414	eor	r6, r6, r5
  415	eor	r7, r7, r6
  416	vdup.32	q1, r7
  417	vmov.i32	q0, #0
  418	aese.8	q0, q1
  419	vmov.i32	r12, s0
  420	eor	r8, r8, r12
  421	eor	r9, r9, r8
  422	eor	r10, r10, r9
  423	eor	r11, r11, r10
  424#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  425	stm	r2!, {r4, r5}
  426#else
  427	strd	r4, r5, [r2], #8
  428#endif
  429#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  430	stm	r2!, {r6, r7}
  431#else
  432	strd	r6, r7, [r2], #8
  433#endif
  434#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  435	stm	r2!, {r8, r9}
  436#else
  437	strd	r8, r9, [r2], #8
  438#endif
  439#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  440	stm	r2!, {r10, r11}
  441#else
  442	strd	r10, r11, [r2], #8
  443#endif
  444	vdup.32	q1, r11
  445	vmov.i32	q0, #0
  446	aese.8	q0, q1
  447	vmov.i32	r12, s0
  448	ror	r12, r12, #8
  449	eor	r4, r4, #4
  450	eor	r4, r4, r12
  451	eor	r5, r5, r4
  452	eor	r6, r6, r5
  453	eor	r7, r7, r6
  454	vdup.32	q1, r7
  455	vmov.i32	q0, #0
  456	aese.8	q0, q1
  457	vmov.i32	r12, s0
  458	eor	r8, r8, r12
  459	eor	r9, r9, r8
  460	eor	r10, r10, r9
  461	eor	r11, r11, r10
  462#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  463	stm	r2!, {r4, r5}
  464#else
  465	strd	r4, r5, [r2], #8
  466#endif
  467#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  468	stm	r2!, {r6, r7}
  469#else
  470	strd	r6, r7, [r2], #8
  471#endif
  472#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  473	stm	r2!, {r8, r9}
  474#else
  475	strd	r8, r9, [r2], #8
  476#endif
  477#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  478	stm	r2!, {r10, r11}
  479#else
  480	strd	r10, r11, [r2], #8
  481#endif
  482	vdup.32	q1, r11
  483	vmov.i32	q0, #0
  484	aese.8	q0, q1
  485	vmov.i32	r12, s0
  486	ror	r12, r12, #8
  487	eor	r4, r4, #8
  488	eor	r4, r4, r12
  489	eor	r5, r5, r4
  490	eor	r6, r6, r5
  491	eor	r7, r7, r6
  492	vdup.32	q1, r7
  493	vmov.i32	q0, #0
  494	aese.8	q0, q1
  495	vmov.i32	r12, s0
  496	eor	r8, r8, r12
  497	eor	r9, r9, r8
  498	eor	r10, r10, r9
  499	eor	r11, r11, r10
  500#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  501	stm	r2!, {r4, r5}
  502#else
  503	strd	r4, r5, [r2], #8
  504#endif
  505#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  506	stm	r2!, {r6, r7}
  507#else
  508	strd	r6, r7, [r2], #8
  509#endif
  510#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  511	stm	r2!, {r8, r9}
  512#else
  513	strd	r8, r9, [r2], #8
  514#endif
  515#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  516	stm	r2!, {r10, r11}
  517#else
  518	strd	r10, r11, [r2], #8
  519#endif
  520	vdup.32	q1, r11
  521	vmov.i32	q0, #0
  522	aese.8	q0, q1
  523	vmov.i32	r12, s0
  524	ror	r12, r12, #8
  525	eor	r4, r4, #16
  526	eor	r4, r4, r12
  527	eor	r5, r5, r4
  528	eor	r6, r6, r5
  529	eor	r7, r7, r6
  530	vdup.32	q1, r7
  531	vmov.i32	q0, #0
  532	aese.8	q0, q1
  533	vmov.i32	r12, s0
  534	eor	r8, r8, r12
  535	eor	r9, r9, r8
  536	eor	r10, r10, r9
  537	eor	r11, r11, r10
  538#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  539	stm	r2!, {r4, r5}
  540#else
  541	strd	r4, r5, [r2], #8
  542#endif
  543#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  544	stm	r2!, {r6, r7}
  545#else
  546	strd	r6, r7, [r2], #8
  547#endif
  548#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  549	stm	r2!, {r8, r9}
  550#else
  551	strd	r8, r9, [r2], #8
  552#endif
  553#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  554	stm	r2!, {r10, r11}
  555#else
  556	strd	r10, r11, [r2], #8
  557#endif
  558	vdup.32	q1, r11
  559	vmov.i32	q0, #0
  560	aese.8	q0, q1
  561	vmov.i32	r12, s0
  562	ror	r12, r12, #8
  563	eor	r4, r4, #32
  564	eor	r4, r4, r12
  565	eor	r5, r5, r4
  566	eor	r6, r6, r5
  567	eor	r7, r7, r6
  568	vdup.32	q1, r7
  569	vmov.i32	q0, #0
  570	aese.8	q0, q1
  571	vmov.i32	r12, s0
  572	eor	r8, r8, r12
  573	eor	r9, r9, r8
  574	eor	r10, r10, r9
  575	eor	r11, r11, r10
  576#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  577	stm	r2!, {r4, r5}
  578#else
  579	strd	r4, r5, [r2], #8
  580#endif
  581#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  582	stm	r2!, {r6, r7}
  583#else
  584	strd	r6, r7, [r2], #8
  585#endif
  586#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  587	stm	r2!, {r8, r9}
  588#else
  589	strd	r8, r9, [r2], #8
  590#endif
  591#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  592	stm	r2!, {r10, r11}
  593#else
  594	strd	r10, r11, [r2], #8
  595#endif
  596	vdup.32	q1, r11
  597	vmov.i32	q0, #0
  598	aese.8	q0, q1
  599	vmov.i32	r12, s0
  600	ror	r12, r12, #8
  601	eor	r4, r4, #0x40
  602	eor	r4, r4, r12
  603	eor	r5, r5, r4
  604	eor	r6, r6, r5
  605	eor	r7, r7, r6
  606#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  607	stm	r2!, {r4, r5}
  608#else
  609	strd	r4, r5, [r2], #8
  610#endif
  611#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  612	stm	r2!, {r6, r7}
  613#else
  614	strd	r6, r7, [r2], #8
  615#endif
  616	cmp	r3, #0
  617	beq	L_aes_set_key_arm32_crypto_done
  618	sub	r2, r2, #0xf0
  619	vld1.32	{q0}, [r2]
  620	add	r2, r2, #0xe0
  621	vld1.32	{q1}, [r2]
  622	sub	r2, r2, #0xe0
  623	vst1.32	{q1}, [r2]
  624	add	r2, r2, #0xe0
  625	vst1.32	{q0}, [r2]
  626	sub	r2, r2, #0xd0
  627	vld1.32	{q0}, [r2]
  628	add	r2, r2, #0xc0
  629	vld1.32	{q1}, [r2]
  630	sub	r2, r2, #0xc0
  631	aesimc.8	q0, q0
  632	aesimc.8	q1, q1
  633	vst1.32	{q1}, [r2]
  634	add	r2, r2, #0xc0
  635	vst1.32	{q0}, [r2]
  636	sub	r2, r2, #0xb0
  637	vld1.32	{q0}, [r2]
  638	add	r2, r2, #0xa0
  639	vld1.32	{q1}, [r2]
  640	sub	r2, r2, #0xa0
  641	aesimc.8	q0, q0
  642	aesimc.8	q1, q1
  643	vst1.32	{q1}, [r2]
  644	add	r2, r2, #0xa0
  645	vst1.32	{q0}, [r2]
  646	sub	r2, r2, #0x90
  647	vld1.32	{q0}, [r2]
  648	add	r2, r2, #0x80
  649	vld1.32	{q1}, [r2]
  650	sub	r2, r2, #0x80
  651	aesimc.8	q0, q0
  652	aesimc.8	q1, q1
  653	vst1.32	{q1}, [r2]
  654	add	r2, r2, #0x80
  655	vst1.32	{q0}, [r2]
  656	sub	r2, r2, #0x70
  657	vld1.32	{q0}, [r2]
  658	add	r2, r2, #0x60
  659	vld1.32	{q1}, [r2]
  660	sub	r2, r2, #0x60
  661	aesimc.8	q0, q0
  662	aesimc.8	q1, q1
  663	vst1.32	{q1}, [r2]
  664	add	r2, r2, #0x60
  665	vst1.32	{q0}, [r2]
  666	sub	r2, r2, #0x50
  667	vld1.32	{q0}, [r2]
  668	add	r2, r2, #0x40
  669	vld1.32	{q1}, [r2]
  670	sub	r2, r2, #0x40
  671	aesimc.8	q0, q0
  672	aesimc.8	q1, q1
  673	vst1.32	{q1}, [r2]
  674	add	r2, r2, #0x40
  675	vst1.32	{q0}, [r2]
  676	sub	r2, r2, #48
  677	vld1.32	{q0}, [r2]
  678	add	r2, r2, #32
  679	vld1.32	{q1}, [r2]
  680	sub	r2, r2, #32
  681	aesimc.8	q0, q0
  682	aesimc.8	q1, q1
  683	vst1.32	{q1}, [r2]
  684	add	r2, r2, #32
  685	vst1.32	{q0}, [r2]
  686	sub	r2, r2, #16
  687	vld1.32	{q0}, [r2]
  688	aesimc.8	q0, q0
  689	vst1.32	{q0}, [r2]
  690	b	L_aes_set_key_arm32_crypto_done
  691L_aes_set_key_arm32_crypto_start_128:
  692	ldr	r4, [r0], #4
  693	ldr	r5, [r0], #4
  694	ldr	r6, [r0], #4
  695	ldr	r7, [r0], #4
  696#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  697	stm	r2!, {r4, r5}
  698#else
  699	strd	r4, r5, [r2], #8
  700#endif
  701#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  702	stm	r2!, {r6, r7}
  703#else
  704	strd	r6, r7, [r2], #8
  705#endif
  706	vdup.32	q1, r7
  707	vmov.i32	q0, #0
  708	aese.8	q0, q1
  709	vmov.i32	r12, s0
  710	ror	r12, r12, #8
  711	eor	r4, r4, #1
  712	eor	r4, r4, r12
  713	eor	r5, r5, r4
  714	eor	r6, r6, r5
  715	eor	r7, r7, r6
  716#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  717	stm	r2!, {r4, r5}
  718#else
  719	strd	r4, r5, [r2], #8
  720#endif
  721#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  722	stm	r2!, {r6, r7}
  723#else
  724	strd	r6, r7, [r2], #8
  725#endif
  726	vdup.32	q1, r7
  727	vmov.i32	q0, #0
  728	aese.8	q0, q1
  729	vmov.i32	r12, s0
  730	ror	r12, r12, #8
  731	eor	r4, r4, #2
  732	eor	r4, r4, r12
  733	eor	r5, r5, r4
  734	eor	r6, r6, r5
  735	eor	r7, r7, r6
  736#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  737	stm	r2!, {r4, r5}
  738#else
  739	strd	r4, r5, [r2], #8
  740#endif
  741#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  742	stm	r2!, {r6, r7}
  743#else
  744	strd	r6, r7, [r2], #8
  745#endif
  746	vdup.32	q1, r7
  747	vmov.i32	q0, #0
  748	aese.8	q0, q1
  749	vmov.i32	r12, s0
  750	ror	r12, r12, #8
  751	eor	r4, r4, #4
  752	eor	r4, r4, r12
  753	eor	r5, r5, r4
  754	eor	r6, r6, r5
  755	eor	r7, r7, r6
  756#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  757	stm	r2!, {r4, r5}
  758#else
  759	strd	r4, r5, [r2], #8
  760#endif
  761#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  762	stm	r2!, {r6, r7}
  763#else
  764	strd	r6, r7, [r2], #8
  765#endif
  766	vdup.32	q1, r7
  767	vmov.i32	q0, #0
  768	aese.8	q0, q1
  769	vmov.i32	r12, s0
  770	ror	r12, r12, #8
  771	eor	r4, r4, #8
  772	eor	r4, r4, r12
  773	eor	r5, r5, r4
  774	eor	r6, r6, r5
  775	eor	r7, r7, r6
  776#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  777	stm	r2!, {r4, r5}
  778#else
  779	strd	r4, r5, [r2], #8
  780#endif
  781#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  782	stm	r2!, {r6, r7}
  783#else
  784	strd	r6, r7, [r2], #8
  785#endif
  786	vdup.32	q1, r7
  787	vmov.i32	q0, #0
  788	aese.8	q0, q1
  789	vmov.i32	r12, s0
  790	ror	r12, r12, #8
  791	eor	r4, r4, #16
  792	eor	r4, r4, r12
  793	eor	r5, r5, r4
  794	eor	r6, r6, r5
  795	eor	r7, r7, r6
  796#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  797	stm	r2!, {r4, r5}
  798#else
  799	strd	r4, r5, [r2], #8
  800#endif
  801#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  802	stm	r2!, {r6, r7}
  803#else
  804	strd	r6, r7, [r2], #8
  805#endif
  806	vdup.32	q1, r7
  807	vmov.i32	q0, #0
  808	aese.8	q0, q1
  809	vmov.i32	r12, s0
  810	ror	r12, r12, #8
  811	eor	r4, r4, #32
  812	eor	r4, r4, r12
  813	eor	r5, r5, r4
  814	eor	r6, r6, r5
  815	eor	r7, r7, r6
  816#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  817	stm	r2!, {r4, r5}
  818#else
  819	strd	r4, r5, [r2], #8
  820#endif
  821#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  822	stm	r2!, {r6, r7}
  823#else
  824	strd	r6, r7, [r2], #8
  825#endif
  826	vdup.32	q1, r7
  827	vmov.i32	q0, #0
  828	aese.8	q0, q1
  829	vmov.i32	r12, s0
  830	ror	r12, r12, #8
  831	eor	r4, r4, #0x40
  832	eor	r4, r4, r12
  833	eor	r5, r5, r4
  834	eor	r6, r6, r5
  835	eor	r7, r7, r6
  836#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  837	stm	r2!, {r4, r5}
  838#else
  839	strd	r4, r5, [r2], #8
  840#endif
  841#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  842	stm	r2!, {r6, r7}
  843#else
  844	strd	r6, r7, [r2], #8
  845#endif
  846	vdup.32	q1, r7
  847	vmov.i32	q0, #0
  848	aese.8	q0, q1
  849	vmov.i32	r12, s0
  850	ror	r12, r12, #8
  851	eor	r4, r4, #0x80
  852	eor	r4, r4, r12
  853	eor	r5, r5, r4
  854	eor	r6, r6, r5
  855	eor	r7, r7, r6
  856#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  857	stm	r2!, {r4, r5}
  858#else
  859	strd	r4, r5, [r2], #8
  860#endif
  861#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  862	stm	r2!, {r6, r7}
  863#else
  864	strd	r6, r7, [r2], #8
  865#endif
  866	vdup.32	q1, r7
  867	vmov.i32	q0, #0
  868	aese.8	q0, q1
  869	vmov.i32	r12, s0
  870	mov	lr, #27
  871	ror	r12, r12, #8
  872	eor	r4, r4, lr
  873	eor	r4, r4, r12
  874	eor	r5, r5, r4
  875	eor	r6, r6, r5
  876	eor	r7, r7, r6
  877#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  878	stm	r2!, {r4, r5}
  879#else
  880	strd	r4, r5, [r2], #8
  881#endif
  882#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  883	stm	r2!, {r6, r7}
  884#else
  885	strd	r6, r7, [r2], #8
  886#endif
  887	vdup.32	q1, r7
  888	vmov.i32	q0, #0
  889	aese.8	q0, q1
  890	vmov.i32	r12, s0
  891	mov	lr, #54
  892	ror	r12, r12, #8
  893	eor	r4, r4, lr
  894	eor	r4, r4, r12
  895	eor	r5, r5, r4
  896	eor	r6, r6, r5
  897	eor	r7, r7, r6
  898#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  899	stm	r2!, {r4, r5}
  900#else
  901	strd	r4, r5, [r2], #8
  902#endif
  903#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  904	stm	r2!, {r6, r7}
  905#else
  906	strd	r6, r7, [r2], #8
  907#endif
  908	cmp	r3, #0
  909	beq	L_aes_set_key_arm32_crypto_done
  910	sub	r2, r2, #0xb0
  911	vld1.32	{q0}, [r2]
  912	add	r2, r2, #0xa0
  913	vld1.32	{q1}, [r2]
  914	sub	r2, r2, #0xa0
  915	vst1.32	{q1}, [r2]
  916	add	r2, r2, #0xa0
  917	vst1.32	{q0}, [r2]
  918	sub	r2, r2, #0x90
  919	vld1.32	{q0}, [r2]
  920	add	r2, r2, #0x80
  921	vld1.32	{q1}, [r2]
  922	sub	r2, r2, #0x80
  923	aesimc.8	q0, q0
  924	aesimc.8	q1, q1
  925	vst1.32	{q1}, [r2]
  926	add	r2, r2, #0x80
  927	vst1.32	{q0}, [r2]
  928	sub	r2, r2, #0x70
  929	vld1.32	{q0}, [r2]
  930	add	r2, r2, #0x60
  931	vld1.32	{q1}, [r2]
  932	sub	r2, r2, #0x60
  933	aesimc.8	q0, q0
  934	aesimc.8	q1, q1
  935	vst1.32	{q1}, [r2]
  936	add	r2, r2, #0x60
  937	vst1.32	{q0}, [r2]
  938	sub	r2, r2, #0x50
  939	vld1.32	{q0}, [r2]
  940	add	r2, r2, #0x40
  941	vld1.32	{q1}, [r2]
  942	sub	r2, r2, #0x40
  943	aesimc.8	q0, q0
  944	aesimc.8	q1, q1
  945	vst1.32	{q1}, [r2]
  946	add	r2, r2, #0x40
  947	vst1.32	{q0}, [r2]
  948	sub	r2, r2, #48
  949	vld1.32	{q0}, [r2]
  950	add	r2, r2, #32
  951	vld1.32	{q1}, [r2]
  952	sub	r2, r2, #32
  953	aesimc.8	q0, q0
  954	aesimc.8	q1, q1
  955	vst1.32	{q1}, [r2]
  956	add	r2, r2, #32
  957	vst1.32	{q0}, [r2]
  958	sub	r2, r2, #16
  959	vld1.32	{q0}, [r2]
  960	aesimc.8	q0, q0
  961	vst1.32	{q0}, [r2]
  962L_aes_set_key_arm32_crypto_done:
  963	pop	{r4, r5, r6, r7, r8, r9, r10, r11, pc}
  964	.size	AES_set_key_AARCH32,.-AES_set_key_AARCH32
  965#if defined(HAVE_AESCCM) || defined(HAVE_AESGCM) || defined(WOLFSSL_AES_DIRECT) || defined(WOLFSSL_AES_COUNTER) || defined(HAVE_AES_CBC)
  966	.text
  967	.align	4
  968	.globl	AES_encrypt_AARCH32
  969	.type	AES_encrypt_AARCH32, %function
  970AES_encrypt_AARCH32:
  971	vpush	{d8-d9}
  972	vld1.8	{q0}, [r0]
  973	vldm	r2!, {q1-q4}
  974	aese.8	q0, q1
  975	aesmc.8	q0, q0
  976	aese.8	q0, q2
  977	aesmc.8	q0, q0
  978	aese.8	q0, q3
  979	aesmc.8	q0, q0
  980	aese.8	q0, q4
  981	aesmc.8	q0, q0
  982	vldm	r2!, {q1-q4}
  983	aese.8	q0, q1
  984	aesmc.8	q0, q0
  985	aese.8	q0, q2
  986	aesmc.8	q0, q0
  987	aese.8	q0, q3
  988	aesmc.8	q0, q0
  989	aese.8	q0, q4
  990	aesmc.8	q0, q0
  991	subs	r3, r3, #10
  992	vld1.32	{q1-q2}, [r2]!
  993	aese.8	q0, q1
  994	aesmc.8	q0, q0
  995	aese.8	q0, q2
  996	beq	L_aes_encrypt_arm32_crypto_round_done
  997	vld1.32	{q1-q2}, [r2]!
  998	subs	r3, r3, #2
  999	aesmc.8	q0, q0
 1000	aese.8	q0, q1
 1001	aesmc.8	q0, q0
 1002	aese.8	q0, q2
 1003	beq	L_aes_encrypt_arm32_crypto_round_done
 1004	vld1.32	{q1-q2}, [r2]!
 1005	aesmc.8	q0, q0
 1006	aese.8	q0, q1
 1007	aesmc.8	q0, q0
 1008	aese.8	q0, q2
 1009L_aes_encrypt_arm32_crypto_round_done:
 1010	vld1.32	{q1}, [r2]
 1011	veor.32	q0, q0, q1
 1012	vst1.8	{q0}, [r1]
 1013	vpop	{d8-d9}
 1014	bx	lr
 1015	.size	AES_encrypt_AARCH32,.-AES_encrypt_AARCH32
 1016#endif /* defined(HAVE_AESCCM) || defined(HAVE_AESGCM) || defined(WOLFSSL_AES_DIRECT) || defined(WOLFSSL_AES_COUNTER) || defined(HAVE_AES_CBC) */
 1017#if !defined(WC_AES_BITSLICED) || defined(WOLFSSL_AES_DIRECT) || defined(WOLFSSL_AES_COUNTER)
 1018#ifdef HAVE_AES_DECRYPT
 1019	.text
 1020	.align	4
 1021	.globl	AES_decrypt_AARCH32
 1022	.type	AES_decrypt_AARCH32, %function
 1023AES_decrypt_AARCH32:
 1024	vpush	{d8-d9}
 1025	vld1.8	{q0}, [r0]
 1026	vldm	r2!, {q1-q4}
 1027	aesd.8	q0, q1
 1028	aesimc.8	q0, q0
 1029	aesd.8	q0, q2
 1030	aesimc.8	q0, q0
 1031	aesd.8	q0, q3
 1032	aesimc.8	q0, q0
 1033	aesd.8	q0, q4
 1034	aesimc.8	q0, q0
 1035	vldm	r2!, {q1-q4}
 1036	aesd.8	q0, q1
 1037	aesimc.8	q0, q0
 1038	aesd.8	q0, q2
 1039	aesimc.8	q0, q0
 1040	aesd.8	q0, q3
 1041	aesimc.8	q0, q0
 1042	aesd.8	q0, q4
 1043	aesimc.8	q0, q0
 1044	vld1.32	{q1-q2}, [r2]!
 1045	aesd.8	q0, q1
 1046	aesimc.8	q0, q0
 1047	aesd.8	q0, q2
 1048	subs	r3, r3, #10
 1049	beq	L_aes_decrypt_arm32_crypto_round_done
 1050	vld1.32	{q1-q2}, [r2]!
 1051	aesimc.8	q0, q0
 1052	aesd.8	q0, q1
 1053	aesimc.8	q0, q0
 1054	aesd.8	q0, q2
 1055	subs	r3, r3, #2
 1056	beq	L_aes_decrypt_arm32_crypto_round_done
 1057	vld1.32	{q1-q2}, [r2]!
 1058	aesimc.8	q0, q0
 1059	aesd.8	q0, q1
 1060	aesimc.8	q0, q0
 1061	aesd.8	q0, q2
 1062L_aes_decrypt_arm32_crypto_round_done:
 1063	vld1.32	{q1}, [r2]
 1064	veor.32	q0, q0, q1
 1065	vst1.8	{q0}, [r1]
 1066	vpop	{d8-d9}
 1067	bx	lr
 1068	.size	AES_decrypt_AARCH32,.-AES_decrypt_AARCH32
 1069#endif /* HAVE_AES_DECRYPT */
 1070#endif /* !defined(WC_AES_BITSLICED) || defined(WOLFSSL_AES_DIRECT) || defined(WOLFSSL_AES_COUNTER) */
 1071#ifdef HAVE_AES_ECB
 1072	.text
 1073	.align	4
 1074	.globl	AES_encrypt_blocks_AARCH32
 1075	.type	AES_encrypt_blocks_AARCH32, %function
 1076AES_encrypt_blocks_AARCH32:
 1077	vpush	{d8-d15}
 1078	ldr	r12, [sp, #64]
 1079	vldm.32	r3!, {q0-q7}
 1080	lsr	r2, r2, #4
 1081	cmp	r12, #12
 1082	blt	L_aes_encrypt_blocks_arm32_crypto_start_128
 1083	bgt	L_aes_encrypt_blocks_arm32_crypto_start_256
 1084	# AES_ECB_192
 1085#ifndef NO_AES_192
 1086	vld1.32	{q8-q9}, [r3]!
 1087	cmp	r2, #1
 1088	beq	L_aes_encrypt_blocks_arm32_crypto_192_start_1
 1089L_aes_encrypt_blocks_arm32_crypto_192_start_4:
 1090	cmp	r2, #4
 1091	blt	L_aes_encrypt_blocks_arm32_crypto_192_start_2
 1092	vldm.8	r0!, {q12-q15}
 1093	aese.8	q12, q0
 1094	aesmc.8	q12, q12
 1095	aese.8	q13, q0
 1096	aesmc.8	q13, q13
 1097	aese.8	q14, q0
 1098	aesmc.8	q14, q14
 1099	aese.8	q15, q0
 1100	aesmc.8	q15, q15
 1101	aese.8	q12, q1
 1102	aesmc.8	q12, q12
 1103	aese.8	q13, q1
 1104	aesmc.8	q13, q13
 1105	aese.8	q14, q1
 1106	aesmc.8	q14, q14
 1107	aese.8	q15, q1
 1108	aesmc.8	q15, q15
 1109	aese.8	q12, q2
 1110	aesmc.8	q12, q12
 1111	aese.8	q13, q2
 1112	aesmc.8	q13, q13
 1113	aese.8	q14, q2
 1114	aesmc.8	q14, q14
 1115	aese.8	q15, q2
 1116	aesmc.8	q15, q15
 1117	aese.8	q12, q3
 1118	aesmc.8	q12, q12
 1119	aese.8	q13, q3
 1120	aesmc.8	q13, q13
 1121	aese.8	q14, q3
 1122	aesmc.8	q14, q14
 1123	aese.8	q15, q3
 1124	aesmc.8	q15, q15
 1125	aese.8	q12, q4
 1126	aesmc.8	q12, q12
 1127	aese.8	q13, q4
 1128	aesmc.8	q13, q13
 1129	aese.8	q14, q4
 1130	aesmc.8	q14, q14
 1131	aese.8	q15, q4
 1132	aesmc.8	q15, q15
 1133	aese.8	q12, q5
 1134	aesmc.8	q12, q12
 1135	aese.8	q13, q5
 1136	aesmc.8	q13, q13
 1137	aese.8	q14, q5
 1138	aesmc.8	q14, q14
 1139	aese.8	q15, q5
 1140	aesmc.8	q15, q15
 1141	aese.8	q12, q6
 1142	aesmc.8	q12, q12
 1143	aese.8	q13, q6
 1144	aesmc.8	q13, q13
 1145	aese.8	q14, q6
 1146	aesmc.8	q14, q14
 1147	aese.8	q15, q6
 1148	aesmc.8	q15, q15
 1149	aese.8	q12, q7
 1150	aesmc.8	q12, q12
 1151	aese.8	q13, q7
 1152	aesmc.8	q13, q13
 1153	aese.8	q14, q7
 1154	aesmc.8	q14, q14
 1155	aese.8	q15, q7
 1156	aesmc.8	q15, q15
 1157	aese.8	q12, q8
 1158	aesmc.8	q12, q12
 1159	aese.8	q13, q8
 1160	aesmc.8	q13, q13
 1161	aese.8	q14, q8
 1162	aesmc.8	q14, q14
 1163	aese.8	q15, q8
 1164	aesmc.8	q15, q15
 1165	vld1.32	{q10}, [r3]!
 1166	aese.8	q12, q9
 1167	aesmc.8	q12, q12
 1168	aese.8	q13, q9
 1169	aesmc.8	q13, q13
 1170	aese.8	q14, q9
 1171	aesmc.8	q14, q14
 1172	aese.8	q15, q9
 1173	aesmc.8	q15, q15
 1174	vld1.32	{q11}, [r3]!
 1175	aese.8	q12, q10
 1176	aesmc.8	q12, q12
 1177	aese.8	q13, q10
 1178	aesmc.8	q13, q13
 1179	aese.8	q14, q10
 1180	aesmc.8	q14, q14
 1181	aese.8	q15, q10
 1182	aesmc.8	q15, q15
 1183	vld1.32	{q10}, [r3]!
 1184	aese.8	q12, q11
 1185	veor.32	q12, q12, q10
 1186	aese.8	q13, q11
 1187	veor.32	q13, q13, q10
 1188	aese.8	q14, q11
 1189	veor.32	q14, q14, q10
 1190	aese.8	q15, q11
 1191	veor.32	q15, q15, q10
 1192	sub	r3, r3, #48
 1193	sub	r2, r2, #4
 1194	vstm.8	r1!, {q12-q15}
 1195	cmp	r2, #4
 1196	bge	L_aes_encrypt_blocks_arm32_crypto_192_start_4
 1197L_aes_encrypt_blocks_arm32_crypto_192_start_2:
 1198	cmp	r2, #2
 1199	blt	L_aes_encrypt_blocks_arm32_crypto_192_start_1
 1200	vld1.8	{q12-q13}, [r0]!
 1201	aese.8	q12, q0
 1202	aesmc.8	q12, q12
 1203	aese.8	q13, q0
 1204	aesmc.8	q13, q13
 1205	aese.8	q12, q1
 1206	aesmc.8	q12, q12
 1207	aese.8	q13, q1
 1208	aesmc.8	q13, q13
 1209	aese.8	q12, q2
 1210	aesmc.8	q12, q12
 1211	aese.8	q13, q2
 1212	aesmc.8	q13, q13
 1213	aese.8	q12, q3
 1214	aesmc.8	q12, q12
 1215	aese.8	q13, q3
 1216	aesmc.8	q13, q13
 1217	aese.8	q12, q4
 1218	aesmc.8	q12, q12
 1219	aese.8	q13, q4
 1220	aesmc.8	q13, q13
 1221	aese.8	q12, q5
 1222	aesmc.8	q12, q12
 1223	aese.8	q13, q5
 1224	aesmc.8	q13, q13
 1225	aese.8	q12, q6
 1226	aesmc.8	q12, q12
 1227	aese.8	q13, q6
 1228	aesmc.8	q13, q13
 1229	aese.8	q12, q7
 1230	aesmc.8	q12, q12
 1231	aese.8	q13, q7
 1232	aesmc.8	q13, q13
 1233	aese.8	q12, q8
 1234	aesmc.8	q12, q12
 1235	aese.8	q13, q8
 1236	aesmc.8	q13, q13
 1237	vld1.32	{q10}, [r3]!
 1238	aese.8	q12, q9
 1239	aesmc.8	q12, q12
 1240	aese.8	q13, q9
 1241	aesmc.8	q13, q13
 1242	vld1.32	{q11}, [r3]!
 1243	aese.8	q12, q10
 1244	aesmc.8	q12, q12
 1245	aese.8	q13, q10
 1246	aesmc.8	q13, q13
 1247	vld1.32	{q10}, [r3]!
 1248	aese.8	q12, q11
 1249	veor.32	q12, q12, q10
 1250	aese.8	q13, q11
 1251	veor.32	q13, q13, q10
 1252	sub	r3, r3, #48
 1253	sub	r2, r2, #2
 1254	vst1.8	{q12-q13}, [r1]!
 1255L_aes_encrypt_blocks_arm32_crypto_192_start_1:
 1256	cmp	r2, #0
 1257	beq	L_aes_encrypt_blocks_arm32_crypto_192_done
 1258	vld1.8	{q12}, [r0]!
 1259	aese.8	q12, q0
 1260	aesmc.8	q12, q12
 1261	aese.8	q12, q1
 1262	aesmc.8	q12, q12
 1263	aese.8	q12, q2
 1264	aesmc.8	q12, q12
 1265	aese.8	q12, q3
 1266	aesmc.8	q12, q12
 1267	aese.8	q12, q4
 1268	aesmc.8	q12, q12
 1269	aese.8	q12, q5
 1270	aesmc.8	q12, q12
 1271	aese.8	q12, q6
 1272	aesmc.8	q12, q12
 1273	aese.8	q12, q7
 1274	aesmc.8	q12, q12
 1275	aese.8	q12, q8
 1276	aesmc.8	q12, q12
 1277	vld1.32	{q10}, [r3]!
 1278	aese.8	q12, q9
 1279	aesmc.8	q12, q12
 1280	vld1.32	{q11}, [r3]!
 1281	aese.8	q12, q10
 1282	aesmc.8	q12, q12
 1283	vld1.32	{q10}, [r3]!
 1284	aese.8	q12, q11
 1285	veor.32	q12, q12, q10
 1286	sub	r3, r3, #48
 1287	vst1.8	{q12}, [r1]!
 1288L_aes_encrypt_blocks_arm32_crypto_192_done:
 1289#endif /* !NO_AES_192 */
 1290	b	L_aes_encrypt_blocks_arm32_crypto_done
 1291	# AES_ECB_256
 1292L_aes_encrypt_blocks_arm32_crypto_start_256:
 1293#ifndef NO_AES_256
 1294	vld1.32	{q8-q9}, [r3]!
 1295	cmp	r2, #1
 1296	beq	L_aes_encrypt_blocks_arm32_crypto_256_start_1
 1297L_aes_encrypt_blocks_arm32_crypto_256_start_4:
 1298	cmp	r2, #4
 1299	blt	L_aes_encrypt_blocks_arm32_crypto_256_start_2
 1300	vldm.8	r0!, {q12-q15}
 1301	aese.8	q12, q0
 1302	aesmc.8	q12, q12
 1303	aese.8	q13, q0
 1304	aesmc.8	q13, q13
 1305	aese.8	q14, q0
 1306	aesmc.8	q14, q14
 1307	aese.8	q15, q0
 1308	aesmc.8	q15, q15
 1309	aese.8	q12, q1
 1310	aesmc.8	q12, q12
 1311	aese.8	q13, q1
 1312	aesmc.8	q13, q13
 1313	aese.8	q14, q1
 1314	aesmc.8	q14, q14
 1315	aese.8	q15, q1
 1316	aesmc.8	q15, q15
 1317	aese.8	q12, q2
 1318	aesmc.8	q12, q12
 1319	aese.8	q13, q2
 1320	aesmc.8	q13, q13
 1321	aese.8	q14, q2
 1322	aesmc.8	q14, q14
 1323	aese.8	q15, q2
 1324	aesmc.8	q15, q15
 1325	aese.8	q12, q3
 1326	aesmc.8	q12, q12
 1327	aese.8	q13, q3
 1328	aesmc.8	q13, q13
 1329	aese.8	q14, q3
 1330	aesmc.8	q14, q14
 1331	aese.8	q15, q3
 1332	aesmc.8	q15, q15
 1333	aese.8	q12, q4
 1334	aesmc.8	q12, q12
 1335	aese.8	q13, q4
 1336	aesmc.8	q13, q13
 1337	aese.8	q14, q4
 1338	aesmc.8	q14, q14
 1339	aese.8	q15, q4
 1340	aesmc.8	q15, q15
 1341	aese.8	q12, q5
 1342	aesmc.8	q12, q12
 1343	aese.8	q13, q5
 1344	aesmc.8	q13, q13
 1345	aese.8	q14, q5
 1346	aesmc.8	q14, q14
 1347	aese.8	q15, q5
 1348	aesmc.8	q15, q15
 1349	aese.8	q12, q6
 1350	aesmc.8	q12, q12
 1351	aese.8	q13, q6
 1352	aesmc.8	q13, q13
 1353	aese.8	q14, q6
 1354	aesmc.8	q14, q14
 1355	aese.8	q15, q6
 1356	aesmc.8	q15, q15
 1357	aese.8	q12, q7
 1358	aesmc.8	q12, q12
 1359	aese.8	q13, q7
 1360	aesmc.8	q13, q13
 1361	aese.8	q14, q7
 1362	aesmc.8	q14, q14
 1363	aese.8	q15, q7
 1364	aesmc.8	q15, q15
 1365	aese.8	q12, q8
 1366	aesmc.8	q12, q12
 1367	aese.8	q13, q8
 1368	aesmc.8	q13, q13
 1369	aese.8	q14, q8
 1370	aesmc.8	q14, q14
 1371	aese.8	q15, q8
 1372	aesmc.8	q15, q15
 1373	vld1.32	{q10}, [r3]!
 1374	aese.8	q12, q9
 1375	aesmc.8	q12, q12
 1376	aese.8	q13, q9
 1377	aesmc.8	q13, q13
 1378	aese.8	q14, q9
 1379	aesmc.8	q14, q14
 1380	aese.8	q15, q9
 1381	aesmc.8	q15, q15
 1382	vld1.32	{q11}, [r3]!
 1383	aese.8	q12, q10
 1384	aesmc.8	q12, q12
 1385	aese.8	q13, q10
 1386	aesmc.8	q13, q13
 1387	aese.8	q14, q10
 1388	aesmc.8	q14, q14
 1389	aese.8	q15, q10
 1390	aesmc.8	q15, q15
 1391	vld1.32	{q10}, [r3]!
 1392	aese.8	q12, q11
 1393	aesmc.8	q12, q12
 1394	aese.8	q13, q11
 1395	aesmc.8	q13, q13
 1396	aese.8	q14, q11
 1397	aesmc.8	q14, q14
 1398	aese.8	q15, q11
 1399	aesmc.8	q15, q15
 1400	vld1.32	{q11}, [r3]!
 1401	aese.8	q12, q10
 1402	aesmc.8	q12, q12
 1403	aese.8	q13, q10
 1404	aesmc.8	q13, q13
 1405	aese.8	q14, q10
 1406	aesmc.8	q14, q14
 1407	aese.8	q15, q10
 1408	aesmc.8	q15, q15
 1409	vld1.32	{q10}, [r3]!
 1410	aese.8	q12, q11
 1411	veor.32	q12, q12, q10
 1412	aese.8	q13, q11
 1413	veor.32	q13, q13, q10
 1414	aese.8	q14, q11
 1415	veor.32	q14, q14, q10
 1416	aese.8	q15, q11
 1417	veor.32	q15, q15, q10
 1418	sub	r3, r3, #0x50
 1419	sub	r2, r2, #4
 1420	vstm.8	r1!, {q12-q15}
 1421	cmp	r2, #4
 1422	bge	L_aes_encrypt_blocks_arm32_crypto_256_start_4
 1423L_aes_encrypt_blocks_arm32_crypto_256_start_2:
 1424	cmp	r2, #2
 1425	blt	L_aes_encrypt_blocks_arm32_crypto_256_start_1
 1426	vld1.8	{q12-q13}, [r0]!
 1427	aese.8	q12, q0
 1428	aesmc.8	q12, q12
 1429	aese.8	q13, q0
 1430	aesmc.8	q13, q13
 1431	aese.8	q12, q1
 1432	aesmc.8	q12, q12
 1433	aese.8	q13, q1
 1434	aesmc.8	q13, q13
 1435	aese.8	q12, q2
 1436	aesmc.8	q12, q12
 1437	aese.8	q13, q2
 1438	aesmc.8	q13, q13
 1439	aese.8	q12, q3
 1440	aesmc.8	q12, q12
 1441	aese.8	q13, q3
 1442	aesmc.8	q13, q13
 1443	aese.8	q12, q4
 1444	aesmc.8	q12, q12
 1445	aese.8	q13, q4
 1446	aesmc.8	q13, q13
 1447	aese.8	q12, q5
 1448	aesmc.8	q12, q12
 1449	aese.8	q13, q5
 1450	aesmc.8	q13, q13
 1451	aese.8	q12, q6
 1452	aesmc.8	q12, q12
 1453	aese.8	q13, q6
 1454	aesmc.8	q13, q13
 1455	aese.8	q12, q7
 1456	aesmc.8	q12, q12
 1457	aese.8	q13, q7
 1458	aesmc.8	q13, q13
 1459	aese.8	q12, q8
 1460	aesmc.8	q12, q12
 1461	aese.8	q13, q8
 1462	aesmc.8	q13, q13
 1463	vld1.32	{q10}, [r3]!
 1464	aese.8	q12, q9
 1465	aesmc.8	q12, q12
 1466	aese.8	q13, q9
 1467	aesmc.8	q13, q13
 1468	vld1.32	{q11}, [r3]!
 1469	aese.8	q12, q10
 1470	aesmc.8	q12, q12
 1471	aese.8	q13, q10
 1472	aesmc.8	q13, q13
 1473	vld1.32	{q10}, [r3]!
 1474	aese.8	q12, q11
 1475	aesmc.8	q12, q12
 1476	aese.8	q13, q11
 1477	aesmc.8	q13, q13
 1478	vld1.32	{q11}, [r3]!
 1479	aese.8	q12, q10
 1480	aesmc.8	q12, q12
 1481	aese.8	q13, q10
 1482	aesmc.8	q13, q13
 1483	vld1.32	{q10}, [r3]!
 1484	aese.8	q12, q11
 1485	veor.32	q12, q12, q10
 1486	aese.8	q13, q11
 1487	veor.32	q13, q13, q10
 1488	sub	r3, r3, #0x50
 1489	sub	r2, r2, #2
 1490	vst1.8	{q12-q13}, [r1]!
 1491L_aes_encrypt_blocks_arm32_crypto_256_start_1:
 1492	cmp	r2, #0
 1493	beq	L_aes_encrypt_blocks_arm32_crypto_256_done
 1494	vld1.8	{q12}, [r0]!
 1495	aese.8	q12, q0
 1496	aesmc.8	q12, q12
 1497	aese.8	q12, q1
 1498	aesmc.8	q12, q12
 1499	aese.8	q12, q2
 1500	aesmc.8	q12, q12
 1501	aese.8	q12, q3
 1502	aesmc.8	q12, q12
 1503	aese.8	q12, q4
 1504	aesmc.8	q12, q12
 1505	aese.8	q12, q5
 1506	aesmc.8	q12, q12
 1507	aese.8	q12, q6
 1508	aesmc.8	q12, q12
 1509	aese.8	q12, q7
 1510	aesmc.8	q12, q12
 1511	aese.8	q12, q8
 1512	aesmc.8	q12, q12
 1513	vld1.32	{q10}, [r3]!
 1514	aese.8	q12, q9
 1515	aesmc.8	q12, q12
 1516	vld1.32	{q11}, [r3]!
 1517	aese.8	q12, q10
 1518	aesmc.8	q12, q12
 1519	vld1.32	{q10}, [r3]!
 1520	aese.8	q12, q11
 1521	aesmc.8	q12, q12
 1522	vld1.32	{q11}, [r3]!
 1523	aese.8	q12, q10
 1524	aesmc.8	q12, q12
 1525	vld1.32	{q10}, [r3]!
 1526	aese.8	q12, q11
 1527	veor.32	q12, q12, q10
 1528	sub	r3, r3, #0x50
 1529	vst1.8	{q12}, [r1]!
 1530L_aes_encrypt_blocks_arm32_crypto_256_done:
 1531#endif /* !NO_AES_256 */
 1532	b	L_aes_encrypt_blocks_arm32_crypto_done
 1533	# AES_ECB_128
 1534L_aes_encrypt_blocks_arm32_crypto_start_128:
 1535#ifndef NO_AES_128
 1536	vldm.32	r3!, {q8-q10}
 1537	cmp	r2, #1
 1538	beq	L_aes_encrypt_blocks_arm32_crypto_128_start_1
 1539L_aes_encrypt_blocks_arm32_crypto_128_start_4:
 1540	cmp	r2, #4
 1541	blt	L_aes_encrypt_blocks_arm32_crypto_128_start_2
 1542	vldm.8	r0!, {q12-q15}
 1543	aese.8	q12, q0
 1544	aesmc.8	q12, q12
 1545	aese.8	q13, q0
 1546	aesmc.8	q13, q13
 1547	aese.8	q14, q0
 1548	aesmc.8	q14, q14
 1549	aese.8	q15, q0
 1550	aesmc.8	q15, q15
 1551	aese.8	q12, q1
 1552	aesmc.8	q12, q12
 1553	aese.8	q13, q1
 1554	aesmc.8	q13, q13
 1555	aese.8	q14, q1
 1556	aesmc.8	q14, q14
 1557	aese.8	q15, q1
 1558	aesmc.8	q15, q15
 1559	aese.8	q12, q2
 1560	aesmc.8	q12, q12
 1561	aese.8	q13, q2
 1562	aesmc.8	q13, q13
 1563	aese.8	q14, q2
 1564	aesmc.8	q14, q14
 1565	aese.8	q15, q2
 1566	aesmc.8	q15, q15
 1567	aese.8	q12, q3
 1568	aesmc.8	q12, q12
 1569	aese.8	q13, q3
 1570	aesmc.8	q13, q13
 1571	aese.8	q14, q3
 1572	aesmc.8	q14, q14
 1573	aese.8	q15, q3
 1574	aesmc.8	q15, q15
 1575	aese.8	q12, q4
 1576	aesmc.8	q12, q12
 1577	aese.8	q13, q4
 1578	aesmc.8	q13, q13
 1579	aese.8	q14, q4
 1580	aesmc.8	q14, q14
 1581	aese.8	q15, q4
 1582	aesmc.8	q15, q15
 1583	aese.8	q12, q5
 1584	aesmc.8	q12, q12
 1585	aese.8	q13, q5
 1586	aesmc.8	q13, q13
 1587	aese.8	q14, q5
 1588	aesmc.8	q14, q14
 1589	aese.8	q15, q5
 1590	aesmc.8	q15, q15
 1591	aese.8	q12, q6
 1592	aesmc.8	q12, q12
 1593	aese.8	q13, q6
 1594	aesmc.8	q13, q13
 1595	aese.8	q14, q6
 1596	aesmc.8	q14, q14
 1597	aese.8	q15, q6
 1598	aesmc.8	q15, q15
 1599	aese.8	q12, q7
 1600	aesmc.8	q12, q12
 1601	aese.8	q13, q7
 1602	aesmc.8	q13, q13
 1603	aese.8	q14, q7
 1604	aesmc.8	q14, q14
 1605	aese.8	q15, q7
 1606	aesmc.8	q15, q15
 1607	aese.8	q12, q8
 1608	aesmc.8	q12, q12
 1609	aese.8	q13, q8
 1610	aesmc.8	q13, q13
 1611	aese.8	q14, q8
 1612	aesmc.8	q14, q14
 1613	aese.8	q15, q8
 1614	aesmc.8	q15, q15
 1615	aese.8	q12, q9
 1616	veor.32	q12, q12, q10
 1617	aese.8	q13, q9
 1618	veor.32	q13, q13, q10
 1619	aese.8	q14, q9
 1620	veor.32	q14, q14, q10
 1621	aese.8	q15, q9
 1622	veor.32	q15, q15, q10
 1623	sub	r2, r2, #4
 1624	vstm.8	r1!, {q12-q15}
 1625	cmp	r2, #4
 1626	bge	L_aes_encrypt_blocks_arm32_crypto_128_start_4
 1627L_aes_encrypt_blocks_arm32_crypto_128_start_2:
 1628	cmp	r2, #2
 1629	blt	L_aes_encrypt_blocks_arm32_crypto_128_start_1
 1630	vld1.8	{q12-q13}, [r0]!
 1631	aese.8	q12, q0
 1632	aesmc.8	q12, q12
 1633	aese.8	q13, q0
 1634	aesmc.8	q13, q13
 1635	aese.8	q12, q1
 1636	aesmc.8	q12, q12
 1637	aese.8	q13, q1
 1638	aesmc.8	q13, q13
 1639	aese.8	q12, q2
 1640	aesmc.8	q12, q12
 1641	aese.8	q13, q2
 1642	aesmc.8	q13, q13
 1643	aese.8	q12, q3
 1644	aesmc.8	q12, q12
 1645	aese.8	q13, q3
 1646	aesmc.8	q13, q13
 1647	aese.8	q12, q4
 1648	aesmc.8	q12, q12
 1649	aese.8	q13, q4
 1650	aesmc.8	q13, q13
 1651	aese.8	q12, q5
 1652	aesmc.8	q12, q12
 1653	aese.8	q13, q5
 1654	aesmc.8	q13, q13
 1655	aese.8	q12, q6
 1656	aesmc.8	q12, q12
 1657	aese.8	q13, q6
 1658	aesmc.8	q13, q13
 1659	aese.8	q12, q7
 1660	aesmc.8	q12, q12
 1661	aese.8	q13, q7
 1662	aesmc.8	q13, q13
 1663	aese.8	q12, q8
 1664	aesmc.8	q12, q12
 1665	aese.8	q13, q8
 1666	aesmc.8	q13, q13
 1667	aese.8	q12, q9
 1668	veor.32	q12, q12, q10
 1669	aese.8	q13, q9
 1670	veor.32	q13, q13, q10
 1671	sub	r2, r2, #2
 1672	vst1.8	{q12-q13}, [r1]!
 1673L_aes_encrypt_blocks_arm32_crypto_128_start_1:
 1674	cmp	r2, #0
 1675	beq	L_aes_encrypt_blocks_arm32_crypto_128_done
 1676	vld1.8	{q12}, [r0]!
 1677	aese.8	q12, q0
 1678	aesmc.8	q12, q12
 1679	aese.8	q12, q1
 1680	aesmc.8	q12, q12
 1681	aese.8	q12, q2
 1682	aesmc.8	q12, q12
 1683	aese.8	q12, q3
 1684	aesmc.8	q12, q12
 1685	aese.8	q12, q4
 1686	aesmc.8	q12, q12
 1687	aese.8	q12, q5
 1688	aesmc.8	q12, q12
 1689	aese.8	q12, q6
 1690	aesmc.8	q12, q12
 1691	aese.8	q12, q7
 1692	aesmc.8	q12, q12
 1693	aese.8	q12, q8
 1694	aesmc.8	q12, q12
 1695	aese.8	q12, q9
 1696	veor.32	q12, q12, q10
 1697	vst1.8	{q12}, [r1]!
 1698L_aes_encrypt_blocks_arm32_crypto_128_done:
 1699#endif /* !NO_AES_128 */
 1700L_aes_encrypt_blocks_arm32_crypto_done:
 1701	vpop	{d8-d15}
 1702	bx	lr
 1703	.size	AES_encrypt_blocks_AARCH32,.-AES_encrypt_blocks_AARCH32
 1704#ifdef HAVE_AES_DECRYPT
 1705	.text
 1706	.align	4
 1707	.globl	AES_decrypt_blocks_AARCH32
 1708	.type	AES_decrypt_blocks_AARCH32, %function
 1709AES_decrypt_blocks_AARCH32:
 1710	vpush	{d8-d15}
 1711	ldr	r12, [sp, #64]
 1712	vldm.32	r3!, {q0-q7}
 1713	lsr	r2, r2, #4
 1714	cmp	r12, #12
 1715	blt	L_aes_decrypt_blocks_arm32_crypto_start_128
 1716	bgt	L_aes_decrypt_blocks_arm32_crypto_start_256
 1717	# AES_ECB_192
 1718#ifndef NO_AES_192
 1719	vld1.32	{q8-q9}, [r3]!
 1720	cmp	r2, #1
 1721	beq	L_aes_decrypt_blocks_arm32_crypto_192_start_1
 1722	cmp	r2, #4
 1723	blt	L_aes_decrypt_blocks_arm32_crypto_192_start_2
 1724L_aes_decrypt_blocks_arm32_crypto_192_start_4:
 1725	vldm.8	r0!, {q12-q15}
 1726	aesd.8	q12, q0
 1727	aesimc.8	q12, q12
 1728	aesd.8	q13, q0
 1729	aesimc.8	q13, q13
 1730	aesd.8	q14, q0
 1731	aesimc.8	q14, q14
 1732	aesd.8	q15, q0
 1733	aesimc.8	q15, q15
 1734	aesd.8	q12, q1
 1735	aesimc.8	q12, q12
 1736	aesd.8	q13, q1
 1737	aesimc.8	q13, q13
 1738	aesd.8	q14, q1
 1739	aesimc.8	q14, q14
 1740	aesd.8	q15, q1
 1741	aesimc.8	q15, q15
 1742	aesd.8	q12, q2
 1743	aesimc.8	q12, q12
 1744	aesd.8	q13, q2
 1745	aesimc.8	q13, q13
 1746	aesd.8	q14, q2
 1747	aesimc.8	q14, q14
 1748	aesd.8	q15, q2
 1749	aesimc.8	q15, q15
 1750	aesd.8	q12, q3
 1751	aesimc.8	q12, q12
 1752	aesd.8	q13, q3
 1753	aesimc.8	q13, q13
 1754	aesd.8	q14, q3
 1755	aesimc.8	q14, q14
 1756	aesd.8	q15, q3
 1757	aesimc.8	q15, q15
 1758	aesd.8	q12, q4
 1759	aesimc.8	q12, q12
 1760	aesd.8	q13, q4
 1761	aesimc.8	q13, q13
 1762	aesd.8	q14, q4
 1763	aesimc.8	q14, q14
 1764	aesd.8	q15, q4
 1765	aesimc.8	q15, q15
 1766	aesd.8	q12, q5
 1767	aesimc.8	q12, q12
 1768	aesd.8	q13, q5
 1769	aesimc.8	q13, q13
 1770	aesd.8	q14, q5
 1771	aesimc.8	q14, q14
 1772	aesd.8	q15, q5
 1773	aesimc.8	q15, q15
 1774	aesd.8	q12, q6
 1775	aesimc.8	q12, q12
 1776	aesd.8	q13, q6
 1777	aesimc.8	q13, q13
 1778	aesd.8	q14, q6
 1779	aesimc.8	q14, q14
 1780	aesd.8	q15, q6
 1781	aesimc.8	q15, q15
 1782	aesd.8	q12, q7
 1783	aesimc.8	q12, q12
 1784	aesd.8	q13, q7
 1785	aesimc.8	q13, q13
 1786	aesd.8	q14, q7
 1787	aesimc.8	q14, q14
 1788	aesd.8	q15, q7
 1789	aesimc.8	q15, q15
 1790	aesd.8	q12, q8
 1791	aesimc.8	q12, q12
 1792	aesd.8	q13, q8
 1793	aesimc.8	q13, q13
 1794	aesd.8	q14, q8
 1795	aesimc.8	q14, q14
 1796	aesd.8	q15, q8
 1797	aesimc.8	q15, q15
 1798	vld1.32	{q10}, [r3]!
 1799	aesd.8	q12, q9
 1800	aesimc.8	q12, q12
 1801	aesd.8	q13, q9
 1802	aesimc.8	q13, q13
 1803	aesd.8	q14, q9
 1804	aesimc.8	q14, q14
 1805	aesd.8	q15, q9
 1806	aesimc.8	q15, q15
 1807	vld1.32	{q11}, [r3]!
 1808	aesd.8	q12, q10
 1809	aesimc.8	q12, q12
 1810	aesd.8	q13, q10
 1811	aesimc.8	q13, q13
 1812	aesd.8	q14, q10
 1813	aesimc.8	q14, q14
 1814	aesd.8	q15, q10
 1815	aesimc.8	q15, q15
 1816	vld1.32	{q10}, [r3]!
 1817	aesd.8	q12, q11
 1818	veor.32	q12, q12, q10
 1819	aesd.8	q13, q11
 1820	veor.32	q13, q13, q10
 1821	aesd.8	q14, q11
 1822	veor.32	q14, q14, q10
 1823	aesd.8	q15, q11
 1824	veor.32	q15, q15, q10
 1825	sub	r3, r3, #48
 1826	sub	r2, r2, #4
 1827	vstm.8	r1!, {q12-q15}
 1828	cmp	r2, #4
 1829	bge	L_aes_decrypt_blocks_arm32_crypto_192_start_4
 1830L_aes_decrypt_blocks_arm32_crypto_192_start_2:
 1831	cmp	r2, #2
 1832	blt	L_aes_decrypt_blocks_arm32_crypto_192_start_1
 1833	vld1.8	{q12-q13}, [r0]!
 1834	aesd.8	q12, q0
 1835	aesimc.8	q12, q12
 1836	aesd.8	q13, q0
 1837	aesimc.8	q13, q13
 1838	aesd.8	q12, q1
 1839	aesimc.8	q12, q12
 1840	aesd.8	q13, q1
 1841	aesimc.8	q13, q13
 1842	aesd.8	q12, q2
 1843	aesimc.8	q12, q12
 1844	aesd.8	q13, q2
 1845	aesimc.8	q13, q13
 1846	aesd.8	q12, q3
 1847	aesimc.8	q12, q12
 1848	aesd.8	q13, q3
 1849	aesimc.8	q13, q13
 1850	aesd.8	q12, q4
 1851	aesimc.8	q12, q12
 1852	aesd.8	q13, q4
 1853	aesimc.8	q13, q13
 1854	aesd.8	q12, q5
 1855	aesimc.8	q12, q12
 1856	aesd.8	q13, q5
 1857	aesimc.8	q13, q13
 1858	aesd.8	q12, q6
 1859	aesimc.8	q12, q12
 1860	aesd.8	q13, q6
 1861	aesimc.8	q13, q13
 1862	aesd.8	q12, q7
 1863	aesimc.8	q12, q12
 1864	aesd.8	q13, q7
 1865	aesimc.8	q13, q13
 1866	aesd.8	q12, q8
 1867	aesimc.8	q12, q12
 1868	aesd.8	q13, q8
 1869	aesimc.8	q13, q13
 1870	vld1.32	{q10}, [r3]!
 1871	aesd.8	q12, q9
 1872	aesimc.8	q12, q12
 1873	aesd.8	q13, q9
 1874	aesimc.8	q13, q13
 1875	vld1.32	{q11}, [r3]!
 1876	aesd.8	q12, q10
 1877	aesimc.8	q12, q12
 1878	aesd.8	q13, q10
 1879	aesimc.8	q13, q13
 1880	vld1.32	{q10}, [r3]!
 1881	aesd.8	q12, q11
 1882	veor.32	q12, q12, q10
 1883	aesd.8	q13, q11
 1884	veor.32	q13, q13, q10
 1885	sub	r3, r3, #48
 1886	sub	r2, r2, #2
 1887	vst1.8	{q12-q13}, [r1]!
 1888L_aes_decrypt_blocks_arm32_crypto_192_start_1:
 1889	cmp	r2, #0
 1890	beq	L_aes_decrypt_blocks_arm32_crypto_192_done
 1891	vld1.8	{q12}, [r0]!
 1892	aesd.8	q12, q0
 1893	aesimc.8	q12, q12
 1894	aesd.8	q12, q1
 1895	aesimc.8	q12, q12
 1896	aesd.8	q12, q2
 1897	aesimc.8	q12, q12
 1898	aesd.8	q12, q3
 1899	aesimc.8	q12, q12
 1900	aesd.8	q12, q4
 1901	aesimc.8	q12, q12
 1902	aesd.8	q12, q5
 1903	aesimc.8	q12, q12
 1904	aesd.8	q12, q6
 1905	aesimc.8	q12, q12
 1906	aesd.8	q12, q7
 1907	aesimc.8	q12, q12
 1908	aesd.8	q12, q8
 1909	aesimc.8	q12, q12
 1910	vld1.32	{q10}, [r3]!
 1911	aesd.8	q12, q9
 1912	aesimc.8	q12, q12
 1913	vld1.32	{q11}, [r3]!
 1914	aesd.8	q12, q10
 1915	aesimc.8	q12, q12
 1916	vld1.32	{q10}, [r3]!
 1917	aesd.8	q12, q11
 1918	veor.32	q12, q12, q10
 1919	sub	r3, r3, #48
 1920	vst1.8	{q12}, [r1]!
 1921L_aes_decrypt_blocks_arm32_crypto_192_done:
 1922#endif /* !NO_AES_192 */
 1923	b	L_aes_decrypt_blocks_arm32_crypto_done
 1924	# AES_ECB_256
 1925L_aes_decrypt_blocks_arm32_crypto_start_256:
 1926#ifndef NO_AES_256
 1927	vld1.32	{q8-q9}, [r3]!
 1928	cmp	r2, #1
 1929	beq	L_aes_decrypt_blocks_arm32_crypto_256_start_1
 1930	cmp	r2, #4
 1931	blt	L_aes_decrypt_blocks_arm32_crypto_256_start_2
 1932L_aes_decrypt_blocks_arm32_crypto_256_start_4:
 1933	vldm.8	r0!, {q12-q15}
 1934	aesd.8	q12, q0
 1935	aesimc.8	q12, q12
 1936	aesd.8	q13, q0
 1937	aesimc.8	q13, q13
 1938	aesd.8	q14, q0
 1939	aesimc.8	q14, q14
 1940	aesd.8	q15, q0
 1941	aesimc.8	q15, q15
 1942	aesd.8	q12, q1
 1943	aesimc.8	q12, q12
 1944	aesd.8	q13, q1
 1945	aesimc.8	q13, q13
 1946	aesd.8	q14, q1
 1947	aesimc.8	q14, q14
 1948	aesd.8	q15, q1
 1949	aesimc.8	q15, q15
 1950	aesd.8	q12, q2
 1951	aesimc.8	q12, q12
 1952	aesd.8	q13, q2
 1953	aesimc.8	q13, q13
 1954	aesd.8	q14, q2
 1955	aesimc.8	q14, q14
 1956	aesd.8	q15, q2
 1957	aesimc.8	q15, q15
 1958	aesd.8	q12, q3
 1959	aesimc.8	q12, q12
 1960	aesd.8	q13, q3
 1961	aesimc.8	q13, q13
 1962	aesd.8	q14, q3
 1963	aesimc.8	q14, q14
 1964	aesd.8	q15, q3
 1965	aesimc.8	q15, q15
 1966	aesd.8	q12, q4
 1967	aesimc.8	q12, q12
 1968	aesd.8	q13, q4
 1969	aesimc.8	q13, q13
 1970	aesd.8	q14, q4
 1971	aesimc.8	q14, q14
 1972	aesd.8	q15, q4
 1973	aesimc.8	q15, q15
 1974	aesd.8	q12, q5
 1975	aesimc.8	q12, q12
 1976	aesd.8	q13, q5
 1977	aesimc.8	q13, q13
 1978	aesd.8	q14, q5
 1979	aesimc.8	q14, q14
 1980	aesd.8	q15, q5
 1981	aesimc.8	q15, q15
 1982	aesd.8	q12, q6
 1983	aesimc.8	q12, q12
 1984	aesd.8	q13, q6
 1985	aesimc.8	q13, q13
 1986	aesd.8	q14, q6
 1987	aesimc.8	q14, q14
 1988	aesd.8	q15, q6
 1989	aesimc.8	q15, q15
 1990	aesd.8	q12, q7
 1991	aesimc.8	q12, q12
 1992	aesd.8	q13, q7
 1993	aesimc.8	q13, q13
 1994	aesd.8	q14, q7
 1995	aesimc.8	q14, q14
 1996	aesd.8	q15, q7
 1997	aesimc.8	q15, q15
 1998	aesd.8	q12, q8
 1999	aesimc.8	q12, q12
 2000	aesd.8	q13, q8
 2001	aesimc.8	q13, q13
 2002	aesd.8	q14, q8
 2003	aesimc.8	q14, q14
 2004	aesd.8	q15, q8
 2005	aesimc.8	q15, q15
 2006	vld1.32	{q10}, [r3]!
 2007	aesd.8	q12, q9
 2008	aesimc.8	q12, q12
 2009	aesd.8	q13, q9
 2010	aesimc.8	q13, q13
 2011	aesd.8	q14, q9
 2012	aesimc.8	q14, q14
 2013	aesd.8	q15, q9
 2014	aesimc.8	q15, q15
 2015	vld1.32	{q11}, [r3]!
 2016	aesd.8	q12, q10
 2017	aesimc.8	q12, q12
 2018	aesd.8	q13, q10
 2019	aesimc.8	q13, q13
 2020	aesd.8	q14, q10
 2021	aesimc.8	q14, q14
 2022	aesd.8	q15, q10
 2023	aesimc.8	q15, q15
 2024	vld1.32	{q10}, [r3]!
 2025	aesd.8	q12, q11
 2026	aesimc.8	q12, q12
 2027	aesd.8	q13, q11
 2028	aesimc.8	q13, q13
 2029	aesd.8	q14, q11
 2030	aesimc.8	q14, q14
 2031	aesd.8	q15, q11
 2032	aesimc.8	q15, q15
 2033	vld1.32	{q11}, [r3]!
 2034	aesd.8	q12, q10
 2035	aesimc.8	q12, q12
 2036	aesd.8	q13, q10
 2037	aesimc.8	q13, q13
 2038	aesd.8	q14, q10
 2039	aesimc.8	q14, q14
 2040	aesd.8	q15, q10
 2041	aesimc.8	q15, q15
 2042	vld1.32	{q10}, [r3]!
 2043	aesd.8	q12, q11
 2044	veor.32	q12, q12, q10
 2045	aesd.8	q13, q11
 2046	veor.32	q13, q13, q10
 2047	aesd.8	q14, q11
 2048	veor.32	q14, q14, q10
 2049	aesd.8	q15, q11
 2050	veor.32	q15, q15, q10
 2051	sub	r3, r3, #0x50
 2052	sub	r2, r2, #4
 2053	vstm.8	r1!, {q12-q15}
 2054	cmp	r2, #4
 2055	bge	L_aes_decrypt_blocks_arm32_crypto_256_start_4
 2056L_aes_decrypt_blocks_arm32_crypto_256_start_2:
 2057	cmp	r2, #2
 2058	blt	L_aes_decrypt_blocks_arm32_crypto_256_start_1
 2059	vld1.8	{q12-q13}, [r0]!
 2060	aesd.8	q12, q0
 2061	aesimc.8	q12, q12
 2062	aesd.8	q13, q0
 2063	aesimc.8	q13, q13
 2064	aesd.8	q12, q1
 2065	aesimc.8	q12, q12
 2066	aesd.8	q13, q1
 2067	aesimc.8	q13, q13
 2068	aesd.8	q12, q2
 2069	aesimc.8	q12, q12
 2070	aesd.8	q13, q2
 2071	aesimc.8	q13, q13
 2072	aesd.8	q12, q3
 2073	aesimc.8	q12, q12
 2074	aesd.8	q13, q3
 2075	aesimc.8	q13, q13
 2076	aesd.8	q12, q4
 2077	aesimc.8	q12, q12
 2078	aesd.8	q13, q4
 2079	aesimc.8	q13, q13
 2080	aesd.8	q12, q5
 2081	aesimc.8	q12, q12
 2082	aesd.8	q13, q5
 2083	aesimc.8	q13, q13
 2084	aesd.8	q12, q6
 2085	aesimc.8	q12, q12
 2086	aesd.8	q13, q6
 2087	aesimc.8	q13, q13
 2088	aesd.8	q12, q7
 2089	aesimc.8	q12, q12
 2090	aesd.8	q13, q7
 2091	aesimc.8	q13, q13
 2092	aesd.8	q12, q8
 2093	aesimc.8	q12, q12
 2094	aesd.8	q13, q8
 2095	aesimc.8	q13, q13
 2096	vld1.32	{q10}, [r3]!
 2097	aesd.8	q12, q9
 2098	aesimc.8	q12, q12
 2099	aesd.8	q13, q9
 2100	aesimc.8	q13, q13
 2101	vld1.32	{q11}, [r3]!
 2102	aesd.8	q12, q10
 2103	aesimc.8	q12, q12
 2104	aesd.8	q13, q10
 2105	aesimc.8	q13, q13
 2106	vld1.32	{q10}, [r3]!
 2107	aesd.8	q12, q11
 2108	aesimc.8	q12, q12
 2109	aesd.8	q13, q11
 2110	aesimc.8	q13, q13
 2111	vld1.32	{q11}, [r3]!
 2112	aesd.8	q12, q10
 2113	aesimc.8	q12, q12
 2114	aesd.8	q13, q10
 2115	aesimc.8	q13, q13
 2116	vld1.32	{q10}, [r3]!
 2117	aesd.8	q12, q11
 2118	veor.32	q12, q12, q10
 2119	aesd.8	q13, q11
 2120	veor.32	q13, q13, q10
 2121	sub	r3, r3, #0x50
 2122	sub	r2, r2, #2
 2123	vst1.8	{q12-q13}, [r1]!
 2124L_aes_decrypt_blocks_arm32_crypto_256_start_1:
 2125	cmp	r2, #0
 2126	beq	L_aes_decrypt_blocks_arm32_crypto_256_done
 2127	vld1.8	{q12}, [r0]!
 2128	aesd.8	q12, q0
 2129	aesimc.8	q12, q12
 2130	aesd.8	q12, q1
 2131	aesimc.8	q12, q12
 2132	aesd.8	q12, q2
 2133	aesimc.8	q12, q12
 2134	aesd.8	q12, q3
 2135	aesimc.8	q12, q12
 2136	aesd.8	q12, q4
 2137	aesimc.8	q12, q12
 2138	aesd.8	q12, q5
 2139	aesimc.8	q12, q12
 2140	aesd.8	q12, q6
 2141	aesimc.8	q12, q12
 2142	aesd.8	q12, q7
 2143	aesimc.8	q12, q12
 2144	aesd.8	q12, q8
 2145	aesimc.8	q12, q12
 2146	vld1.32	{q10}, [r3]!
 2147	aesd.8	q12, q9
 2148	aesimc.8	q12, q12
 2149	vld1.32	{q11}, [r3]!
 2150	aesd.8	q12, q10
 2151	aesimc.8	q12, q12
 2152	vld1.32	{q10}, [r3]!
 2153	aesd.8	q12, q11
 2154	aesimc.8	q12, q12
 2155	vld1.32	{q11}, [r3]!
 2156	aesd.8	q12, q10
 2157	aesimc.8	q12, q12
 2158	vld1.32	{q10}, [r3]!
 2159	aesd.8	q12, q11
 2160	veor.32	q12, q12, q10
 2161	sub	r3, r3, #0x50
 2162	vst1.8	{q12}, [r1]!
 2163L_aes_decrypt_blocks_arm32_crypto_256_done:
 2164#endif /* !NO_AES_256 */
 2165	b	L_aes_decrypt_blocks_arm32_crypto_done
 2166	# AES_ECB_128
 2167L_aes_decrypt_blocks_arm32_crypto_start_128:
 2168#ifndef NO_AES_128
 2169	vldm.32	r3!, {q8-q10}
 2170	cmp	r2, #1
 2171	beq	L_aes_decrypt_blocks_arm32_crypto_128_start_1
 2172	cmp	r2, #4
 2173	blt	L_aes_decrypt_blocks_arm32_crypto_128_start_2
 2174L_aes_decrypt_blocks_arm32_crypto_128_start_4:
 2175	vldm.8	r0!, {q12-q15}
 2176	aesd.8	q12, q0
 2177	aesimc.8	q12, q12
 2178	aesd.8	q13, q0
 2179	aesimc.8	q13, q13
 2180	aesd.8	q14, q0
 2181	aesimc.8	q14, q14
 2182	aesd.8	q15, q0
 2183	aesimc.8	q15, q15
 2184	aesd.8	q12, q1
 2185	aesimc.8	q12, q12
 2186	aesd.8	q13, q1
 2187	aesimc.8	q13, q13
 2188	aesd.8	q14, q1
 2189	aesimc.8	q14, q14
 2190	aesd.8	q15, q1
 2191	aesimc.8	q15, q15
 2192	aesd.8	q12, q2
 2193	aesimc.8	q12, q12
 2194	aesd.8	q13, q2
 2195	aesimc.8	q13, q13
 2196	aesd.8	q14, q2
 2197	aesimc.8	q14, q14
 2198	aesd.8	q15, q2
 2199	aesimc.8	q15, q15
 2200	aesd.8	q12, q3
 2201	aesimc.8	q12, q12
 2202	aesd.8	q13, q3
 2203	aesimc.8	q13, q13
 2204	aesd.8	q14, q3
 2205	aesimc.8	q14, q14
 2206	aesd.8	q15, q3
 2207	aesimc.8	q15, q15
 2208	aesd.8	q12, q4
 2209	aesimc.8	q12, q12
 2210	aesd.8	q13, q4
 2211	aesimc.8	q13, q13
 2212	aesd.8	q14, q4
 2213	aesimc.8	q14, q14
 2214	aesd.8	q15, q4
 2215	aesimc.8	q15, q15
 2216	aesd.8	q12, q5
 2217	aesimc.8	q12, q12
 2218	aesd.8	q13, q5
 2219	aesimc.8	q13, q13
 2220	aesd.8	q14, q5
 2221	aesimc.8	q14, q14
 2222	aesd.8	q15, q5
 2223	aesimc.8	q15, q15
 2224	aesd.8	q12, q6
 2225	aesimc.8	q12, q12
 2226	aesd.8	q13, q6
 2227	aesimc.8	q13, q13
 2228	aesd.8	q14, q6
 2229	aesimc.8	q14, q14
 2230	aesd.8	q15, q6
 2231	aesimc.8	q15, q15
 2232	aesd.8	q12, q7
 2233	aesimc.8	q12, q12
 2234	aesd.8	q13, q7
 2235	aesimc.8	q13, q13
 2236	aesd.8	q14, q7
 2237	aesimc.8	q14, q14
 2238	aesd.8	q15, q7
 2239	aesimc.8	q15, q15
 2240	aesd.8	q12, q8
 2241	aesimc.8	q12, q12
 2242	aesd.8	q13, q8
 2243	aesimc.8	q13, q13
 2244	aesd.8	q14, q8
 2245	aesimc.8	q14, q14
 2246	aesd.8	q15, q8
 2247	aesimc.8	q15, q15
 2248	aesd.8	q12, q9
 2249	veor.32	q12, q12, q10
 2250	aesd.8	q13, q9
 2251	veor.32	q13, q13, q10
 2252	aesd.8	q14, q9
 2253	veor.32	q14, q14, q10
 2254	aesd.8	q15, q9
 2255	veor.32	q15, q15, q10
 2256	sub	r2, r2, #4
 2257	vstm.8	r1!, {q12-q15}
 2258	cmp	r2, #4
 2259	bge	L_aes_decrypt_blocks_arm32_crypto_128_start_4
 2260L_aes_decrypt_blocks_arm32_crypto_128_start_2:
 2261	cmp	r2, #2
 2262	blt	L_aes_decrypt_blocks_arm32_crypto_128_start_1
 2263	vld1.8	{q12-q13}, [r0]!
 2264	aesd.8	q12, q0
 2265	aesimc.8	q12, q12
 2266	aesd.8	q13, q0
 2267	aesimc.8	q13, q13
 2268	aesd.8	q12, q1
 2269	aesimc.8	q12, q12
 2270	aesd.8	q13, q1
 2271	aesimc.8	q13, q13
 2272	aesd.8	q12, q2
 2273	aesimc.8	q12, q12
 2274	aesd.8	q13, q2
 2275	aesimc.8	q13, q13
 2276	aesd.8	q12, q3
 2277	aesimc.8	q12, q12
 2278	aesd.8	q13, q3
 2279	aesimc.8	q13, q13
 2280	aesd.8	q12, q4
 2281	aesimc.8	q12, q12
 2282	aesd.8	q13, q4
 2283	aesimc.8	q13, q13
 2284	aesd.8	q12, q5
 2285	aesimc.8	q12, q12
 2286	aesd.8	q13, q5
 2287	aesimc.8	q13, q13
 2288	aesd.8	q12, q6
 2289	aesimc.8	q12, q12
 2290	aesd.8	q13, q6
 2291	aesimc.8	q13, q13
 2292	aesd.8	q12, q7
 2293	aesimc.8	q12, q12
 2294	aesd.8	q13, q7
 2295	aesimc.8	q13, q13
 2296	aesd.8	q12, q8
 2297	aesimc.8	q12, q12
 2298	aesd.8	q13, q8
 2299	aesimc.8	q13, q13
 2300	aesd.8	q12, q9
 2301	veor.32	q12, q12, q10
 2302	aesd.8	q13, q9
 2303	veor.32	q13, q13, q10
 2304	sub	r2, r2, #2
 2305	vst1.8	{q12-q13}, [r1]!
 2306L_aes_decrypt_blocks_arm32_crypto_128_start_1:
 2307	cmp	r2, #0
 2308	beq	L_aes_decrypt_blocks_arm32_crypto_128_done
 2309	vld1.8	{q12}, [r0]!
 2310	aesd.8	q12, q0
 2311	aesimc.8	q12, q12
 2312	aesd.8	q12, q1
 2313	aesimc.8	q12, q12
 2314	aesd.8	q12, q2
 2315	aesimc.8	q12, q12
 2316	aesd.8	q12, q3
 2317	aesimc.8	q12, q12
 2318	aesd.8	q12, q4
 2319	aesimc.8	q12, q12
 2320	aesd.8	q12, q5
 2321	aesimc.8	q12, q12
 2322	aesd.8	q12, q6
 2323	aesimc.8	q12, q12
 2324	aesd.8	q12, q7
 2325	aesimc.8	q12, q12
 2326	aesd.8	q12, q8
 2327	aesimc.8	q12, q12
 2328	aesd.8	q12, q9
 2329	veor.32	q12, q12, q10
 2330	vst1.8	{q12}, [r1]!
 2331L_aes_decrypt_blocks_arm32_crypto_128_done:
 2332#endif /* !NO_AES_128 */
 2333L_aes_decrypt_blocks_arm32_crypto_done:
 2334	vpop	{d8-d15}
 2335	bx	lr
 2336	.size	AES_decrypt_blocks_AARCH32,.-AES_decrypt_blocks_AARCH32
 2337#endif /* HAVE_AES_DECRYPT */
 2338#endif /* HAVE_AES_ECB */
 2339#ifdef HAVE_AES_CBC
 2340	.text
 2341	.align	4
 2342	.globl	AES_CBC_encrypt_AARCH32
 2343	.type	AES_CBC_encrypt_AARCH32, %function
 2344AES_CBC_encrypt_AARCH32:
 2345	push	{lr}
 2346	vpush	{d8-d15}
 2347	ldr	r12, [sp, #68]
 2348	ldr	lr, [sp, #72]
 2349	vldm.32	r12!, {q0-q7}
 2350	vld1.32	{q15}, [r3]
 2351	subs	lr, lr, #12
 2352	lsr	r2, r2, #4
 2353	blt	L_aes_cbc_encrypt_arm32_crypto_start_128
 2354	bgt	L_aes_cbc_encrypt_arm32_crypto_start_256
 2355	# AES_CBC_192
 2356#ifndef NO_AES_192
 2357	vld1.8	{q14}, [r0]!
 2358	vldm.32	r12!, {q8-q12}
 2359	cmp	r2, #1
 2360	beq	L_aes_cbc_encrypt_arm32_crypto_192_start_1
 2361	cmp	r2, #4
 2362	blt	L_aes_cbc_encrypt_arm32_crypto_192_start_2
 2363L_aes_cbc_encrypt_arm32_crypto_192_start_4:
 2364	veor.32	q15, q15, q14
 2365	aese.8	q15, q0
 2366	aesmc.8	q15, q15
 2367	aese.8	q15, q1
 2368	aesmc.8	q15, q15
 2369	aese.8	q15, q2
 2370	aesmc.8	q15, q15
 2371	aese.8	q15, q3
 2372	aesmc.8	q15, q15
 2373	aese.8	q15, q4
 2374	aesmc.8	q15, q15
 2375	aese.8	q15, q5
 2376	aesmc.8	q15, q15
 2377	aese.8	q15, q6
 2378	aesmc.8	q15, q15
 2379	aese.8	q15, q7
 2380	aesmc.8	q15, q15
 2381	aese.8	q15, q8
 2382	aesmc.8	q15, q15
 2383	aese.8	q15, q9
 2384	aesmc.8	q15, q15
 2385	aese.8	q15, q10
 2386	aesmc.8	q15, q15
 2387	vld1.8	{q14}, [r0]!
 2388	aese.8	q15, q11
 2389	veor.32	q15, q15, q12
 2390	vst1.8	{q15}, [r1]!
 2391	veor.32	q15, q15, q14
 2392	aese.8	q15, q0
 2393	aesmc.8	q15, q15
 2394	aese.8	q15, q1
 2395	aesmc.8	q15, q15
 2396	aese.8	q15, q2
 2397	aesmc.8	q15, q15
 2398	aese.8	q15, q3
 2399	aesmc.8	q15, q15
 2400	aese.8	q15, q4
 2401	aesmc.8	q15, q15
 2402	aese.8	q15, q5
 2403	aesmc.8	q15, q15
 2404	aese.8	q15, q6
 2405	aesmc.8	q15, q15
 2406	aese.8	q15, q7
 2407	aesmc.8	q15, q15
 2408	aese.8	q15, q8
 2409	aesmc.8	q15, q15
 2410	aese.8	q15, q9
 2411	aesmc.8	q15, q15
 2412	aese.8	q15, q10
 2413	aesmc.8	q15, q15
 2414	vld1.8	{q14}, [r0]!
 2415	aese.8	q15, q11
 2416	veor.32	q15, q15, q12
 2417	vst1.8	{q15}, [r1]!
 2418	veor.32	q15, q15, q14
 2419	aese.8	q15, q0
 2420	aesmc.8	q15, q15
 2421	aese.8	q15, q1
 2422	aesmc.8	q15, q15
 2423	aese.8	q15, q2
 2424	aesmc.8	q15, q15
 2425	aese.8	q15, q3
 2426	aesmc.8	q15, q15
 2427	aese.8	q15, q4
 2428	aesmc.8	q15, q15
 2429	aese.8	q15, q5
 2430	aesmc.8	q15, q15
 2431	aese.8	q15, q6
 2432	aesmc.8	q15, q15
 2433	aese.8	q15, q7
 2434	aesmc.8	q15, q15
 2435	aese.8	q15, q8
 2436	aesmc.8	q15, q15
 2437	aese.8	q15, q9
 2438	aesmc.8	q15, q15
 2439	aese.8	q15, q10
 2440	aesmc.8	q15, q15
 2441	vld1.8	{q14}, [r0]!
 2442	aese.8	q15, q11
 2443	veor.32	q15, q15, q12
 2444	vst1.8	{q15}, [r1]!
 2445	veor.32	q15, q15, q14
 2446	aese.8	q15, q0
 2447	aesmc.8	q15, q15
 2448	aese.8	q15, q1
 2449	aesmc.8	q15, q15
 2450	aese.8	q15, q2
 2451	aesmc.8	q15, q15
 2452	aese.8	q15, q3
 2453	aesmc.8	q15, q15
 2454	aese.8	q15, q4
 2455	aesmc.8	q15, q15
 2456	aese.8	q15, q5
 2457	aesmc.8	q15, q15
 2458	aese.8	q15, q6
 2459	aesmc.8	q15, q15
 2460	aese.8	q15, q7
 2461	aesmc.8	q15, q15
 2462	aese.8	q15, q8
 2463	aesmc.8	q15, q15
 2464	aese.8	q15, q9
 2465	aesmc.8	q15, q15
 2466	subs	r2, r2, #4
 2467	aese.8	q15, q10
 2468	aesmc.8	q15, q15
 2469	aese.8	q15, q11
 2470	veor.32	q15, q15, q12
 2471	beq	L_aes_cbc_encrypt_arm32_crypto_192_done
 2472	vld1.8	{q14}, [r0]!
 2473	cmp	r2, #4
 2474	vst1.8	{q15}, [r1]!
 2475	bge	L_aes_cbc_encrypt_arm32_crypto_192_start_4
 2476	cmp	r2, #2
 2477	blt	L_aes_cbc_encrypt_arm32_crypto_192_start_1
 2478L_aes_cbc_encrypt_arm32_crypto_192_start_2:
 2479	veor.32	q15, q15, q14
 2480	aese.8	q15, q0
 2481	aesmc.8	q15, q15
 2482	aese.8	q15, q1
 2483	aesmc.8	q15, q15
 2484	aese.8	q15, q2
 2485	aesmc.8	q15, q15
 2486	aese.8	q15, q3
 2487	aesmc.8	q15, q15
 2488	aese.8	q15, q4
 2489	aesmc.8	q15, q15
 2490	aese.8	q15, q5
 2491	aesmc.8	q15, q15
 2492	aese.8	q15, q6
 2493	aesmc.8	q15, q15
 2494	aese.8	q15, q7
 2495	aesmc.8	q15, q15
 2496	aese.8	q15, q8
 2497	aesmc.8	q15, q15
 2498	aese.8	q15, q9
 2499	aesmc.8	q15, q15
 2500	aese.8	q15, q10
 2501	aesmc.8	q15, q15
 2502	vld1.8	{q14}, [r0]!
 2503	aese.8	q15, q11
 2504	veor.32	q15, q15, q12
 2505	vst1.8	{q15}, [r1]!
 2506	veor.32	q15, q15, q14
 2507	aese.8	q15, q0
 2508	aesmc.8	q15, q15
 2509	aese.8	q15, q1
 2510	aesmc.8	q15, q15
 2511	aese.8	q15, q2
 2512	aesmc.8	q15, q15
 2513	aese.8	q15, q3
 2514	aesmc.8	q15, q15
 2515	aese.8	q15, q4
 2516	aesmc.8	q15, q15
 2517	aese.8	q15, q5
 2518	aesmc.8	q15, q15
 2519	aese.8	q15, q6
 2520	aesmc.8	q15, q15
 2521	aese.8	q15, q7
 2522	aesmc.8	q15, q15
 2523	aese.8	q15, q8
 2524	aesmc.8	q15, q15
 2525	aese.8	q15, q9
 2526	aesmc.8	q15, q15
 2527	subs	r2, r2, #2
 2528	aese.8	q15, q10
 2529	aesmc.8	q15, q15
 2530	aese.8	q15, q11
 2531	veor.32	q15, q15, q12
 2532	beq	L_aes_cbc_encrypt_arm32_crypto_192_done
 2533	vld1.8	{q14}, [r0]!
 2534	vst1.8	{q15}, [r1]!
 2535L_aes_cbc_encrypt_arm32_crypto_192_start_1:
 2536	veor.32	q15, q15, q14
 2537	aese.8	q15, q0
 2538	aesmc.8	q15, q15
 2539	aese.8	q15, q1
 2540	aesmc.8	q15, q15
 2541	aese.8	q15, q2
 2542	aesmc.8	q15, q15
 2543	aese.8	q15, q3
 2544	aesmc.8	q15, q15
 2545	aese.8	q15, q4
 2546	aesmc.8	q15, q15
 2547	aese.8	q15, q5
 2548	aesmc.8	q15, q15
 2549	aese.8	q15, q6
 2550	aesmc.8	q15, q15
 2551	aese.8	q15, q7
 2552	aesmc.8	q15, q15
 2553	aese.8	q15, q8
 2554	aesmc.8	q15, q15
 2555	aese.8	q15, q9
 2556	aesmc.8	q15, q15
 2557	aese.8	q15, q10
 2558	aesmc.8	q15, q15
 2559	aese.8	q15, q11
 2560	veor.32	q15, q15, q12
 2561L_aes_cbc_encrypt_arm32_crypto_192_done:
 2562	vst1.8	{q15}, [r1]!
 2563#endif /* !NO_AES_192 */
 2564	b	L_aes_cbc_encrypt_arm32_crypto_done
 2565	# AES_CBC_256
 2566L_aes_cbc_encrypt_arm32_crypto_start_256:
 2567#ifndef NO_AES_256
 2568	vld1.8	{q14}, [r0]!
 2569	vldm.32	r12!, {q8-q11}
 2570	add	r12, r12, #16
 2571	vld1.32	{q12-q13}, [r12]
 2572	sub	r12, r12, #16
 2573	cmp	r2, #1
 2574	beq	L_aes_cbc_encrypt_arm32_crypto_256_start_1
 2575	cmp	r2, #4
 2576	blt	L_aes_cbc_encrypt_arm32_crypto_256_start_2
 2577L_aes_cbc_encrypt_arm32_crypto_256_start_4:
 2578	veor.32	q15, q15, q14
 2579	aese.8	q15, q0
 2580	aesmc.8	q15, q15
 2581	aese.8	q15, q1
 2582	aesmc.8	q15, q15
 2583	aese.8	q15, q2
 2584	aesmc.8	q15, q15
 2585	aese.8	q15, q3
 2586	aesmc.8	q15, q15
 2587	aese.8	q15, q4
 2588	aesmc.8	q15, q15
 2589	aese.8	q15, q5
 2590	aesmc.8	q15, q15
 2591	aese.8	q15, q6
 2592	aesmc.8	q15, q15
 2593	aese.8	q15, q7
 2594	aesmc.8	q15, q15
 2595	aese.8	q15, q8
 2596	aesmc.8	q15, q15
 2597	aese.8	q15, q9
 2598	aesmc.8	q15, q15
 2599	aese.8	q15, q10
 2600	aesmc.8	q15, q15
 2601	vld1.32	{q14}, [r12]
 2602	aese.8	q15, q11
 2603	aesmc.8	q15, q15
 2604	aese.8	q15, q14
 2605	aesmc.8	q15, q15
 2606	vld1.8	{q14}, [r0]!
 2607	aese.8	q15, q12
 2608	veor.32	q15, q15, q13
 2609	vst1.8	{q15}, [r1]!
 2610	veor.32	q15, q15, q14
 2611	aese.8	q15, q0
 2612	aesmc.8	q15, q15
 2613	aese.8	q15, q1
 2614	aesmc.8	q15, q15
 2615	aese.8	q15, q2
 2616	aesmc.8	q15, q15
 2617	aese.8	q15, q3
 2618	aesmc.8	q15, q15
 2619	aese.8	q15, q4
 2620	aesmc.8	q15, q15
 2621	aese.8	q15, q5
 2622	aesmc.8	q15, q15
 2623	aese.8	q15, q6
 2624	aesmc.8	q15, q15
 2625	aese.8	q15, q7
 2626	aesmc.8	q15, q15
 2627	aese.8	q15, q8
 2628	aesmc.8	q15, q15
 2629	aese.8	q15, q9
 2630	aesmc.8	q15, q15
 2631	aese.8	q15, q10
 2632	aesmc.8	q15, q15
 2633	vld1.32	{q14}, [r12]
 2634	aese.8	q15, q11
 2635	aesmc.8	q15, q15
 2636	aese.8	q15, q14
 2637	aesmc.8	q15, q15
 2638	vld1.8	{q14}, [r0]!
 2639	aese.8	q15, q12
 2640	veor.32	q15, q15, q13
 2641	vst1.8	{q15}, [r1]!
 2642	veor.32	q15, q15, q14
 2643	aese.8	q15, q0
 2644	aesmc.8	q15, q15
 2645	aese.8	q15, q1
 2646	aesmc.8	q15, q15
 2647	aese.8	q15, q2
 2648	aesmc.8	q15, q15
 2649	aese.8	q15, q3
 2650	aesmc.8	q15, q15
 2651	aese.8	q15, q4
 2652	aesmc.8	q15, q15
 2653	aese.8	q15, q5
 2654	aesmc.8	q15, q15
 2655	aese.8	q15, q6
 2656	aesmc.8	q15, q15
 2657	aese.8	q15, q7
 2658	aesmc.8	q15, q15
 2659	aese.8	q15, q8
 2660	aesmc.8	q15, q15
 2661	aese.8	q15, q9
 2662	aesmc.8	q15, q15
 2663	aese.8	q15, q10
 2664	aesmc.8	q15, q15
 2665	vld1.32	{q14}, [r12]
 2666	aese.8	q15, q11
 2667	aesmc.8	q15, q15
 2668	aese.8	q15, q14
 2669	aesmc.8	q15, q15
 2670	vld1.8	{q14}, [r0]!
 2671	aese.8	q15, q12
 2672	veor.32	q15, q15, q13
 2673	vst1.8	{q15}, [r1]!
 2674	veor.32	q15, q15, q14
 2675	aese.8	q15, q0
 2676	aesmc.8	q15, q15
 2677	aese.8	q15, q1
 2678	aesmc.8	q15, q15
 2679	aese.8	q15, q2
 2680	aesmc.8	q15, q15
 2681	aese.8	q15, q3
 2682	aesmc.8	q15, q15
 2683	aese.8	q15, q4
 2684	aesmc.8	q15, q15
 2685	aese.8	q15, q5
 2686	aesmc.8	q15, q15
 2687	aese.8	q15, q6
 2688	aesmc.8	q15, q15
 2689	aese.8	q15, q7
 2690	aesmc.8	q15, q15
 2691	aese.8	q15, q8
 2692	aesmc.8	q15, q15
 2693	aese.8	q15, q9
 2694	aesmc.8	q15, q15
 2695	aese.8	q15, q10
 2696	aesmc.8	q15, q15
 2697	vld1.32	{q14}, [r12]
 2698	aese.8	q15, q11
 2699	aesmc.8	q15, q15
 2700	subs	r2, r2, #4
 2701	aese.8	q15, q14
 2702	aesmc.8	q15, q15
 2703	aese.8	q15, q12
 2704	veor.32	q15, q15, q13
 2705	beq	L_aes_cbc_encrypt_arm32_crypto_256_done
 2706	vld1.8	{q14}, [r0]!
 2707	cmp	r2, #4
 2708	vst1.8	{q15}, [r1]!
 2709	bge	L_aes_cbc_encrypt_arm32_crypto_256_start_4
 2710	cmp	r2, #2
 2711	blt	L_aes_cbc_encrypt_arm32_crypto_256_start_1
 2712L_aes_cbc_encrypt_arm32_crypto_256_start_2:
 2713	veor.32	q15, q15, q14
 2714	aese.8	q15, q0
 2715	aesmc.8	q15, q15
 2716	aese.8	q15, q1
 2717	aesmc.8	q15, q15
 2718	aese.8	q15, q2
 2719	aesmc.8	q15, q15
 2720	aese.8	q15, q3
 2721	aesmc.8	q15, q15
 2722	aese.8	q15, q4
 2723	aesmc.8	q15, q15
 2724	aese.8	q15, q5
 2725	aesmc.8	q15, q15
 2726	aese.8	q15, q6
 2727	aesmc.8	q15, q15
 2728	aese.8	q15, q7
 2729	aesmc.8	q15, q15
 2730	aese.8	q15, q8
 2731	aesmc.8	q15, q15
 2732	aese.8	q15, q9
 2733	aesmc.8	q15, q15
 2734	aese.8	q15, q10
 2735	aesmc.8	q15, q15
 2736	vld1.32	{q14}, [r12]
 2737	aese.8	q15, q11
 2738	aesmc.8	q15, q15
 2739	aese.8	q15, q14
 2740	aesmc.8	q15, q15
 2741	vld1.8	{q14}, [r0]!
 2742	aese.8	q15, q12
 2743	veor.32	q15, q15, q13
 2744	vst1.8	{q15}, [r1]!
 2745	veor.32	q15, q15, q14
 2746	aese.8	q15, q0
 2747	aesmc.8	q15, q15
 2748	aese.8	q15, q1
 2749	aesmc.8	q15, q15
 2750	aese.8	q15, q2
 2751	aesmc.8	q15, q15
 2752	aese.8	q15, q3
 2753	aesmc.8	q15, q15
 2754	aese.8	q15, q4
 2755	aesmc.8	q15, q15
 2756	aese.8	q15, q5
 2757	aesmc.8	q15, q15
 2758	aese.8	q15, q6
 2759	aesmc.8	q15, q15
 2760	aese.8	q15, q7
 2761	aesmc.8	q15, q15
 2762	aese.8	q15, q8
 2763	aesmc.8	q15, q15
 2764	aese.8	q15, q9
 2765	aesmc.8	q15, q15
 2766	aese.8	q15, q10
 2767	aesmc.8	q15, q15
 2768	vld1.32	{q14}, [r12]
 2769	aese.8	q15, q11
 2770	aesmc.8	q15, q15
 2771	subs	r2, r2, #2
 2772	aese.8	q15, q14
 2773	aesmc.8	q15, q15
 2774	aese.8	q15, q12
 2775	veor.32	q15, q15, q13
 2776	beq	L_aes_cbc_encrypt_arm32_crypto_256_done
 2777	vld1.8	{q14}, [r0]!
 2778	vst1.8	{q15}, [r1]!
 2779L_aes_cbc_encrypt_arm32_crypto_256_start_1:
 2780	veor.32	q15, q15, q14
 2781	aese.8	q15, q0
 2782	aesmc.8	q15, q15
 2783	aese.8	q15, q1
 2784	aesmc.8	q15, q15
 2785	aese.8	q15, q2
 2786	aesmc.8	q15, q15
 2787	aese.8	q15, q3
 2788	aesmc.8	q15, q15
 2789	aese.8	q15, q4
 2790	aesmc.8	q15, q15
 2791	aese.8	q15, q5
 2792	aesmc.8	q15, q15
 2793	aese.8	q15, q6
 2794	aesmc.8	q15, q15
 2795	aese.8	q15, q7
 2796	aesmc.8	q15, q15
 2797	aese.8	q15, q8
 2798	aesmc.8	q15, q15
 2799	aese.8	q15, q9
 2800	aesmc.8	q15, q15
 2801	aese.8	q15, q10
 2802	aesmc.8	q15, q15
 2803	vld1.32	{q14}, [r12]
 2804	aese.8	q15, q11
 2805	aesmc.8	q15, q15
 2806	aese.8	q15, q14
 2807	aesmc.8	q15, q15
 2808	aese.8	q15, q12
 2809	veor.32	q15, q15, q13
 2810L_aes_cbc_encrypt_arm32_crypto_256_done:
 2811	vst1.8	{q15}, [r1]!
 2812#endif /* !NO_AES_256 */
 2813	b	L_aes_cbc_encrypt_arm32_crypto_done
 2814	# AES_CBC_128
 2815L_aes_cbc_encrypt_arm32_crypto_start_128:
 2816#ifndef NO_AES_128
 2817	vld1.8	{q14}, [r0]!
 2818	vldm.32	r12!, {q8-q10}
 2819	cmp	r2, #1
 2820	beq	L_aes_cbc_encrypt_arm32_crypto_128_start_1
 2821	cmp	r2, #4
 2822	blt	L_aes_cbc_encrypt_arm32_crypto_128_start_2
 2823L_aes_cbc_encrypt_arm32_crypto_128_start_4:
 2824	veor.32	q15, q15, q14
 2825	aese.8	q15, q0
 2826	aesmc.8	q15, q15
 2827	aese.8	q15, q1
 2828	aesmc.8	q15, q15
 2829	aese.8	q15, q2
 2830	aesmc.8	q15, q15
 2831	aese.8	q15, q3
 2832	aesmc.8	q15, q15
 2833	aese.8	q15, q4
 2834	aesmc.8	q15, q15
 2835	aese.8	q15, q5
 2836	aesmc.8	q15, q15
 2837	aese.8	q15, q6
 2838	aesmc.8	q15, q15
 2839	aese.8	q15, q7
 2840	aesmc.8	q15, q15
 2841	aese.8	q15, q8
 2842	aesmc.8	q15, q15
 2843	vld1.8	{q14}, [r0]!
 2844	aese.8	q15, q9
 2845	veor.32	q15, q15, q10
 2846	vst1.8	{q15}, [r1]!
 2847	veor.32	q15, q15, q14
 2848	aese.8	q15, q0
 2849	aesmc.8	q15, q15
 2850	aese.8	q15, q1
 2851	aesmc.8	q15, q15
 2852	aese.8	q15, q2
 2853	aesmc.8	q15, q15
 2854	aese.8	q15, q3
 2855	aesmc.8	q15, q15
 2856	aese.8	q15, q4
 2857	aesmc.8	q15, q15
 2858	aese.8	q15, q5
 2859	aesmc.8	q15, q15
 2860	aese.8	q15, q6
 2861	aesmc.8	q15, q15
 2862	aese.8	q15, q7
 2863	aesmc.8	q15, q15
 2864	aese.8	q15, q8
 2865	aesmc.8	q15, q15
 2866	vld1.8	{q14}, [r0]!
 2867	aese.8	q15, q9
 2868	veor.32	q15, q15, q10
 2869	vst1.8	{q15}, [r1]!
 2870	veor.32	q15, q15, q14
 2871	aese.8	q15, q0
 2872	aesmc.8	q15, q15
 2873	aese.8	q15, q1
 2874	aesmc.8	q15, q15
 2875	aese.8	q15, q2
 2876	aesmc.8	q15, q15
 2877	aese.8	q15, q3
 2878	aesmc.8	q15, q15
 2879	aese.8	q15, q4
 2880	aesmc.8	q15, q15
 2881	aese.8	q15, q5
 2882	aesmc.8	q15, q15
 2883	aese.8	q15, q6
 2884	aesmc.8	q15, q15
 2885	aese.8	q15, q7
 2886	aesmc.8	q15, q15
 2887	aese.8	q15, q8
 2888	aesmc.8	q15, q15
 2889	vld1.8	{q14}, [r0]!
 2890	aese.8	q15, q9
 2891	veor.32	q15, q15, q10
 2892	vst1.8	{q15}, [r1]!
 2893	veor.32	q15, q15, q14
 2894	aese.8	q15, q0
 2895	aesmc.8	q15, q15
 2896	aese.8	q15, q1
 2897	aesmc.8	q15, q15
 2898	aese.8	q15, q2
 2899	aesmc.8	q15, q15
 2900	aese.8	q15, q3
 2901	aesmc.8	q15, q15
 2902	aese.8	q15, q4
 2903	aesmc.8	q15, q15
 2904	aese.8	q15, q5
 2905	aesmc.8	q15, q15
 2906	aese.8	q15, q6
 2907	aesmc.8	q15, q15
 2908	aese.8	q15, q7
 2909	aesmc.8	q15, q15
 2910	subs	r2, r2, #4
 2911	aese.8	q15, q8
 2912	aesmc.8	q15, q15
 2913	aese.8	q15, q9
 2914	veor.32	q15, q15, q10
 2915	beq	L_aes_cbc_encrypt_arm32_crypto_128_done
 2916	vld1.8	{q14}, [r0]!
 2917	cmp	r2, #4
 2918	vst1.8	{q15}, [r1]!
 2919	bge	L_aes_cbc_encrypt_arm32_crypto_128_start_4
 2920	cmp	r2, #2
 2921	blt	L_aes_cbc_encrypt_arm32_crypto_128_start_1
 2922L_aes_cbc_encrypt_arm32_crypto_128_start_2:
 2923	veor.32	q15, q15, q14
 2924	aese.8	q15, q0
 2925	aesmc.8	q15, q15
 2926	aese.8	q15, q1
 2927	aesmc.8	q15, q15
 2928	aese.8	q15, q2
 2929	aesmc.8	q15, q15
 2930	aese.8	q15, q3
 2931	aesmc.8	q15, q15
 2932	aese.8	q15, q4
 2933	aesmc.8	q15, q15
 2934	aese.8	q15, q5
 2935	aesmc.8	q15, q15
 2936	aese.8	q15, q6
 2937	aesmc.8	q15, q15
 2938	aese.8	q15, q7
 2939	aesmc.8	q15, q15
 2940	aese.8	q15, q8
 2941	aesmc.8	q15, q15
 2942	vld1.8	{q14}, [r0]!
 2943	aese.8	q15, q9
 2944	veor.32	q15, q15, q10
 2945	vst1.8	{q15}, [r1]!
 2946	veor.32	q15, q15, q14
 2947	aese.8	q15, q0
 2948	aesmc.8	q15, q15
 2949	aese.8	q15, q1
 2950	aesmc.8	q15, q15
 2951	aese.8	q15, q2
 2952	aesmc.8	q15, q15
 2953	aese.8	q15, q3
 2954	aesmc.8	q15, q15
 2955	aese.8	q15, q4
 2956	aesmc.8	q15, q15
 2957	aese.8	q15, q5
 2958	aesmc.8	q15, q15
 2959	aese.8	q15, q6
 2960	aesmc.8	q15, q15
 2961	aese.8	q15, q7
 2962	aesmc.8	q15, q15
 2963	subs	r2, r2, #2
 2964	aese.8	q15, q8
 2965	aesmc.8	q15, q15
 2966	aese.8	q15, q9
 2967	veor.32	q15, q15, q10
 2968	beq	L_aes_cbc_encrypt_arm32_crypto_128_done
 2969	vld1.8	{q14}, [r0]!
 2970	vst1.8	{q15}, [r1]!
 2971L_aes_cbc_encrypt_arm32_crypto_128_start_1:
 2972	veor.32	q15, q15, q14
 2973	aese.8	q15, q0
 2974	aesmc.8	q15, q15
 2975	aese.8	q15, q1
 2976	aesmc.8	q15, q15
 2977	aese.8	q15, q2
 2978	aesmc.8	q15, q15
 2979	aese.8	q15, q3
 2980	aesmc.8	q15, q15
 2981	aese.8	q15, q4
 2982	aesmc.8	q15, q15
 2983	aese.8	q15, q5
 2984	aesmc.8	q15, q15
 2985	aese.8	q15, q6
 2986	aesmc.8	q15, q15
 2987	aese.8	q15, q7
 2988	aesmc.8	q15, q15
 2989	aese.8	q15, q8
 2990	aesmc.8	q15, q15
 2991	aese.8	q15, q9
 2992	veor.32	q15, q15, q10
 2993L_aes_cbc_encrypt_arm32_crypto_128_done:
 2994	vst1.8	{q15}, [r1]!
 2995#endif /* !NO_AES_128 */
 2996L_aes_cbc_encrypt_arm32_crypto_done:
 2997	vst1.32	{q15}, [r3]
 2998	vpop	{d8-d15}
 2999	pop	{pc}
 3000	.size	AES_CBC_encrypt_AARCH32,.-AES_CBC_encrypt_AARCH32
 3001#ifdef HAVE_AES_DECRYPT
 3002	.text
 3003	.align	4
 3004	.globl	AES_CBC_decrypt_AARCH32
 3005	.type	AES_CBC_decrypt_AARCH32, %function
 3006AES_CBC_decrypt_AARCH32:
 3007	push	{lr}
 3008	vpush	{d8-d15}
 3009	ldr	r12, [sp, #68]
 3010	ldr	lr, [sp, #72]
 3011	vldm.32	r12!, {q0-q7}
 3012	vld1.32	{q13}, [r3]
 3013	lsr	r2, r2, #4
 3014	cmp	lr, #12
 3015	blt	L_aes_cbc_decrypt_blocks_arm32_crypto_start_128
 3016	bgt	L_aes_cbc_decrypt_blocks_arm32_crypto_start_256
 3017	# AES_CBC_192
 3018#ifndef NO_AES_192
 3019	vld1.32	{q8}, [r12]!
 3020	cmp	r2, #1
 3021	beq	L_aes_cbc_decrypt_blocks_arm32_crypto_192_start_1
 3022L_aes_cbc_decrypt_blocks_arm32_crypto_192_start_2:
 3023	vld1.8	{q14-q15}, [r0]!
 3024	vmov	q11, q13
 3025	vmov	q12, q14
 3026	vmov	q13, q15
 3027	aesd.8	q14, q0
 3028	aesimc.8	q14, q14
 3029	aesd.8	q15, q0
 3030	aesimc.8	q15, q15
 3031	aesd.8	q14, q1
 3032	aesimc.8	q14, q14
 3033	aesd.8	q15, q1
 3034	aesimc.8	q15, q15
 3035	aesd.8	q14, q2
 3036	aesimc.8	q14, q14
 3037	aesd.8	q15, q2
 3038	aesimc.8	q15, q15
 3039	aesd.8	q14, q3
 3040	aesimc.8	q14, q14
 3041	aesd.8	q15, q3
 3042	aesimc.8	q15, q15
 3043	aesd.8	q14, q4
 3044	aesimc.8	q14, q14
 3045	aesd.8	q15, q4
 3046	aesimc.8	q15, q15
 3047	aesd.8	q14, q5
 3048	aesimc.8	q14, q14
 3049	aesd.8	q15, q5
 3050	aesimc.8	q15, q15
 3051	aesd.8	q14, q6
 3052	aesimc.8	q14, q14
 3053	aesd.8	q15, q6
 3054	aesimc.8	q15, q15
 3055	aesd.8	q14, q7
 3056	aesimc.8	q14, q14
 3057	aesd.8	q15, q7
 3058	aesimc.8	q15, q15
 3059	vld1.32	{q9}, [r12]!
 3060	aesd.8	q14, q8
 3061	aesimc.8	q14, q14
 3062	aesd.8	q15, q8
 3063	aesimc.8	q15, q15
 3064	vld1.32	{q10}, [r12]!
 3065	aesd.8	q14, q9
 3066	aesimc.8	q14, q14
 3067	aesd.8	q15, q9
 3068	aesimc.8	q15, q15
 3069	vld1.32	{q9}, [r12]!
 3070	aesd.8	q14, q10
 3071	aesimc.8	q14, q14
 3072	aesd.8	q15, q10
 3073	aesimc.8	q15, q15
 3074	vld1.32	{q10}, [r12]
 3075	aesd.8	q14, q9
 3076	aesd.8	q15, q9
 3077	sub	r2, r2, #2
 3078	veor.32	q14, q14, q10
 3079	veor.32	q15, q15, q10
 3080	cmp	r2, #1
 3081	veor.32	q14, q14, q11
 3082	veor.32	q15, q15, q12
 3083	vst1.8	{q14-q15}, [r1]!
 3084	sub	r12, r12, #48
 3085	blt	L_aes_cbc_decrypt_blocks_arm32_crypto_192_done
 3086	bgt	L_aes_cbc_decrypt_blocks_arm32_crypto_192_start_2
 3087L_aes_cbc_decrypt_blocks_arm32_crypto_192_start_1:
 3088	vld1.8	{q14}, [r0]!
 3089	vmov	q11, q13
 3090	vmov	q13, q14
 3091	aesd.8	q14, q0
 3092	aesimc.8	q14, q14
 3093	aesd.8	q14, q1
 3094	aesimc.8	q14, q14
 3095	aesd.8	q14, q2
 3096	aesimc.8	q14, q14
 3097	aesd.8	q14, q3
 3098	aesimc.8	q14, q14
 3099	aesd.8	q14, q4
 3100	aesimc.8	q14, q14
 3101	aesd.8	q14, q5
 3102	aesimc.8	q14, q14
 3103	aesd.8	q14, q6
 3104	aesimc.8	q14, q14
 3105	aesd.8	q14, q7
 3106	aesimc.8	q14, q14
 3107	vld1.32	{q9}, [r12]!
 3108	aesd.8	q14, q8
 3109	aesimc.8	q14, q14
 3110	vld1.32	{q10}, [r12]!
 3111	aesd.8	q14, q9
 3112	aesimc.8	q14, q14
 3113	vld1.32	{q9}, [r12]!
 3114	aesd.8	q14, q10
 3115	aesimc.8	q14, q14
 3116	vld1.32	{q10}, [r12]
 3117	aesd.8	q14, q9
 3118	veor.32	q14, q14, q10
 3119	veor.32	q14, q14, q11
 3120	vst1.8	{q14}, [r1]!
 3121L_aes_cbc_decrypt_blocks_arm32_crypto_192_done:
 3122#endif /* !NO_AES_192 */
 3123	b	L_aes_cbc_decrypt_blocks_arm32_crypto_done
 3124	# AES_CBC_256
 3125L_aes_cbc_decrypt_blocks_arm32_crypto_start_256:
 3126#ifndef NO_AES_256
 3127	vld1.32	{q8}, [r12]!
 3128	cmp	r2, #1
 3129	beq	L_aes_cbc_decrypt_blocks_arm32_crypto_256_start_1
 3130L_aes_cbc_decrypt_blocks_arm32_crypto_256_start_2:
 3131	vld1.8	{q14-q15}, [r0]!
 3132	vmov	q11, q13
 3133	vmov	q12, q14
 3134	vmov	q13, q15
 3135	aesd.8	q14, q0
 3136	aesimc.8	q14, q14
 3137	aesd.8	q15, q0
 3138	aesimc.8	q15, q15
 3139	aesd.8	q14, q1
 3140	aesimc.8	q14, q14
 3141	aesd.8	q15, q1
 3142	aesimc.8	q15, q15
 3143	aesd.8	q14, q2
 3144	aesimc.8	q14, q14
 3145	aesd.8	q15, q2
 3146	aesimc.8	q15, q15
 3147	aesd.8	q14, q3
 3148	aesimc.8	q14, q14
 3149	aesd.8	q15, q3
 3150	aesimc.8	q15, q15
 3151	aesd.8	q14, q4
 3152	aesimc.8	q14, q14
 3153	aesd.8	q15, q4
 3154	aesimc.8	q15, q15
 3155	aesd.8	q14, q5
 3156	aesimc.8	q14, q14
 3157	aesd.8	q15, q5
 3158	aesimc.8	q15, q15
 3159	aesd.8	q14, q6
 3160	aesimc.8	q14, q14
 3161	aesd.8	q15, q6
 3162	aesimc.8	q15, q15
 3163	aesd.8	q14, q7
 3164	aesimc.8	q14, q14
 3165	aesd.8	q15, q7
 3166	aesimc.8	q15, q15
 3167	vld1.32	{q9}, [r12]!
 3168	aesd.8	q14, q8
 3169	aesimc.8	q14, q14
 3170	aesd.8	q15, q8
 3171	aesimc.8	q15, q15
 3172	vld1.32	{q10}, [r12]!
 3173	aesd.8	q14, q9
 3174	aesimc.8	q14, q14
 3175	aesd.8	q15, q9
 3176	aesimc.8	q15, q15
 3177	vld1.32	{q9}, [r12]!
 3178	aesd.8	q14, q10
 3179	aesimc.8	q14, q14
 3180	aesd.8	q15, q10
 3181	aesimc.8	q15, q15
 3182	vld1.32	{q10}, [r12]!
 3183	aesd.8	q14, q9
 3184	aesimc.8	q14, q14
 3185	aesd.8	q15, q9
 3186	aesimc.8	q15, q15
 3187	vld1.32	{q9}, [r12]!
 3188	aesd.8	q14, q10
 3189	aesimc.8	q14, q14
 3190	aesd.8	q15, q10
 3191	aesimc.8	q15, q15
 3192	vld1.32	{q10}, [r12]
 3193	aesd.8	q14, q9
 3194	aesd.8	q15, q9
 3195	sub	r2, r2, #2
 3196	veor.32	q14, q14, q10
 3197	veor.32	q15, q15, q10
 3198	cmp	r2, #1
 3199	veor.32	q14, q14, q11
 3200	veor.32	q15, q15, q12
 3201	vst1.8	{q14-q15}, [r1]!
 3202	sub	r12, r12, #0x50
 3203	blt	L_aes_cbc_decrypt_blocks_arm32_crypto_256_done
 3204	bgt	L_aes_cbc_decrypt_blocks_arm32_crypto_256_start_2
 3205L_aes_cbc_decrypt_blocks_arm32_crypto_256_start_1:
 3206	vld1.8	{q14}, [r0]!
 3207	vmov	q11, q13
 3208	vmov	q13, q14
 3209	aesd.8	q14, q0
 3210	aesimc.8	q14, q14
 3211	aesd.8	q14, q1
 3212	aesimc.8	q14, q14
 3213	aesd.8	q14, q2
 3214	aesimc.8	q14, q14
 3215	aesd.8	q14, q3
 3216	aesimc.8	q14, q14
 3217	aesd.8	q14, q4
 3218	aesimc.8	q14, q14
 3219	aesd.8	q14, q5
 3220	aesimc.8	q14, q14
 3221	aesd.8	q14, q6
 3222	aesimc.8	q14, q14
 3223	aesd.8	q14, q7
 3224	aesimc.8	q14, q14
 3225	vld1.32	{q9}, [r12]!
 3226	aesd.8	q14, q8
 3227	aesimc.8	q14, q14
 3228	vld1.32	{q10}, [r12]!
 3229	aesd.8	q14, q9
 3230	aesimc.8	q14, q14
 3231	vld1.32	{q9}, [r12]!
 3232	aesd.8	q14, q10
 3233	aesimc.8	q14, q14
 3234	vld1.32	{q10}, [r12]!
 3235	aesd.8	q14, q9
 3236	aesimc.8	q14, q14
 3237	vld1.32	{q9}, [r12]!
 3238	aesd.8	q14, q10
 3239	aesimc.8	q14, q14
 3240	vld1.32	{q10}, [r12]
 3241	aesd.8	q14, q9
 3242	veor.32	q14, q14, q10
 3243	veor.32	q14, q14, q11
 3244	vst1.8	{q14}, [r1]!
 3245L_aes_cbc_decrypt_blocks_arm32_crypto_256_done:
 3246#endif /* !NO_AES_256 */
 3247	b	L_aes_cbc_decrypt_blocks_arm32_crypto_done
 3248	# AES_CBC_128
 3249L_aes_cbc_decrypt_blocks_arm32_crypto_start_128:
 3250#ifndef NO_AES_128
 3251	vldm.32	r12!, {q8-q10}
 3252	cmp	r2, #1
 3253	beq	L_aes_cbc_decrypt_blocks_arm32_crypto_128_start_1
 3254L_aes_cbc_decrypt_blocks_arm32_crypto_128_start_2:
 3255	vld1.8	{q14-q15}, [r0]!
 3256	vmov	q11, q13
 3257	vmov	q12, q14
 3258	vmov	q13, q15
 3259	aesd.8	q14, q0
 3260	aesimc.8	q14, q14
 3261	aesd.8	q15, q0
 3262	aesimc.8	q15, q15
 3263	aesd.8	q14, q1
 3264	aesimc.8	q14, q14
 3265	aesd.8	q15, q1
 3266	aesimc.8	q15, q15
 3267	aesd.8	q14, q2
 3268	aesimc.8	q14, q14
 3269	aesd.8	q15, q2
 3270	aesimc.8	q15, q15
 3271	aesd.8	q14, q3
 3272	aesimc.8	q14, q14
 3273	aesd.8	q15, q3
 3274	aesimc.8	q15, q15
 3275	aesd.8	q14, q4
 3276	aesimc.8	q14, q14
 3277	aesd.8	q15, q4
 3278	aesimc.8	q15, q15
 3279	aesd.8	q14, q5
 3280	aesimc.8	q14, q14
 3281	aesd.8	q15, q5
 3282	aesimc.8	q15, q15
 3283	aesd.8	q14, q6
 3284	aesimc.8	q14, q14
 3285	aesd.8	q15, q6
 3286	aesimc.8	q15, q15
 3287	aesd.8	q14, q7
 3288	aesimc.8	q14, q14
 3289	aesd.8	q15, q7
 3290	aesimc.8	q15, q15
 3291	aesd.8	q14, q8
 3292	aesimc.8	q14, q14
 3293	aesd.8	q15, q8
 3294	aesimc.8	q15, q15
 3295	aesd.8	q14, q9
 3296	aesd.8	q15, q9
 3297	sub	r2, r2, #2
 3298	veor.32	q14, q14, q10
 3299	veor.32	q15, q15, q10
 3300	cmp	r2, #1
 3301	veor.32	q14, q14, q11
 3302	veor.32	q15, q15, q12
 3303	vst1.8	{q14-q15}, [r1]!
 3304	blt	L_aes_cbc_decrypt_blocks_arm32_crypto_128_done
 3305	bgt	L_aes_cbc_decrypt_blocks_arm32_crypto_128_start_2
 3306L_aes_cbc_decrypt_blocks_arm32_crypto_128_start_1:
 3307	vld1.8	{q14}, [r0]!
 3308	vmov	q11, q13
 3309	vmov	q13, q14
 3310	aesd.8	q14, q0
 3311	aesimc.8	q14, q14
 3312	aesd.8	q14, q1
 3313	aesimc.8	q14, q14
 3314	aesd.8	q14, q2
 3315	aesimc.8	q14, q14
 3316	aesd.8	q14, q3
 3317	aesimc.8	q14, q14
 3318	aesd.8	q14, q4
 3319	aesimc.8	q14, q14
 3320	aesd.8	q14, q5
 3321	aesimc.8	q14, q14
 3322	aesd.8	q14, q6
 3323	aesimc.8	q14, q14
 3324	aesd.8	q14, q7
 3325	aesimc.8	q14, q14
 3326	aesd.8	q14, q8
 3327	aesimc.8	q14, q14
 3328	aesd.8	q14, q9
 3329	veor.32	q14, q14, q10
 3330	veor.32	q14, q14, q11
 3331	vst1.8	{q14}, [r1]!
 3332L_aes_cbc_decrypt_blocks_arm32_crypto_128_done:
 3333#endif /* !NO_AES_128 */
 3334L_aes_cbc_decrypt_blocks_arm32_crypto_done:
 3335	vst1.32	{q13}, [r3]
 3336	vpop	{d8-d15}
 3337	pop	{pc}
 3338	.size	AES_CBC_decrypt_AARCH32,.-AES_CBC_decrypt_AARCH32
 3339#endif /* HAVE_AES_DECRYPT */
 3340#endif /* HAVE_AES_CBC */
 3341#ifdef WOLFSSL_AES_COUNTER
 3342	.text
 3343	.align	4
 3344	.globl	AES_CTR_encrypt_AARCH32
 3345	.type	AES_CTR_encrypt_AARCH32, %function
 3346AES_CTR_encrypt_AARCH32:
 3347	push	{r4, r5, r6, r7, r8, lr}
 3348	vpush	{d8-d15}
 3349	vld1.32	{q0}, [r3]
 3350	ldr	r12, [sp, #88]
 3351	vrev32.8	q2, q0
 3352	lsr	r4, r2, #4
 3353	vmov	r5, r6, d4
 3354	and	r2, r2, #15
 3355	vmov	r7, r8, d5
 3356	vldm.32	r12!, {q3-q10}
 3357	ldr	lr, [sp, #100]
 3358	cmp	lr, #12
 3359	blt	L_aes_ctr_encrypt_arm32_crypto_start_128
 3360	bgt	L_aes_ctr_encrypt_arm32_crypto_start_256
 3361	# AES_CTR_192
 3362#ifndef NO_AES_192
 3363	vldm.32	r12!, {q11-q13}
 3364	mov	lr, #1
 3365	cmp	r4, #1
 3366	blt	L_aes_ctr_encrypt_arm32_crypto_192_done
 3367	beq	L_aes_ctr_encrypt_arm32_crypto_192_start_1
 3368	adds	r8, r8, #1
 3369	adcs	r7, r7, #0
 3370	adcs	r6, r6, #0
 3371	adc	r5, r5, #0
 3372	vmov	d3, r7, r8
 3373	vmov	d2, r5, r6
 3374	vrev32.8	q1, q1
 3375L_aes_ctr_encrypt_arm32_crypto_192_start_2:
 3376	aese.8	q0, q3
 3377	aesmc.8	q0, q0
 3378	aese.8	q1, q3
 3379	aesmc.8	q1, q1
 3380	adds	r8, r8, #1
 3381	aese.8	q0, q4
 3382	aesmc.8	q0, q0
 3383	aese.8	q1, q4
 3384	aesmc.8	q1, q1
 3385	adcs	r7, r7, #0
 3386	aese.8	q0, q5
 3387	aesmc.8	q0, q0
 3388	aese.8	q1, q5
 3389	aesmc.8	q1, q1
 3390	adcs	r6, r6, #0
 3391	aese.8	q0, q6
 3392	aesmc.8	q0, q0
 3393	aese.8	q1, q6
 3394	aesmc.8	q1, q1
 3395	adc	r5, r5, #0
 3396	aese.8	q0, q7
 3397	aesmc.8	q0, q0
 3398	aese.8	q1, q7
 3399	aesmc.8	q1, q1
 3400	aese.8	q0, q8
 3401	aesmc.8	q0, q0
 3402	aese.8	q1, q8
 3403	aesmc.8	q1, q1
 3404	aese.8	q0, q9
 3405	aesmc.8	q0, q0
 3406	aese.8	q1, q9
 3407	aesmc.8	q1, q1
 3408	aese.8	q0, q10
 3409	aesmc.8	q0, q0
 3410	aese.8	q1, q10
 3411	aesmc.8	q1, q1
 3412	aese.8	q0, q11
 3413	aesmc.8	q0, q0
 3414	aese.8	q1, q11
 3415	aesmc.8	q1, q1
 3416	aese.8	q0, q12
 3417	aesmc.8	q0, q0
 3418	aese.8	q1, q12
 3419	aesmc.8	q1, q1
 3420	vld1.32	{q14}, [r12]!
 3421	vmov	d5, r7, r8
 3422	aese.8	q0, q13
 3423	aesmc.8	q0, q0
 3424	aese.8	q1, q13
 3425	aesmc.8	q1, q1
 3426	vld1.32	{q15}, [r12]
 3427	vmov	d4, r5, r6
 3428	aese.8	q0, q14
 3429	aese.8	q1, q14
 3430	sub	r4, r4, #2
 3431	veor.32	q0, q0, q15
 3432	veor.32	q1, q1, q15
 3433	adds	r8, r8, #1
 3434	vld1.8	{q14-q15}, [r0]!
 3435	adcs	r7, r7, #0
 3436	sub	r12, r12, #16
 3437	veor.32	q14, q14, q0
 3438	veor.32	q15, q15, q1
 3439	adcs	r6, r6, #0
 3440	vrev32.8	q0, q2
 3441	adc	r5, r5, #0
 3442	vmov	d2, r5, r6
 3443	vmov	d3, r7, r8
 3444	cmp	r4, #1
 3445	vst1.8	{q14-q15}, [r1]!
 3446	vrev32.8	q1, q1
 3447	bgt	L_aes_ctr_encrypt_arm32_crypto_192_start_2
 3448	mov	lr, #0
 3449	blt	L_aes_ctr_encrypt_arm32_crypto_192_done
 3450L_aes_ctr_encrypt_arm32_crypto_192_start_1:
 3451	aese.8	q0, q3
 3452	aesmc.8	q0, q0
 3453	adds	r8, r8, lr
 3454	aese.8	q0, q4
 3455	aesmc.8	q0, q0
 3456	adcs	r7, r7, #0
 3457	aese.8	q0, q5
 3458	aesmc.8	q0, q0
 3459	adcs	r6, r6, #0
 3460	aese.8	q0, q6
 3461	aesmc.8	q0, q0
 3462	adc	r5, r5, #0
 3463	aese.8	q0, q7
 3464	aesmc.8	q0, q0
 3465	vmov	d5, r7, r8
 3466	aese.8	q0, q8
 3467	aesmc.8	q0, q0
 3468	vmov	d4, r5, r6
 3469	aese.8	q0, q9
 3470	aesmc.8	q0, q0
 3471	aese.8	q0, q10
 3472	aesmc.8	q0, q0
 3473	aese.8	q0, q11
 3474	aesmc.8	q0, q0
 3475	aese.8	q0, q12
 3476	aesmc.8	q0, q0
 3477	vld1.32	{q14}, [r12]!
 3478	aese.8	q0, q13
 3479	aesmc.8	q0, q0
 3480	vld1.32	{q15}, [r12]
 3481	aese.8	q0, q14
 3482	vld1.8	{q14}, [r0]!
 3483	veor.32	q0, q0, q15
 3484	veor.32	q14, q14, q0
 3485	sub	r12, r12, #16
 3486	vst1.8	{q14}, [r1]!
 3487	mov	lr, #1
 3488	vrev32.8	q0, q2
 3489L_aes_ctr_encrypt_arm32_crypto_192_done:
 3490	cmp	r2, #0
 3491	beq	L_aes_ctr_encrypt_arm32_crypto_192_partial_done
 3492	ldr	r4, [sp, #96]
 3493	aese.8	q0, q3
 3494	aesmc.8	q0, q0
 3495	adds	r8, r8, lr
 3496	aese.8	q0, q4
 3497	aesmc.8	q0, q0
 3498	adcs	r7, r7, #0
 3499	aese.8	q0, q5
 3500	aesmc.8	q0, q0
 3501	adcs	r6, r6, #0
 3502	aese.8	q0, q6
 3503	aesmc.8	q0, q0
 3504	adc	r5, r5, #0
 3505	aese.8	q0, q7
 3506	aesmc.8	q0, q0
 3507	vmov	d5, r7, r8
 3508	aese.8	q0, q8
 3509	aesmc.8	q0, q0
 3510	vmov	d4, r5, r6
 3511	aese.8	q0, q9
 3512	aesmc.8	q0, q0
 3513	aese.8	q0, q10
 3514	aesmc.8	q0, q0
 3515	aese.8	q0, q11
 3516	aesmc.8	q0, q0
 3517	aese.8	q0, q12
 3518	aesmc.8	q0, q0
 3519	vld1.32	{q14}, [r12]!
 3520	aese.8	q0, q13
 3521	aesmc.8	q0, q0
 3522	vld1.32	{q15}, [r12]
 3523	ldr	lr, [sp, #92]
 3524	aese.8	q0, q14
 3525	veor.32	q0, q0, q15
 3526	vst1.32	{q0}, [lr]
 3527	vmov	q0, q2
 3528	mov	r5, #16
 3529	sub	r5, r5, r2
 3530L_aes_ctr_encrypt_arm32_crypto_192_start_byte:
 3531	ldrb	r7, [lr], #1
 3532	ldrb	r8, [r0], #1
 3533	eor	r7, r7, r8
 3534	subs	r2, r2, #1
 3535	strb	r7, [r1], #1
 3536	bgt	L_aes_ctr_encrypt_arm32_crypto_192_start_byte
 3537	vrev32.8	q0, q2
 3538	str	r5, [r4]
 3539L_aes_ctr_encrypt_arm32_crypto_192_partial_done:
 3540#endif /* !NO_AES_192 */
 3541	b	L_aes_ctr_encrypt_arm32_crypto_done
 3542	# AES_CTR_256
 3543L_aes_ctr_encrypt_arm32_crypto_start_256:
 3544#ifndef NO_AES_256
 3545	vldm.32	r12!, {q11-q13}
 3546	mov	lr, #1
 3547	cmp	r4, #1
 3548	blt	L_aes_ctr_encrypt_arm32_crypto_256_done
 3549	beq	L_aes_ctr_encrypt_arm32_crypto_256_start_1
 3550	adds	r8, r8, #1
 3551	adcs	r7, r7, #0
 3552	adcs	r6, r6, #0
 3553	adc	r5, r5, #0
 3554	vmov	d3, r7, r8
 3555	vmov	d2, r5, r6
 3556	vrev32.8	q1, q1
 3557L_aes_ctr_encrypt_arm32_crypto_256_start_2:
 3558	aese.8	q0, q3
 3559	aesmc.8	q0, q0
 3560	aese.8	q1, q3
 3561	aesmc.8	q1, q1
 3562	adds	r8, r8, #1
 3563	aese.8	q0, q4
 3564	aesmc.8	q0, q0
 3565	aese.8	q1, q4
 3566	aesmc.8	q1, q1
 3567	adcs	r7, r7, #0
 3568	aese.8	q0, q5
 3569	aesmc.8	q0, q0
 3570	aese.8	q1, q5
 3571	aesmc.8	q1, q1
 3572	adcs	r6, r6, #0
 3573	aese.8	q0, q6
 3574	aesmc.8	q0, q0
 3575	aese.8	q1, q6
 3576	aesmc.8	q1, q1
 3577	adc	r5, r5, #0
 3578	aese.8	q0, q7
 3579	aesmc.8	q0, q0
 3580	aese.8	q1, q7
 3581	aesmc.8	q1, q1
 3582	aese.8	q0, q8
 3583	aesmc.8	q0, q0
 3584	aese.8	q1, q8
 3585	aesmc.8	q1, q1
 3586	aese.8	q0, q9
 3587	aesmc.8	q0, q0
 3588	aese.8	q1, q9
 3589	aesmc.8	q1, q1
 3590	aese.8	q0, q10
 3591	aesmc.8	q0, q0
 3592	aese.8	q1, q10
 3593	aesmc.8	q1, q1
 3594	aese.8	q0, q11
 3595	aesmc.8	q0, q0
 3596	aese.8	q1, q11
 3597	aesmc.8	q1, q1
 3598	aese.8	q0, q12
 3599	aesmc.8	q0, q0
 3600	aese.8	q1, q12
 3601	aesmc.8	q1, q1
 3602	vld1.32	{q14}, [r12]!
 3603	vmov	d5, r7, r8
 3604	aese.8	q0, q13
 3605	aesmc.8	q0, q0
 3606	aese.8	q1, q13
 3607	aesmc.8	q1, q1
 3608	vld1.32	{q15}, [r12]!
 3609	vmov	d4, r5, r6
 3610	aese.8	q0, q14
 3611	aesmc.8	q0, q0
 3612	aese.8	q1, q14
 3613	aesmc.8	q1, q1
 3614	vld1.32	{q14}, [r12]!
 3615	adds	r8, r8, #1
 3616	aese.8	q0, q15
 3617	aesmc.8	q0, q0
 3618	aese.8	q1, q15
 3619	aesmc.8	q1, q1
 3620	vld1.32	{q15}, [r12]
 3621	adcs	r7, r7, #0
 3622	aese.8	q0, q14
 3623	aese.8	q1, q14
 3624	sub	r4, r4, #2
 3625	veor.32	q0, q0, q15
 3626	veor.32	q1, q1, q15
 3627	adcs	r6, r6, #0
 3628	vld1.8	{q14-q15}, [r0]!
 3629	sub	r12, r12, #48
 3630	veor.32	q14, q14, q0
 3631	veor.32	q15, q15, q1
 3632	adc	r5, r5, #0
 3633	vrev32.8	q0, q2
 3634	vmov	d2, r5, r6
 3635	vmov	d3, r7, r8
 3636	cmp	r4, #1
 3637	vst1.8	{q14-q15}, [r1]!
 3638	vrev32.8	q1, q1
 3639	bgt	L_aes_ctr_encrypt_arm32_crypto_256_start_2
 3640	mov	lr, #0
 3641	blt	L_aes_ctr_encrypt_arm32_crypto_256_done
 3642L_aes_ctr_encrypt_arm32_crypto_256_start_1:
 3643	aese.8	q0, q3
 3644	aesmc.8	q0, q0
 3645	adds	r8, r8, lr
 3646	aese.8	q0, q4
 3647	aesmc.8	q0, q0
 3648	adcs	r7, r7, #0
 3649	aese.8	q0, q5
 3650	aesmc.8	q0, q0
 3651	adcs	r6, r6, #0
 3652	aese.8	q0, q6
 3653	aesmc.8	q0, q0
 3654	adc	r5, r5, #0
 3655	aese.8	q0, q7
 3656	aesmc.8	q0, q0
 3657	vmov	d5, r7, r8
 3658	aese.8	q0, q8
 3659	aesmc.8	q0, q0
 3660	vmov	d4, r5, r6
 3661	aese.8	q0, q9
 3662	aesmc.8	q0, q0
 3663	aese.8	q0, q10
 3664	aesmc.8	q0, q0
 3665	aese.8	q0, q11
 3666	aesmc.8	q0, q0
 3667	aese.8	q0, q12
 3668	aesmc.8	q0, q0
 3669	vld1.32	{q14}, [r12]!
 3670	aese.8	q0, q13
 3671	aesmc.8	q0, q0
 3672	vld1.32	{q15}, [r12]!
 3673	aese.8	q0, q14
 3674	aesmc.8	q0, q0
 3675	vld1.32	{q14}, [r12]!
 3676	aese.8	q0, q15
 3677	aesmc.8	q0, q0
 3678	vld1.32	{q15}, [r12]
 3679	aese.8	q0, q14
 3680	vld1.8	{q14}, [r0]!
 3681	veor.32	q0, q0, q15
 3682	veor.32	q14, q14, q0
 3683	sub	r12, r12, #48
 3684	vst1.8	{q14}, [r1]!
 3685	mov	lr, #1
 3686	vrev32.8	q0, q2
 3687L_aes_ctr_encrypt_arm32_crypto_256_done:
 3688	cmp	r2, #0
 3689	beq	L_aes_ctr_encrypt_arm32_crypto_256_partial_done
 3690	ldr	r4, [sp, #96]
 3691	aese.8	q0, q3
 3692	aesmc.8	q0, q0
 3693	adds	r8, r8, lr
 3694	aese.8	q0, q4
 3695	aesmc.8	q0, q0
 3696	adcs	r7, r7, #0
 3697	aese.8	q0, q5
 3698	aesmc.8	q0, q0
 3699	adcs	r6, r6, #0
 3700	aese.8	q0, q6
 3701	aesmc.8	q0, q0
 3702	adc	r5, r5, #0
 3703	aese.8	q0, q7
 3704	aesmc.8	q0, q0
 3705	vmov	d5, r7, r8
 3706	aese.8	q0, q8
 3707	aesmc.8	q0, q0
 3708	vmov	d4, r5, r6
 3709	aese.8	q0, q9
 3710	aesmc.8	q0, q0
 3711	aese.8	q0, q10
 3712	aesmc.8	q0, q0
 3713	aese.8	q0, q11
 3714	aesmc.8	q0, q0
 3715	aese.8	q0, q12
 3716	aesmc.8	q0, q0
 3717	vld1.32	{q14}, [r12]!
 3718	aese.8	q0, q13
 3719	aesmc.8	q0, q0
 3720	vld1.32	{q15}, [r12]!
 3721	aese.8	q0, q14
 3722	aesmc.8	q0, q0
 3723	vld1.32	{q14}, [r12]!
 3724	aese.8	q0, q15
 3725	aesmc.8	q0, q0
 3726	vld1.32	{q15}, [r12]
 3727	ldr	lr, [sp, #92]
 3728	aese.8	q0, q14
 3729	veor.32	q0, q0, q15
 3730	vst1.32	{q0}, [lr]
 3731	vmov	q0, q2
 3732	mov	r5, #16
 3733	sub	r5, r5, r2
 3734L_aes_ctr_encrypt_arm32_crypto_256_start_byte:
 3735	ldrb	r7, [lr], #1
 3736	ldrb	r8, [r0], #1
 3737	eor	r7, r7, r8
 3738	subs	r2, r2, #1
 3739	strb	r7, [r1], #1
 3740	bgt	L_aes_ctr_encrypt_arm32_crypto_256_start_byte
 3741	vrev32.8	q0, q2
 3742	str	r5, [r4]
 3743L_aes_ctr_encrypt_arm32_crypto_256_partial_done:
 3744#endif /* !NO_AES_256 */
 3745	b	L_aes_ctr_encrypt_arm32_crypto_done
 3746	# AES_CTR_128
 3747L_aes_ctr_encrypt_arm32_crypto_start_128:
 3748#ifndef NO_AES_128
 3749	vldm.32	r12!, {q11-q13}
 3750	mov	lr, #1
 3751	cmp	r4, #1
 3752	blt	L_aes_ctr_encrypt_arm32_crypto_128_done
 3753	beq	L_aes_ctr_encrypt_arm32_crypto_128_start_1
 3754	adds	r8, r8, #1
 3755	adcs	r7, r7, #0
 3756	adcs	r6, r6, #0
 3757	adc	r5, r5, #0
 3758	vmov	d3, r7, r8
 3759	vmov	d2, r5, r6
 3760	vrev32.8	q1, q1
 3761L_aes_ctr_encrypt_arm32_crypto_128_start_2:
 3762	aese.8	q0, q3
 3763	aesmc.8	q0, q0
 3764	aese.8	q1, q3
 3765	aesmc.8	q1, q1
 3766	adds	r8, r8, #1
 3767	aese.8	q0, q4
 3768	aesmc.8	q0, q0
 3769	aese.8	q1, q4
 3770	aesmc.8	q1, q1
 3771	adcs	r7, r7, #0
 3772	aese.8	q0, q5
 3773	aesmc.8	q0, q0
 3774	aese.8	q1, q5
 3775	aesmc.8	q1, q1
 3776	adcs	r6, r6, #0
 3777	aese.8	q0, q6
 3778	aesmc.8	q0, q0
 3779	aese.8	q1, q6
 3780	aesmc.8	q1, q1
 3781	adc	r5, r5, #0
 3782	aese.8	q0, q7
 3783	aesmc.8	q0, q0
 3784	aese.8	q1, q7
 3785	aesmc.8	q1, q1
 3786	vmov	d5, r7, r8
 3787	aese.8	q0, q8
 3788	aesmc.8	q0, q0
 3789	aese.8	q1, q8
 3790	aesmc.8	q1, q1
 3791	vmov	d4, r5, r6
 3792	aese.8	q0, q9
 3793	aesmc.8	q0, q0
 3794	aese.8	q1, q9
 3795	aesmc.8	q1, q1
 3796	adds	r8, r8, #1
 3797	aese.8	q0, q10
 3798	aesmc.8	q0, q0
 3799	aese.8	q1, q10
 3800	aesmc.8	q1, q1
 3801	adcs	r7, r7, #0
 3802	aese.8	q0, q11
 3803	aesmc.8	q0, q0
 3804	aese.8	q1, q11
 3805	aesmc.8	q1, q1
 3806	adcs	r6, r6, #0
 3807	vld1.8	{q14-q15}, [r0]!
 3808	adc	r5, r5, #0
 3809	aese.8	q0, q12
 3810	aese.8	q1, q12
 3811	sub	r4, r4, #2
 3812	veor.32	q14, q14, q13
 3813	veor.32	q15, q15, q13
 3814	veor.32	q14, q14, q0
 3815	veor.32	q15, q15, q1
 3816	vrev32.8	q0, q2
 3817	vmov	d2, r5, r6
 3818	vmov	d3, r7, r8
 3819	cmp	r4, #1
 3820	vst1.8	{q14-q15}, [r1]!
 3821	vrev32.8	q1, q1
 3822	bgt	L_aes_ctr_encrypt_arm32_crypto_128_start_2
 3823	mov	lr, #0
 3824	blt	L_aes_ctr_encrypt_arm32_crypto_128_done
 3825L_aes_ctr_encrypt_arm32_crypto_128_start_1:
 3826	aese.8	q0, q3
 3827	aesmc.8	q0, q0
 3828	adds	r8, r8, lr
 3829	aese.8	q0, q4
 3830	aesmc.8	q0, q0
 3831	adcs	r7, r7, #0
 3832	aese.8	q0, q5
 3833	aesmc.8	q0, q0
 3834	adcs	r6, r6, #0
 3835	aese.8	q0, q6
 3836	aesmc.8	q0, q0
 3837	adc	r5, r5, #0
 3838	aese.8	q0, q7
 3839	aesmc.8	q0, q0
 3840	vmov	d5, r7, r8
 3841	aese.8	q0, q8
 3842	aesmc.8	q0, q0
 3843	vmov	d4, r5, r6
 3844	aese.8	q0, q9
 3845	aesmc.8	q0, q0
 3846	aese.8	q0, q10
 3847	aesmc.8	q0, q0
 3848	aese.8	q0, q11
 3849	aesmc.8	q0, q0
 3850	vld1.8	{q14}, [r0]!
 3851	aese.8	q0, q12
 3852	veor.32	q0, q0, q13
 3853	veor.32	q14, q14, q0
 3854	vst1.8	{q14}, [r1]!
 3855	mov	lr, #1
 3856	vrev32.8	q0, q2
 3857L_aes_ctr_encrypt_arm32_crypto_128_done:
 3858	cmp	r2, #0
 3859	beq	L_aes_ctr_encrypt_arm32_crypto_128_partial_done
 3860	ldr	r4, [sp, #96]
 3861	aese.8	q0, q3
 3862	aesmc.8	q0, q0
 3863	adds	r8, r8, lr
 3864	aese.8	q0, q4
 3865	aesmc.8	q0, q0
 3866	adcs	r7, r7, #0
 3867	aese.8	q0, q5
 3868	aesmc.8	q0, q0
 3869	adcs	r6, r6, #0
 3870	aese.8	q0, q6
 3871	aesmc.8	q0, q0
 3872	adc	r5, r5, #0
 3873	aese.8	q0, q7
 3874	aesmc.8	q0, q0
 3875	vmov	d5, r7, r8
 3876	aese.8	q0, q8
 3877	aesmc.8	q0, q0
 3878	vmov	d4, r5, r6
 3879	aese.8	q0, q9
 3880	aesmc.8	q0, q0
 3881	aese.8	q0, q10
 3882	aesmc.8	q0, q0
 3883	aese.8	q0, q11
 3884	aesmc.8	q0, q0
 3885	ldr	lr, [sp, #92]
 3886	aese.8	q0, q12
 3887	veor.32	q0, q0, q13
 3888	vst1.32	{q0}, [lr]
 3889	vmov	q0, q2
 3890	mov	r5, #16
 3891	sub	r5, r5, r2
 3892L_aes_ctr_encrypt_arm32_crypto_128_start_byte:
 3893	ldrb	r7, [lr], #1
 3894	ldrb	r8, [r0], #1
 3895	eor	r7, r7, r8
 3896	subs	r2, r2, #1
 3897	strb	r7, [r1], #1
 3898	bgt	L_aes_ctr_encrypt_arm32_crypto_128_start_byte
 3899	vrev32.8	q0, q2
 3900	str	r5, [r4]
 3901L_aes_ctr_encrypt_arm32_crypto_128_partial_done:
 3902#endif /* !NO_AES_128 */
 3903L_aes_ctr_encrypt_arm32_crypto_done:
 3904	vst1.32	{q0}, [r3]
 3905	vpop	{d8-d15}
 3906	pop	{r4, r5, r6, r7, r8, pc}
 3907	.size	AES_CTR_encrypt_AARCH32,.-AES_CTR_encrypt_AARCH32
 3908#endif /* WOLFSSL_AES_COUNTER */
 3909#ifdef HAVE_AESGCM
 3910	.text
 3911	.align	4
 3912	.globl	AES_GCM_set_key_AARCH32
 3913	.type	AES_GCM_set_key_AARCH32, %function
 3914AES_GCM_set_key_AARCH32:
 3915	vpush	{d8-d9}
 3916	vld1.8	{q0}, [r0]
 3917	vld1.8	{q1-q2}, [r1]!
 3918	vld1.8	{q3-q4}, [r1]!
 3919	aese.8	q0, q1
 3920	aesmc.8	q0, q0
 3921	aese.8	q0, q2
 3922	aesmc.8	q0, q0
 3923	aese.8	q0, q3
 3924	aesmc.8	q0, q0
 3925	aese.8	q0, q4
 3926	aesmc.8	q0, q0
 3927	vld1.8	{q1-q2}, [r1]!
 3928	vld1.8	{q3-q4}, [r1]!
 3929	aese.8	q0, q1
 3930	aesmc.8	q0, q0
 3931	aese.8	q0, q2
 3932	aesmc.8	q0, q0
 3933	aese.8	q0, q3
 3934	aesmc.8	q0, q0
 3935	aese.8	q0, q4
 3936	aesmc.8	q0, q0
 3937	subs	r3, r3, #10
 3938	vld1.8	{q1-q2}, [r1]!
 3939	aese.8	q0, q1
 3940	aesmc.8	q0, q0
 3941	aese.8	q0, q2
 3942	beq	L_aes_gcm_set_key_arm32_crypto_round_done
 3943	vld1.8	{q1-q2}, [r1]!
 3944	subs	r3, r3, #2
 3945	aesmc.8	q0, q0
 3946	aese.8	q0, q1
 3947	aesmc.8	q0, q0
 3948	aese.8	q0, q2
 3949	beq	L_aes_gcm_set_key_arm32_crypto_round_done
 3950	vld1.8	{q1-q2}, [r1]!
 3951	aesmc.8	q0, q0
 3952	aese.8	q0, q1
 3953	aesmc.8	q0, q0
 3954	aese.8	q0, q2
 3955L_aes_gcm_set_key_arm32_crypto_round_done:
 3956	vld1.8	{q1}, [r1]
 3957	veor	q0, q0, q1
 3958	vmov.i8	q1, #0x55
 3959	vshl.u8	q2, q0, #1
 3960	vshr.u8	q0, q0, #1
 3961	vbif.8	q0, q2, q1
 3962	vmov.i8	q1, #51
 3963	vshl.u8	q2, q0, #2
 3964	vshr.u8	q0, q0, #2
 3965	vbit.8	q2, q0, q1
 3966	vshl.u8	q0, q2, #4
 3967	vsri.u8	q0, q2, #4
 3968	vst1.32	{q0}, [r2]
 3969	vpop	{d8-d9}
 3970	bx	lr
 3971	.size	AES_GCM_set_key_AARCH32,.-AES_GCM_set_key_AARCH32
 3972	.text
 3973	.align	4
 3974	.globl	AES_GCM_encrypt_AARCH32
 3975	.type	AES_GCM_encrypt_AARCH32, %function
 3976AES_GCM_encrypt_AARCH32:
 3977	push	{r4, r5, r6, r7, r8, r9, r10, r11, lr}
 3978	vpush	{d8-d15}
 3979	# key
 3980	ldr	r7, [sp, #120]
 3981	# tmp
 3982	ldr	r9, [sp, #128]
 3983	# nonceSz
 3984	ldr	r12, [sp, #100]
 3985	cmp	r12, #12
 3986	beq	L_aes_gcm_encrypt_arm32_crypto_nonce_setup_done
 3987	vmov.i8	q13, #0x87
 3988	# gcm_h
 3989	ldr	r8, [sp, #124]
 3990	veor.8	q6, q6, q6
 3991	vshr.u64	q13, q13, #56
 3992	vld1.32	{q8}, [r8]
 3993L_aes_gcm_encrypt_arm32_crypto_nonce_setup_done:
 3994	# Load Nonce
 3995	cmp	r12, #12
 3996	bne	L_aes_gcm_encrypt_arm32_crypto_ghash_nonce
 3997	ldr	r5, [r3]
 3998	ldr	r8, [r3, #4]
 3999	ldr	r12, [r3, #8]
 4000	vmov.i32	q6, #0x1000000
 4001	vmov.32	s24, r5
 4002	vmov.32	s25, r8
 4003	vmov.32	s26, r12
 4004	mov	r5, #1
 4005	b	L_aes_gcm_encrypt_arm32_crypto_done_nonce
 4006L_aes_gcm_encrypt_arm32_crypto_ghash_nonce:
 4007	lsr	r10, r12, #4
 4008	cmp	r10, #0
 4009	beq	L_aes_gcm_encrypt_arm32_crypto_nonce_done
 4010L_aes_gcm_encrypt_arm32_crypto_nonce_start_1:
 4011	vld1.32	{q14}, [r3]!
 4012	vmov.i8	q12, #0x55
 4013	vshl.u8	q0, q14, #1
 4014	vshr.u8	q14, q14, #1
 4015	vbif.8	q14, q0, q12
 4016	vmov.i8	q12, #51
 4017	vshl.u8	q0, q14, #2
 4018	vshr.u8	q14, q14, #2
 4019	vbit.8	q0, q14, q12
 4020	vshl.u8	q14, q0, #4
 4021	vsri.u8	q14, q0, #4
 4022	veor.8	q12, q6, q14
 4023	#   X  = C * H^1
 4024	vmull.p64	q2, d25, d16
 4025	vmull.p64	q6, d24, d17
 4026	vmull.p64	q0, d24, d16
 4027	vmull.p64	q1, d25, d17
 4028	veor.8	q2, q2, q6
 4029	#   Reduce
 4030	vmull.p64	q6, d3, d27
 4031	veor.8	d2, d2, d5
 4032	veor.8	d1, d1, d4
 4033	veor.8	d2, d2, d13
 4034	veor.8	d1, d1, d12
 4035	vmull.p64	q6, d2, d26
 4036	veor.8	q6, q6, q0
 4037	# Done GHASH
 4038	subs	r10, r10, #1
 4039	bne	L_aes_gcm_encrypt_arm32_crypto_nonce_start_1
 4040L_aes_gcm_encrypt_arm32_crypto_nonce_done:
 4041	ands	r11, r12, #15
 4042	beq	L_aes_gcm_encrypt_arm32_crypto_nonce_partial_done
 4043	veor.8	q0, q0, q0
 4044	mov	r12, r11
 4045	vst1.32	{q0}, [r9]
 4046	cmp	r12, #4
 4047	blt	L_aes_gcm_encrypt_arm32_crypto_nonce_start_sw
 4048L_aes_gcm_encrypt_arm32_crypto_nonce_start_dw:
 4049	ldr	r8, [r3], #4
 4050	sub	r12, r12, #4
 4051	str	r8, [r9], #4
 4052	cmp	r12, #4
 4053	bge	L_aes_gcm_encrypt_arm32_crypto_nonce_start_dw
 4054L_aes_gcm_encrypt_arm32_crypto_nonce_start_sw:
 4055	cmp	r12, #2
 4056	blt	L_aes_gcm_encrypt_arm32_crypto_nonce_start_byte
 4057	ldrh	r8, [r3], #2
 4058	sub	r12, r12, #2
 4059	strh	r8, [r9], #2
 4060L_aes_gcm_encrypt_arm32_crypto_nonce_start_byte:
 4061	cmp	r12, #1
 4062	blt	L_aes_gcm_encrypt_arm32_crypto_nonce_end_bytes
 4063	ldrb	r8, [r3], #1
 4064	subs	r12, r12, #1
 4065	strb	r8, [r9], #1
 4066	bne	L_aes_gcm_encrypt_arm32_crypto_nonce_start_byte
 4067L_aes_gcm_encrypt_arm32_crypto_nonce_end_bytes:
 4068	sub	r9, r9, r11
 4069	vld1.32	{q14}, [r9]
 4070	vmov.i8	q12, #0x55
 4071	vshl.u8	q0, q14, #1
 4072	vshr.u8	q14, q14, #1
 4073	vbif.8	q14, q0, q12
 4074	vmov.i8	q12, #51
 4075	vshl.u8	q0, q14, #2
 4076	vshr.u8	q14, q14, #2
 4077	vbit.8	q0, q14, q12
 4078	vshl.u8	q14, q0, #4
 4079	vsri.u8	q14, q0, #4
 4080	veor.8	q12, q6, q14
 4081	#   X  = C * H^1
 4082	vmull.p64	q2, d25, d16
 4083	vmull.p64	q6, d24, d17
 4084	vmull.p64	q0, d24, d16
 4085	vmull.p64	q1, d25, d17
 4086	veor.8	q2, q2, q6
 4087	#   Reduce
 4088	vmull.p64	q6, d3, d27
 4089	veor.8	d2, d2, d5
 4090	veor.8	d1, d1, d4
 4091	veor.8	d2, d2, d13
 4092	veor.8	d1, d1, d12
 4093	vmull.p64	q6, d2, d26
 4094	veor.8	q6, q6, q0
 4095	# Done GHASH
 4096L_aes_gcm_encrypt_arm32_crypto_nonce_partial_done:
 4097	veor.8	q0, q0, q0
 4098	# nonceSz
 4099	ldr	r12, [sp, #100]
 4100	lsr	r10, r12, #29
 4101	lsl	r11, r12, #3
 4102	rbit	r10, r10
 4103	rbit	r11, r11
 4104	vmov.32	s2, r10
 4105	vmov.32	s3, r11
 4106	veor.8	q6, q6, q0
 4107	vmull.p64	q2, d13, d16
 4108	vmull.p64	q12, d12, d17
 4109	vmull.p64	q0, d12, d16
 4110	vmull.p64	q1, d13, d17
 4111	veor.8	q2, q2, q12
 4112	vmull.p64	q6, d3, d27
 4113	veor.8	d2, d2, d5
 4114	veor.8	d1, d1, d4
 4115	veor.8	d2, d2, d13
 4116	veor.8	d1, d1, d12
 4117	vmull.p64	q6, d2, d26
 4118	veor.8	q6, q6, q0
 4119	vmov.32	r5, s24
 4120	vmov.32	r8, s25
 4121	vmov.32	r12, s26
 4122	rbit	r5, r5
 4123	rbit	r8, r8
 4124	rbit	r12, r12
 4125	rev	r5, r5
 4126	rev	r8, r8
 4127	rev	r12, r12
 4128	vmov.32	s24, r5
 4129	vmov.32	s25, r8
 4130	vmov.32	s26, r12
 4131	vmov.32	r5, s27
 4132	rbit	r5, r5
 4133	rev	r5, r5
 4134	vmov.32	s27, r5
 4135	rev	r5, r5
 4136L_aes_gcm_encrypt_arm32_crypto_done_nonce:
 4137	vldm.32	r7!, {q0-q3}
 4138	vldm.32	r7!, {q7-q13}
 4139	# nr
 4140	ldr	r12, [sp, #136]
 4141	lsr	r10, r2, #4
 4142	cmp	r12, #12
 4143	blt	L_aes_gcm_encrypt_arm32_crypto_start_128
 4144	bgt	L_aes_gcm_encrypt_arm32_crypto_start_256
 4145	# AES_GCM_192
 4146#ifndef NO_AES_192
 4147	cmp	r10, #1
 4148	blt	L_aes_gcm_encrypt_arm32_crypto_192_done
 4149	beq	L_aes_gcm_encrypt_arm32_crypto_192_start_1
 4150L_aes_gcm_encrypt_arm32_crypto_192_start_2:
 4151	add	r8, r5, #1
 4152	vmov.8	q4, q6
 4153	add	r5, r5, #2
 4154	vmov.8	q5, q6
 4155	rev	r8, r8
 4156	rev	r12, r5
 4157	vmov	s19, r8
 4158	vmov	s23, r12
 4159	aese.8	q4, q0
 4160	aesmc.8	q4, q4
 4161	aese.8	q5, q0
 4162	aesmc.8	q5, q5
 4163	aese.8	q4, q1
 4164	aesmc.8	q4, q4
 4165	aese.8	q5, q1
 4166	aesmc.8	q5, q5
 4167	aese.8	q4, q2
 4168	aesmc.8	q4, q4
 4169	aese.8	q5, q2
 4170	aesmc.8	q5, q5
 4171	aese.8	q4, q3
 4172	aesmc.8	q4, q4
 4173	aese.8	q5, q3
 4174	aesmc.8	q5, q5
 4175	aese.8	q4, q7
 4176	aesmc.8	q4, q4
 4177	aese.8	q5, q7
 4178	aesmc.8	q5, q5
 4179	aese.8	q4, q8
 4180	aesmc.8	q4, q4
 4181	aese.8	q5, q8
 4182	aesmc.8	q5, q5
 4183	aese.8	q4, q9
 4184	aesmc.8	q4, q4
 4185	aese.8	q5, q9
 4186	aesmc.8	q5, q5
 4187	subs	r10, r10, #2
 4188	aese.8	q4, q10
 4189	aesmc.8	q4, q4
 4190	aese.8	q5, q10
 4191	aesmc.8	q5, q5
 4192	aese.8	q4, q11
 4193	aesmc.8	q4, q4
 4194	aese.8	q5, q11
 4195	aesmc.8	q5, q5
 4196	aese.8	q4, q12
 4197	aesmc.8	q4, q4
 4198	aese.8	q5, q12
 4199	aesmc.8	q5, q5
 4200	vld1.32	{q14}, [r7]!
 4201	aese.8	q4, q13
 4202	aesmc.8	q4, q4
 4203	aese.8	q5, q13
 4204	aesmc.8	q5, q5
 4205	vld1.32	{q15}, [r7]
 4206	aese.8	q4, q14
 4207	veor.8	q4, q4, q15
 4208	aese.8	q5, q14
 4209	veor.8	q5, q5, q15
 4210	vld1.8	{q14-q15}, [r0]!
 4211	sub	r7, r7, #16
 4212	veor.8	q14, q14, q4
 4213	veor.8	q15, q15, q5
 4214	vst1.8	{q14-q15}, [r1]!
 4215	cmp	r10, #1
 4216	bgt	L_aes_gcm_encrypt_arm32_crypto_192_start_2
 4217	blt	L_aes_gcm_encrypt_arm32_crypto_192_done
 4218L_aes_gcm_encrypt_arm32_crypto_192_start_1:
 4219	add	r5, r5, #1
 4220	vmov.8	q4, q6
 4221	rev	r8, r5
 4222	vmov	s19, r8
 4223	aese.8	q4, q0
 4224	aesmc.8	q4, q4
 4225	aese.8	q4, q1
 4226	aesmc.8	q4, q4
 4227	aese.8	q4, q2
 4228	aesmc.8	q4, q4
 4229	aese.8	q4, q3
 4230	aesmc.8	q4, q4
 4231	aese.8	q4, q7
 4232	aesmc.8	q4, q4
 4233	aese.8	q4, q8
 4234	aesmc.8	q4, q4
 4235	aese.8	q4, q9
 4236	aesmc.8	q4, q4
 4237	aese.8	q4, q10
 4238	aesmc.8	q4, q4
 4239	aese.8	q4, q11
 4240	aesmc.8	q4, q4
 4241	aese.8	q4, q12
 4242	aesmc.8	q4, q4
 4243	vld1.32	{q14}, [r7]!
 4244	aese.8	q4, q13
 4245	aesmc.8	q4, q4
 4246	vld1.32	{q15}, [r7]
 4247	aese.8	q4, q14
 4248	veor.8	q4, q4, q15
 4249	vld1.8	{q14}, [r0]!
 4250	sub	r7, r7, #16
 4251	veor.8	q14, q14, q4
 4252	vst1.32	{q14}, [r1]!
 4253L_aes_gcm_encrypt_arm32_crypto_192_done:
 4254	ands	r11, r2, #15
 4255	beq	L_aes_gcm_encrypt_arm32_crypto_192_partial_done
 4256	veor.8	q14, q14, q14
 4257	mov	r4, r11
 4258	vst1.32	{q14}, [r9]
 4259	cmp	r4, #4
 4260	blt	L_aes_gcm_encrypt_arm32_crypto_192_start_sw
 4261L_aes_gcm_encrypt_arm32_crypto_192_start_dw:
 4262	ldr	lr, [r0], #4
 4263	sub	r4, r4, #4
 4264	str	lr, [r9], #4
 4265	cmp	r4, #4
 4266	bge	L_aes_gcm_encrypt_arm32_crypto_192_start_dw
 4267L_aes_gcm_encrypt_arm32_crypto_192_start_sw:
 4268	cmp	r4, #2
 4269	blt	L_aes_gcm_encrypt_arm32_crypto_192_start_byte
 4270	ldrh	lr, [r0], #2
 4271	sub	r4, r4, #2
 4272	strh	lr, [r9], #2
 4273L_aes_gcm_encrypt_arm32_crypto_192_start_byte:
 4274	cmp	r4, #1
 4275	blt	L_aes_gcm_encrypt_arm32_crypto_192_end_bytes
 4276	ldrb	lr, [r0], #1
 4277	subs	r4, r4, #1
 4278	strb	lr, [r9], #1
 4279	bne	L_aes_gcm_encrypt_arm32_crypto_192_start_byte
 4280L_aes_gcm_encrypt_arm32_crypto_192_end_bytes:
 4281	sub	r9, r9, r11
 4282	add	r5, r5, #1
 4283	vmov.8	q4, q6
 4284	rev	r8, r5
 4285	vmov	s19, r8
 4286	aese.8	q4, q0
 4287	aesmc.8	q4, q4
 4288	aese.8	q4, q1
 4289	aesmc.8	q4, q4
 4290	aese.8	q4, q2
 4291	aesmc.8	q4, q4
 4292	aese.8	q4, q3
 4293	aesmc.8	q4, q4
 4294	aese.8	q4, q7
 4295	aesmc.8	q4, q4
 4296	aese.8	q4, q8
 4297	aesmc.8	q4, q4
 4298	aese.8	q4, q9
 4299	aesmc.8	q4, q4
 4300	aese.8	q4, q10
 4301	aesmc.8	q4, q4
 4302	aese.8	q4, q11
 4303	aesmc.8	q4, q4
 4304	aese.8	q4, q12
 4305	aesmc.8	q4, q4
 4306	vld1.32	{q14}, [r7]!
 4307	aese.8	q4, q13
 4308	aesmc.8	q4, q4
 4309	vld1.32	{q15}, [r7]
 4310	aese.8	q4, q14
 4311	veor.8	q4, q4, q15
 4312	vld1.8	{q14}, [r9]
 4313	sub	r7, r7, #16
 4314	veor.8	q14, q14, q4
 4315	vst1.32	{q14}, [r9]
 4316	mov	r4, r11
 4317	cmp	r4, #4
 4318	blt	L_aes_gcm_encrypt_arm32_crypto_192_out_start_sw
 4319L_aes_gcm_encrypt_arm32_crypto_192_out_start_dw:
 4320	ldr	lr, [r9], #4
 4321	sub	r4, r4, #4
 4322	str	lr, [r1], #4
 4323	cmp	r4, #4
 4324	bge	L_aes_gcm_encrypt_arm32_crypto_192_out_start_dw
 4325L_aes_gcm_encrypt_arm32_crypto_192_out_start_sw:
 4326	cmp	r4, #2
 4327	blt	L_aes_gcm_encrypt_arm32_crypto_192_out_start_byte
 4328	ldrh	lr, [r9], #2
 4329	sub	r4, r4, #2
 4330	strh	lr, [r1], #2
 4331L_aes_gcm_encrypt_arm32_crypto_192_out_start_byte:
 4332	cmp	r4, #1
 4333	blt	L_aes_gcm_encrypt_arm32_crypto_192_out_end_bytes
 4334	ldrb	lr, [r9], #1
 4335	subs	r4, r4, #1
 4336	strb	lr, [r1], #1
 4337	bne	L_aes_gcm_encrypt_arm32_crypto_192_out_start_byte
 4338L_aes_gcm_encrypt_arm32_crypto_192_out_end_bytes:
 4339L_aes_gcm_encrypt_arm32_crypto_192_partial_done:
 4340	# Finish
 4341	add	r8, r2, #15
 4342	sub	r8, r5, r8, lsr #4
 4343	rev	r8, r8
 4344	vmov.32	s27, r8
 4345	aese.8	q6, q0
 4346	aesmc.8	q6, q6
 4347	aese.8	q6, q1
 4348	aesmc.8	q6, q6
 4349	aese.8	q6, q2
 4350	aesmc.8	q6, q6
 4351	aese.8	q6, q3
 4352	aesmc.8	q6, q6
 4353	aese.8	q6, q7
 4354	aesmc.8	q6, q6
 4355	aese.8	q6, q8
 4356	aesmc.8	q6, q6
 4357	aese.8	q6, q9
 4358	aesmc.8	q6, q6
 4359	aese.8	q6, q10
 4360	aesmc.8	q6, q6
 4361	aese.8	q6, q11
 4362	aesmc.8	q6, q6
 4363	aese.8	q6, q12
 4364	aesmc.8	q6, q6
 4365	vld1.32	{q14}, [r7]!
 4366	aese.8	q6, q13
 4367	aesmc.8	q6, q6
 4368	vld1.32	{q15}, [r7]
 4369	aese.8	q6, q14
 4370	veor.8	q6, q6, q15
 4371	sub	r7, r7, #16
 4372#endif /* !NO_AES_192 */
 4373	b	L_aes_gcm_encrypt_arm32_crypto_done_enc
 4374	# AES_GCM_256
 4375L_aes_gcm_encrypt_arm32_crypto_start_256:
 4376#ifndef NO_AES_256
 4377	cmp	r10, #1
 4378	blt	L_aes_gcm_encrypt_arm32_crypto_256_done
 4379	beq	L_aes_gcm_encrypt_arm32_crypto_256_start_1
 4380L_aes_gcm_encrypt_arm32_crypto_256_start_2:
 4381	add	r8, r5, #1
 4382	vmov.8	q4, q6
 4383	add	r5, r5, #2
 4384	vmov.8	q5, q6
 4385	rev	r8, r8
 4386	rev	r12, r5
 4387	vmov	s19, r8
 4388	vmov	s23, r12
 4389	aese.8	q4, q0
 4390	aesmc.8	q4, q4
 4391	aese.8	q5, q0
 4392	aesmc.8	q5, q5
 4393	aese.8	q4, q1
 4394	aesmc.8	q4, q4
 4395	aese.8	q5, q1
 4396	aesmc.8	q5, q5
 4397	aese.8	q4, q2
 4398	aesmc.8	q4, q4
 4399	aese.8	q5, q2
 4400	aesmc.8	q5, q5
 4401	aese.8	q4, q3
 4402	aesmc.8	q4, q4
 4403	aese.8	q5, q3
 4404	aesmc.8	q5, q5
 4405	aese.8	q4, q7
 4406	aesmc.8	q4, q4
 4407	aese.8	q5, q7
 4408	aesmc.8	q5, q5
 4409	aese.8	q4, q8
 4410	aesmc.8	q4, q4
 4411	aese.8	q5, q8
 4412	aesmc.8	q5, q5
 4413	aese.8	q4, q9
 4414	aesmc.8	q4, q4
 4415	aese.8	q5, q9
 4416	aesmc.8	q5, q5
 4417	subs	r10, r10, #2
 4418	aese.8	q4, q10
 4419	aesmc.8	q4, q4
 4420	aese.8	q5, q10
 4421	aesmc.8	q5, q5
 4422	aese.8	q4, q11
 4423	aesmc.8	q4, q4
 4424	aese.8	q5, q11
 4425	aesmc.8	q5, q5
 4426	aese.8	q4, q12
 4427	aesmc.8	q4, q4
 4428	aese.8	q5, q12
 4429	aesmc.8	q5, q5
 4430	vld1.32	{q14}, [r7]!
 4431	aese.8	q4, q13
 4432	aesmc.8	q4, q4
 4433	aese.8	q5, q13
 4434	aesmc.8	q5, q5
 4435	vld1.32	{q15}, [r7]!
 4436	aese.8	q4, q14
 4437	aesmc.8	q4, q4
 4438	aese.8	q5, q14
 4439	aesmc.8	q5, q5
 4440	vld1.32	{q14}, [r7]!
 4441	aese.8	q4, q15
 4442	aesmc.8	q4, q4
 4443	aese.8	q5, q15
 4444	aesmc.8	q5, q5
 4445	vld1.32	{q15}, [r7]
 4446	aese.8	q4, q14
 4447	veor.8	q4, q4, q15
 4448	aese.8	q5, q14
 4449	veor.8	q5, q5, q15
 4450	vld1.8	{q14-q15}, [r0]!
 4451	sub	r7, r7, #48
 4452	veor.8	q14, q14, q4
 4453	veor.8	q15, q15, q5
 4454	vst1.8	{q14-q15}, [r1]!
 4455	cmp	r10, #1
 4456	bgt	L_aes_gcm_encrypt_arm32_crypto_256_start_2
 4457	blt	L_aes_gcm_encrypt_arm32_crypto_256_done
 4458L_aes_gcm_encrypt_arm32_crypto_256_start_1:
 4459	add	r5, r5, #1
 4460	vmov.8	q4, q6
 4461	rev	r8, r5
 4462	vmov	s19, r8
 4463	aese.8	q4, q0
 4464	aesmc.8	q4, q4
 4465	aese.8	q4, q1
 4466	aesmc.8	q4, q4
 4467	aese.8	q4, q2
 4468	aesmc.8	q4, q4
 4469	aese.8	q4, q3
 4470	aesmc.8	q4, q4
 4471	aese.8	q4, q7
 4472	aesmc.8	q4, q4
 4473	aese.8	q4, q8
 4474	aesmc.8	q4, q4
 4475	aese.8	q4, q9
 4476	aesmc.8	q4, q4
 4477	aese.8	q4, q10
 4478	aesmc.8	q4, q4
 4479	aese.8	q4, q11
 4480	aesmc.8	q4, q4
 4481	aese.8	q4, q12
 4482	aesmc.8	q4, q4
 4483	vld1.32	{q14}, [r7]!
 4484	aese.8	q4, q13
 4485	aesmc.8	q4, q4
 4486	vld1.32	{q15}, [r7]!
 4487	aese.8	q4, q14
 4488	aesmc.8	q4, q4
 4489	vld1.32	{q14}, [r7]!
 4490	aese.8	q4, q15
 4491	aesmc.8	q4, q4
 4492	vld1.32	{q15}, [r7]
 4493	aese.8	q4, q14
 4494	veor.8	q4, q4, q15
 4495	vld1.8	{q14}, [r0]!
 4496	sub	r7, r7, #48
 4497	veor.8	q14, q14, q4
 4498	vst1.32	{q14}, [r1]!
 4499L_aes_gcm_encrypt_arm32_crypto_256_done:
 4500	ands	r11, r2, #15
 4501	beq	L_aes_gcm_encrypt_arm32_crypto_256_partial_done
 4502	veor.8	q14, q14, q14
 4503	mov	r4, r11
 4504	vst1.32	{q14}, [r9]
 4505	cmp	r4, #4
 4506	blt	L_aes_gcm_encrypt_arm32_crypto_256_start_sw
 4507L_aes_gcm_encrypt_arm32_crypto_256_start_dw:
 4508	ldr	lr, [r0], #4
 4509	sub	r4, r4, #4
 4510	str	lr, [r9], #4
 4511	cmp	r4, #4
 4512	bge	L_aes_gcm_encrypt_arm32_crypto_256_start_dw
 4513L_aes_gcm_encrypt_arm32_crypto_256_start_sw:
 4514	cmp	r4, #2
 4515	blt	L_aes_gcm_encrypt_arm32_crypto_256_start_byte
 4516	ldrh	lr, [r0], #2
 4517	sub	r4, r4, #2
 4518	strh	lr, [r9], #2
 4519L_aes_gcm_encrypt_arm32_crypto_256_start_byte:
 4520	cmp	r4, #1
 4521	blt	L_aes_gcm_encrypt_arm32_crypto_256_end_bytes
 4522	ldrb	lr, [r0], #1
 4523	subs	r4, r4, #1
 4524	strb	lr, [r9], #1
 4525	bne	L_aes_gcm_encrypt_arm32_crypto_256_start_byte
 4526L_aes_gcm_encrypt_arm32_crypto_256_end_bytes:
 4527	sub	r9, r9, r11
 4528	add	r5, r5, #1
 4529	vmov.8	q4, q6
 4530	rev	r8, r5
 4531	vmov	s19, r8
 4532	aese.8	q4, q0
 4533	aesmc.8	q4, q4
 4534	aese.8	q4, q1
 4535	aesmc.8	q4, q4
 4536	aese.8	q4, q2
 4537	aesmc.8	q4, q4
 4538	aese.8	q4, q3
 4539	aesmc.8	q4, q4
 4540	aese.8	q4, q7
 4541	aesmc.8	q4, q4
 4542	aese.8	q4, q8
 4543	aesmc.8	q4, q4
 4544	aese.8	q4, q9
 4545	aesmc.8	q4, q4
 4546	aese.8	q4, q10
 4547	aesmc.8	q4, q4
 4548	aese.8	q4, q11
 4549	aesmc.8	q4, q4
 4550	aese.8	q4, q12
 4551	aesmc.8	q4, q4
 4552	vld1.32	{q14}, [r7]!
 4553	aese.8	q4, q13
 4554	aesmc.8	q4, q4
 4555	vld1.32	{q15}, [r7]!
 4556	aese.8	q4, q14
 4557	aesmc.8	q4, q4
 4558	vld1.32	{q14}, [r7]!
 4559	aese.8	q4, q15
 4560	aesmc.8	q4, q4
 4561	vld1.32	{q15}, [r7]
 4562	aese.8	q4, q14
 4563	veor.8	q4, q4, q15
 4564	vld1.8	{q14}, [r9]
 4565	sub	r7, r7, #48
 4566	veor.8	q14, q14, q4
 4567	vst1.32	{q14}, [r9]
 4568	mov	r4, r11
 4569	cmp	r4, #4
 4570	blt	L_aes_gcm_encrypt_arm32_crypto_256_out_start_sw
 4571L_aes_gcm_encrypt_arm32_crypto_256_out_start_dw:
 4572	ldr	lr, [r9], #4
 4573	sub	r4, r4, #4
 4574	str	lr, [r1], #4
 4575	cmp	r4, #4
 4576	bge	L_aes_gcm_encrypt_arm32_crypto_256_out_start_dw
 4577L_aes_gcm_encrypt_arm32_crypto_256_out_start_sw:
 4578	cmp	r4, #2
 4579	blt	L_aes_gcm_encrypt_arm32_crypto_256_out_start_byte
 4580	ldrh	lr, [r9], #2
 4581	sub	r4, r4, #2
 4582	strh	lr, [r1], #2
 4583L_aes_gcm_encrypt_arm32_crypto_256_out_start_byte:
 4584	cmp	r4, #1
 4585	blt	L_aes_gcm_encrypt_arm32_crypto_256_out_end_bytes
 4586	ldrb	lr, [r9], #1
 4587	subs	r4, r4, #1
 4588	strb	lr, [r1], #1
 4589	bne	L_aes_gcm_encrypt_arm32_crypto_256_out_start_byte
 4590L_aes_gcm_encrypt_arm32_crypto_256_out_end_bytes:
 4591L_aes_gcm_encrypt_arm32_crypto_256_partial_done:
 4592	# Finish
 4593	add	r8, r2, #15
 4594	sub	r8, r5, r8, lsr #4
 4595	rev	r8, r8
 4596	vmov.32	s27, r8
 4597	aese.8	q6, q0
 4598	aesmc.8	q6, q6
 4599	aese.8	q6, q1
 4600	aesmc.8	q6, q6
 4601	aese.8	q6, q2
 4602	aesmc.8	q6, q6
 4603	aese.8	q6, q3
 4604	aesmc.8	q6, q6
 4605	aese.8	q6, q7
 4606	aesmc.8	q6, q6
 4607	aese.8	q6, q8
 4608	aesmc.8	q6, q6
 4609	aese.8	q6, q9
 4610	aesmc.8	q6, q6
 4611	aese.8	q6, q10
 4612	aesmc.8	q6, q6
 4613	aese.8	q6, q11
 4614	aesmc.8	q6, q6
 4615	aese.8	q6, q12
 4616	aesmc.8	q6, q6
 4617	vld1.32	{q14}, [r7]!
 4618	aese.8	q6, q13
 4619	aesmc.8	q6, q6
 4620	vld1.32	{q15}, [r7]!
 4621	aese.8	q6, q14
 4622	aesmc.8	q6, q6
 4623	vld1.32	{q14}, [r7]!
 4624	aese.8	q6, q15
 4625	aesmc.8	q6, q6
 4626	vld1.32	{q15}, [r7]
 4627	aese.8	q6, q14
 4628	veor.8	q6, q6, q15
 4629	sub	r7, r7, #48
 4630#endif /* !NO_AES_256 */
 4631	b	L_aes_gcm_encrypt_arm32_crypto_done_enc
 4632	# AES_GCM_128
 4633L_aes_gcm_encrypt_arm32_crypto_start_128:
 4634#ifndef NO_AES_128
 4635	cmp	r10, #1
 4636	blt	L_aes_gcm_encrypt_arm32_crypto_128_done
 4637	beq	L_aes_gcm_encrypt_arm32_crypto_128_start_1
 4638L_aes_gcm_encrypt_arm32_crypto_128_start_2:
 4639	add	r8, r5, #1
 4640	vmov.8	q4, q6
 4641	add	r5, r5, #2
 4642	vmov.8	q5, q6
 4643	rev	r8, r8
 4644	rev	r12, r5
 4645	vmov	s19, r8
 4646	vmov	s23, r12
 4647	aese.8	q4, q0
 4648	aesmc.8	q4, q4
 4649	aese.8	q5, q0
 4650	aesmc.8	q5, q5
 4651	aese.8	q4, q1
 4652	aesmc.8	q4, q4
 4653	aese.8	q5, q1
 4654	aesmc.8	q5, q5
 4655	aese.8	q4, q2
 4656	aesmc.8	q4, q4
 4657	aese.8	q5, q2
 4658	aesmc.8	q5, q5
 4659	aese.8	q4, q3
 4660	aesmc.8	q4, q4
 4661	aese.8	q5, q3
 4662	aesmc.8	q5, q5
 4663	aese.8	q4, q7
 4664	aesmc.8	q4, q4
 4665	aese.8	q5, q7
 4666	aesmc.8	q5, q5
 4667	aese.8	q4, q8
 4668	aesmc.8	q4, q4
 4669	aese.8	q5, q8
 4670	aesmc.8	q5, q5
 4671	aese.8	q4, q9
 4672	aesmc.8	q4, q4
 4673	aese.8	q5, q9
 4674	aesmc.8	q5, q5
 4675	subs	r10, r10, #2
 4676	aese.8	q4, q10
 4677	aesmc.8	q4, q4
 4678	aese.8	q5, q10
 4679	aesmc.8	q5, q5
 4680	aese.8	q4, q11
 4681	aesmc.8	q4, q4
 4682	aese.8	q5, q11
 4683	aesmc.8	q5, q5
 4684	vld1.8	{q14-q15}, [r0]!
 4685	aese.8	q4, q12
 4686	veor.8	q4, q4, q13
 4687	aese.8	q5, q12
 4688	veor.8	q5, q5, q13
 4689	veor.8	q14, q14, q4
 4690	veor.8	q15, q15, q5
 4691	vst1.8	{q14-q15}, [r1]!
 4692	cmp	r10, #1
 4693	bgt	L_aes_gcm_encrypt_arm32_crypto_128_start_2
 4694	blt	L_aes_gcm_encrypt_arm32_crypto_128_done
 4695L_aes_gcm_encrypt_arm32_crypto_128_start_1:
 4696	add	r5, r5, #1
 4697	vmov.8	q4, q6
 4698	rev	r8, r5
 4699	vmov	s19, r8
 4700	aese.8	q4, q0
 4701	aesmc.8	q4, q4
 4702	aese.8	q4, q1
 4703	aesmc.8	q4, q4
 4704	aese.8	q4, q2
 4705	aesmc.8	q4, q4
 4706	aese.8	q4, q3
 4707	aesmc.8	q4, q4
 4708	aese.8	q4, q7
 4709	aesmc.8	q4, q4
 4710	aese.8	q4, q8
 4711	aesmc.8	q4, q4
 4712	aese.8	q4, q9
 4713	aesmc.8	q4, q4
 4714	aese.8	q4, q10
 4715	aesmc.8	q4, q4
 4716	aese.8	q4, q11
 4717	aesmc.8	q4, q4
 4718	vld1.8	{q14}, [r0]!
 4719	aese.8	q4, q12
 4720	veor.8	q4, q4, q13
 4721	veor.8	q14, q14, q4
 4722	vst1.32	{q14}, [r1]!
 4723L_aes_gcm_encrypt_arm32_crypto_128_done:
 4724	ands	r11, r2, #15
 4725	beq	L_aes_gcm_encrypt_arm32_crypto_128_partial_done
 4726	veor.8	q14, q14, q14
 4727	mov	r4, r11
 4728	vst1.32	{q14}, [r9]
 4729	cmp	r4, #4
 4730	blt	L_aes_gcm_encrypt_arm32_crypto_128_start_sw
 4731L_aes_gcm_encrypt_arm32_crypto_128_start_dw:
 4732	ldr	lr, [r0], #4
 4733	sub	r4, r4, #4
 4734	str	lr, [r9], #4
 4735	cmp	r4, #4
 4736	bge	L_aes_gcm_encrypt_arm32_crypto_128_start_dw
 4737L_aes_gcm_encrypt_arm32_crypto_128_start_sw:
 4738	cmp	r4, #2
 4739	blt	L_aes_gcm_encrypt_arm32_crypto_128_start_byte
 4740	ldrh	lr, [r0], #2
 4741	sub	r4, r4, #2
 4742	strh	lr, [r9], #2
 4743L_aes_gcm_encrypt_arm32_crypto_128_start_byte:
 4744	cmp	r4, #1
 4745	blt	L_aes_gcm_encrypt_arm32_crypto_128_end_bytes
 4746	ldrb	lr, [r0], #1
 4747	subs	r4, r4, #1
 4748	strb	lr, [r9], #1
 4749	bne	L_aes_gcm_encrypt_arm32_crypto_128_start_byte
 4750L_aes_gcm_encrypt_arm32_crypto_128_end_bytes:
 4751	sub	r9, r9, r11
 4752	add	r5, r5, #1
 4753	vmov.8	q4, q6
 4754	rev	r8, r5
 4755	vmov	s19, r8
 4756	aese.8	q4, q0
 4757	aesmc.8	q4, q4
 4758	aese.8	q4, q1
 4759	aesmc.8	q4, q4
 4760	aese.8	q4, q2
 4761	aesmc.8	q4, q4
 4762	aese.8	q4, q3
 4763	aesmc.8	q4, q4
 4764	aese.8	q4, q7
 4765	aesmc.8	q4, q4
 4766	aese.8	q4, q8
 4767	aesmc.8	q4, q4
 4768	aese.8	q4, q9
 4769	aesmc.8	q4, q4
 4770	aese.8	q4, q10
 4771	aesmc.8	q4, q4
 4772	aese.8	q4, q11
 4773	aesmc.8	q4, q4
 4774	vld1.8	{q14}, [r9]
 4775	aese.8	q4, q12
 4776	veor.8	q4, q4, q13
 4777	veor.8	q14, q14, q4
 4778	vst1.32	{q14}, [r9]
 4779	mov	r4, r11
 4780	cmp	r4, #4
 4781	blt	L_aes_gcm_encrypt_arm32_crypto_128_out_start_sw
 4782L_aes_gcm_encrypt_arm32_crypto_128_out_start_dw:
 4783	ldr	lr, [r9], #4
 4784	sub	r4, r4, #4
 4785	str	lr, [r1], #4
 4786	cmp	r4, #4
 4787	bge	L_aes_gcm_encrypt_arm32_crypto_128_out_start_dw
 4788L_aes_gcm_encrypt_arm32_crypto_128_out_start_sw:
 4789	cmp	r4, #2
 4790	blt	L_aes_gcm_encrypt_arm32_crypto_128_out_start_byte
 4791	ldrh	lr, [r9], #2
 4792	sub	r4, r4, #2
 4793	strh	lr, [r1], #2
 4794L_aes_gcm_encrypt_arm32_crypto_128_out_start_byte:
 4795	cmp	r4, #1
 4796	blt	L_aes_gcm_encrypt_arm32_crypto_128_out_end_bytes
 4797	ldrb	lr, [r9], #1
 4798	subs	r4, r4, #1
 4799	strb	lr, [r1], #1
 4800	bne	L_aes_gcm_encrypt_arm32_crypto_128_out_start_byte
 4801L_aes_gcm_encrypt_arm32_crypto_128_out_end_bytes:
 4802L_aes_gcm_encrypt_arm32_crypto_128_partial_done:
 4803	# Finish
 4804	add	r8, r2, #15
 4805	sub	r8, r5, r8, lsr #4
 4806	rev	r8, r8
 4807	vmov.32	s27, r8
 4808	aese.8	q6, q0
 4809	aesmc.8	q6, q6
 4810	aese.8	q6, q1
 4811	aesmc.8	q6, q6
 4812	aese.8	q6, q2
 4813	aesmc.8	q6, q6
 4814	aese.8	q6, q3
 4815	aesmc.8	q6, q6
 4816	aese.8	q6, q7
 4817	aesmc.8	q6, q6
 4818	aese.8	q6, q8
 4819	aesmc.8	q6, q6
 4820	aese.8	q6, q9
 4821	aesmc.8	q6, q6
 4822	aese.8	q6, q10
 4823	aesmc.8	q6, q6
 4824	aese.8	q6, q11
 4825	aesmc.8	q6, q6
 4826	aese.8	q6, q12
 4827	veor.8	q6, q6, q13
 4828#endif /* !NO_AES_128 */
 4829L_aes_gcm_encrypt_arm32_crypto_done_enc:
 4830	# aadSz
 4831	ldr	r6, [sp, #116]
 4832	# gcm_h
 4833	ldr	r8, [sp, #124]
 4834	sub	r1, r1, r2
 4835	vmov.i8	q13, #0x87
 4836	veor.8	q7, q7, q7
 4837	vshr.u64	q13, q13, #56
 4838	vld1.32	{q8}, [r8]
 4839	orr	r10, r6, r2
 4840	cmp	r10, #32
 4841	blt	L_aes_gcm_encrypt_arm32_crypto_h_done
 4842	# Square H => H^2
 4843	vmull.p64	q1, d17, d17
 4844	vmull.p64	q0, d16, d16
 4845	vmull.p64	q9, d3, d27
 4846	veor.8	d2, d2, d19
 4847	veor.8	d1, d1, d18
 4848	vmull.p64	q9, d2, d26
 4849	veor.8	q9, q9, q0
 4850	cmp	r10, #0x40
 4851	blt	L_aes_gcm_encrypt_arm32_crypto_h_done
 4852	# Multiply H and H^2  => H^3
 4853	vmull.p64	q2, d17, d18
 4854	vmull.p64	q3, d16, d19
 4855	vmull.p64	q0, d16, d18
 4856	vmull.p64	q1, d17, d19
 4857	veor.8	q2, q2, q3
 4858	#   Reduce
 4859	vmull.p64	q10, d3, d27
 4860	veor.8	d2, d2, d5
 4861	veor.8	d1, d1, d4
 4862	veor.8	d2, d2, d21
 4863	veor.8	d1, d1, d20
 4864	vmull.p64	q10, d2, d26
 4865	veor.8	q10, q10, q0
 4866	# Square H^2 => H^4
 4867	vmull.p64	q1, d19, d19
 4868	vmull.p64	q0, d18, d18
 4869	vmull.p64	q11, d3, d27
 4870	veor.8	d2, d2, d23
 4871	veor.8	d1, d1, d22
 4872	vmull.p64	q11, d2, d26
 4873	veor.8	q11, q11, q0
 4874	# Done
 4875L_aes_gcm_encrypt_arm32_crypto_h_done:
 4876	# aad
 4877	ldr	r5, [sp, #112]
 4878	lsr	r10, r6, #4
 4879	cmp	r10, #1
 4880	blt	L_aes_gcm_encrypt_arm32_crypto_aad_done
 4881	beq	L_aes_gcm_encrypt_arm32_crypto_aad_start_1
 4882	cmp	r10, #4
 4883	blt	L_aes_gcm_encrypt_arm32_crypto_aad_start_2
 4884L_aes_gcm_encrypt_arm32_crypto_aad_start_4:
 4885	vldm	r5!, {q0-q2}
 4886	vmov.i8	q12, #0x55
 4887	vmov.i8	q5, #51
 4888	vshl.u8	q14, q0, #1
 4889	vshl.u8	q15, q1, #1
 4890	vshl.u8	q4, q2, #1
 4891	ldr	lr, [r5], #4
 4892	vshr.u8	q0, q0, #1
 4893	vshr.u8	q1, q1, #1
 4894	vshr.u8	q2, q2, #1
 4895	ldr	r4, [r5], #4
 4896	vbit.8	q14, q0, q12
 4897	vbit.8	q15, q1, q12
 4898	vbit.8	q4, q2, q12
 4899	ldr	r8, [r5], #4
 4900	vshl.u8	q0, q14, #2
 4901	vshl.u8	q1, q15, #2
 4902	vshl.u8	q2, q4, #2
 4903	ldr	r12, [r5], #4
 4904	vshr.u8	q14, q14, #2
 4905	vshr.u8	q15, q15, #2
 4906	vshr.u8	q4, q4, #2
 4907	rbit	lr, lr
 4908	vbit.8	q0, q14, q5
 4909	rbit	r4, r4
 4910	vbit.8	q1, q15, q5
 4911	rbit	r8, r8
 4912	vbit.8	q2, q4, q5
 4913	rbit	r12, r12
 4914	vshl.u8	q14, q0, #4
 4915	rev	lr, lr
 4916	vshl.u8	q15, q1, #4
 4917	rev	r4, r4
 4918	vshl.u8	q4, q2, #4
 4919	rev	r8, r8
 4920	vsri.u8	q14, q0, #4
 4921	rev	r12, r12
 4922	vsri.u8	q15, q1, #4
 4923	vsri.u8	q4, q2, #4
 4924	vmov	d10, lr, r4
 4925	vmov	d11, r8, r12
 4926	veor.8	q12, q7, q14
 4927	#   X  = C * H^1
 4928	vmull.p64	q2, d11, d16
 4929	vmull.p64	q7, d10, d17
 4930	vmull.p64	q0, d10, d16
 4931	vmull.p64	q1, d11, d17
 4932	veor.8	q2, q2, q7
 4933	#   X += C * H^2
 4934	vmull.p64	q3, d8, d18
 4935	vmull.p64	q7, d9, d19
 4936	veor.8	q0, q0, q3
 4937	veor.8	q1, q1, q7
 4938	vmull.p64	q3, d9, d18
 4939	vmull.p64	q7, d8, d19
 4940	veor.8	q2, q2, q3
 4941	veor.8	q2, q2, q7
 4942	#   X += C * H^3
 4943	vmull.p64	q3, d30, d20
 4944	vmull.p64	q7, d31, d21
 4945	veor.8	q0, q0, q3
 4946	veor.8	q1, q1, q7
 4947	vmull.p64	q3, d31, d20
 4948	vmull.p64	q7, d30, d21
 4949	veor.8	q2, q2, q3
 4950	veor.8	q2, q2, q7
 4951	#   X += C * H^4
 4952	vmull.p64	q3, d24, d22
 4953	vmull.p64	q7, d25, d23
 4954	veor.8	q0, q0, q3
 4955	veor.8	q1, q1, q7
 4956	vmull.p64	q3, d25, d22
 4957	vmull.p64	q7, d24, d23
 4958	veor.8	q2, q2, q3
 4959	veor.8	q2, q2, q7
 4960	#   Reduce
 4961	vmull.p64	q7, d3, d27
 4962	veor.8	d2, d2, d5
 4963	veor.8	d1, d1, d4
 4964	veor.8	d2, d2, d15
 4965	veor.8	d1, d1, d14
 4966	vmull.p64	q7, d2, d26
 4967	veor.8	q7, q7, q0
 4968	# Done GHASH
 4969	sub	r10, r10, #4
 4970	cmp	r10, #4
 4971	bge	L_aes_gcm_encrypt_arm32_crypto_aad_start_4
 4972	cmp	r10, #1
 4973	blt	L_aes_gcm_encrypt_arm32_crypto_aad_done
 4974	beq	L_aes_gcm_encrypt_arm32_crypto_aad_start_1
 4975L_aes_gcm_encrypt_arm32_crypto_aad_start_2:
 4976	vld1.32	{q14-q15}, [r5]!
 4977	vmov.i8	q12, #0x55
 4978	vshl.u8	q0, q14, #1
 4979	vshl.u8	q1, q15, #1
 4980	vshr.u8	q14, q14, #1
 4981	vshr.u8	q15, q15, #1
 4982	vbif.8	q14, q0, q12
 4983	vbif.8	q15, q1, q12
 4984	vmov.i8	q12, #51
 4985	vshl.u8	q0, q14, #2
 4986	vshl.u8	q1, q15, #2
 4987	vshr.u8	q14, q14, #2
 4988	vshr.u8	q15, q15, #2
 4989	vbit.8	q0, q14, q12
 4990	vbit.8	q1, q15, q12
 4991	vshl.u8	q14, q0, #4
 4992	vshl.u8	q15, q1, #4
 4993	vsri.u8	q14, q0, #4
 4994	vsri.u8	q15, q1, #4
 4995	veor.8	q12, q7, q14
 4996	#   X  = C * H^1
 4997	vmull.p64	q2, d31, d16
 4998	vmull.p64	q7, d30, d17
 4999	vmull.p64	q0, d30, d16
 5000	vmull.p64	q1, d31, d17
 5001	veor.8	q2, q2, q7
 5002	#   X += C * H^2
 5003	vmull.p64	q3, d24, d18
 5004	vmull.p64	q7, d25, d19
 5005	veor.8	q0, q0, q3
 5006	veor.8	q1, q1, q7
 5007	vmull.p64	q3, d25, d18
 5008	vmull.p64	q7, d24, d19
 5009	veor.8	q2, q2, q3
 5010	veor.8	q2, q2, q7
 5011	#   Reduce
 5012	vmull.p64	q7, d3, d27
 5013	veor.8	d2, d2, d5
 5014	veor.8	d1, d1, d4
 5015	veor.8	d2, d2, d15
 5016	veor.8	d1, d1, d14
 5017	vmull.p64	q7, d2, d26
 5018	veor.8	q7, q7, q0
 5019	# Done GHASH
 5020	sub	r10, r10, #2
 5021	cmp	r10, #0
 5022	beq	L_aes_gcm_encrypt_arm32_crypto_aad_done
 5023L_aes_gcm_encrypt_arm32_crypto_aad_start_1:
 5024	vld1.32	{q14}, [r5]!
 5025	vmov.i8	q12, #0x55
 5026	vshl.u8	q0, q14, #1
 5027	vshr.u8	q14, q14, #1
 5028	vbif.8	q14, q0, q12
 5029	vmov.i8	q12, #51
 5030	vshl.u8	q0, q14, #2
 5031	vshr.u8	q14, q14, #2
 5032	vbit.8	q0, q14, q12
 5033	vshl.u8	q14, q0, #4
 5034	vsri.u8	q14, q0, #4
 5035	veor.8	q12, q7, q14
 5036	#   X  = C * H^1
 5037	vmull.p64	q2, d25, d16
 5038	vmull.p64	q7, d24, d17
 5039	vmull.p64	q0, d24, d16
 5040	vmull.p64	q1, d25, d17
 5041	veor.8	q2, q2, q7
 5042	#   Reduce
 5043	vmull.p64	q7, d3, d27
 5044	veor.8	d2, d2, d5
 5045	veor.8	d1, d1, d4
 5046	veor.8	d2, d2, d15
 5047	veor.8	d1, d1, d14
 5048	vmull.p64	q7, d2, d26
 5049	veor.8	q7, q7, q0
 5050	# Done GHASH
 5051L_aes_gcm_encrypt_arm32_crypto_aad_done:
 5052	ands	r11, r6, #15
 5053	beq	L_aes_gcm_encrypt_arm32_crypto_aad_partial_done
 5054	veor.8	q0, q0, q0
 5055	mov	r12, r11
 5056	vst1.32	{q0}, [r9]
 5057	cmp	r12, #4
 5058	blt	L_aes_gcm_encrypt_arm32_crypto_aad_start_sw
 5059L_aes_gcm_encrypt_arm32_crypto_aad_start_dw:
 5060	ldr	r8, [r5], #4
 5061	sub	r12, r12, #4
 5062	str	r8, [r9], #4
 5063	cmp	r12, #4
 5064	bge	L_aes_gcm_encrypt_arm32_crypto_aad_start_dw
 5065L_aes_gcm_encrypt_arm32_crypto_aad_start_sw:
 5066	cmp	r12, #2
 5067	blt	L_aes_gcm_encrypt_arm32_crypto_aad_start_byte
 5068	ldrh	r8, [r5], #2
 5069	sub	r12, r12, #2
 5070	strh	r8, [r9], #2
 5071L_aes_gcm_encrypt_arm32_crypto_aad_start_byte:
 5072	cmp	r12, #1
 5073	blt	L_aes_gcm_encrypt_arm32_crypto_aad_end_bytes
 5074	ldrb	r8, [r5], #1
 5075	subs	r12, r12, #1
 5076	strb	r8, [r9], #1
 5077	bne	L_aes_gcm_encrypt_arm32_crypto_aad_start_byte
 5078L_aes_gcm_encrypt_arm32_crypto_aad_end_bytes:
 5079	sub	r9, r9, r11
 5080	vld1.32	{q14}, [r9]
 5081	vmov.i8	q12, #0x55
 5082	vshl.u8	q0, q14, #1
 5083	vshr.u8	q14, q14, #1
 5084	vbif.8	q14, q0, q12
 5085	vmov.i8	q12, #51
 5086	vshl.u8	q0, q14, #2
 5087	vshr.u8	q14, q14, #2
 5088	vbit.8	q0, q14, q12
 5089	vshl.u8	q14, q0, #4
 5090	vsri.u8	q14, q0, #4
 5091	veor.8	q12, q7, q14
 5092	#   X  = C * H^1
 5093	vmull.p64	q2, d25, d16
 5094	vmull.p64	q7, d24, d17
 5095	vmull.p64	q0, d24, d16
 5096	vmull.p64	q1, d25, d17
 5097	veor.8	q2, q2, q7
 5098	#   Reduce
 5099	vmull.p64	q7, d3, d27
 5100	veor.8	d2, d2, d5
 5101	veor.8	d1, d1, d4
 5102	veor.8	d2, d2, d15
 5103	veor.8	d1, d1, d14
 5104	vmull.p64	q7, d2, d26
 5105	veor.8	q7, q7, q0
 5106	# Done GHASH
 5107L_aes_gcm_encrypt_arm32_crypto_aad_partial_done:
 5108	# out
 5109	lsr	r10, r2, #4
 5110	cmp	r10, #1
 5111	blt	L_aes_gcm_encrypt_arm32_crypto_out_done
 5112	beq	L_aes_gcm_encrypt_arm32_crypto_out_start_1
 5113	cmp	r10, #4
 5114	blt	L_aes_gcm_encrypt_arm32_crypto_out_start_2
 5115L_aes_gcm_encrypt_arm32_crypto_out_start_4:
 5116	vldm	r1!, {q0-q2}
 5117	vmov.i8	q12, #0x55
 5118	vmov.i8	q5, #51
 5119	vshl.u8	q14, q0, #1
 5120	vshl.u8	q15, q1, #1
 5121	vshl.u8	q4, q2, #1
 5122	ldr	lr, [r1], #4
 5123	vshr.u8	q0, q0, #1
 5124	vshr.u8	q1, q1, #1
 5125	vshr.u8	q2, q2, #1
 5126	ldr	r4, [r1], #4
 5127	vbit.8	q14, q0, q12
 5128	vbit.8	q15, q1, q12
 5129	vbit.8	q4, q2, q12
 5130	ldr	r8, [r1], #4
 5131	vshl.u8	q0, q14, #2
 5132	vshl.u8	q1, q15, #2
 5133	vshl.u8	q2, q4, #2
 5134	ldr	r12, [r1], #4
 5135	vshr.u8	q14, q14, #2
 5136	vshr.u8	q15, q15, #2
 5137	vshr.u8	q4, q4, #2
 5138	rbit	lr, lr
 5139	vbit.8	q0, q14, q5
 5140	rbit	r4, r4
 5141	vbit.8	q1, q15, q5
 5142	rbit	r8, r8
 5143	vbit.8	q2, q4, q5
 5144	rbit	r12, r12
 5145	vshl.u8	q14, q0, #4
 5146	rev	lr, lr
 5147	vshl.u8	q15, q1, #4
 5148	rev	r4, r4
 5149	vshl.u8	q4, q2, #4
 5150	rev	r8, r8
 5151	vsri.u8	q14, q0, #4
 5152	rev	r12, r12
 5153	vsri.u8	q15, q1, #4
 5154	vsri.u8	q4, q2, #4
 5155	vmov	d10, lr, r4
 5156	vmov	d11, r8, r12
 5157	veor.8	q12, q7, q14
 5158	#   X  = C * H^1
 5159	vmull.p64	q2, d11, d16
 5160	vmull.p64	q7, d10, d17
 5161	vmull.p64	q0, d10, d16
 5162	vmull.p64	q1, d11, d17
 5163	veor.8	q2, q2, q7
 5164	#   X += C * H^2
 5165	vmull.p64	q3, d8, d18
 5166	vmull.p64	q7, d9, d19
 5167	veor.8	q0, q0, q3
 5168	veor.8	q1, q1, q7
 5169	vmull.p64	q3, d9, d18
 5170	vmull.p64	q7, d8, d19
 5171	veor.8	q2, q2, q3
 5172	veor.8	q2, q2, q7
 5173	#   X += C * H^3
 5174	vmull.p64	q3, d30, d20
 5175	vmull.p64	q7, d31, d21
 5176	veor.8	q0, q0, q3
 5177	veor.8	q1, q1, q7
 5178	vmull.p64	q3, d31, d20
 5179	vmull.p64	q7, d30, d21
 5180	veor.8	q2, q2, q3
 5181	veor.8	q2, q2, q7
 5182	#   X += C * H^4
 5183	vmull.p64	q3, d24, d22
 5184	vmull.p64	q7, d25, d23
 5185	veor.8	q0, q0, q3
 5186	veor.8	q1, q1, q7
 5187	vmull.p64	q3, d25, d22
 5188	vmull.p64	q7, d24, d23
 5189	veor.8	q2, q2, q3
 5190	veor.8	q2, q2, q7
 5191	#   Reduce
 5192	vmull.p64	q7, d3, d27
 5193	veor.8	d2, d2, d5
 5194	veor.8	d1, d1, d4
 5195	veor.8	d2, d2, d15
 5196	veor.8	d1, d1, d14
 5197	vmull.p64	q7, d2, d26
 5198	veor.8	q7, q7, q0
 5199	# Done GHASH
 5200	sub	r10, r10, #4
 5201	cmp	r10, #4
 5202	bge	L_aes_gcm_encrypt_arm32_crypto_out_start_4
 5203	cmp	r10, #1
 5204	blt	L_aes_gcm_encrypt_arm32_crypto_out_done
 5205	beq	L_aes_gcm_encrypt_arm32_crypto_out_start_1
 5206L_aes_gcm_encrypt_arm32_crypto_out_start_2:
 5207	vld1.32	{q14-q15}, [r1]!
 5208	vmov.i8	q12, #0x55
 5209	vshl.u8	q0, q14, #1
 5210	vshl.u8	q1, q15, #1
 5211	vshr.u8	q14, q14, #1
 5212	vshr.u8	q15, q15, #1
 5213	vbif.8	q14, q0, q12
 5214	vbif.8	q15, q1, q12
 5215	vmov.i8	q12, #51
 5216	vshl.u8	q0, q14, #2
 5217	vshl.u8	q1, q15, #2
 5218	vshr.u8	q14, q14, #2
 5219	vshr.u8	q15, q15, #2
 5220	vbit.8	q0, q14, q12
 5221	vbit.8	q1, q15, q12
 5222	vshl.u8	q14, q0, #4
 5223	vshl.u8	q15, q1, #4
 5224	vsri.u8	q14, q0, #4
 5225	vsri.u8	q15, q1, #4
 5226	veor.8	q12, q7, q14
 5227	#   X  = C * H^1
 5228	vmull.p64	q2, d31, d16
 5229	vmull.p64	q7, d30, d17
 5230	vmull.p64	q0, d30, d16
 5231	vmull.p64	q1, d31, d17
 5232	veor.8	q2, q2, q7
 5233	#   X += C * H^2
 5234	vmull.p64	q3, d24, d18
 5235	vmull.p64	q7, d25, d19
 5236	veor.8	q0, q0, q3
 5237	veor.8	q1, q1, q7
 5238	vmull.p64	q3, d25, d18
 5239	vmull.p64	q7, d24, d19
 5240	veor.8	q2, q2, q3
 5241	veor.8	q2, q2, q7
 5242	#   Reduce
 5243	vmull.p64	q7, d3, d27
 5244	veor.8	d2, d2, d5
 5245	veor.8	d1, d1, d4
 5246	veor.8	d2, d2, d15
 5247	veor.8	d1, d1, d14
 5248	vmull.p64	q7, d2, d26
 5249	veor.8	q7, q7, q0
 5250	# Done GHASH
 5251	sub	r10, r10, #2
 5252	cmp	r10, #0
 5253	beq	L_aes_gcm_encrypt_arm32_crypto_out_done
 5254L_aes_gcm_encrypt_arm32_crypto_out_start_1:
 5255	vld1.32	{q14}, [r1]!
 5256	vmov.i8	q12, #0x55
 5257	vshl.u8	q0, q14, #1
 5258	vshr.u8	q14, q14, #1
 5259	vbif.8	q14, q0, q12
 5260	vmov.i8	q12, #51
 5261	vshl.u8	q0, q14, #2
 5262	vshr.u8	q14, q14, #2
 5263	vbit.8	q0, q14, q12
 5264	vshl.u8	q14, q0, #4
 5265	vsri.u8	q14, q0, #4
 5266	veor.8	q12, q7, q14
 5267	#   X  = C * H^1
 5268	vmull.p64	q2, d25, d16
 5269	vmull.p64	q7, d24, d17
 5270	vmull.p64	q0, d24, d16
 5271	vmull.p64	q1, d25, d17
 5272	veor.8	q2, q2, q7
 5273	#   Reduce
 5274	vmull.p64	q7, d3, d27
 5275	veor.8	d2, d2, d5
 5276	veor.8	d1, d1, d4
 5277	veor.8	d2, d2, d15
 5278	veor.8	d1, d1, d14
 5279	vmull.p64	q7, d2, d26
 5280	veor.8	q7, q7, q0
 5281	# Done GHASH
 5282L_aes_gcm_encrypt_arm32_crypto_out_done:
 5283	ands	r11, r2, #15
 5284	beq	L_aes_gcm_encrypt_arm32_crypto_out_partial_done
 5285	veor.8	q0, q0, q0
 5286	mov	r12, r11
 5287	vst1.32	{q0}, [r9]
 5288	cmp	r12, #4
 5289	blt	L_aes_gcm_encrypt_arm32_crypto_out_start_sw
 5290L_aes_gcm_encrypt_arm32_crypto_out_start_dw:
 5291	ldr	r8, [r1], #4
 5292	sub	r12, r12, #4
 5293	str	r8, [r9], #4
 5294	cmp	r12, #4
 5295	bge	L_aes_gcm_encrypt_arm32_crypto_out_start_dw
 5296L_aes_gcm_encrypt_arm32_crypto_out_start_sw:
 5297	cmp	r12, #2
 5298	blt	L_aes_gcm_encrypt_arm32_crypto_out_start_byte
 5299	ldrh	r8, [r1], #2
 5300	sub	r12, r12, #2
 5301	strh	r8, [r9], #2
 5302L_aes_gcm_encrypt_arm32_crypto_out_start_byte:
 5303	cmp	r12, #1
 5304	blt	L_aes_gcm_encrypt_arm32_crypto_out_end_bytes
 5305	ldrb	r8, [r1], #1
 5306	subs	r12, r12, #1
 5307	strb	r8, [r9], #1
 5308	bne	L_aes_gcm_encrypt_arm32_crypto_out_start_byte
 5309L_aes_gcm_encrypt_arm32_crypto_out_end_bytes:
 5310	sub	r9, r9, r11
 5311	vld1.32	{q14}, [r9]
 5312	vmov.i8	q12, #0x55
 5313	vshl.u8	q0, q14, #1
 5314	vshr.u8	q14, q14, #1
 5315	vbif.8	q14, q0, q12
 5316	vmov.i8	q12, #51
 5317	vshl.u8	q0, q14, #2
 5318	vshr.u8	q14, q14, #2
 5319	vbit.8	q0, q14, q12
 5320	vshl.u8	q14, q0, #4
 5321	vsri.u8	q14, q0, #4
 5322	veor.8	q12, q7, q14
 5323	#   X  = C * H^1
 5324	vmull.p64	q2, d25, d16
 5325	vmull.p64	q7, d24, d17
 5326	vmull.p64	q0, d24, d16
 5327	vmull.p64	q1, d25, d17
 5328	veor.8	q2, q2, q7
 5329	#   Reduce
 5330	vmull.p64	q7, d3, d27
 5331	veor.8	d2, d2, d5
 5332	veor.8	d1, d1, d4
 5333	veor.8	d2, d2, d15
 5334	veor.8	d1, d1, d14
 5335	vmull.p64	q7, d2, d26
 5336	veor.8	q7, q7, q0
 5337	# Done GHASH
 5338L_aes_gcm_encrypt_arm32_crypto_out_partial_done:
 5339	lsr	lr, r6, #29
 5340	lsl	r6, r6, #3
 5341	rbit	lr, lr
 5342	rbit	r6, r6
 5343	vmov	s0, lr
 5344	vmov	s1, r6
 5345	lsr	lr, r2, #29
 5346	lsl	r2, r2, #3
 5347	rbit	lr, lr
 5348	rbit	r2, r2
 5349	vmov	s2, lr
 5350	vmov	s3, r2
 5351	veor.8	q7, q7, q0
 5352	vmull.p64	q2, d15, d16
 5353	vmull.p64	q3, d14, d17
 5354	vmull.p64	q0, d14, d16
 5355	vmull.p64	q1, d15, d17
 5356	veor.8	q2, q2, q3
 5357	#   Reduce
 5358	vmull.p64	q7, d3, d27
 5359	veor.8	d2, d2, d5
 5360	veor.8	d1, d1, d4
 5361	veor.8	d2, d2, d15
 5362	veor.8	d1, d1, d14
 5363	vmull.p64	q7, d2, d26
 5364	veor.8	q7, q7, q0
 5365	vmov.i8	q0, #0x55
 5366	vshl.u8	q1, q7, #1
 5367	vshr.u8	q7, q7, #1
 5368	vbif.8	q7, q1, q0
 5369	vmov.i8	q0, #51
 5370	vshl.u8	q1, q7, #2
 5371	vshr.u8	q7, q7, #2
 5372	vbit.8	q1, q7, q0
 5373	vshl.u8	q7, q1, #4
 5374	vsri.u8	q7, q1, #4
 5375	# DONE
 5376	veor.8	q7, q7, q6
 5377	# tag
 5378	ldr	lr, [sp, #104]
 5379	# tagSz
 5380	ldr	r4, [sp, #108]
 5381	cmp	r4, #16
 5382	bne	L_aes_gcm_encrypt_arm32_crypto_tag_tag_partial
 5383	vst1.8	{q7}, [lr]
 5384	b	L_aes_gcm_encrypt_arm32_crypto_done_gcm
 5385L_aes_gcm_encrypt_arm32_crypto_tag_tag_partial:
 5386	vst1.8	{q7}, [r9]
 5387	cmp	r4, #4
 5388	blt	L_aes_gcm_encrypt_arm32_crypto_tag_tag_start_sw
 5389L_aes_gcm_encrypt_arm32_crypto_tag_tag_start_dw:
 5390	ldr	r8, [r9], #4
 5391	sub	r4, r4, #4
 5392	str	r8, [lr], #4
 5393	cmp	r4, #4
 5394	bge	L_aes_gcm_encrypt_arm32_crypto_tag_tag_start_dw
 5395L_aes_gcm_encrypt_arm32_crypto_tag_tag_start_sw:
 5396	cmp	r4, #2
 5397	blt	L_aes_gcm_encrypt_arm32_crypto_tag_tag_start_byte
 5398	ldrh	r8, [r9], #2
 5399	sub	r4, r4, #2
 5400	strh	r8, [lr], #2
 5401L_aes_gcm_encrypt_arm32_crypto_tag_tag_start_byte:
 5402	cmp	r4, #1
 5403	blt	L_aes_gcm_encrypt_arm32_crypto_tag_tag_end_bytes
 5404	ldrb	r8, [r9], #1
 5405	subs	r4, r4, #1
 5406	strb	r8, [lr], #1
 5407	bne	L_aes_gcm_encrypt_arm32_crypto_tag_tag_start_byte
 5408L_aes_gcm_encrypt_arm32_crypto_tag_tag_end_bytes:
 5409L_aes_gcm_encrypt_arm32_crypto_done_gcm:
 5410	vpop	{d8-d15}
 5411	pop	{r4, r5, r6, r7, r8, r9, r10, r11, pc}
 5412	.size	AES_GCM_encrypt_AARCH32,.-AES_GCM_encrypt_AARCH32
 5413#ifdef HAVE_AES_DECRYPT
 5414	.text
 5415	.align	4
 5416	.globl	AES_GCM_decrypt_AARCH32
 5417	.type	AES_GCM_decrypt_AARCH32, %function
 5418AES_GCM_decrypt_AARCH32:
 5419	push	{r4, r5, r6, r7, r8, r9, r10, r11, lr}
 5420	vpush	{d8-d15}
 5421	# key
 5422	ldr	r7, [sp, #120]
 5423	# tmp
 5424	ldr	r9, [sp, #128]
 5425	# aadSz
 5426	ldr	r6, [sp, #116]
 5427	# gcm_h
 5428	ldr	r8, [sp, #124]
 5429	vmov.i8	q13, #0x87
 5430	veor.8	q7, q7, q7
 5431	vshr.u64	q13, q13, #56
 5432	vld1.32	{q8}, [r8]
 5433	orr	r10, r6, r2
 5434	cmp	r10, #32
 5435	blt	L_aes_gcm_decrypt_arm32_crypto_h_done
 5436	# Square H => H^2
 5437	vmull.p64	q1, d17, d17
 5438	vmull.p64	q0, d16, d16
 5439	vmull.p64	q9, d3, d27
 5440	veor.8	d2, d2, d19
 5441	veor.8	d1, d1, d18
 5442	vmull.p64	q9, d2, d26
 5443	veor.8	q9, q9, q0
 5444	cmp	r10, #0x40
 5445	blt	L_aes_gcm_decrypt_arm32_crypto_h_done
 5446	# Multiply H and H^2  => H^3
 5447	vmull.p64	q2, d17, d18
 5448	vmull.p64	q3, d16, d19
 5449	vmull.p64	q0, d16, d18
 5450	vmull.p64	q1, d17, d19
 5451	veor.8	q2, q2, q3
 5452	#   Reduce
 5453	vmull.p64	q10, d3, d27
 5454	veor.8	d2, d2, d5
 5455	veor.8	d1, d1, d4
 5456	veor.8	d2, d2, d21
 5457	veor.8	d1, d1, d20
 5458	vmull.p64	q10, d2, d26
 5459	veor.8	q10, q10, q0
 5460	# Square H^2 => H^4
 5461	vmull.p64	q1, d19, d19
 5462	vmull.p64	q0, d18, d18
 5463	vmull.p64	q11, d3, d27
 5464	veor.8	d2, d2, d23
 5465	veor.8	d1, d1, d22
 5466	vmull.p64	q11, d2, d26
 5467	veor.8	q11, q11, q0
 5468	# Done
 5469L_aes_gcm_decrypt_arm32_crypto_h_done:
 5470	# aad
 5471	ldr	r5, [sp, #112]
 5472	lsr	r10, r6, #4
 5473	cmp	r10, #1
 5474	blt	L_aes_gcm_decrypt_arm32_crypto_aad_done
 5475	beq	L_aes_gcm_decrypt_arm32_crypto_aad_start_1
 5476	cmp	r10, #4
 5477	blt	L_aes_gcm_decrypt_arm32_crypto_aad_start_2
 5478L_aes_gcm_decrypt_arm32_crypto_aad_start_4:
 5479	vldm	r5!, {q0-q2}
 5480	vmov.i8	q12, #0x55
 5481	vmov.i8	q5, #51
 5482	vshl.u8	q14, q0, #1
 5483	vshl.u8	q15, q1, #1
 5484	vshl.u8	q4, q2, #1
 5485	ldr	lr, [r5], #4
 5486	vshr.u8	q0, q0, #1
 5487	vshr.u8	q1, q1, #1
 5488	vshr.u8	q2, q2, #1
 5489	ldr	r4, [r5], #4
 5490	vbit.8	q14, q0, q12
 5491	vbit.8	q15, q1, q12
 5492	vbit.8	q4, q2, q12
 5493	ldr	r8, [r5], #4
 5494	vshl.u8	q0, q14, #2
 5495	vshl.u8	q1, q15, #2
 5496	vshl.u8	q2, q4, #2
 5497	ldr	r12, [r5], #4
 5498	vshr.u8	q14, q14, #2
 5499	vshr.u8	q15, q15, #2
 5500	vshr.u8	q4, q4, #2
 5501	rbit	lr, lr
 5502	vbit.8	q0, q14, q5
 5503	rbit	r4, r4
 5504	vbit.8	q1, q15, q5
 5505	rbit	r8, r8
 5506	vbit.8	q2, q4, q5
 5507	rbit	r12, r12
 5508	vshl.u8	q14, q0, #4
 5509	rev	lr, lr
 5510	vshl.u8	q15, q1, #4
 5511	rev	r4, r4
 5512	vshl.u8	q4, q2, #4
 5513	rev	r8, r8
 5514	vsri.u8	q14, q0, #4
 5515	rev	r12, r12
 5516	vsri.u8	q15, q1, #4
 5517	vsri.u8	q4, q2, #4
 5518	vmov	d10, lr, r4
 5519	vmov	d11, r8, r12
 5520	veor.8	q12, q7, q14
 5521	#   X  = C * H^1
 5522	vmull.p64	q2, d11, d16
 5523	vmull.p64	q7, d10, d17
 5524	vmull.p64	q0, d10, d16
 5525	vmull.p64	q1, d11, d17
 5526	veor.8	q2, q2, q7
 5527	#   X += C * H^2
 5528	vmull.p64	q3, d8, d18
 5529	vmull.p64	q7, d9, d19
 5530	veor.8	q0, q0, q3
 5531	veor.8	q1, q1, q7
 5532	vmull.p64	q3, d9, d18
 5533	vmull.p64	q7, d8, d19
 5534	veor.8	q2, q2, q3
 5535	veor.8	q2, q2, q7
 5536	#   X += C * H^3
 5537	vmull.p64	q3, d30, d20
 5538	vmull.p64	q7, d31, d21
 5539	veor.8	q0, q0, q3
 5540	veor.8	q1, q1, q7
 5541	vmull.p64	q3, d31, d20
 5542	vmull.p64	q7, d30, d21
 5543	veor.8	q2, q2, q3
 5544	veor.8	q2, q2, q7
 5545	#   X += C * H^4
 5546	vmull.p64	q3, d24, d22
 5547	vmull.p64	q7, d25, d23
 5548	veor.8	q0, q0, q3
 5549	veor.8	q1, q1, q7
 5550	vmull.p64	q3, d25, d22
 5551	vmull.p64	q7, d24, d23
 5552	veor.8	q2, q2, q3
 5553	veor.8	q2, q2, q7
 5554	#   Reduce
 5555	vmull.p64	q7, d3, d27
 5556	veor.8	d2, d2, d5
 5557	veor.8	d1, d1, d4
 5558	veor.8	d2, d2, d15
 5559	veor.8	d1, d1, d14
 5560	vmull.p64	q7, d2, d26
 5561	veor.8	q7, q7, q0
 5562	# Done GHASH
 5563	sub	r10, r10, #4
 5564	cmp	r10, #4
 5565	bge	L_aes_gcm_decrypt_arm32_crypto_aad_start_4
 5566	cmp	r10, #1
 5567	blt	L_aes_gcm_decrypt_arm32_crypto_aad_done
 5568	beq	L_aes_gcm_decrypt_arm32_crypto_aad_start_1
 5569L_aes_gcm_decrypt_arm32_crypto_aad_start_2:
 5570	vld1.32	{q14-q15}, [r5]!
 5571	vmov.i8	q12, #0x55
 5572	vshl.u8	q0, q14, #1
 5573	vshl.u8	q1, q15, #1
 5574	vshr.u8	q14, q14, #1
 5575	vshr.u8	q15, q15, #1
 5576	vbif.8	q14, q0, q12
 5577	vbif.8	q15, q1, q12
 5578	vmov.i8	q12, #51
 5579	vshl.u8	q0, q14, #2
 5580	vshl.u8	q1, q15, #2
 5581	vshr.u8	q14, q14, #2
 5582	vshr.u8	q15, q15, #2
 5583	vbit.8	q0, q14, q12
 5584	vbit.8	q1, q15, q12
 5585	vshl.u8	q14, q0, #4
 5586	vshl.u8	q15, q1, #4
 5587	vsri.u8	q14, q0, #4
 5588	vsri.u8	q15, q1, #4
 5589	veor.8	q12, q7, q14
 5590	#   X  = C * H^1
 5591	vmull.p64	q2, d31, d16
 5592	vmull.p64	q7, d30, d17
 5593	vmull.p64	q0, d30, d16
 5594	vmull.p64	q1, d31, d17
 5595	veor.8	q2, q2, q7
 5596	#   X += C * H^2
 5597	vmull.p64	q3, d24, d18
 5598	vmull.p64	q7, d25, d19
 5599	veor.8	q0, q0, q3
 5600	veor.8	q1, q1, q7
 5601	vmull.p64	q3, d25, d18
 5602	vmull.p64	q7, d24, d19
 5603	veor.8	q2, q2, q3
 5604	veor.8	q2, q2, q7
 5605	#   Reduce
 5606	vmull.p64	q7, d3, d27
 5607	veor.8	d2, d2, d5
 5608	veor.8	d1, d1, d4
 5609	veor.8	d2, d2, d15
 5610	veor.8	d1, d1, d14
 5611	vmull.p64	q7, d2, d26
 5612	veor.8	q7, q7, q0
 5613	# Done GHASH
 5614	sub	r10, r10, #2
 5615	cmp	r10, #0
 5616	beq	L_aes_gcm_decrypt_arm32_crypto_aad_done
 5617L_aes_gcm_decrypt_arm32_crypto_aad_start_1:
 5618	vld1.32	{q14}, [r5]!
 5619	vmov.i8	q12, #0x55
 5620	vshl.u8	q0, q14, #1
 5621	vshr.u8	q14, q14, #1
 5622	vbif.8	q14, q0, q12
 5623	vmov.i8	q12, #51
 5624	vshl.u8	q0, q14, #2
 5625	vshr.u8	q14, q14, #2
 5626	vbit.8	q0, q14, q12
 5627	vshl.u8	q14, q0, #4
 5628	vsri.u8	q14, q0, #4
 5629	veor.8	q12, q7, q14
 5630	#   X  = C * H^1
 5631	vmull.p64	q2, d25, d16
 5632	vmull.p64	q7, d24, d17
 5633	vmull.p64	q0, d24, d16
 5634	vmull.p64	q1, d25, d17
 5635	veor.8	q2, q2, q7
 5636	#   Reduce
 5637	vmull.p64	q7, d3, d27
 5638	veor.8	d2, d2, d5
 5639	veor.8	d1, d1, d4
 5640	veor.8	d2, d2, d15
 5641	veor.8	d1, d1, d14
 5642	vmull.p64	q7, d2, d26
 5643	veor.8	q7, q7, q0
 5644	# Done GHASH
 5645L_aes_gcm_decrypt_arm32_crypto_aad_done:
 5646	ands	r11, r6, #15
 5647	beq	L_aes_gcm_decrypt_arm32_crypto_aad_partial_done
 5648	veor.8	q0, q0, q0
 5649	mov	r12, r11
 5650	vst1.32	{q0}, [r9]
 5651	cmp	r12, #4
 5652	blt	L_aes_gcm_decrypt_arm32_crypto_aad_start_sw
 5653L_aes_gcm_decrypt_arm32_crypto_aad_start_dw:
 5654	ldr	r8, [r5], #4
 5655	sub	r12, r12, #4
 5656	str	r8, [r9], #4
 5657	cmp	r12, #4
 5658	bge	L_aes_gcm_decrypt_arm32_crypto_aad_start_dw
 5659L_aes_gcm_decrypt_arm32_crypto_aad_start_sw:
 5660	cmp	r12, #2
 5661	blt	L_aes_gcm_decrypt_arm32_crypto_aad_start_byte
 5662	ldrh	r8, [r5], #2
 5663	sub	r12, r12, #2
 5664	strh	r8, [r9], #2
 5665L_aes_gcm_decrypt_arm32_crypto_aad_start_byte:
 5666	cmp	r12, #1
 5667	blt	L_aes_gcm_decrypt_arm32_crypto_aad_end_bytes
 5668	ldrb	r8, [r5], #1
 5669	subs	r12, r12, #1
 5670	strb	r8, [r9], #1
 5671	bne	L_aes_gcm_decrypt_arm32_crypto_aad_start_byte
 5672L_aes_gcm_decrypt_arm32_crypto_aad_end_bytes:
 5673	sub	r9, r9, r11
 5674	vld1.32	{q14}, [r9]
 5675	vmov.i8	q12, #0x55
 5676	vshl.u8	q0, q14, #1
 5677	vshr.u8	q14, q14, #1
 5678	vbif.8	q14, q0, q12
 5679	vmov.i8	q12, #51
 5680	vshl.u8	q0, q14, #2
 5681	vshr.u8	q14, q14, #2
 5682	vbit.8	q0, q14, q12
 5683	vshl.u8	q14, q0, #4
 5684	vsri.u8	q14, q0, #4
 5685	veor.8	q12, q7, q14
 5686	#   X  = C * H^1
 5687	vmull.p64	q2, d25, d16
 5688	vmull.p64	q7, d24, d17
 5689	vmull.p64	q0, d24, d16
 5690	vmull.p64	q1, d25, d17
 5691	veor.8	q2, q2, q7
 5692	#   Reduce
 5693	vmull.p64	q7, d3, d27
 5694	veor.8	d2, d2, d5
 5695	veor.8	d1, d1, d4
 5696	veor.8	d2, d2, d15
 5697	veor.8	d1, d1, d14
 5698	vmull.p64	q7, d2, d26
 5699	veor.8	q7, q7, q0
 5700	# Done GHASH
 5701L_aes_gcm_decrypt_arm32_crypto_aad_partial_done:
 5702	# in
 5703	lsr	r10, r2, #4
 5704	cmp	r10, #1
 5705	blt	L_aes_gcm_decrypt_arm32_crypto_in_done
 5706	beq	L_aes_gcm_decrypt_arm32_crypto_in_start_1
 5707	cmp	r10, #4
 5708	blt	L_aes_gcm_decrypt_arm32_crypto_in_start_2
 5709L_aes_gcm_decrypt_arm32_crypto_in_start_4:
 5710	vldm	r0!, {q0-q2}
 5711	vmov.i8	q12, #0x55
 5712	vmov.i8	q5, #51
 5713	vshl.u8	q14, q0, #1
 5714	vshl.u8	q15, q1, #1
 5715	vshl.u8	q4, q2, #1
 5716	ldr	lr, [r0], #4
 5717	vshr.u8	q0, q0, #1
 5718	vshr.u8	q1, q1, #1
 5719	vshr.u8	q2, q2, #1
 5720	ldr	r4, [r0], #4
 5721	vbit.8	q14, q0, q12
 5722	vbit.8	q15, q1, q12
 5723	vbit.8	q4, q2, q12
 5724	ldr	r8, [r0], #4
 5725	vshl.u8	q0, q14, #2
 5726	vshl.u8	q1, q15, #2
 5727	vshl.u8	q2, q4, #2
 5728	ldr	r12, [r0], #4
 5729	vshr.u8	q14, q14, #2
 5730	vshr.u8	q15, q15, #2
 5731	vshr.u8	q4, q4, #2
 5732	rbit	lr, lr
 5733	vbit.8	q0, q14, q5
 5734	rbit	r4, r4
 5735	vbit.8	q1, q15, q5
 5736	rbit	r8, r8
 5737	vbit.8	q2, q4, q5
 5738	rbit	r12, r12
 5739	vshl.u8	q14, q0, #4
 5740	rev	lr, lr
 5741	vshl.u8	q15, q1, #4
 5742	rev	r4, r4
 5743	vshl.u8	q4, q2, #4
 5744	rev	r8, r8
 5745	vsri.u8	q14, q0, #4
 5746	rev	r12, r12
 5747	vsri.u8	q15, q1, #4
 5748	vsri.u8	q4, q2, #4
 5749	vmov	d10, lr, r4
 5750	vmov	d11, r8, r12
 5751	veor.8	q12, q7, q14
 5752	#   X  = C * H^1
 5753	vmull.p64	q2, d11, d16
 5754	vmull.p64	q7, d10, d17
 5755	vmull.p64	q0, d10, d16
 5756	vmull.p64	q1, d11, d17
 5757	veor.8	q2, q2, q7
 5758	#   X += C * H^2
 5759	vmull.p64	q3, d8, d18
 5760	vmull.p64	q7, d9, d19
 5761	veor.8	q0, q0, q3
 5762	veor.8	q1, q1, q7
 5763	vmull.p64	q3, d9, d18
 5764	vmull.p64	q7, d8, d19
 5765	veor.8	q2, q2, q3
 5766	veor.8	q2, q2, q7
 5767	#   X += C * H^3
 5768	vmull.p64	q3, d30, d20
 5769	vmull.p64	q7, d31, d21
 5770	veor.8	q0, q0, q3
 5771	veor.8	q1, q1, q7
 5772	vmull.p64	q3, d31, d20
 5773	vmull.p64	q7, d30, d21
 5774	veor.8	q2, q2, q3
 5775	veor.8	q2, q2, q7
 5776	#   X += C * H^4
 5777	vmull.p64	q3, d24, d22
 5778	vmull.p64	q7, d25, d23
 5779	veor.8	q0, q0, q3
 5780	veor.8	q1, q1, q7
 5781	vmull.p64	q3, d25, d22
 5782	vmull.p64	q7, d24, d23
 5783	veor.8	q2, q2, q3
 5784	veor.8	q2, q2, q7
 5785	#   Reduce
 5786	vmull.p64	q7, d3, d27
 5787	veor.8	d2, d2, d5
 5788	veor.8	d1, d1, d4
 5789	veor.8	d2, d2, d15
 5790	veor.8	d1, d1, d14
 5791	vmull.p64	q7, d2, d26
 5792	veor.8	q7, q7, q0
 5793	# Done GHASH
 5794	sub	r10, r10, #4
 5795	cmp	r10, #4
 5796	bge	L_aes_gcm_decrypt_arm32_crypto_in_start_4
 5797	cmp	r10, #1
 5798	blt	L_aes_gcm_decrypt_arm32_crypto_in_done
 5799	beq	L_aes_gcm_decrypt_arm32_crypto_in_start_1
 5800L_aes_gcm_decrypt_arm32_crypto_in_start_2:
 5801	vld1.32	{q14-q15}, [r0]!
 5802	vmov.i8	q12, #0x55
 5803	vshl.u8	q0, q14, #1
 5804	vshl.u8	q1, q15, #1
 5805	vshr.u8	q14, q14, #1
 5806	vshr.u8	q15, q15, #1
 5807	vbif.8	q14, q0, q12
 5808	vbif.8	q15, q1, q12
 5809	vmov.i8	q12, #51
 5810	vshl.u8	q0, q14, #2
 5811	vshl.u8	q1, q15, #2
 5812	vshr.u8	q14, q14, #2
 5813	vshr.u8	q15, q15, #2
 5814	vbit.8	q0, q14, q12
 5815	vbit.8	q1, q15, q12
 5816	vshl.u8	q14, q0, #4
 5817	vshl.u8	q15, q1, #4
 5818	vsri.u8	q14, q0, #4
 5819	vsri.u8	q15, q1, #4
 5820	veor.8	q12, q7, q14
 5821	#   X  = C * H^1
 5822	vmull.p64	q2, d31, d16
 5823	vmull.p64	q7, d30, d17
 5824	vmull.p64	q0, d30, d16
 5825	vmull.p64	q1, d31, d17
 5826	veor.8	q2, q2, q7
 5827	#   X += C * H^2
 5828	vmull.p64	q3, d24, d18
 5829	vmull.p64	q7, d25, d19
 5830	veor.8	q0, q0, q3
 5831	veor.8	q1, q1, q7
 5832	vmull.p64	q3, d25, d18
 5833	vmull.p64	q7, d24, d19
 5834	veor.8	q2, q2, q3
 5835	veor.8	q2, q2, q7
 5836	#   Reduce
 5837	vmull.p64	q7, d3, d27
 5838	veor.8	d2, d2, d5
 5839	veor.8	d1, d1, d4
 5840	veor.8	d2, d2, d15
 5841	veor.8	d1, d1, d14
 5842	vmull.p64	q7, d2, d26
 5843	veor.8	q7, q7, q0
 5844	# Done GHASH
 5845	sub	r10, r10, #2
 5846	cmp	r10, #0
 5847	beq	L_aes_gcm_decrypt_arm32_crypto_in_done
 5848L_aes_gcm_decrypt_arm32_crypto_in_start_1:
 5849	vld1.32	{q14}, [r0]!
 5850	vmov.i8	q12, #0x55
 5851	vshl.u8	q0, q14, #1
 5852	vshr.u8	q14, q14, #1
 5853	vbif.8	q14, q0, q12
 5854	vmov.i8	q12, #51
 5855	vshl.u8	q0, q14, #2
 5856	vshr.u8	q14, q14, #2
 5857	vbit.8	q0, q14, q12
 5858	vshl.u8	q14, q0, #4
 5859	vsri.u8	q14, q0, #4
 5860	veor.8	q12, q7, q14
 5861	#   X  = C * H^1
 5862	vmull.p64	q2, d25, d16
 5863	vmull.p64	q7, d24, d17
 5864	vmull.p64	q0, d24, d16
 5865	vmull.p64	q1, d25, d17
 5866	veor.8	q2, q2, q7
 5867	#   Reduce
 5868	vmull.p64	q7, d3, d27
 5869	veor.8	d2, d2, d5
 5870	veor.8	d1, d1, d4
 5871	veor.8	d2, d2, d15
 5872	veor.8	d1, d1, d14
 5873	vmull.p64	q7, d2, d26
 5874	veor.8	q7, q7, q0
 5875	# Done GHASH
 5876L_aes_gcm_decrypt_arm32_crypto_in_done:
 5877	ands	r11, r2, #15
 5878	beq	L_aes_gcm_decrypt_arm32_crypto_in_partial_done
 5879	veor.8	q0, q0, q0
 5880	mov	r12, r11
 5881	vst1.32	{q0}, [r9]
 5882	cmp	r12, #4
 5883	blt	L_aes_gcm_decrypt_arm32_crypto_in_start_sw
 5884L_aes_gcm_decrypt_arm32_crypto_in_start_dw:
 5885	ldr	r8, [r0], #4
 5886	sub	r12, r12, #4
 5887	str	r8, [r9], #4
 5888	cmp	r12, #4
 5889	bge	L_aes_gcm_decrypt_arm32_crypto_in_start_dw
 5890L_aes_gcm_decrypt_arm32_crypto_in_start_sw:
 5891	cmp	r12, #2
 5892	blt	L_aes_gcm_decrypt_arm32_crypto_in_start_byte
 5893	ldrh	r8, [r0], #2
 5894	sub	r12, r12, #2
 5895	strh	r8, [r9], #2
 5896L_aes_gcm_decrypt_arm32_crypto_in_start_byte:
 5897	cmp	r12, #1
 5898	blt	L_aes_gcm_decrypt_arm32_crypto_in_end_bytes
 5899	ldrb	r8, [r0], #1
 5900	subs	r12, r12, #1
 5901	strb	r8, [r9], #1
 5902	bne	L_aes_gcm_decrypt_arm32_crypto_in_start_byte
 5903L_aes_gcm_decrypt_arm32_crypto_in_end_bytes:
 5904	sub	r9, r9, r11
 5905	vld1.32	{q14}, [r9]
 5906	vmov.i8	q12, #0x55
 5907	vshl.u8	q0, q14, #1
 5908	vshr.u8	q14, q14, #1
 5909	vbif.8	q14, q0, q12
 5910	vmov.i8	q12, #51
 5911	vshl.u8	q0, q14, #2
 5912	vshr.u8	q14, q14, #2
 5913	vbit.8	q0, q14, q12
 5914	vshl.u8	q14, q0, #4
 5915	vsri.u8	q14, q0, #4
 5916	veor.8	q12, q7, q14
 5917	#   X  = C * H^1
 5918	vmull.p64	q2, d25, d16
 5919	vmull.p64	q7, d24, d17
 5920	vmull.p64	q0, d24, d16
 5921	vmull.p64	q1, d25, d17
 5922	veor.8	q2, q2, q7
 5923	#   Reduce
 5924	vmull.p64	q7, d3, d27
 5925	veor.8	d2, d2, d5
 5926	veor.8	d1, d1, d4
 5927	veor.8	d2, d2, d15
 5928	veor.8	d1, d1, d14
 5929	vmull.p64	q7, d2, d26
 5930	veor.8	q7, q7, q0
 5931	# Done GHASH
 5932L_aes_gcm_decrypt_arm32_crypto_in_partial_done:
 5933	sub	r0, r0, r2
 5934L_aes_gcm_decrypt_arm32_crypto_done_gcm:
 5935	# nonceSz
 5936	ldr	r12, [sp, #100]
 5937	# Load Nonce
 5938	cmp	r12, #12
 5939	bne	L_aes_gcm_decrypt_arm32_crypto_ghash_nonce
 5940	ldr	r5, [r3]
 5941	ldr	r8, [r3, #4]
 5942	ldr	r12, [r3, #8]
 5943	vmov.i32	q6, #0x1000000
 5944	vmov.32	s24, r5
 5945	vmov.32	s25, r8
 5946	vmov.32	s26, r12
 5947	mov	r5, #1
 5948	b	L_aes_gcm_decrypt_arm32_crypto_done_nonce
 5949L_aes_gcm_decrypt_arm32_crypto_ghash_nonce:
 5950	lsr	r10, r12, #4
 5951	cmp	r10, #0
 5952	beq	L_aes_gcm_decrypt_arm32_crypto_nonce_done
 5953L_aes_gcm_decrypt_arm32_crypto_nonce_start_1:
 5954	vld1.32	{q14}, [r3]!
 5955	vmov.i8	q12, #0x55
 5956	vshl.u8	q0, q14, #1
 5957	vshr.u8	q14, q14, #1
 5958	vbif.8	q14, q0, q12
 5959	vmov.i8	q12, #51
 5960	vshl.u8	q0, q14, #2
 5961	vshr.u8	q14, q14, #2
 5962	vbit.8	q0, q14, q12
 5963	vshl.u8	q14, q0, #4
 5964	vsri.u8	q14, q0, #4
 5965	veor.8	q12, q6, q14
 5966	#   X  = C * H^1
 5967	vmull.p64	q2, d25, d16
 5968	vmull.p64	q6, d24, d17
 5969	vmull.p64	q0, d24, d16
 5970	vmull.p64	q1, d25, d17
 5971	veor.8	q2, q2, q6
 5972	#   Reduce
 5973	vmull.p64	q6, d3, d27
 5974	veor.8	d2, d2, d5
 5975	veor.8	d1, d1, d4
 5976	veor.8	d2, d2, d13
 5977	veor.8	d1, d1, d12
 5978	vmull.p64	q6, d2, d26
 5979	veor.8	q6, q6, q0
 5980	# Done GHASH
 5981	subs	r10, r10, #1
 5982	bne	L_aes_gcm_decrypt_arm32_crypto_nonce_start_1
 5983L_aes_gcm_decrypt_arm32_crypto_nonce_done:
 5984	ands	r11, r12, #15
 5985	beq	L_aes_gcm_decrypt_arm32_crypto_nonce_partial_done
 5986	veor.8	q0, q0, q0
 5987	mov	r12, r11
 5988	vst1.32	{q0}, [r9]
 5989	cmp	r12, #4
 5990	blt	L_aes_gcm_decrypt_arm32_crypto_nonce_start_sw
 5991L_aes_gcm_decrypt_arm32_crypto_nonce_start_dw:
 5992	ldr	r8, [r3], #4
 5993	sub	r12, r12, #4
 5994	str	r8, [r9], #4
 5995	cmp	r12, #4
 5996	bge	L_aes_gcm_decrypt_arm32_crypto_nonce_start_dw
 5997L_aes_gcm_decrypt_arm32_crypto_nonce_start_sw:
 5998	cmp	r12, #2
 5999	blt	L_aes_gcm_decrypt_arm32_crypto_nonce_start_byte
 6000	ldrh	r8, [r3], #2
 6001	sub	r12, r12, #2
 6002	strh	r8, [r9], #2
 6003L_aes_gcm_decrypt_arm32_crypto_nonce_start_byte:
 6004	cmp	r12, #1
 6005	blt	L_aes_gcm_decrypt_arm32_crypto_nonce_end_bytes
 6006	ldrb	r8, [r3], #1
 6007	subs	r12, r12, #1
 6008	strb	r8, [r9], #1
 6009	bne	L_aes_gcm_decrypt_arm32_crypto_nonce_start_byte
 6010L_aes_gcm_decrypt_arm32_crypto_nonce_end_bytes:
 6011	sub	r9, r9, r11
 6012	vld1.32	{q14}, [r9]
 6013	vmov.i8	q12, #0x55
 6014	vshl.u8	q0, q14, #1
 6015	vshr.u8	q14, q14, #1
 6016	vbif.8	q14, q0, q12
 6017	vmov.i8	q12, #51
 6018	vshl.u8	q0, q14, #2
 6019	vshr.u8	q14, q14, #2
 6020	vbit.8	q0, q14, q12
 6021	vshl.u8	q14, q0, #4
 6022	vsri.u8	q14, q0, #4
 6023	veor.8	q12, q6, q14
 6024	#   X  = C * H^1
 6025	vmull.p64	q2, d25, d16
 6026	vmull.p64	q6, d24, d17
 6027	vmull.p64	q0, d24, d16
 6028	vmull.p64	q1, d25, d17
 6029	veor.8	q2, q2, q6
 6030	#   Reduce
 6031	vmull.p64	q6, d3, d27
 6032	veor.8	d2, d2, d5
 6033	veor.8	d1, d1, d4
 6034	veor.8	d2, d2, d13
 6035	veor.8	d1, d1, d12
 6036	vmull.p64	q6, d2, d26
 6037	veor.8	q6, q6, q0
 6038	# Done GHASH
 6039L_aes_gcm_decrypt_arm32_crypto_nonce_partial_done:
 6040	veor.8	q0, q0, q0
 6041	# nonceSz
 6042	ldr	r12, [sp, #100]
 6043	lsr	r10, r12, #29
 6044	lsl	r11, r12, #3
 6045	rbit	r10, r10
 6046	rbit	r11, r11
 6047	vmov.32	s2, r10
 6048	vmov.32	s3, r11
 6049	veor.8	q6, q6, q0
 6050	vmull.p64	q2, d13, d16
 6051	vmull.p64	q12, d12, d17
 6052	vmull.p64	q0, d12, d16
 6053	vmull.p64	q1, d13, d17
 6054	veor.8	q2, q2, q12
 6055	vmull.p64	q6, d3, d27
 6056	veor.8	d2, d2, d5
 6057	veor.8	d1, d1, d4
 6058	veor.8	d2, d2, d13
 6059	veor.8	d1, d1, d12
 6060	vmull.p64	q6, d2, d26
 6061	veor.8	q6, q6, q0
 6062	vmov.32	r5, s24
 6063	vmov.32	r8, s25
 6064	vmov.32	r12, s26
 6065	rbit	r5, r5
 6066	rbit	r8, r8
 6067	rbit	r12, r12
 6068	rev	r5, r5
 6069	rev	r8, r8
 6070	rev	r12, r12
 6071	vmov.32	s24, r5
 6072	vmov.32	s25, r8
 6073	vmov.32	s26, r12
 6074	vmov.32	r5, s27
 6075	rbit	r5, r5
 6076	rev	r5, r5
 6077	vmov.32	s27, r5
 6078	rev	r5, r5
 6079L_aes_gcm_decrypt_arm32_crypto_done_nonce:
 6080	# reg
 6081	ldr	r9, [sp, #132]
 6082	vst1.32	{q7}, [r9]
 6083	# tmp
 6084	ldr	r9, [sp, #128]
 6085	vldm.32	r7!, {q0-q3}
 6086	vldm.32	r7!, {q7-q13}
 6087	# nr
 6088	ldr	r12, [sp, #136]
 6089	lsr	r10, r2, #4
 6090	and	r11, r2, #15
 6091	cmp	r12, #12
 6092	blt	L_aes_gcm_decrypt_arm32_crypto_start_128
 6093	bgt	L_aes_gcm_decrypt_arm32_crypto_start_256
 6094	# AES_GCM_192
 6095#ifndef NO_AES_192
 6096	cmp	r10, #1
 6097	blt	L_aes_gcm_decrypt_arm32_crypto_192_done
 6098	beq	L_aes_gcm_decrypt_arm32_crypto_192_start_1
 6099L_aes_gcm_decrypt_arm32_crypto_192_start_2:
 6100	add	r8, r5, #1
 6101	vmov.8	q4, q6
 6102	add	r5, r5, #2
 6103	vmov.8	q5, q6
 6104	rev	r8, r8
 6105	rev	r12, r5
 6106	vmov	s19, r8
 6107	vmov	s23, r12
 6108	aese.8	q4, q0
 6109	aesmc.8	q4, q4
 6110	aese.8	q5, q0
 6111	aesmc.8	q5, q5
 6112	aese.8	q4, q1
 6113	aesmc.8	q4, q4
 6114	aese.8	q5, q1
 6115	aesmc.8	q5, q5
 6116	aese.8	q4, q2
 6117	aesmc.8	q4, q4
 6118	aese.8	q5, q2
 6119	aesmc.8	q5, q5
 6120	aese.8	q4, q3
 6121	aesmc.8	q4, q4
 6122	aese.8	q5, q3
 6123	aesmc.8	q5, q5
 6124	aese.8	q4, q7
 6125	aesmc.8	q4, q4
 6126	aese.8	q5, q7
 6127	aesmc.8	q5, q5
 6128	aese.8	q4, q8
 6129	aesmc.8	q4, q4
 6130	aese.8	q5, q8
 6131	aesmc.8	q5, q5
 6132	aese.8	q4, q9
 6133	aesmc.8	q4, q4
 6134	aese.8	q5, q9
 6135	aesmc.8	q5, q5
 6136	subs	r10, r10, #2
 6137	aese.8	q4, q10
 6138	aesmc.8	q4, q4
 6139	aese.8	q5, q10
 6140	aesmc.8	q5, q5
 6141	aese.8	q4, q11
 6142	aesmc.8	q4, q4
 6143	aese.8	q5, q11
 6144	aesmc.8	q5, q5
 6145	aese.8	q4, q12
 6146	aesmc.8	q4, q4
 6147	aese.8	q5, q12
 6148	aesmc.8	q5, q5
 6149	vld1.32	{q14}, [r7]!
 6150	aese.8	q4, q13
 6151	aesmc.8	q4, q4
 6152	aese.8	q5, q13
 6153	aesmc.8	q5, q5
 6154	vld1.32	{q15}, [r7]
 6155	aese.8	q4, q14
 6156	veor.8	q4, q4, q15
 6157	aese.8	q5, q14
 6158	veor.8	q5, q5, q15
 6159	vld1.8	{q14-q15}, [r0]!
 6160	sub	r7, r7, #16
 6161	veor.8	q14, q14, q4
 6162	veor.8	q15, q15, q5
 6163	vst1.8	{q14-q15}, [r1]!
 6164	cmp	r10, #1
 6165	bgt	L_aes_gcm_decrypt_arm32_crypto_192_start_2
 6166	blt	L_aes_gcm_decrypt_arm32_crypto_192_done
 6167L_aes_gcm_decrypt_arm32_crypto_192_start_1:
 6168	add	r5, r5, #1
 6169	vmov.8	q4, q6
 6170	rev	r8, r5
 6171	vmov	s19, r8
 6172	aese.8	q4, q0
 6173	aesmc.8	q4, q4
 6174	aese.8	q4, q1
 6175	aesmc.8	q4, q4
 6176	aese.8	q4, q2
 6177	aesmc.8	q4, q4
 6178	aese.8	q4, q3
 6179	aesmc.8	q4, q4
 6180	aese.8	q4, q7
 6181	aesmc.8	q4, q4
 6182	aese.8	q4, q8
 6183	aesmc.8	q4, q4
 6184	aese.8	q4, q9
 6185	aesmc.8	q4, q4
 6186	aese.8	q4, q10
 6187	aesmc.8	q4, q4
 6188	aese.8	q4, q11
 6189	aesmc.8	q4, q4
 6190	aese.8	q4, q12
 6191	aesmc.8	q4, q4
 6192	vld1.32	{q14}, [r7]!
 6193	aese.8	q4, q13
 6194	aesmc.8	q4, q4
 6195	vld1.32	{q15}, [r7]
 6196	aese.8	q4, q14
 6197	veor.8	q4, q4, q15
 6198	vld1.8	{q14}, [r0]!
 6199	sub	r7, r7, #16
 6200	veor.8	q14, q14, q4
 6201	vst1.32	{q14}, [r1]!
 6202L_aes_gcm_decrypt_arm32_crypto_192_done:
 6203	ands	r11, r2, #15
 6204	beq	L_aes_gcm_decrypt_arm32_crypto_192_partial_done
 6205	veor.8	q14, q14, q14
 6206	mov	r4, r11
 6207	vst1.32	{q14}, [r9]
 6208	cmp	r4, #4
 6209	blt	L_aes_gcm_decrypt_arm32_crypto_192_start_sw
 6210L_aes_gcm_decrypt_arm32_crypto_192_start_dw:
 6211	ldr	lr, [r0], #4
 6212	sub	r4, r4, #4
 6213	str	lr, [r9], #4
 6214	cmp	r4, #4
 6215	bge	L_aes_gcm_decrypt_arm32_crypto_192_start_dw
 6216L_aes_gcm_decrypt_arm32_crypto_192_start_sw:
 6217	cmp	r4, #2
 6218	blt	L_aes_gcm_decrypt_arm32_crypto_192_start_byte
 6219	ldrh	lr, [r0], #2
 6220	sub	r4, r4, #2
 6221	strh	lr, [r9], #2
 6222L_aes_gcm_decrypt_arm32_crypto_192_start_byte:
 6223	cmp	r4, #1
 6224	blt	L_aes_gcm_decrypt_arm32_crypto_192_end_bytes
 6225	ldrb	lr, [r0], #1
 6226	subs	r4, r4, #1
 6227	strb	lr, [r9], #1
 6228	bne	L_aes_gcm_decrypt_arm32_crypto_192_start_byte
 6229L_aes_gcm_decrypt_arm32_crypto_192_end_bytes:
 6230	sub	r9, r9, r11
 6231	add	r5, r5, #1
 6232	vmov.8	q4, q6
 6233	rev	r8, r5
 6234	vmov	s19, r8
 6235	aese.8	q4, q0
 6236	aesmc.8	q4, q4
 6237	aese.8	q4, q1
 6238	aesmc.8	q4, q4
 6239	aese.8	q4, q2
 6240	aesmc.8	q4, q4
 6241	aese.8	q4, q3
 6242	aesmc.8	q4, q4
 6243	aese.8	q4, q7
 6244	aesmc.8	q4, q4
 6245	aese.8	q4, q8
 6246	aesmc.8	q4, q4
 6247	aese.8	q4, q9
 6248	aesmc.8	q4, q4
 6249	aese.8	q4, q10
 6250	aesmc.8	q4, q4
 6251	aese.8	q4, q11
 6252	aesmc.8	q4, q4
 6253	aese.8	q4, q12
 6254	aesmc.8	q4, q4
 6255	vld1.32	{q14}, [r7]!
 6256	aese.8	q4, q13
 6257	aesmc.8	q4, q4
 6258	vld1.32	{q15}, [r7]
 6259	aese.8	q4, q14
 6260	veor.8	q4, q4, q15
 6261	vld1.8	{q14}, [r9]
 6262	sub	r7, r7, #16
 6263	veor.8	q14, q14, q4
 6264	vst1.32	{q14}, [r9]
 6265	mov	r4, r11
 6266	cmp	r4, #4
 6267	blt	L_aes_gcm_decrypt_arm32_crypto_192_out_start_sw
 6268L_aes_gcm_decrypt_arm32_crypto_192_out_start_dw:
 6269	ldr	lr, [r9], #4
 6270	sub	r4, r4, #4
 6271	str	lr, [r1], #4
 6272	cmp	r4, #4
 6273	bge	L_aes_gcm_decrypt_arm32_crypto_192_out_start_dw
 6274L_aes_gcm_decrypt_arm32_crypto_192_out_start_sw:
 6275	cmp	r4, #2
 6276	blt	L_aes_gcm_decrypt_arm32_crypto_192_out_start_byte
 6277	ldrh	lr, [r9], #2
 6278	sub	r4, r4, #2
 6279	strh	lr, [r1], #2
 6280L_aes_gcm_decrypt_arm32_crypto_192_out_start_byte:
 6281	cmp	r4, #1
 6282	blt	L_aes_gcm_decrypt_arm32_crypto_192_out_end_bytes
 6283	ldrb	lr, [r9], #1
 6284	subs	r4, r4, #1
 6285	strb	lr, [r1], #1
 6286	bne	L_aes_gcm_decrypt_arm32_crypto_192_out_start_byte
 6287L_aes_gcm_decrypt_arm32_crypto_192_out_end_bytes:
 6288L_aes_gcm_decrypt_arm32_crypto_192_partial_done:
 6289	# Finish
 6290	add	r8, r2, #15
 6291	sub	r8, r5, r8, lsr #4
 6292	rev	r8, r8
 6293	vmov.32	s27, r8
 6294	aese.8	q6, q0
 6295	aesmc.8	q6, q6
 6296	aese.8	q6, q1
 6297	aesmc.8	q6, q6
 6298	aese.8	q6, q2
 6299	aesmc.8	q6, q6
 6300	aese.8	q6, q3
 6301	aesmc.8	q6, q6
 6302	aese.8	q6, q7
 6303	aesmc.8	q6, q6
 6304	aese.8	q6, q8
 6305	aesmc.8	q6, q6
 6306	aese.8	q6, q9
 6307	aesmc.8	q6, q6
 6308	aese.8	q6, q10
 6309	aesmc.8	q6, q6
 6310	aese.8	q6, q11
 6311	aesmc.8	q6, q6
 6312	aese.8	q6, q12
 6313	aesmc.8	q6, q6
 6314	vld1.32	{q14}, [r7]!
 6315	aese.8	q6, q13
 6316	aesmc.8	q6, q6
 6317	vld1.32	{q15}, [r7]
 6318	aese.8	q6, q14
 6319	veor.8	q6, q6, q15
 6320	sub	r7, r7, #16
 6321#endif /* !NO_AES_192 */
 6322	b	L_aes_gcm_decrypt_arm32_crypto_done_enc
 6323	# AES_GCM_256
 6324L_aes_gcm_decrypt_arm32_crypto_start_256:
 6325#ifndef NO_AES_256
 6326	cmp	r10, #1
 6327	blt	L_aes_gcm_decrypt_arm32_crypto_256_done
 6328	beq	L_aes_gcm_decrypt_arm32_crypto_256_start_1
 6329L_aes_gcm_decrypt_arm32_crypto_256_start_2:
 6330	add	r8, r5, #1
 6331	vmov.8	q4, q6
 6332	add	r5, r5, #2
 6333	vmov.8	q5, q6
 6334	rev	r8, r8
 6335	rev	r12, r5
 6336	vmov	s19, r8
 6337	vmov	s23, r12
 6338	aese.8	q4, q0
 6339	aesmc.8	q4, q4
 6340	aese.8	q5, q0
 6341	aesmc.8	q5, q5
 6342	aese.8	q4, q1
 6343	aesmc.8	q4, q4
 6344	aese.8	q5, q1
 6345	aesmc.8	q5, q5
 6346	aese.8	q4, q2
 6347	aesmc.8	q4, q4
 6348	aese.8	q5, q2
 6349	aesmc.8	q5, q5
 6350	aese.8	q4, q3
 6351	aesmc.8	q4, q4
 6352	aese.8	q5, q3
 6353	aesmc.8	q5, q5
 6354	aese.8	q4, q7
 6355	aesmc.8	q4, q4
 6356	aese.8	q5, q7
 6357	aesmc.8	q5, q5
 6358	aese.8	q4, q8
 6359	aesmc.8	q4, q4
 6360	aese.8	q5, q8
 6361	aesmc.8	q5, q5
 6362	aese.8	q4, q9
 6363	aesmc.8	q4, q4
 6364	aese.8	q5, q9
 6365	aesmc.8	q5, q5
 6366	subs	r10, r10, #2
 6367	aese.8	q4, q10
 6368	aesmc.8	q4, q4
 6369	aese.8	q5, q10
 6370	aesmc.8	q5, q5
 6371	aese.8	q4, q11
 6372	aesmc.8	q4, q4
 6373	aese.8	q5, q11
 6374	aesmc.8	q5, q5
 6375	aese.8	q4, q12
 6376	aesmc.8	q4, q4
 6377	aese.8	q5, q12
 6378	aesmc.8	q5, q5
 6379	vld1.32	{q14}, [r7]!
 6380	aese.8	q4, q13
 6381	aesmc.8	q4, q4
 6382	aese.8	q5, q13
 6383	aesmc.8	q5, q5
 6384	vld1.32	{q15}, [r7]!
 6385	aese.8	q4, q14
 6386	aesmc.8	q4, q4
 6387	aese.8	q5, q14
 6388	aesmc.8	q5, q5
 6389	vld1.32	{q14}, [r7]!
 6390	aese.8	q4, q15
 6391	aesmc.8	q4, q4
 6392	aese.8	q5, q15
 6393	aesmc.8	q5, q5
 6394	vld1.32	{q15}, [r7]
 6395	aese.8	q4, q14
 6396	veor.8	q4, q4, q15
 6397	aese.8	q5, q14
 6398	veor.8	q5, q5, q15
 6399	vld1.8	{q14-q15}, [r0]!
 6400	sub	r7, r7, #48
 6401	veor.8	q14, q14, q4
 6402	veor.8	q15, q15, q5
 6403	vst1.8	{q14-q15}, [r1]!
 6404	cmp	r10, #1
 6405	bgt	L_aes_gcm_decrypt_arm32_crypto_256_start_2
 6406	blt	L_aes_gcm_decrypt_arm32_crypto_256_done
 6407L_aes_gcm_decrypt_arm32_crypto_256_start_1:
 6408	add	r5, r5, #1
 6409	vmov.8	q4, q6
 6410	rev	r8, r5
 6411	vmov	s19, r8
 6412	aese.8	q4, q0
 6413	aesmc.8	q4, q4
 6414	aese.8	q4, q1
 6415	aesmc.8	q4, q4
 6416	aese.8	q4, q2
 6417	aesmc.8	q4, q4
 6418	aese.8	q4, q3
 6419	aesmc.8	q4, q4
 6420	aese.8	q4, q7
 6421	aesmc.8	q4, q4
 6422	aese.8	q4, q8
 6423	aesmc.8	q4, q4
 6424	aese.8	q4, q9
 6425	aesmc.8	q4, q4
 6426	aese.8	q4, q10
 6427	aesmc.8	q4, q4
 6428	aese.8	q4, q11
 6429	aesmc.8	q4, q4
 6430	aese.8	q4, q12
 6431	aesmc.8	q4, q4
 6432	vld1.32	{q14}, [r7]!
 6433	aese.8	q4, q13
 6434	aesmc.8	q4, q4
 6435	vld1.32	{q15}, [r7]!
 6436	aese.8	q4, q14
 6437	aesmc.8	q4, q4
 6438	vld1.32	{q14}, [r7]!
 6439	aese.8	q4, q15
 6440	aesmc.8	q4, q4
 6441	vld1.32	{q15}, [r7]
 6442	aese.8	q4, q14
 6443	veor.8	q4, q4, q15
 6444	vld1.8	{q14}, [r0]!
 6445	sub	r7, r7, #48
 6446	veor.8	q14, q14, q4
 6447	vst1.32	{q14}, [r1]!
 6448L_aes_gcm_decrypt_arm32_crypto_256_done:
 6449	ands	r11, r2, #15
 6450	beq	L_aes_gcm_decrypt_arm32_crypto_256_partial_done
 6451	veor.8	q14, q14, q14
 6452	mov	r4, r11
 6453	vst1.32	{q14}, [r9]
 6454	cmp	r4, #4
 6455	blt	L_aes_gcm_decrypt_arm32_crypto_256_start_sw
 6456L_aes_gcm_decrypt_arm32_crypto_256_start_dw:
 6457	ldr	lr, [r0], #4
 6458	sub	r4, r4, #4
 6459	str	lr, [r9], #4
 6460	cmp	r4, #4
 6461	bge	L_aes_gcm_decrypt_arm32_crypto_256_start_dw
 6462L_aes_gcm_decrypt_arm32_crypto_256_start_sw:
 6463	cmp	r4, #2
 6464	blt	L_aes_gcm_decrypt_arm32_crypto_256_start_byte
 6465	ldrh	lr, [r0], #2
 6466	sub	r4, r4, #2
 6467	strh	lr, [r9], #2
 6468L_aes_gcm_decrypt_arm32_crypto_256_start_byte:
 6469	cmp	r4, #1
 6470	blt	L_aes_gcm_decrypt_arm32_crypto_256_end_bytes
 6471	ldrb	lr, [r0], #1
 6472	subs	r4, r4, #1
 6473	strb	lr, [r9], #1
 6474	bne	L_aes_gcm_decrypt_arm32_crypto_256_start_byte
 6475L_aes_gcm_decrypt_arm32_crypto_256_end_bytes:
 6476	sub	r9, r9, r11
 6477	add	r5, r5, #1
 6478	vmov.8	q4, q6
 6479	rev	r8, r5
 6480	vmov	s19, r8
 6481	aese.8	q4, q0
 6482	aesmc.8	q4, q4
 6483	aese.8	q4, q1
 6484	aesmc.8	q4, q4
 6485	aese.8	q4, q2
 6486	aesmc.8	q4, q4
 6487	aese.8	q4, q3
 6488	aesmc.8	q4, q4
 6489	aese.8	q4, q7
 6490	aesmc.8	q4, q4
 6491	aese.8	q4, q8
 6492	aesmc.8	q4, q4
 6493	aese.8	q4, q9
 6494	aesmc.8	q4, q4
 6495	aese.8	q4, q10
 6496	aesmc.8	q4, q4
 6497	aese.8	q4, q11
 6498	aesmc.8	q4, q4
 6499	aese.8	q4, q12
 6500	aesmc.8	q4, q4
 6501	vld1.32	{q14}, [r7]!
 6502	aese.8	q4, q13
 6503	aesmc.8	q4, q4
 6504	vld1.32	{q15}, [r7]!
 6505	aese.8	q4, q14
 6506	aesmc.8	q4, q4
 6507	vld1.32	{q14}, [r7]!
 6508	aese.8	q4, q15
 6509	aesmc.8	q4, q4
 6510	vld1.32	{q15}, [r7]
 6511	aese.8	q4, q14
 6512	veor.8	q4, q4, q15
 6513	vld1.8	{q14}, [r9]
 6514	sub	r7, r7, #48
 6515	veor.8	q14, q14, q4
 6516	vst1.32	{q14}, [r9]
 6517	mov	r4, r11
 6518	cmp	r4, #4
 6519	blt	L_aes_gcm_decrypt_arm32_crypto_256_out_start_sw
 6520L_aes_gcm_decrypt_arm32_crypto_256_out_start_dw:
 6521	ldr	lr, [r9], #4
 6522	sub	r4, r4, #4
 6523	str	lr, [r1], #4
 6524	cmp	r4, #4
 6525	bge	L_aes_gcm_decrypt_arm32_crypto_256_out_start_dw
 6526L_aes_gcm_decrypt_arm32_crypto_256_out_start_sw:
 6527	cmp	r4, #2
 6528	blt	L_aes_gcm_decrypt_arm32_crypto_256_out_start_byte
 6529	ldrh	lr, [r9], #2
 6530	sub	r4, r4, #2
 6531	strh	lr, [r1], #2
 6532L_aes_gcm_decrypt_arm32_crypto_256_out_start_byte:
 6533	cmp	r4, #1
 6534	blt	L_aes_gcm_decrypt_arm32_crypto_256_out_end_bytes
 6535	ldrb	lr, [r9], #1
 6536	subs	r4, r4, #1
 6537	strb	lr, [r1], #1
 6538	bne	L_aes_gcm_decrypt_arm32_crypto_256_out_start_byte
 6539L_aes_gcm_decrypt_arm32_crypto_256_out_end_bytes:
 6540L_aes_gcm_decrypt_arm32_crypto_256_partial_done:
 6541	# Finish
 6542	add	r8, r2, #15
 6543	sub	r8, r5, r8, lsr #4
 6544	rev	r8, r8
 6545	vmov.32	s27, r8
 6546	aese.8	q6, q0
 6547	aesmc.8	q6, q6
 6548	aese.8	q6, q1
 6549	aesmc.8	q6, q6
 6550	aese.8	q6, q2
 6551	aesmc.8	q6, q6
 6552	aese.8	q6, q3
 6553	aesmc.8	q6, q6
 6554	aese.8	q6, q7
 6555	aesmc.8	q6, q6
 6556	aese.8	q6, q8
 6557	aesmc.8	q6, q6
 6558	aese.8	q6, q9
 6559	aesmc.8	q6, q6
 6560	aese.8	q6, q10
 6561	aesmc.8	q6, q6
 6562	aese.8	q6, q11
 6563	aesmc.8	q6, q6
 6564	aese.8	q6, q12
 6565	aesmc.8	q6, q6
 6566	vld1.32	{q14}, [r7]!
 6567	aese.8	q6, q13
 6568	aesmc.8	q6, q6
 6569	vld1.32	{q15}, [r7]!
 6570	aese.8	q6, q14
 6571	aesmc.8	q6, q6
 6572	vld1.32	{q14}, [r7]!
 6573	aese.8	q6, q15
 6574	aesmc.8	q6, q6
 6575	vld1.32	{q15}, [r7]
 6576	aese.8	q6, q14
 6577	veor.8	q6, q6, q15
 6578	sub	r7, r7, #48
 6579#endif /* !NO_AES_256 */
 6580	b	L_aes_gcm_decrypt_arm32_crypto_done_enc
 6581	# AES_GCM_128
 6582L_aes_gcm_decrypt_arm32_crypto_start_128:
 6583#ifndef NO_AES_128
 6584	cmp	r10, #1
 6585	blt	L_aes_gcm_decrypt_arm32_crypto_128_done
 6586	beq	L_aes_gcm_decrypt_arm32_crypto_128_start_1
 6587L_aes_gcm_decrypt_arm32_crypto_128_start_2:
 6588	add	r8, r5, #1
 6589	vmov.8	q4, q6
 6590	add	r5, r5, #2
 6591	vmov.8	q5, q6
 6592	rev	r8, r8
 6593	rev	r12, r5
 6594	vmov	s19, r8
 6595	vmov	s23, r12
 6596	aese.8	q4, q0
 6597	aesmc.8	q4, q4
 6598	aese.8	q5, q0
 6599	aesmc.8	q5, q5
 6600	aese.8	q4, q1
 6601	aesmc.8	q4, q4
 6602	aese.8	q5, q1
 6603	aesmc.8	q5, q5
 6604	aese.8	q4, q2
 6605	aesmc.8	q4, q4
 6606	aese.8	q5, q2
 6607	aesmc.8	q5, q5
 6608	aese.8	q4, q3
 6609	aesmc.8	q4, q4
 6610	aese.8	q5, q3
 6611	aesmc.8	q5, q5
 6612	aese.8	q4, q7
 6613	aesmc.8	q4, q4
 6614	aese.8	q5, q7
 6615	aesmc.8	q5, q5
 6616	aese.8	q4, q8
 6617	aesmc.8	q4, q4
 6618	aese.8	q5, q8
 6619	aesmc.8	q5, q5
 6620	aese.8	q4, q9
 6621	aesmc.8	q4, q4
 6622	aese.8	q5, q9
 6623	aesmc.8	q5, q5
 6624	subs	r10, r10, #2
 6625	aese.8	q4, q10
 6626	aesmc.8	q4, q4
 6627	aese.8	q5, q10
 6628	aesmc.8	q5, q5
 6629	aese.8	q4, q11
 6630	aesmc.8	q4, q4
 6631	aese.8	q5, q11
 6632	aesmc.8	q5, q5
 6633	vld1.8	{q14-q15}, [r0]!
 6634	aese.8	q4, q12
 6635	veor.8	q4, q4, q13
 6636	aese.8	q5, q12
 6637	veor.8	q5, q5, q13
 6638	veor.8	q14, q14, q4
 6639	veor.8	q15, q15, q5
 6640	vst1.8	{q14-q15}, [r1]!
 6641	cmp	r10, #1
 6642	bgt	L_aes_gcm_decrypt_arm32_crypto_128_start_2
 6643	blt	L_aes_gcm_decrypt_arm32_crypto_128_done
 6644L_aes_gcm_decrypt_arm32_crypto_128_start_1:
 6645	add	r5, r5, #1
 6646	vmov.8	q4, q6
 6647	rev	r8, r5
 6648	vmov	s19, r8
 6649	aese.8	q4, q0
 6650	aesmc.8	q4, q4
 6651	aese.8	q4, q1
 6652	aesmc.8	q4, q4
 6653	aese.8	q4, q2
 6654	aesmc.8	q4, q4
 6655	aese.8	q4, q3
 6656	aesmc.8	q4, q4
 6657	aese.8	q4, q7
 6658	aesmc.8	q4, q4
 6659	aese.8	q4, q8
 6660	aesmc.8	q4, q4
 6661	aese.8	q4, q9
 6662	aesmc.8	q4, q4
 6663	aese.8	q4, q10
 6664	aesmc.8	q4, q4
 6665	aese.8	q4, q11
 6666	aesmc.8	q4, q4
 6667	vld1.8	{q14}, [r0]!
 6668	aese.8	q4, q12
 6669	veor.8	q4, q4, q13
 6670	veor.8	q14, q14, q4
 6671	vst1.32	{q14}, [r1]!
 6672L_aes_gcm_decrypt_arm32_crypto_128_done:
 6673	ands	r11, r2, #15
 6674	beq	L_aes_gcm_decrypt_arm32_crypto_128_partial_done
 6675	veor.8	q14, q14, q14
 6676	mov	r4, r11
 6677	vst1.32	{q14}, [r9]
 6678	cmp	r4, #4
 6679	blt	L_aes_gcm_decrypt_arm32_crypto_128_start_sw
 6680L_aes_gcm_decrypt_arm32_crypto_128_start_dw:
 6681	ldr	lr, [r0], #4
 6682	sub	r4, r4, #4
 6683	str	lr, [r9], #4
 6684	cmp	r4, #4
 6685	bge	L_aes_gcm_decrypt_arm32_crypto_128_start_dw
 6686L_aes_gcm_decrypt_arm32_crypto_128_start_sw:
 6687	cmp	r4, #2
 6688	blt	L_aes_gcm_decrypt_arm32_crypto_128_start_byte
 6689	ldrh	lr, [r0], #2
 6690	sub	r4, r4, #2
 6691	strh	lr, [r9], #2
 6692L_aes_gcm_decrypt_arm32_crypto_128_start_byte:
 6693	cmp	r4, #1
 6694	blt	L_aes_gcm_decrypt_arm32_crypto_128_end_bytes
 6695	ldrb	lr, [r0], #1
 6696	subs	r4, r4, #1
 6697	strb	lr, [r9], #1
 6698	bne	L_aes_gcm_decrypt_arm32_crypto_128_start_byte
 6699L_aes_gcm_decrypt_arm32_crypto_128_end_bytes:
 6700	sub	r9, r9, r11
 6701	add	r5, r5, #1
 6702	vmov.8	q4, q6
 6703	rev	r8, r5
 6704	vmov	s19, r8
 6705	aese.8	q4, q0
 6706	aesmc.8	q4, q4
 6707	aese.8	q4, q1
 6708	aesmc.8	q4, q4
 6709	aese.8	q4, q2
 6710	aesmc.8	q4, q4
 6711	aese.8	q4, q3
 6712	aesmc.8	q4, q4
 6713	aese.8	q4, q7
 6714	aesmc.8	q4, q4
 6715	aese.8	q4, q8
 6716	aesmc.8	q4, q4
 6717	aese.8	q4, q9
 6718	aesmc.8	q4, q4
 6719	aese.8	q4, q10
 6720	aesmc.8	q4, q4
 6721	aese.8	q4, q11
 6722	aesmc.8	q4, q4
 6723	vld1.8	{q14}, [r9]
 6724	aese.8	q4, q12
 6725	veor.8	q4, q4, q13
 6726	veor.8	q14, q14, q4
 6727	vst1.32	{q14}, [r9]
 6728	mov	r4, r11
 6729	cmp	r4, #4
 6730	blt	L_aes_gcm_decrypt_arm32_crypto_128_out_start_sw
 6731L_aes_gcm_decrypt_arm32_crypto_128_out_start_dw:
 6732	ldr	lr, [r9], #4
 6733	sub	r4, r4, #4
 6734	str	lr, [r1], #4
 6735	cmp	r4, #4
 6736	bge	L_aes_gcm_decrypt_arm32_crypto_128_out_start_dw
 6737L_aes_gcm_decrypt_arm32_crypto_128_out_start_sw:
 6738	cmp	r4, #2
 6739	blt	L_aes_gcm_decrypt_arm32_crypto_128_out_start_byte
 6740	ldrh	lr, [r9], #2
 6741	sub	r4, r4, #2
 6742	strh	lr, [r1], #2
 6743L_aes_gcm_decrypt_arm32_crypto_128_out_start_byte:
 6744	cmp	r4, #1
 6745	blt	L_aes_gcm_decrypt_arm32_crypto_128_out_end_bytes
 6746	ldrb	lr, [r9], #1
 6747	subs	r4, r4, #1
 6748	strb	lr, [r1], #1
 6749	bne	L_aes_gcm_decrypt_arm32_crypto_128_out_start_byte
 6750L_aes_gcm_decrypt_arm32_crypto_128_out_end_bytes:
 6751L_aes_gcm_decrypt_arm32_crypto_128_partial_done:
 6752	# Finish
 6753	add	r8, r2, #15
 6754	sub	r8, r5, r8, lsr #4
 6755	rev	r8, r8
 6756	vmov.32	s27, r8
 6757	aese.8	q6, q0
 6758	aesmc.8	q6, q6
 6759	aese.8	q6, q1
 6760	aesmc.8	q6, q6
 6761	aese.8	q6, q2
 6762	aesmc.8	q6, q6
 6763	aese.8	q6, q3
 6764	aesmc.8	q6, q6
 6765	aese.8	q6, q7
 6766	aesmc.8	q6, q6
 6767	aese.8	q6, q8
 6768	aesmc.8	q6, q6
 6769	aese.8	q6, q9
 6770	aesmc.8	q6, q6
 6771	aese.8	q6, q10
 6772	aesmc.8	q6, q6
 6773	aese.8	q6, q11
 6774	aesmc.8	q6, q6
 6775	aese.8	q6, q12
 6776	veor.8	q6, q6, q13
 6777#endif /* !NO_AES_128 */
 6778L_aes_gcm_decrypt_arm32_crypto_done_enc:
 6779	vmov.i8	q13, #0x87
 6780	vshr.u64	q13, q13, #56
 6781	# gcm_h
 6782	ldr	r8, [sp, #124]
 6783	vld1.32	{q8}, [r8]
 6784	# reg
 6785	ldr	r9, [sp, #132]
 6786	vld1.32	{q7}, [r9]
 6787	# tmp
 6788	ldr	r9, [sp, #128]
 6789	lsr	lr, r6, #29
 6790	lsl	r6, r6, #3
 6791	rbit	lr, lr
 6792	rbit	r6, r6
 6793	vmov	s0, lr
 6794	vmov	s1, r6
 6795	lsr	lr, r2, #29
 6796	lsl	r2, r2, #3
 6797	rbit	lr, lr
 6798	rbit	r2, r2
 6799	vmov	s2, lr
 6800	vmov	s3, r2
 6801	veor.8	q7, q7, q0
 6802	vmull.p64	q2, d15, d16
 6803	vmull.p64	q3, d14, d17
 6804	vmull.p64	q0, d14, d16
 6805	vmull.p64	q1, d15, d17
 6806	veor.8	q2, q2, q3
 6807	#   Reduce
 6808	vmull.p64	q7, d3, d27
 6809	veor.8	d2, d2, d5
 6810	veor.8	d1, d1, d4
 6811	veor.8	d2, d2, d15
 6812	veor.8	d1, d1, d14
 6813	vmull.p64	q7, d2, d26
 6814	veor.8	q7, q7, q0
 6815	vmov.i8	q0, #0x55
 6816	vshl.u8	q1, q7, #1
 6817	vshr.u8	q7, q7, #1
 6818	vbif.8	q7, q1, q0
 6819	vmov.i8	q0, #51
 6820	vshl.u8	q1, q7, #2
 6821	vshr.u8	q7, q7, #2
 6822	vbit.8	q1, q7, q0
 6823	vshl.u8	q7, q1, #4
 6824	vsri.u8	q7, q1, #4
 6825	# DONE
 6826	veor.8	q7, q7, q6
 6827	# tag
 6828	ldr	lr, [sp, #104]
 6829	# tagSz
 6830	ldr	r4, [sp, #108]
 6831	cmp	r4, #16
 6832	blt	L_aes_gcm_decrypt_arm32_crypto_tag_part_tag
 6833	vld1.8	{q0}, [lr]
 6834	b	L_aes_gcm_decrypt_arm32_crypto_tag_tag_loaded
 6835L_aes_gcm_decrypt_arm32_crypto_tag_part_tag:
 6836	veor.8	q0, q0, q0
 6837	mov	r12, r4
 6838	vst1.32	{q0}, [r9]
 6839	cmp	r12, #4
 6840	blt	L_aes_gcm_decrypt_arm32_crypto_tag_tag_start_sw
 6841L_aes_gcm_decrypt_arm32_crypto_tag_tag_start_dw:
 6842	ldr	r8, [lr], #4
 6843	sub	r12, r12, #4
 6844	str	r8, [r9], #4
 6845	cmp	r12, #4
 6846	bge	L_aes_gcm_decrypt_arm32_crypto_tag_tag_start_dw
 6847L_aes_gcm_decrypt_arm32_crypto_tag_tag_start_sw:
 6848	cmp	r12, #2
 6849	blt	L_aes_gcm_decrypt_arm32_crypto_tag_tag_start_byte
 6850	ldrh	r8, [lr], #2
 6851	sub	r12, r12, #2
 6852	strh	r8, [r9], #2
 6853L_aes_gcm_decrypt_arm32_crypto_tag_tag_start_byte:
 6854	cmp	r12, #1
 6855	blt	L_aes_gcm_decrypt_arm32_crypto_tag_tag_end_bytes
 6856	ldrb	r8, [lr], #1
 6857	subs	r12, r12, #1
 6858	strb	r8, [r9], #1
 6859	bne	L_aes_gcm_decrypt_arm32_crypto_tag_tag_start_byte
 6860L_aes_gcm_decrypt_arm32_crypto_tag_tag_end_bytes:
 6861	sub	r9, r9, r4
 6862	vld1.32	{q0}, [r9]
 6863	mov	r12, #16
 6864	vst1.32	{q7}, [r9]
 6865	sub	r12, r12, r4
 6866	eor	r8, r8, r8
 6867	add	r9, r9, r4
 6868L_aes_gcm_decrypt_arm32_crypto_tag_calc_tag_byte:
 6869	strb	r8, [r9], #1
 6870	subs	r12, r12, #1
 6871	bne	L_aes_gcm_decrypt_arm32_crypto_tag_calc_tag_byte
 6872	subs	r9, r9, #16
 6873	vld1.32	{q7}, [r9]
 6874L_aes_gcm_decrypt_arm32_crypto_tag_tag_loaded:
 6875	vceq.i32	q0, q0, q7
 6876	vmov	r5, s0
 6877	vmov	r8, s1
 6878	and	r12, r5, r8
 6879	vmov	r5, s2
 6880	vmov	r8, s3
 6881	and	r12, r12, r5
 6882	and	r12, r12, r8
 6883	mov	r5, #-180
 6884	mvn	r12, r12
 6885	and	r0, r5, r12
 6886	vpop	{d8-d15}
 6887	pop	{r4, r5, r6, r7, r8, r9, r10, r11, pc}
 6888	.size	AES_GCM_decrypt_AARCH32,.-AES_GCM_decrypt_AARCH32
 6889#endif /* HAVE_AES_DECRYPT */
 6890#endif /* HAVE_AESGCM */
 6891#ifdef WOLFSSL_AES_XTS
 6892	.text
 6893	.align	4
 6894	.globl	AES_XTS_encrypt_AARCH32
 6895	.type	AES_XTS_encrypt_AARCH32, %function
 6896AES_XTS_encrypt_AARCH32:
 6897	push	{r4, r5, r6, r7, r8, r9, lr}
 6898	vpush	{d8-d15}
 6899	ldr	r12, [sp, #92]
 6900	ldr	lr, [sp, #96]
 6901	ldr	r5, [sp, #104]
 6902	vldm.32	lr!, {q2-q9}
 6903	lsr	r4, r2, #4
 6904	and	r2, r2, #15
 6905	vld1.8	{q0}, [r3]
 6906	cmp	r5, #12
 6907	blt	L_aes_xts_encrypt_arm32_crypto_start_128
 6908	bgt	L_aes_xts_encrypt_arm32_crypto_start_256
 6909	# AES_XTS_192
 6910#ifndef NO_AES_192
 6911	vldm.32	lr!, {q10-q14}
 6912	aese.8	q0, q2
 6913	aesmc.8	q0, q0
 6914	aese.8	q0, q3
 6915	aesmc.8	q0, q0
 6916	aese.8	q0, q4
 6917	aesmc.8	q0, q0
 6918	aese.8	q0, q5
 6919	aesmc.8	q0, q0
 6920	aese.8	q0, q6
 6921	aesmc.8	q0, q0
 6922	aese.8	q0, q7
 6923	aesmc.8	q0, q0
 6924	aese.8	q0, q8
 6925	aesmc.8	q0, q0
 6926	aese.8	q0, q9
 6927	aesmc.8	q0, q0
 6928	aese.8	q0, q10
 6929	aesmc.8	q0, q0
 6930	aese.8	q0, q11
 6931	aesmc.8	q0, q0
 6932	aese.8	q0, q12
 6933	aesmc.8	q0, q0
 6934	aese.8	q0, q13
 6935	veor.32	q0, q0, q14
 6936	vmov	r6, r7, d0
 6937	vmov	r8, r9, d1
 6938	vldm.32	r12!, {q2-q9}
 6939	vldm.32	r12!, {q10-q14}
 6940	mov	lr, #0x87
 6941	cmp	r4, #1
 6942	blt	L_aes_xts_encrypt_arm32_crypto_192_done
 6943L_aes_xts_encrypt_arm32_crypto_192_start_1:
 6944	vld1.8	{q1}, [r0]!
 6945	veor.32	q1, q1, q0
 6946	aese.8	q1, q2
 6947	aesmc.8	q1, q1
 6948	and	r5, lr, r9, asr #31
 6949	aese.8	q1, q3
 6950	aesmc.8	q1, q1
 6951	lsl	r9, r9, #1
 6952	aese.8	q1, q4
 6953	aesmc.8	q1, q1
 6954	orr	r9, r9, r8, lsr #31
 6955	aese.8	q1, q5
 6956	aesmc.8	q1, q1
 6957	lsl	r8, r8, #1
 6958	aese.8	q1, q6
 6959	aesmc.8	q1, q1
 6960	orr	r8, r8, r7, lsr #31
 6961	aese.8	q1, q7
 6962	aesmc.8	q1, q1
 6963	lsl	r7, r7, #1
 6964	aese.8	q1, q8
 6965	aesmc.8	q1, q1
 6966	orr	r7, r7, r6, lsr #31
 6967	aese.8	q1, q9
 6968	aesmc.8	q1, q1
 6969	eor	r6, r5, r6, lsl #1
 6970	aese.8	q1, q10
 6971	aesmc.8	q1, q1
 6972	aese.8	q1, q11
 6973	aesmc.8	q1, q1
 6974	aese.8	q1, q12
 6975	aesmc.8	q1, q1
 6976	aese.8	q1, q13
 6977	veor.32	q1, q1, q14
 6978	veor.32	q1, q1, q0
 6979	vmov	d0, r6, r7
 6980	vmov	d1, r8, r9
 6981	subs	r4, r4, #1
 6982	vst1.8	{q1}, [r1]!
 6983	bne	L_aes_xts_encrypt_arm32_crypto_192_start_1
 6984L_aes_xts_encrypt_arm32_crypto_192_done:
 6985	cmp	r2, #0
 6986	beq	L_aes_xts_encrypt_arm32_crypto_192_partial_done
 6987	sub	r1, r1, #16
 6988	ldr	r4, [sp, #100]
 6989	vld1.8	{q1}, [r1]!
 6990	vst1.32	{q1}, [r4]
 6991	mov	r5, r2
 6992L_aes_xts_encrypt_arm32_crypto_192_start_byte:
 6993	ldrb	r8, [r4]
 6994	ldrb	r9, [r0], #1
 6995	strb	r8, [r1], #1
 6996	strb	r9, [r4], #1
 6997	subs	r5, r5, #1
 6998	bgt	L_aes_xts_encrypt_arm32_crypto_192_start_byte
 6999	sub	r1, r1, r2
 7000	sub	r4, r4, r2
 7001	sub	r1, r1, #16
 7002	vld1.32	{q1}, [r4]
 7003	veor.32	q1, q1, q0
 7004	aese.8	q1, q2
 7005	aesmc.8	q1, q1
 7006	aese.8	q1, q3
 7007	aesmc.8	q1, q1
 7008	aese.8	q1, q4
 7009	aesmc.8	q1, q1
 7010	aese.8	q1, q5
 7011	aesmc.8	q1, q1
 7012	aese.8	q1, q6
 7013	aesmc.8	q1, q1
 7014	aese.8	q1, q7
 7015	aesmc.8	q1, q1
 7016	aese.8	q1, q8
 7017	aesmc.8	q1, q1
 7018	aese.8	q1, q9
 7019	aesmc.8	q1, q1
 7020	aese.8	q1, q10
 7021	aesmc.8	q1, q1
 7022	aese.8	q1, q11
 7023	aesmc.8	q1, q1
 7024	aese.8	q1, q12
 7025	aesmc.8	q1, q1
 7026	aese.8	q1, q13
 7027	veor.32	q1, q1, q14
 7028	veor.32	q1, q1, q0
 7029	vst1.8	{q1}, [r1]
 7030L_aes_xts_encrypt_arm32_crypto_192_partial_done:
 7031#endif /* !NO_AES_192 */
 7032	b	L_aes_xts_encrypt_arm32_crypto_done
 7033	# AES_XTS_256
 7034L_aes_xts_encrypt_arm32_crypto_start_256:
 7035#ifndef NO_AES_256
 7036	vldm.32	lr!, {q10-q13}
 7037	aese.8	q0, q2
 7038	aesmc.8	q0, q0
 7039	aese.8	q0, q3
 7040	aesmc.8	q0, q0
 7041	aese.8	q0, q4
 7042	aesmc.8	q0, q0
 7043	aese.8	q0, q5
 7044	aesmc.8	q0, q0
 7045	aese.8	q0, q6
 7046	aesmc.8	q0, q0
 7047	aese.8	q0, q7
 7048	aesmc.8	q0, q0
 7049	aese.8	q0, q8
 7050	aesmc.8	q0, q0
 7051	aese.8	q0, q9
 7052	aesmc.8	q0, q0
 7053	aese.8	q0, q10
 7054	aesmc.8	q0, q0
 7055	aese.8	q0, q11
 7056	aesmc.8	q0, q0
 7057	aese.8	q0, q12
 7058	aesmc.8	q0, q0
 7059	vld1.32	{q14}, [lr]!
 7060	aese.8	q0, q13
 7061	aesmc.8	q0, q0
 7062	vld1.32	{q15}, [lr]!
 7063	aese.8	q0, q14
 7064	aesmc.8	q0, q0
 7065	vld1.32	{q14}, [lr]!
 7066	aese.8	q0, q15
 7067	veor.32	q0, q0, q14
 7068	vmov	r6, r7, d0
 7069	vmov	r8, r9, d1
 7070	vldm.32	r12!, {q2-q9}
 7071	vldm.32	r12!, {q10-q13}
 7072	mov	lr, #0x87
 7073	cmp	r4, #1
 7074	blt	L_aes_xts_encrypt_arm32_crypto_256_done
 7075L_aes_xts_encrypt_arm32_crypto_256_start_1:
 7076	vld1.8	{q1}, [r0]!
 7077	veor.32	q1, q1, q0
 7078	aese.8	q1, q2
 7079	aesmc.8	q1, q1
 7080	and	r5, lr, r9, asr #31
 7081	aese.8	q1, q3
 7082	aesmc.8	q1, q1
 7083	lsl	r9, r9, #1
 7084	aese.8	q1, q4
 7085	aesmc.8	q1, q1
 7086	orr	r9, r9, r8, lsr #31
 7087	aese.8	q1, q5
 7088	aesmc.8	q1, q1
 7089	lsl	r8, r8, #1
 7090	aese.8	q1, q6
 7091	aesmc.8	q1, q1
 7092	orr	r8, r8, r7, lsr #31
 7093	aese.8	q1, q7
 7094	aesmc.8	q1, q1
 7095	lsl	r7, r7, #1
 7096	aese.8	q1, q8
 7097	aesmc.8	q1, q1
 7098	orr	r7, r7, r6, lsr #31
 7099	aese.8	q1, q9
 7100	aesmc.8	q1, q1
 7101	eor	r6, r5, r6, lsl #1
 7102	aese.8	q1, q10
 7103	aesmc.8	q1, q1
 7104	aese.8	q1, q11
 7105	aesmc.8	q1, q1
 7106	aese.8	q1, q12
 7107	aesmc.8	q1, q1
 7108	vld1.32	{q14}, [r12]!
 7109	aese.8	q1, q13
 7110	aesmc.8	q1, q1
 7111	vld1.32	{q15}, [r12]!
 7112	aese.8	q1, q14
 7113	aesmc.8	q1, q1
 7114	vld1.32	{q14}, [r12]!
 7115	aese.8	q1, q15
 7116	veor.32	q1, q1, q14
 7117	sub	r12, r12, #48
 7118	veor.32	q1, q1, q0
 7119	vmov	d0, r6, r7
 7120	vmov	d1, r8, r9
 7121	subs	r4, r4, #1
 7122	vst1.8	{q1}, [r1]!
 7123	bne	L_aes_xts_encrypt_arm32_crypto_256_start_1
 7124L_aes_xts_encrypt_arm32_crypto_256_done:
 7125	cmp	r2, #0
 7126	beq	L_aes_xts_encrypt_arm32_crypto_256_partial_done
 7127	sub	r1, r1, #16
 7128	ldr	r4, [sp, #100]
 7129	vld1.8	{q1}, [r1]!
 7130	vst1.32	{q1}, [r4]
 7131	mov	r5, r2
 7132L_aes_xts_encrypt_arm32_crypto_256_start_byte:
 7133	ldrb	r8, [r4]
 7134	ldrb	r9, [r0], #1
 7135	strb	r8, [r1], #1
 7136	strb	r9, [r4], #1
 7137	subs	r5, r5, #1
 7138	bgt	L_aes_xts_encrypt_arm32_crypto_256_start_byte
 7139	sub	r1, r1, r2
 7140	sub	r4, r4, r2
 7141	sub	r1, r1, #16
 7142	vld1.32	{q1}, [r4]
 7143	veor.32	q1, q1, q0
 7144	aese.8	q1, q2
 7145	aesmc.8	q1, q1
 7146	aese.8	q1, q3
 7147	aesmc.8	q1, q1
 7148	aese.8	q1, q4
 7149	aesmc.8	q1, q1
 7150	aese.8	q1, q5
 7151	aesmc.8	q1, q1
 7152	aese.8	q1, q6
 7153	aesmc.8	q1, q1
 7154	aese.8	q1, q7
 7155	aesmc.8	q1, q1
 7156	aese.8	q1, q8
 7157	aesmc.8	q1, q1
 7158	aese.8	q1, q9
 7159	aesmc.8	q1, q1
 7160	aese.8	q1, q10
 7161	aesmc.8	q1, q1
 7162	aese.8	q1, q11
 7163	aesmc.8	q1, q1
 7164	aese.8	q1, q12
 7165	aesmc.8	q1, q1
 7166	vld1.32	{q14}, [r12]!
 7167	aese.8	q1, q13
 7168	aesmc.8	q1, q1
 7169	vld1.32	{q15}, [r12]!
 7170	aese.8	q1, q14
 7171	aesmc.8	q1, q1
 7172	vld1.32	{q14}, [r12]!
 7173	aese.8	q1, q15
 7174	veor.32	q1, q1, q14
 7175	veor.32	q1, q1, q0
 7176	vst1.8	{q1}, [r1]
 7177L_aes_xts_encrypt_arm32_crypto_256_partial_done:
 7178#endif /* !NO_AES_256 */
 7179	b	L_aes_xts_encrypt_arm32_crypto_done
 7180	# AES_XTS_128
 7181L_aes_xts_encrypt_arm32_crypto_start_128:
 7182#ifndef NO_AES_128
 7183	vldm.32	lr!, {q10-q12}
 7184	aese.8	q0, q2
 7185	aesmc.8	q0, q0
 7186	aese.8	q0, q3
 7187	aesmc.8	q0, q0
 7188	aese.8	q0, q4
 7189	aesmc.8	q0, q0
 7190	aese.8	q0, q5
 7191	aesmc.8	q0, q0
 7192	aese.8	q0, q6
 7193	aesmc.8	q0, q0
 7194	aese.8	q0, q7
 7195	aesmc.8	q0, q0
 7196	aese.8	q0, q8
 7197	aesmc.8	q0, q0
 7198	aese.8	q0, q9
 7199	aesmc.8	q0, q0
 7200	aese.8	q0, q10
 7201	aesmc.8	q0, q0
 7202	aese.8	q0, q11
 7203	veor.32	q0, q0, q12
 7204	vmov	r6, r7, d0
 7205	vmov	r8, r9, d1
 7206	vldm.32	r12!, {q2-q9}
 7207	vldm.32	r12!, {q10-q12}
 7208	mov	lr, #0x87
 7209	cmp	r4, #1
 7210	blt	L_aes_xts_encrypt_arm32_crypto_128_done
 7211L_aes_xts_encrypt_arm32_crypto_128_start_1:
 7212	vld1.8	{q1}, [r0]!
 7213	veor.32	q1, q1, q0
 7214	aese.8	q1, q2
 7215	aesmc.8	q1, q1
 7216	and	r5, lr, r9, asr #31
 7217	aese.8	q1, q3
 7218	aesmc.8	q1, q1
 7219	lsl	r9, r9, #1
 7220	aese.8	q1, q4
 7221	aesmc.8	q1, q1
 7222	orr	r9, r9, r8, lsr #31
 7223	aese.8	q1, q5
 7224	aesmc.8	q1, q1
 7225	lsl	r8, r8, #1
 7226	aese.8	q1, q6
 7227	aesmc.8	q1, q1
 7228	orr	r8, r8, r7, lsr #31
 7229	aese.8	q1, q7
 7230	aesmc.8	q1, q1
 7231	lsl	r7, r7, #1
 7232	aese.8	q1, q8
 7233	aesmc.8	q1, q1
 7234	orr	r7, r7, r6, lsr #31
 7235	aese.8	q1, q9
 7236	aesmc.8	q1, q1
 7237	eor	r6, r5, r6, lsl #1
 7238	aese.8	q1, q10
 7239	aesmc.8	q1, q1
 7240	aese.8	q1, q11
 7241	veor.32	q1, q1, q12
 7242	veor.32	q1, q1, q0
 7243	vmov	d0, r6, r7
 7244	vmov	d1, r8, r9
 7245	subs	r4, r4, #1
 7246	vst1.8	{q1}, [r1]!
 7247	bne	L_aes_xts_encrypt_arm32_crypto_128_start_1
 7248L_aes_xts_encrypt_arm32_crypto_128_done:
 7249	cmp	r2, #0
 7250	beq	L_aes_xts_encrypt_arm32_crypto_128_partial_done
 7251	sub	r1, r1, #16
 7252	ldr	r4, [sp, #100]
 7253	vld1.8	{q1}, [r1]!
 7254	vst1.32	{q1}, [r4]
 7255	mov	r5, r2
 7256L_aes_xts_encrypt_arm32_crypto_128_start_byte:
 7257	ldrb	r8, [r4]
 7258	ldrb	r9, [r0], #1
 7259	strb	r8, [r1], #1
 7260	strb	r9, [r4], #1
 7261	subs	r5, r5, #1
 7262	bgt	L_aes_xts_encrypt_arm32_crypto_128_start_byte
 7263	sub	r1, r1, r2
 7264	sub	r4, r4, r2
 7265	sub	r1, r1, #16
 7266	vld1.32	{q1}, [r4]
 7267	veor.32	q1, q1, q0
 7268	aese.8	q1, q2
 7269	aesmc.8	q1, q1
 7270	aese.8	q1, q3
 7271	aesmc.8	q1, q1
 7272	aese.8	q1, q4
 7273	aesmc.8	q1, q1
 7274	aese.8	q1, q5
 7275	aesmc.8	q1, q1
 7276	aese.8	q1, q6
 7277	aesmc.8	q1, q1
 7278	aese.8	q1, q7
 7279	aesmc.8	q1, q1
 7280	aese.8	q1, q8
 7281	aesmc.8	q1, q1
 7282	aese.8	q1, q9
 7283	aesmc.8	q1, q1
 7284	aese.8	q1, q10
 7285	aesmc.8	q1, q1
 7286	aese.8	q1, q11
 7287	veor.32	q1, q1, q12
 7288	veor.32	q1, q1, q0
 7289	vst1.8	{q1}, [r1]
 7290L_aes_xts_encrypt_arm32_crypto_128_partial_done:
 7291#endif /* !NO_AES_128 */
 7292L_aes_xts_encrypt_arm32_crypto_done:
 7293	vpop	{d8-d15}
 7294	pop	{r4, r5, r6, r7, r8, r9, pc}
 7295	.size	AES_XTS_encrypt_AARCH32,.-AES_XTS_encrypt_AARCH32
 7296#ifdef HAVE_AES_DECRYPT
 7297	.text
 7298	.align	4
 7299	.globl	AES_XTS_decrypt_AARCH32
 7300	.type	AES_XTS_decrypt_AARCH32, %function
 7301AES_XTS_decrypt_AARCH32:
 7302	push	{r4, r5, r6, r7, r8, r9, lr}
 7303	vpush	{d8-d15}
 7304	ldr	r12, [sp, #92]
 7305	ldr	lr, [sp, #96]
 7306	vldm.32	lr!, {q2-q9}
 7307	eor	r5, r5, r5
 7308	lsr	r4, r2, #4
 7309	ands	r2, r2, #15
 7310	sub	r5, r5, r2
 7311	sub	r4, r4, r5, lsr #31
 7312	vld1.8	{q1}, [r3]
 7313	ldr	r5, [sp, #104]
 7314	cmp	r5, #12
 7315	blt	L_aes_xts_decrypt_arm32_crypto_start_128
 7316	bgt	L_aes_xts_decrypt_arm32_crypto_start_256
 7317	# AES_XTS_192
 7318#ifndef NO_AES_192
 7319	vldm.32	lr!, {q10-q14}
 7320	aese.8	q1, q2
 7321	aesmc.8	q1, q1
 7322	aese.8	q1, q3
 7323	aesmc.8	q1, q1
 7324	aese.8	q1, q4
 7325	aesmc.8	q1, q1
 7326	aese.8	q1, q5
 7327	aesmc.8	q1, q1
 7328	aese.8	q1, q6
 7329	aesmc.8	q1, q1
 7330	aese.8	q1, q7
 7331	aesmc.8	q1, q1
 7332	aese.8	q1, q8
 7333	aesmc.8	q1, q1
 7334	aese.8	q1, q9
 7335	aesmc.8	q1, q1
 7336	aese.8	q1, q10
 7337	aesmc.8	q1, q1
 7338	aese.8	q1, q11
 7339	aesmc.8	q1, q1
 7340	aese.8	q1, q12
 7341	aesmc.8	q1, q1
 7342	aese.8	q1, q13
 7343	veor.32	q1, q1, q14
 7344	vmov	r6, r7, d2
 7345	vmov	r8, r9, d3
 7346	vldm.32	r12!, {q2-q9}
 7347	vldm.32	r12!, {q10-q14}
 7348	mov	lr, #0x87
 7349	cmp	r4, #1
 7350	blt	L_aes_xts_decrypt_arm32_crypto_192_done
 7351L_aes_xts_decrypt_arm32_crypto_192_start_1:
 7352	vld1.8	{q0}, [r0]!
 7353	veor.32	q0, q0, q1
 7354	aesd.8	q0, q2
 7355	aesimc.8	q0, q0
 7356	and	r5, lr, r9, asr #31
 7357	aesd.8	q0, q3
 7358	aesimc.8	q0, q0
 7359	lsl	r9, r9, #1
 7360	aesd.8	q0, q4
 7361	aesimc.8	q0, q0
 7362	orr	r9, r9, r8, lsr #31
 7363	aesd.8	q0, q5
 7364	aesimc.8	q0, q0
 7365	lsl	r8, r8, #1
 7366	aesd.8	q0, q6
 7367	aesimc.8	q0, q0
 7368	orr	r8, r8, r7, lsr #31
 7369	aesd.8	q0, q7
 7370	aesimc.8	q0, q0
 7371	lsl	r7, r7, #1
 7372	aesd.8	q0, q8
 7373	aesimc.8	q0, q0
 7374	orr	r7, r7, r6, lsr #31
 7375	aesd.8	q0, q9
 7376	aesimc.8	q0, q0
 7377	eor	r6, r5, r6, lsl #1
 7378	aesd.8	q0, q10
 7379	aesimc.8	q0, q0
 7380	aesd.8	q0, q11
 7381	aesimc.8	q0, q0
 7382	aesd.8	q0, q12
 7383	aesimc.8	q0, q0
 7384	aesd.8	q0, q13
 7385	veor.32	q0, q0, q14
 7386	veor.32	q0, q0, q1
 7387	vmov	d2, r6, r7
 7388	vmov	d3, r8, r9
 7389	subs	r4, r4, #1
 7390	vst1.8	{q0}, [r1]!
 7391	bne	L_aes_xts_decrypt_arm32_crypto_192_start_1
 7392L_aes_xts_decrypt_arm32_crypto_192_done:
 7393	cmp	r2, #0
 7394	beq	L_aes_xts_decrypt_arm32_crypto_192_partial_done
 7395	and	r5, lr, r9, asr #31
 7396	lsl	r9, r9, #1
 7397	orr	r9, r9, r8, lsr #31
 7398	lsl	r8, r8, #1
 7399	orr	r8, r8, r7, lsr #31
 7400	lsl	r7, r7, #1
 7401	orr	r7, r7, r6, lsr #31
 7402	eor	r6, r5, r6, lsl #1
 7403	vmov	d30, r6, r7
 7404	vmov	d31, r8, r9
 7405	vld1.8	{q0}, [r0]!
 7406	ldr	r4, [sp, #100]
 7407	veor.32	q0, q0, q15
 7408	aesd.8	q0, q2
 7409	aesimc.8	q0, q0
 7410	aesd.8	q0, q3
 7411	aesimc.8	q0, q0
 7412	aesd.8	q0, q4
 7413	aesimc.8	q0, q0
 7414	aesd.8	q0, q5
 7415	aesimc.8	q0, q0
 7416	aesd.8	q0, q6
 7417	aesimc.8	q0, q0
 7418	aesd.8	q0, q7
 7419	aesimc.8	q0, q0
 7420	aesd.8	q0, q8
 7421	aesimc.8	q0, q0
 7422	aesd.8	q0, q9
 7423	aesimc.8	q0, q0
 7424	aesd.8	q0, q10
 7425	aesimc.8	q0, q0
 7426	aesd.8	q0, q11
 7427	aesimc.8	q0, q0
 7428	aesd.8	q0, q12
 7429	aesimc.8	q0, q0
 7430	aesd.8	q0, q13
 7431	veor.32	q0, q0, q14
 7432	veor.32	q0, q0, q15
 7433	vst1.32	{q0}, [r4]
 7434	add	r1, r1, #16
 7435	mov	r5, r2
 7436L_aes_xts_decrypt_arm32_crypto_192_start_byte:
 7437	ldrb	r8, [r4]
 7438	ldrb	r9, [r0], #1
 7439	strb	r8, [r1], #1
 7440	strb	r9, [r4], #1
 7441	subs	r5, r5, #1
 7442	bgt	L_aes_xts_decrypt_arm32_crypto_192_start_byte
 7443	sub	r1, r1, r2
 7444	sub	r4, r4, r2
 7445	sub	r1, r1, #16
 7446	vld1.32	{q0}, [r4]
 7447	veor.32	q0, q0, q1
 7448	aesd.8	q0, q2
 7449	aesimc.8	q0, q0
 7450	aesd.8	q0, q3
 7451	aesimc.8	q0, q0
 7452	aesd.8	q0, q4
 7453	aesimc.8	q0, q0
 7454	aesd.8	q0, q5
 7455	aesimc.8	q0, q0
 7456	aesd.8	q0, q6
 7457	aesimc.8	q0, q0
 7458	aesd.8	q0, q7
 7459	aesimc.8	q0, q0
 7460	aesd.8	q0, q8
 7461	aesimc.8	q0, q0
 7462	aesd.8	q0, q9
 7463	aesimc.8	q0, q0
 7464	aesd.8	q0, q10
 7465	aesimc.8	q0, q0
 7466	aesd.8	q0, q11
 7467	aesimc.8	q0, q0
 7468	aesd.8	q0, q12
 7469	aesimc.8	q0, q0
 7470	aesd.8	q0, q13
 7471	veor.32	q0, q0, q14
 7472	veor.32	q0, q0, q1
 7473	vst1.8	{q0}, [r1]
 7474L_aes_xts_decrypt_arm32_crypto_192_partial_done:
 7475#endif /* !NO_AES_192 */
 7476	b	L_aes_xts_decrypt_arm32_crypto_done
 7477	# AES_XTS_256
 7478L_aes_xts_decrypt_arm32_crypto_start_256:
 7479#ifndef NO_AES_256
 7480	vldm.32	lr!, {q10-q13}
 7481	aese.8	q1, q2
 7482	aesmc.8	q1, q1
 7483	aese.8	q1, q3
 7484	aesmc.8	q1, q1
 7485	aese.8	q1, q4
 7486	aesmc.8	q1, q1
 7487	aese.8	q1, q5
 7488	aesmc.8	q1, q1
 7489	aese.8	q1, q6
 7490	aesmc.8	q1, q1
 7491	aese.8	q1, q7
 7492	aesmc.8	q1, q1
 7493	aese.8	q1, q8
 7494	aesmc.8	q1, q1
 7495	aese.8	q1, q9
 7496	aesmc.8	q1, q1
 7497	aese.8	q1, q10
 7498	aesmc.8	q1, q1
 7499	aese.8	q1, q11
 7500	aesmc.8	q1, q1
 7501	aese.8	q1, q12
 7502	aesmc.8	q1, q1
 7503	vld1.32	{q14}, [lr]!
 7504	aese.8	q1, q13
 7505	aesmc.8	q1, q1
 7506	vld1.32	{q15}, [lr]!
 7507	aese.8	q1, q14
 7508	aesmc.8	q1, q1
 7509	vld1.32	{q14}, [lr]!
 7510	aese.8	q1, q15
 7511	veor.32	q1, q1, q14
 7512	vmov	r6, r7, d2
 7513	vmov	r8, r9, d3
 7514	vldm.32	r12!, {q2-q9}
 7515	vldm.32	r12!, {q10-q12}
 7516	mov	lr, #0x87
 7517	cmp	r4, #1
 7518	blt	L_aes_xts_decrypt_arm32_crypto_256_done
 7519L_aes_xts_decrypt_arm32_crypto_256_start_1:
 7520	vld1.8	{q0}, [r0]!
 7521	veor.32	q0, q0, q1
 7522	aesd.8	q0, q2
 7523	aesimc.8	q0, q0
 7524	and	r5, lr, r9, asr #31
 7525	aesd.8	q0, q3
 7526	aesimc.8	q0, q0
 7527	lsl	r9, r9, #1
 7528	aesd.8	q0, q4
 7529	aesimc.8	q0, q0
 7530	orr	r9, r9, r8, lsr #31
 7531	aesd.8	q0, q5
 7532	aesimc.8	q0, q0
 7533	lsl	r8, r8, #1
 7534	aesd.8	q0, q6
 7535	aesimc.8	q0, q0
 7536	orr	r8, r8, r7, lsr #31
 7537	aesd.8	q0, q7
 7538	aesimc.8	q0, q0
 7539	lsl	r7, r7, #1
 7540	aesd.8	q0, q8
 7541	aesimc.8	q0, q0
 7542	orr	r7, r7, r6, lsr #31
 7543	aesd.8	q0, q9
 7544	aesimc.8	q0, q0
 7545	eor	r6, r5, r6, lsl #1
 7546	aesd.8	q0, q10
 7547	aesimc.8	q0, q0
 7548	aesd.8	q0, q11
 7549	aesimc.8	q0, q0
 7550	vld1.32	{q13}, [r12]!
 7551	aesd.8	q0, q12
 7552	aesimc.8	q0, q0
 7553	vld1.32	{q14}, [r12]!
 7554	aesd.8	q0, q13
 7555	aesimc.8	q0, q0
 7556	vld1.32	{q13}, [r12]!
 7557	aesd.8	q0, q14
 7558	aesimc.8	q0, q0
 7559	vld1.32	{q14}, [r12]
 7560	aesd.8	q0, q13
 7561	veor.32	q0, q0, q14
 7562	sub	r12, r12, #48
 7563	veor.32	q0, q0, q1
 7564	vmov	d2, r6, r7
 7565	vmov	d3, r8, r9
 7566	subs	r4, r4, #1
 7567	vst1.8	{q0}, [r1]!
 7568	bne	L_aes_xts_decrypt_arm32_crypto_256_start_1
 7569L_aes_xts_decrypt_arm32_crypto_256_done:
 7570	cmp	r2, #0
 7571	beq	L_aes_xts_decrypt_arm32_crypto_256_partial_done
 7572	and	r5, lr, r9, asr #31
 7573	lsl	r9, r9, #1
 7574	orr	r9, r9, r8, lsr #31
 7575	lsl	r8, r8, #1
 7576	orr	r8, r8, r7, lsr #31
 7577	lsl	r7, r7, #1
 7578	orr	r7, r7, r6, lsr #31
 7579	eor	r6, r5, r6, lsl #1
 7580	vmov	d30, r6, r7
 7581	vmov	d31, r8, r9
 7582	vld1.8	{q0}, [r0]!
 7583	ldr	r4, [sp, #100]
 7584	veor.32	q0, q0, q15
 7585	aesd.8	q0, q2
 7586	aesimc.8	q0, q0
 7587	aesd.8	q0, q3
 7588	aesimc.8	q0, q0
 7589	aesd.8	q0, q4
 7590	aesimc.8	q0, q0
 7591	aesd.8	q0, q5
 7592	aesimc.8	q0, q0
 7593	aesd.8	q0, q6
 7594	aesimc.8	q0, q0
 7595	aesd.8	q0, q7
 7596	aesimc.8	q0, q0
 7597	aesd.8	q0, q8
 7598	aesimc.8	q0, q0
 7599	aesd.8	q0, q9
 7600	aesimc.8	q0, q0
 7601	aesd.8	q0, q10
 7602	aesimc.8	q0, q0
 7603	aesd.8	q0, q11
 7604	aesimc.8	q0, q0
 7605	vld1.32	{q13}, [r12]!
 7606	aesd.8	q0, q12
 7607	aesimc.8	q0, q0
 7608	vld1.32	{q14}, [r12]!
 7609	aesd.8	q0, q13
 7610	aesimc.8	q0, q0
 7611	vld1.32	{q13}, [r12]!
 7612	aesd.8	q0, q14
 7613	aesimc.8	q0, q0
 7614	vld1.32	{q14}, [r12]
 7615	aesd.8	q0, q13
 7616	veor.32	q0, q0, q14
 7617	sub	r12, r12, #48
 7618	veor.32	q0, q0, q15
 7619	vst1.32	{q0}, [r4]
 7620	add	r1, r1, #16
 7621	mov	r5, r2
 7622L_aes_xts_decrypt_arm32_crypto_256_start_byte:
 7623	ldrb	r8, [r4]
 7624	ldrb	r9, [r0], #1
 7625	strb	r8, [r1], #1
 7626	strb	r9, [r4], #1
 7627	subs	r5, r5, #1
 7628	bgt	L_aes_xts_decrypt_arm32_crypto_256_start_byte
 7629	sub	r1, r1, r2
 7630	sub	r4, r4, r2
 7631	sub	r1, r1, #16
 7632	vld1.32	{q0}, [r4]
 7633	veor.32	q0, q0, q1
 7634	aesd.8	q0, q2
 7635	aesimc.8	q0, q0
 7636	aesd.8	q0, q3
 7637	aesimc.8	q0, q0
 7638	aesd.8	q0, q4
 7639	aesimc.8	q0, q0
 7640	aesd.8	q0, q5
 7641	aesimc.8	q0, q0
 7642	aesd.8	q0, q6
 7643	aesimc.8	q0, q0
 7644	aesd.8	q0, q7
 7645	aesimc.8	q0, q0
 7646	aesd.8	q0, q8
 7647	aesimc.8	q0, q0
 7648	aesd.8	q0, q9
 7649	aesimc.8	q0, q0
 7650	aesd.8	q0, q10
 7651	aesimc.8	q0, q0
 7652	aesd.8	q0, q11
 7653	aesimc.8	q0, q0
 7654	vld1.32	{q13}, [r12]!
 7655	aesd.8	q0, q12
 7656	aesimc.8	q0, q0
 7657	vld1.32	{q14}, [r12]!
 7658	aesd.8	q0, q13
 7659	aesimc.8	q0, q0
 7660	vld1.32	{q13}, [r12]!
 7661	aesd.8	q0, q14
 7662	aesimc.8	q0, q0
 7663	vld1.32	{q14}, [r12]
 7664	aesd.8	q0, q13
 7665	veor.32	q0, q0, q14
 7666	veor.32	q0, q0, q1
 7667	vst1.8	{q0}, [r1]
 7668L_aes_xts_decrypt_arm32_crypto_256_partial_done:
 7669#endif /* !NO_AES_256 */
 7670	b	L_aes_xts_decrypt_arm32_crypto_done
 7671	# AES_XTS_128
 7672L_aes_xts_decrypt_arm32_crypto_start_128:
 7673#ifndef NO_AES_128
 7674	vldm.32	lr!, {q10-q12}
 7675	aese.8	q1, q2
 7676	aesmc.8	q1, q1
 7677	aese.8	q1, q3
 7678	aesmc.8	q1, q1
 7679	aese.8	q1, q4
 7680	aesmc.8	q1, q1
 7681	aese.8	q1, q5
 7682	aesmc.8	q1, q1
 7683	aese.8	q1, q6
 7684	aesmc.8	q1, q1
 7685	aese.8	q1, q7
 7686	aesmc.8	q1, q1
 7687	aese.8	q1, q8
 7688	aesmc.8	q1, q1
 7689	aese.8	q1, q9
 7690	aesmc.8	q1, q1
 7691	aese.8	q1, q10
 7692	aesmc.8	q1, q1
 7693	aese.8	q1, q11
 7694	veor.32	q1, q1, q12
 7695	vmov	r6, r7, d2
 7696	vmov	r8, r9, d3
 7697	vldm.32	r12!, {q2-q9}
 7698	vldm.32	r12!, {q10-q12}
 7699	mov	lr, #0x87
 7700	cmp	r4, #1
 7701	blt	L_aes_xts_decrypt_arm32_crypto_128_done
 7702L_aes_xts_decrypt_arm32_crypto_128_start_1:
 7703	vld1.8	{q0}, [r0]!
 7704	veor.32	q0, q0, q1
 7705	aesd.8	q0, q2
 7706	aesimc.8	q0, q0
 7707	and	r5, lr, r9, asr #31
 7708	aesd.8	q0, q3
 7709	aesimc.8	q0, q0
 7710	lsl	r9, r9, #1
 7711	aesd.8	q0, q4
 7712	aesimc.8	q0, q0
 7713	orr	r9, r9, r8, lsr #31
 7714	aesd.8	q0, q5
 7715	aesimc.8	q0, q0
 7716	lsl	r8, r8, #1
 7717	aesd.8	q0, q6
 7718	aesimc.8	q0, q0
 7719	orr	r8, r8, r7, lsr #31
 7720	aesd.8	q0, q7
 7721	aesimc.8	q0, q0
 7722	lsl	r7, r7, #1
 7723	aesd.8	q0, q8
 7724	aesimc.8	q0, q0
 7725	orr	r7, r7, r6, lsr #31
 7726	aesd.8	q0, q9
 7727	aesimc.8	q0, q0
 7728	eor	r6, r5, r6, lsl #1
 7729	aesd.8	q0, q10
 7730	aesimc.8	q0, q0
 7731	aesd.8	q0, q11
 7732	veor.32	q0, q0, q12
 7733	veor.32	q0, q0, q1
 7734	vmov	d2, r6, r7
 7735	vmov	d3, r8, r9
 7736	subs	r4, r4, #1
 7737	vst1.8	{q0}, [r1]!
 7738	bne	L_aes_xts_decrypt_arm32_crypto_128_start_1
 7739L_aes_xts_decrypt_arm32_crypto_128_done:
 7740	cmp	r2, #0
 7741	beq	L_aes_xts_decrypt_arm32_crypto_128_partial_done
 7742	and	r5, lr, r9, asr #31
 7743	lsl	r9, r9, #1
 7744	orr	r9, r9, r8, lsr #31
 7745	lsl	r8, r8, #1
 7746	orr	r8, r8, r7, lsr #31
 7747	lsl	r7, r7, #1
 7748	orr	r7, r7, r6, lsr #31
 7749	eor	r6, r5, r6, lsl #1
 7750	vmov	d30, r6, r7
 7751	vmov	d31, r8, r9
 7752	vld1.8	{q0}, [r0]!
 7753	ldr	r4, [sp, #100]
 7754	veor.32	q0, q0, q15
 7755	aesd.8	q0, q2
 7756	aesimc.8	q0, q0
 7757	aesd.8	q0, q3
 7758	aesimc.8	q0, q0
 7759	aesd.8	q0, q4
 7760	aesimc.8	q0, q0
 7761	aesd.8	q0, q5
 7762	aesimc.8	q0, q0
 7763	aesd.8	q0, q6
 7764	aesimc.8	q0, q0
 7765	aesd.8	q0, q7
 7766	aesimc.8	q0, q0
 7767	aesd.8	q0, q8
 7768	aesimc.8	q0, q0
 7769	aesd.8	q0, q9
 7770	aesimc.8	q0, q0
 7771	aesd.8	q0, q10
 7772	aesimc.8	q0, q0
 7773	aesd.8	q0, q11
 7774	veor.32	q0, q0, q12
 7775	veor.32	q0, q0, q15
 7776	vst1.32	{q0}, [r4]
 7777	add	r1, r1, #16
 7778	mov	r5, r2
 7779L_aes_xts_decrypt_arm32_crypto_128_start_byte:
 7780	ldrb	r8, [r4]
 7781	ldrb	r9, [r0], #1
 7782	strb	r8, [r1], #1
 7783	strb	r9, [r4], #1
 7784	subs	r5, r5, #1
 7785	bgt	L_aes_xts_decrypt_arm32_crypto_128_start_byte
 7786	sub	r1, r1, r2
 7787	sub	r4, r4, r2
 7788	sub	r1, r1, #16
 7789	vld1.32	{q0}, [r4]
 7790	veor.32	q0, q0, q1
 7791	aesd.8	q0, q2
 7792	aesimc.8	q0, q0
 7793	aesd.8	q0, q3
 7794	aesimc.8	q0, q0
 7795	aesd.8	q0, q4
 7796	aesimc.8	q0, q0
 7797	aesd.8	q0, q5
 7798	aesimc.8	q0, q0
 7799	aesd.8	q0, q6
 7800	aesimc.8	q0, q0
 7801	aesd.8	q0, q7
 7802	aesimc.8	q0, q0
 7803	aesd.8	q0, q8
 7804	aesimc.8	q0, q0
 7805	aesd.8	q0, q9
 7806	aesimc.8	q0, q0
 7807	aesd.8	q0, q10
 7808	aesimc.8	q0, q0
 7809	aesd.8	q0, q11
 7810	veor.32	q0, q0, q12
 7811	veor.32	q0, q0, q1
 7812	vst1.8	{q0}, [r1]
 7813L_aes_xts_decrypt_arm32_crypto_128_partial_done:
 7814#endif /* !NO_AES_128 */
 7815L_aes_xts_decrypt_arm32_crypto_done:
 7816	vpop	{d8-d15}
 7817	pop	{r4, r5, r6, r7, r8, r9, pc}
 7818	.size	AES_XTS_decrypt_AARCH32,.-AES_XTS_decrypt_AARCH32
 7819#endif /* HAVE_AES_DECRYPT */
 7820#endif /* WOLFSSL_AES_XTS */
 7821#else
 7822#ifdef HAVE_AES_DECRYPT
 7823#ifndef __APPLE__
 7824	.text
 7825	.type	L_AES_ARM32_td_data, %object
 7826	.size	L_AES_ARM32_td_data, 1024
 7827#else
 7828	.section	__DATA,__data
 7829#endif /* __APPLE__ */
 7830	# 8-byte aligned, 64-bit aligned
 7831#ifndef __APPLE__
 7832	.align	3
 7833#else
 7834	.p2align	3
 7835#endif /* __APPLE__ */
 7836L_AES_ARM32_td_data:
 7837	.long	0x5051f4a7,0x537e4165,0xc31a17a4,0x963a275e
 7838	.long	0xcb3bab6b,0xf11f9d45,0xabacfa58,0x934be303
 7839	.long	0x552030fa,0xf6ad766d,0x9188cc76,0x25f5024c
 7840	.long	0xfc4fe5d7,0xd7c52acb,0x80263544,0x8fb562a3
 7841	.long	0x49deb15a,0x6725ba1b,0x9845ea0e,0xe15dfec0
 7842	.long	0x02c32f75,0x12814cf0,0xa38d4697,0xc66bd3f9
 7843	.long	0xe7038f5f,0x9515929c,0xebbf6d7a,0xda955259
 7844	.long	0x2dd4be83,0xd3587421,0x2949e069,0x448ec9c8
 7845	.long	0x6a75c289,0x78f48e79,0x6b99583e,0xdd27b971
 7846	.long	0xb6bee14f,0x17f088ad,0x66c920ac,0xb47dce3a
 7847	.long	0x1863df4a,0x82e51a31,0x60975133,0x4562537f
 7848	.long	0xe0b16477,0x84bb6bae,0x1cfe81a0,0x94f9082b
 7849	.long	0x58704868,0x198f45fd,0x8794de6c,0xb7527bf8
 7850	.long	0x23ab73d3,0xe2724b02,0x57e31f8f,0x2a6655ab
 7851	.long	0x07b2eb28,0x032fb5c2,0x9a86c57b,0xa5d33708
 7852	.long	0xf2302887,0xb223bfa5,0xba02036a,0x5ced1682
 7853	.long	0x2b8acf1c,0x92a779b4,0xf0f307f2,0xa14e69e2
 7854	.long	0xcd65daf4,0xd50605be,0x1fd13462,0x8ac4a6fe
 7855	.long	0x9d342e53,0xa0a2f355,0x32058ae1,0x75a4f6eb
 7856	.long	0x390b83ec,0xaa4060ef,0x065e719f,0x51bd6e10
 7857	.long	0xf93e218a,0x3d96dd06,0xaedd3e05,0x464de6bd
 7858	.long	0xb591548d,0x0571c45d,0x6f0406d4,0xff605015
 7859	.long	0x241998fb,0x97d6bde9,0xcc894043,0x7767d99e
 7860	.long	0xbdb0e842,0x8807898b,0x38e7195b,0xdb79c8ee
 7861	.long	0x47a17c0a,0xe97c420f,0xc9f8841e,0x00000000
 7862	.long	0x83098086,0x48322bed,0xac1e1170,0x4e6c5a72
 7863	.long	0xfbfd0eff,0x560f8538,0x1e3daed5,0x27362d39
 7864	.long	0x640a0fd9,0x21685ca6,0xd19b5b54,0x3a24362e
 7865	.long	0xb10c0a67,0x0f9357e7,0xd2b4ee96,0x9e1b9b91
 7866	.long	0x4f80c0c5,0xa261dc20,0x695a774b,0x161c121a
 7867	.long	0x0ae293ba,0xe5c0a02a,0x433c22e0,0x1d121b17
 7868	.long	0x0b0e090d,0xadf28bc7,0xb92db6a8,0xc8141ea9
 7869	.long	0x8557f119,0x4caf7507,0xbbee99dd,0xfda37f60
 7870	.long	0x9ff70126,0xbc5c72f5,0xc544663b,0x345bfb7e
 7871	.long	0x768b4329,0xdccb23c6,0x68b6edfc,0x63b8e4f1
 7872	.long	0xcad731dc,0x10426385,0x40139722,0x2084c611
 7873	.long	0x7d854a24,0xf8d2bb3d,0x11aef932,0x6dc729a1
 7874	.long	0x4b1d9e2f,0xf3dcb230,0xec0d8652,0xd077c1e3
 7875	.long	0x6c2bb316,0x99a970b9,0xfa119448,0x2247e964
 7876	.long	0xc4a8fc8c,0x1aa0f03f,0xd8567d2c,0xef223390
 7877	.long	0xc787494e,0xc1d938d1,0xfe8ccaa2,0x3698d40b
 7878	.long	0xcfa6f581,0x28a57ade,0x26dab78e,0xa43fadbf
 7879	.long	0xe42c3a9d,0x0d507892,0x9b6a5fcc,0x62547e46
 7880	.long	0xc2f68d13,0xe890d8b8,0x5e2e39f7,0xf582c3af
 7881	.long	0xbe9f5d80,0x7c69d093,0xa96fd52d,0xb3cf2512
 7882	.long	0x3bc8ac99,0xa710187d,0x6ee89c63,0x7bdb3bbb
 7883	.long	0x09cd2678,0xf46e5918,0x01ec9ab7,0xa8834f9a
 7884	.long	0x65e6956e,0x7eaaffe6,0x0821bccf,0xe6ef15e8
 7885	.long	0xd9bae79b,0xce4a6f36,0xd4ea9f09,0xd629b07c
 7886	.long	0xaf31a4b2,0x312a3f23,0x30c6a594,0xc035a266
 7887	.long	0x37744ebc,0xa6fc82ca,0xb0e090d0,0x1533a7d8
 7888	.long	0x4af10498,0xf741ecda,0x0e7fcd50,0x2f1791f6
 7889	.long	0x8d764dd6,0x4d43efb0,0x54ccaa4d,0xdfe49604
 7890	.long	0xe39ed1b5,0x1b4c6a88,0xb8c12c1f,0x7f466551
 7891	.long	0x049d5eea,0x5d018c35,0x73fa8774,0x2efb0b41
 7892	.long	0x5ab3671d,0x5292dbd2,0x33e91056,0x136dd647
 7893	.long	0x8c9ad761,0x7a37a10c,0x8e59f814,0x89eb133c
 7894	.long	0xeecea927,0x35b761c9,0xede11ce5,0x3c7a47b1
 7895	.long	0x599cd2df,0x3f55f273,0x791814ce,0xbf73c737
 7896	.long	0xea53f7cd,0x5b5ffdaa,0x14df3d6f,0x867844db
 7897	.long	0x81caaff3,0x3eb968c4,0x2c382434,0x5fc2a340
 7898	.long	0x72161dc3,0x0cbce225,0x8b283c49,0x41ff0d95
 7899	.long	0x7139a801,0xde080cb3,0x9cd8b4e4,0x906456c1
 7900	.long	0x617bcb84,0x70d532b6,0x74486c5c,0x42d0b857
 7901#endif /* HAVE_AES_DECRYPT */
 7902#if defined(HAVE_AES_DECRYPT) || defined(HAVE_AES_CBC) || \
 7903    defined(HAVE_AESCCM) || defined(HAVE_AESGCM) || \
 7904    defined(WOLFSSL_AES_DIRECT) || defined(WOLFSSL_AES_COUNTER)
 7905#ifndef __APPLE__
 7906	.text
 7907	.type	L_AES_ARM32_te_data, %object
 7908	.size	L_AES_ARM32_te_data, 1024
 7909#else
 7910	.section	__DATA,__data
 7911#endif /* __APPLE__ */
 7912	# 8-byte aligned, 64-bit aligned
 7913#ifndef __APPLE__
 7914	.align	3
 7915#else
 7916	.p2align	3
 7917#endif /* __APPLE__ */
 7918L_AES_ARM32_te_data:
 7919	.long	0xa5c66363,0x84f87c7c,0x99ee7777,0x8df67b7b
 7920	.long	0x0dfff2f2,0xbdd66b6b,0xb1de6f6f,0x5491c5c5
 7921	.long	0x50603030,0x03020101,0xa9ce6767,0x7d562b2b
 7922	.long	0x19e7fefe,0x62b5d7d7,0xe64dabab,0x9aec7676
 7923	.long	0x458fcaca,0x9d1f8282,0x4089c9c9,0x87fa7d7d
 7924	.long	0x15effafa,0xebb25959,0xc98e4747,0x0bfbf0f0
 7925	.long	0xec41adad,0x67b3d4d4,0xfd5fa2a2,0xea45afaf
 7926	.long	0xbf239c9c,0xf753a4a4,0x96e47272,0x5b9bc0c0
 7927	.long	0xc275b7b7,0x1ce1fdfd,0xae3d9393,0x6a4c2626
 7928	.long	0x5a6c3636,0x417e3f3f,0x02f5f7f7,0x4f83cccc
 7929	.long	0x5c683434,0xf451a5a5,0x34d1e5e5,0x08f9f1f1
 7930	.long	0x93e27171,0x73abd8d8,0x53623131,0x3f2a1515
 7931	.long	0x0c080404,0x5295c7c7,0x65462323,0x5e9dc3c3
 7932	.long	0x28301818,0xa1379696,0x0f0a0505,0xb52f9a9a
 7933	.long	0x090e0707,0x36241212,0x9b1b8080,0x3ddfe2e2
 7934	.long	0x26cdebeb,0x694e2727,0xcd7fb2b2,0x9fea7575
 7935	.long	0x1b120909,0x9e1d8383,0x74582c2c,0x2e341a1a
 7936	.long	0x2d361b1b,0xb2dc6e6e,0xeeb45a5a,0xfb5ba0a0
 7937	.long	0xf6a45252,0x4d763b3b,0x61b7d6d6,0xce7db3b3
 7938	.long	0x7b522929,0x3edde3e3,0x715e2f2f,0x97138484
 7939	.long	0xf5a65353,0x68b9d1d1,0x00000000,0x2cc1eded
 7940	.long	0x60402020,0x1fe3fcfc,0xc879b1b1,0xedb65b5b
 7941	.long	0xbed46a6a,0x468dcbcb,0xd967bebe,0x4b723939
 7942	.long	0xde944a4a,0xd4984c4c,0xe8b05858,0x4a85cfcf
 7943	.long	0x6bbbd0d0,0x2ac5efef,0xe54faaaa,0x16edfbfb
 7944	.long	0xc5864343,0xd79a4d4d,0x55663333,0x94118585
 7945	.long	0xcf8a4545,0x10e9f9f9,0x06040202,0x81fe7f7f
 7946	.long	0xf0a05050,0x44783c3c,0xba259f9f,0xe34ba8a8
 7947	.long	0xf3a25151,0xfe5da3a3,0xc0804040,0x8a058f8f
 7948	.long	0xad3f9292,0xbc219d9d,0x48703838,0x04f1f5f5
 7949	.long	0xdf63bcbc,0xc177b6b6,0x75afdada,0x63422121
 7950	.long	0x30201010,0x1ae5ffff,0x0efdf3f3,0x6dbfd2d2
 7951	.long	0x4c81cdcd,0x14180c0c,0x35261313,0x2fc3ecec
 7952	.long	0xe1be5f5f,0xa2359797,0xcc884444,0x392e1717
 7953	.long	0x5793c4c4,0xf255a7a7,0x82fc7e7e,0x477a3d3d
 7954	.long	0xacc86464,0xe7ba5d5d,0x2b321919,0x95e67373
 7955	.long	0xa0c06060,0x98198181,0xd19e4f4f,0x7fa3dcdc
 7956	.long	0x66442222,0x7e542a2a,0xab3b9090,0x830b8888
 7957	.long	0xca8c4646,0x29c7eeee,0xd36bb8b8,0x3c281414
 7958	.long	0x79a7dede,0xe2bc5e5e,0x1d160b0b,0x76addbdb
 7959	.long	0x3bdbe0e0,0x56643232,0x4e743a3a,0x1e140a0a
 7960	.long	0xdb924949,0x0a0c0606,0x6c482424,0xe4b85c5c
 7961	.long	0x5d9fc2c2,0x6ebdd3d3,0xef43acac,0xa6c46262
 7962	.long	0xa8399191,0xa4319595,0x37d3e4e4,0x8bf27979
 7963	.long	0x32d5e7e7,0x438bc8c8,0x596e3737,0xb7da6d6d
 7964	.long	0x8c018d8d,0x64b1d5d5,0xd29c4e4e,0xe049a9a9
 7965	.long	0xb4d86c6c,0xfaac5656,0x07f3f4f4,0x25cfeaea
 7966	.long	0xafca6565,0x8ef47a7a,0xe947aeae,0x18100808
 7967	.long	0xd56fbaba,0x88f07878,0x6f4a2525,0x725c2e2e
 7968	.long	0x24381c1c,0xf157a6a6,0xc773b4b4,0x5197c6c6
 7969	.long	0x23cbe8e8,0x7ca1dddd,0x9ce87474,0x213e1f1f
 7970	.long	0xdd964b4b,0xdc61bdbd,0x860d8b8b,0x850f8a8a
 7971	.long	0x90e07070,0x427c3e3e,0xc471b5b5,0xaacc6666
 7972	.long	0xd8904848,0x05060303,0x01f7f6f6,0x121c0e0e
 7973	.long	0xa3c26161,0x5f6a3535,0xf9ae5757,0xd069b9b9
 7974	.long	0x91178686,0x5899c1c1,0x273a1d1d,0xb9279e9e
 7975	.long	0x38d9e1e1,0x13ebf8f8,0xb32b9898,0x33221111
 7976	.long	0xbbd26969,0x70a9d9d9,0x89078e8e,0xa7339494
 7977	.long	0xb62d9b9b,0x223c1e1e,0x92158787,0x20c9e9e9
 7978	.long	0x4987cece,0xffaa5555,0x78502828,0x7aa5dfdf
 7979	.long	0x8f038c8c,0xf859a1a1,0x80098989,0x171a0d0d
 7980	.long	0xda65bfbf,0x31d7e6e6,0xc6844242,0xb8d06868
 7981	.long	0xc3824141,0xb0299999,0x775a2d2d,0x111e0f0f
 7982	.long	0xcb7bb0b0,0xfca85454,0xd66dbbbb,0x3a2c1616
 7983#endif /* HAVE_AES_DECRYPT || HAVE_AES_CBC || HAVE_AESCCM || HAVE_AESGCM ||
 7984        * WOLFSSL_AES_DIRECT || WOLFSSL_AES_COUNTER */
 7985#ifdef HAVE_AES_DECRYPT
 7986#ifndef __APPLE__
 7987	.text
 7988	.type	L_AES_ARM32_td, %object
 7989	.size	L_AES_ARM32_td, 12
 7990#else
 7991	.section	__DATA,__data
 7992#endif /* __APPLE__ */
 7993	# 8-byte aligned, 64-bit aligned
 7994#ifndef __APPLE__
 7995	.align	3
 7996#else
 7997	.p2align	3
 7998#endif /* __APPLE__ */
 7999L_AES_ARM32_td:
 8000	.long	L_AES_ARM32_td_data
 8001#endif /* HAVE_AES_DECRYPT */
 8002#if defined(HAVE_AES_DECRYPT) || defined(HAVE_AES_CBC) || \
 8003    defined(HAVE_AESCCM) || defined(HAVE_AESGCM) || \
 8004    defined(WOLFSSL_AES_DIRECT) || defined(WOLFSSL_AES_COUNTER)
 8005#ifndef __APPLE__
 8006	.text
 8007	.type	L_AES_ARM32_te, %object
 8008	.size	L_AES_ARM32_te, 12
 8009#else
 8010	.section	__DATA,__data
 8011#endif /* __APPLE__ */
 8012	# 8-byte aligned, 64-bit aligned
 8013#ifndef __APPLE__
 8014	.align	3
 8015#else
 8016	.p2align	3
 8017#endif /* __APPLE__ */
 8018L_AES_ARM32_te:
 8019	.long	L_AES_ARM32_te_data
 8020#endif /* HAVE_AES_DECRYPT || HAVE_AES_CBC || HAVE_AESCCM || HAVE_AESGCM ||
 8021        * WOLFSSL_AES_DIRECT || WOLFSSL_AES_COUNTER */
 8022#ifdef HAVE_AES_DECRYPT
 8023	.text
 8024	.align	4
 8025	.globl	AES_invert_key
 8026	.type	AES_invert_key, %function
 8027AES_invert_key:
 8028	push	{r4, r5, r6, r7, r8, r9, r10, r11, lr}
 8029	adr	r12, L_AES_ARM32_te
 8030	ldr	r12, [r12]
 8031	adr	lr, L_AES_ARM32_td
 8032	ldr	lr, [lr]
 8033	add	r10, r0, r1, lsl #4
 8034	mov	r11, r1
 8035L_AES_invert_key_loop:
 8036	ldm	r0, {r2, r3, r4, r5}
 8037	ldm	r10, {r6, r7, r8, r9}
 8038	stm	r10, {r2, r3, r4, r5}
 8039	stm	r0!, {r6, r7, r8, r9}
 8040	subs	r11, r11, #2
 8041	sub	r10, r10, #16
 8042	bne	L_AES_invert_key_loop
 8043	sub	r0, r0, r1, lsl #3
 8044	add	r0, r0, #16
 8045	sub	r11, r1, #1
 8046L_AES_invert_key_mix_loop:
 8047	ldm	r0, {r2, r3, r4, r5}
 8048#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8049#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8050	lsl	r6, r2, #24
 8051	lsr	r6, r6, #24
 8052#else
 8053	uxtb	r6, r2
 8054#endif
 8055#else
 8056	ubfx	r6, r2, #0, #8
 8057#endif
 8058#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8059#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8060	lsl	r7, r2, #16
 8061	lsr	r7, r7, #24
 8062#else
 8063	uxtb	r7, r2, ror #8
 8064#endif
 8065#else
 8066	ubfx	r7, r2, #8, #8
 8067#endif
 8068#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8069#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8070	lsl	r8, r2, #8
 8071	lsr	r8, r8, #24
 8072#else
 8073	uxtb	r8, r2, ror #16
 8074#endif
 8075#else
 8076	ubfx	r8, r2, #16, #8
 8077#endif
 8078	lsr	r9, r2, #24
 8079	ldrb	r6, [r12, r6, lsl #2]
 8080	ldrb	r7, [r12, r7, lsl #2]
 8081	ldrb	r8, [r12, r8, lsl #2]
 8082	ldrb	r9, [r12, r9, lsl #2]
 8083	ldr	r6, [lr, r6, lsl #2]
 8084	ldr	r7, [lr, r7, lsl #2]
 8085	ldr	r8, [lr, r8, lsl #2]
 8086	ldr	r9, [lr, r9, lsl #2]
 8087	eor	r8, r8, r6, ror #16
 8088	eor	r8, r8, r7, ror #8
 8089	eor	r8, r8, r9, ror #24
 8090	str	r8, [r0], #4
 8091#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8092#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8093	lsl	r6, r3, #24
 8094	lsr	r6, r6, #24
 8095#else
 8096	uxtb	r6, r3
 8097#endif
 8098#else
 8099	ubfx	r6, r3, #0, #8
 8100#endif
 8101#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8102#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8103	lsl	r7, r3, #16
 8104	lsr	r7, r7, #24
 8105#else
 8106	uxtb	r7, r3, ror #8
 8107#endif
 8108#else
 8109	ubfx	r7, r3, #8, #8
 8110#endif
 8111#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8112#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8113	lsl	r8, r3, #8
 8114	lsr	r8, r8, #24
 8115#else
 8116	uxtb	r8, r3, ror #16
 8117#endif
 8118#else
 8119	ubfx	r8, r3, #16, #8
 8120#endif
 8121	lsr	r9, r3, #24
 8122	ldrb	r6, [r12, r6, lsl #2]
 8123	ldrb	r7, [r12, r7, lsl #2]
 8124	ldrb	r8, [r12, r8, lsl #2]
 8125	ldrb	r9, [r12, r9, lsl #2]
 8126	ldr	r6, [lr, r6, lsl #2]
 8127	ldr	r7, [lr, r7, lsl #2]
 8128	ldr	r8, [lr, r8, lsl #2]
 8129	ldr	r9, [lr, r9, lsl #2]
 8130	eor	r8, r8, r6, ror #16
 8131	eor	r8, r8, r7, ror #8
 8132	eor	r8, r8, r9, ror #24
 8133	str	r8, [r0], #4
 8134#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8135#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8136	lsl	r6, r4, #24
 8137	lsr	r6, r6, #24
 8138#else
 8139	uxtb	r6, r4
 8140#endif
 8141#else
 8142	ubfx	r6, r4, #0, #8
 8143#endif
 8144#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8145#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8146	lsl	r7, r4, #16
 8147	lsr	r7, r7, #24
 8148#else
 8149	uxtb	r7, r4, ror #8
 8150#endif
 8151#else
 8152	ubfx	r7, r4, #8, #8
 8153#endif
 8154#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8155#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8156	lsl	r8, r4, #8
 8157	lsr	r8, r8, #24
 8158#else
 8159	uxtb	r8, r4, ror #16
 8160#endif
 8161#else
 8162	ubfx	r8, r4, #16, #8
 8163#endif
 8164	lsr	r9, r4, #24
 8165	ldrb	r6, [r12, r6, lsl #2]
 8166	ldrb	r7, [r12, r7, lsl #2]
 8167	ldrb	r8, [r12, r8, lsl #2]
 8168	ldrb	r9, [r12, r9, lsl #2]
 8169	ldr	r6, [lr, r6, lsl #2]
 8170	ldr	r7, [lr, r7, lsl #2]
 8171	ldr	r8, [lr, r8, lsl #2]
 8172	ldr	r9, [lr, r9, lsl #2]
 8173	eor	r8, r8, r6, ror #16
 8174	eor	r8, r8, r7, ror #8
 8175	eor	r8, r8, r9, ror #24
 8176	str	r8, [r0], #4
 8177#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8178#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8179	lsl	r6, r5, #24
 8180	lsr	r6, r6, #24
 8181#else
 8182	uxtb	r6, r5
 8183#endif
 8184#else
 8185	ubfx	r6, r5, #0, #8
 8186#endif
 8187#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8188#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8189	lsl	r7, r5, #16
 8190	lsr	r7, r7, #24
 8191#else
 8192	uxtb	r7, r5, ror #8
 8193#endif
 8194#else
 8195	ubfx	r7, r5, #8, #8
 8196#endif
 8197#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8198#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8199	lsl	r8, r5, #8
 8200	lsr	r8, r8, #24
 8201#else
 8202	uxtb	r8, r5, ror #16
 8203#endif
 8204#else
 8205	ubfx	r8, r5, #16, #8
 8206#endif
 8207	lsr	r9, r5, #24
 8208	ldrb	r6, [r12, r6, lsl #2]
 8209	ldrb	r7, [r12, r7, lsl #2]
 8210	ldrb	r8, [r12, r8, lsl #2]
 8211	ldrb	r9, [r12, r9, lsl #2]
 8212	ldr	r6, [lr, r6, lsl #2]
 8213	ldr	r7, [lr, r7, lsl #2]
 8214	ldr	r8, [lr, r8, lsl #2]
 8215	ldr	r9, [lr, r9, lsl #2]
 8216	eor	r8, r8, r6, ror #16
 8217	eor	r8, r8, r7, ror #8
 8218	eor	r8, r8, r9, ror #24
 8219	str	r8, [r0], #4
 8220	subs	r11, r11, #1
 8221	bne	L_AES_invert_key_mix_loop
 8222	pop	{r4, r5, r6, r7, r8, r9, r10, r11, pc}
 8223	.size	AES_invert_key,.-AES_invert_key
 8224#endif /* HAVE_AES_DECRYPT */
 8225#ifndef __APPLE__
 8226	.text
 8227	.type	L_AES_ARM32_rcon, %object
 8228	.size	L_AES_ARM32_rcon, 40
 8229#else
 8230	.section	__DATA,__data
 8231#endif /* __APPLE__ */
 8232	# 8-byte aligned, 64-bit aligned
 8233#ifndef __APPLE__
 8234	.align	3
 8235#else
 8236	.p2align	3
 8237#endif /* __APPLE__ */
 8238L_AES_ARM32_rcon:
 8239	.long	0x01000000,0x02000000,0x04000000,0x08000000
 8240	.long	0x10000000,0x20000000,0x40000000,0x80000000
 8241	.long	0x1b000000,0x36000000
 8242	.text
 8243	.align	4
 8244	.globl	AES_set_encrypt_key
 8245	.type	AES_set_encrypt_key, %function
 8246AES_set_encrypt_key:
 8247	push	{r4, r5, r6, r7, r8, lr}
 8248	adr	r8, L_AES_ARM32_te
 8249	ldr	r8, [r8]
 8250	adr	lr, L_AES_ARM32_rcon
 8251	cmp	r1, #0x80
 8252	beq	L_AES_set_encrypt_key_start_128
 8253	cmp	r1, #0xc0
 8254	beq	L_AES_set_encrypt_key_start_192
 8255	ldr	r4, [r0]
 8256	ldr	r5, [r0, #4]
 8257	ldr	r6, [r0, #8]
 8258	ldr	r7, [r0, #12]
 8259#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8260	# REV r4, r4
 8261	eor	r3, r4, r4, ror #16
 8262	bic	r3, r3, #0xff0000
 8263	ror	r4, r4, #8
 8264	eor	r4, r4, r3, lsr #8
 8265	# REV r5, r5
 8266	eor	r3, r5, r5, ror #16
 8267	bic	r3, r3, #0xff0000
 8268	ror	r5, r5, #8
 8269	eor	r5, r5, r3, lsr #8
 8270	# REV r6, r6
 8271	eor	r3, r6, r6, ror #16
 8272	bic	r3, r3, #0xff0000
 8273	ror	r6, r6, #8
 8274	eor	r6, r6, r3, lsr #8
 8275	# REV r7, r7
 8276	eor	r3, r7, r7, ror #16
 8277	bic	r3, r3, #0xff0000
 8278	ror	r7, r7, #8
 8279	eor	r7, r7, r3, lsr #8
 8280#else
 8281	rev	r4, r4
 8282	rev	r5, r5
 8283	rev	r6, r6
 8284	rev	r7, r7
 8285#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
 8286	stm	r2!, {r4, r5, r6, r7}
 8287	ldr	r4, [r0, #16]
 8288	ldr	r5, [r0, #20]
 8289	ldr	r6, [r0, #24]
 8290	ldr	r7, [r0, #28]
 8291#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8292	# REV r4, r4
 8293	eor	r3, r4, r4, ror #16
 8294	bic	r3, r3, #0xff0000
 8295	ror	r4, r4, #8
 8296	eor	r4, r4, r3, lsr #8
 8297	# REV r5, r5
 8298	eor	r3, r5, r5, ror #16
 8299	bic	r3, r3, #0xff0000
 8300	ror	r5, r5, #8
 8301	eor	r5, r5, r3, lsr #8
 8302	# REV r6, r6
 8303	eor	r3, r6, r6, ror #16
 8304	bic	r3, r3, #0xff0000
 8305	ror	r6, r6, #8
 8306	eor	r6, r6, r3, lsr #8
 8307	# REV r7, r7
 8308	eor	r3, r7, r7, ror #16
 8309	bic	r3, r3, #0xff0000
 8310	ror	r7, r7, #8
 8311	eor	r7, r7, r3, lsr #8
 8312#else
 8313	rev	r4, r4
 8314	rev	r5, r5
 8315	rev	r6, r6
 8316	rev	r7, r7
 8317#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
 8318	stm	r2, {r4, r5, r6, r7}
 8319	sub	r2, r2, #16
 8320	mov	r12, #6
 8321L_AES_set_encrypt_key_loop_256:
 8322#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8323#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8324	lsl	r4, r7, #24
 8325	lsr	r4, r4, #24
 8326#else
 8327	uxtb	r4, r7
 8328#endif
 8329#else
 8330	ubfx	r4, r7, #0, #8
 8331#endif
 8332#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8333#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8334	lsl	r5, r7, #16
 8335	lsr	r5, r5, #24
 8336#else
 8337	uxtb	r5, r7, ror #8
 8338#endif
 8339#else
 8340	ubfx	r5, r7, #8, #8
 8341#endif
 8342#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8343#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8344	lsl	r6, r7, #8
 8345	lsr	r6, r6, #24
 8346#else
 8347	uxtb	r6, r7, ror #16
 8348#endif
 8349#else
 8350	ubfx	r6, r7, #16, #8
 8351#endif
 8352	lsr	r7, r7, #24
 8353	ldrb	r4, [r8, r4, lsl #2]
 8354	ldrb	r5, [r8, r5, lsl #2]
 8355	ldrb	r6, [r8, r6, lsl #2]
 8356	ldrb	r7, [r8, r7, lsl #2]
 8357	eor	r3, r7, r4, lsl #8
 8358	eor	r3, r3, r5, lsl #16
 8359	eor	r3, r3, r6, lsl #24
 8360	ldm	r2!, {r4, r5, r6, r7}
 8361	eor	r4, r4, r3
 8362	ldm	lr!, {r3}
 8363	eor	r4, r4, r3
 8364	eor	r5, r5, r4
 8365	eor	r6, r6, r5
 8366	eor	r7, r7, r6
 8367	add	r2, r2, #16
 8368	stm	r2, {r4, r5, r6, r7}
 8369	sub	r2, r2, #16
 8370	mov	r3, r7
 8371#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8372#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8373	lsl	r4, r3, #16
 8374	lsr	r4, r4, #24
 8375#else
 8376	uxtb	r4, r3, ror #8
 8377#endif
 8378#else
 8379	ubfx	r4, r3, #8, #8
 8380#endif
 8381#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8382#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8383	lsl	r5, r3, #8
 8384	lsr	r5, r5, #24
 8385#else
 8386	uxtb	r5, r3, ror #16
 8387#endif
 8388#else
 8389	ubfx	r5, r3, #16, #8
 8390#endif
 8391	lsr	r6, r3, #24
 8392#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8393#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8394	lsl	r3, r3, #24
 8395	lsr	r3, r3, #24
 8396#else
 8397	uxtb	r3, r3
 8398#endif
 8399#else
 8400	ubfx	r3, r3, #0, #8
 8401#endif
 8402	ldrb	r4, [r8, r4, lsl #2]
 8403	ldrb	r6, [r8, r6, lsl #2]
 8404	ldrb	r5, [r8, r5, lsl #2]
 8405	ldrb	r3, [r8, r3, lsl #2]
 8406	eor	r3, r3, r4, lsl #8
 8407	eor	r3, r3, r5, lsl #16
 8408	eor	r3, r3, r6, lsl #24
 8409	ldm	r2!, {r4, r5, r6, r7}
 8410	eor	r4, r4, r3
 8411	eor	r5, r5, r4
 8412	eor	r6, r6, r5
 8413	eor	r7, r7, r6
 8414	add	r2, r2, #16
 8415	stm	r2, {r4, r5, r6, r7}
 8416	sub	r2, r2, #16
 8417	subs	r12, r12, #1
 8418	bne	L_AES_set_encrypt_key_loop_256
 8419#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8420#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8421	lsl	r4, r7, #24
 8422	lsr	r4, r4, #24
 8423#else
 8424	uxtb	r4, r7
 8425#endif
 8426#else
 8427	ubfx	r4, r7, #0, #8
 8428#endif
 8429#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8430#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8431	lsl	r5, r7, #16
 8432	lsr	r5, r5, #24
 8433#else
 8434	uxtb	r5, r7, ror #8
 8435#endif
 8436#else
 8437	ubfx	r5, r7, #8, #8
 8438#endif
 8439#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8440#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8441	lsl	r6, r7, #8
 8442	lsr	r6, r6, #24
 8443#else
 8444	uxtb	r6, r7, ror #16
 8445#endif
 8446#else
 8447	ubfx	r6, r7, #16, #8
 8448#endif
 8449	lsr	r7, r7, #24
 8450	ldrb	r4, [r8, r4, lsl #2]
 8451	ldrb	r5, [r8, r5, lsl #2]
 8452	ldrb	r6, [r8, r6, lsl #2]
 8453	ldrb	r7, [r8, r7, lsl #2]
 8454	eor	r3, r7, r4, lsl #8
 8455	eor	r3, r3, r5, lsl #16
 8456	eor	r3, r3, r6, lsl #24
 8457	ldm	r2!, {r4, r5, r6, r7}
 8458	eor	r4, r4, r3
 8459	ldm	lr!, {r3}
 8460	eor	r4, r4, r3
 8461	eor	r5, r5, r4
 8462	eor	r6, r6, r5
 8463	eor	r7, r7, r6
 8464	add	r2, r2, #16
 8465	stm	r2, {r4, r5, r6, r7}
 8466	sub	r2, r2, #16
 8467	b	L_AES_set_encrypt_key_end
 8468L_AES_set_encrypt_key_start_192:
 8469	ldr	r4, [r0]
 8470	ldr	r5, [r0, #4]
 8471	ldr	r6, [r0, #8]
 8472	ldr	r7, [r0, #12]
 8473	ldr	r1, [r0, #20]
 8474	ldr	r0, [r0, #16]
 8475#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8476	# REV r4, r4
 8477	eor	r3, r4, r4, ror #16
 8478	bic	r3, r3, #0xff0000
 8479	ror	r4, r4, #8
 8480	eor	r4, r4, r3, lsr #8
 8481	# REV r5, r5
 8482	eor	r3, r5, r5, ror #16
 8483	bic	r3, r3, #0xff0000
 8484	ror	r5, r5, #8
 8485	eor	r5, r5, r3, lsr #8
 8486	# REV r6, r6
 8487	eor	r3, r6, r6, ror #16
 8488	bic	r3, r3, #0xff0000
 8489	ror	r6, r6, #8
 8490	eor	r6, r6, r3, lsr #8
 8491	# REV r7, r7
 8492	eor	r3, r7, r7, ror #16
 8493	bic	r3, r3, #0xff0000
 8494	ror	r7, r7, #8
 8495	eor	r7, r7, r3, lsr #8
 8496	# REV r0, r0
 8497	eor	r3, r0, r0, ror #16
 8498	bic	r3, r3, #0xff0000
 8499	ror	r0, r0, #8
 8500	eor	r0, r0, r3, lsr #8
 8501	# REV r1, r1
 8502	eor	r3, r1, r1, ror #16
 8503	bic	r3, r3, #0xff0000
 8504	ror	r1, r1, #8
 8505	eor	r1, r1, r3, lsr #8
 8506#else
 8507	rev	r4, r4
 8508	rev	r5, r5
 8509	rev	r6, r6
 8510	rev	r7, r7
 8511	rev	r0, r0
 8512	rev	r1, r1
 8513#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
 8514	stm	r2, {r4, r5, r6, r7}
 8515#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8516	str	r0, [r2, #16]
 8517	str	r1, [r2, #20]
 8518#else
 8519	strd	r0, r1, [r2, #16]
 8520#endif
 8521	mov	r7, r1
 8522	mov	r12, #7
 8523L_AES_set_encrypt_key_loop_192:
 8524#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8525#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8526	lsl	r0, r7, #24
 8527	lsr	r0, r0, #24
 8528#else
 8529	uxtb	r0, r7
 8530#endif
 8531#else
 8532	ubfx	r0, r7, #0, #8
 8533#endif
 8534#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8535#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8536	lsl	r1, r7, #16
 8537	lsr	r1, r1, #24
 8538#else
 8539	uxtb	r1, r7, ror #8
 8540#endif
 8541#else
 8542	ubfx	r1, r7, #8, #8
 8543#endif
 8544#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8545#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8546	lsl	r4, r7, #8
 8547	lsr	r4, r4, #24
 8548#else
 8549	uxtb	r4, r7, ror #16
 8550#endif
 8551#else
 8552	ubfx	r4, r7, #16, #8
 8553#endif
 8554	lsr	r7, r7, #24
 8555	ldrb	r0, [r8, r0, lsl #2]
 8556	ldrb	r1, [r8, r1, lsl #2]
 8557	ldrb	r4, [r8, r4, lsl #2]
 8558	ldrb	r7, [r8, r7, lsl #2]
 8559	eor	r3, r7, r0, lsl #8
 8560	eor	r3, r3, r1, lsl #16
 8561	eor	r3, r3, r4, lsl #24
 8562	ldm	r2!, {r0, r1, r4, r5, r6, r7}
 8563	eor	r0, r0, r3
 8564	ldm	lr!, {r3}
 8565	eor	r0, r0, r3
 8566	eor	r1, r1, r0
 8567	eor	r4, r4, r1
 8568	eor	r5, r5, r4
 8569	eor	r6, r6, r5
 8570	eor	r7, r7, r6
 8571	stm	r2, {r0, r1, r4, r5, r6, r7}
 8572	subs	r12, r12, #1
 8573	bne	L_AES_set_encrypt_key_loop_192
 8574#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8575#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8576	lsl	r0, r7, #24
 8577	lsr	r0, r0, #24
 8578#else
 8579	uxtb	r0, r7
 8580#endif
 8581#else
 8582	ubfx	r0, r7, #0, #8
 8583#endif
 8584#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8585#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8586	lsl	r1, r7, #16
 8587	lsr	r1, r1, #24
 8588#else
 8589	uxtb	r1, r7, ror #8
 8590#endif
 8591#else
 8592	ubfx	r1, r7, #8, #8
 8593#endif
 8594#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8595#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8596	lsl	r4, r7, #8
 8597	lsr	r4, r4, #24
 8598#else
 8599	uxtb	r4, r7, ror #16
 8600#endif
 8601#else
 8602	ubfx	r4, r7, #16, #8
 8603#endif
 8604	lsr	r7, r7, #24
 8605	ldrb	r0, [r8, r0, lsl #2]
 8606	ldrb	r1, [r8, r1, lsl #2]
 8607	ldrb	r4, [r8, r4, lsl #2]
 8608	ldrb	r7, [r8, r7, lsl #2]
 8609	eor	r3, r7, r0, lsl #8
 8610	eor	r3, r3, r1, lsl #16
 8611	eor	r3, r3, r4, lsl #24
 8612	ldm	r2!, {r0, r1, r4, r5, r6, r7}
 8613	eor	r0, r0, r3
 8614	ldm	lr!, {r3}
 8615	eor	r0, r0, r3
 8616	eor	r1, r1, r0
 8617	eor	r4, r4, r1
 8618	eor	r5, r5, r4
 8619	stm	r2, {r0, r1, r4, r5}
 8620	b	L_AES_set_encrypt_key_end
 8621L_AES_set_encrypt_key_start_128:
 8622	ldr	r4, [r0]
 8623	ldr	r5, [r0, #4]
 8624	ldr	r6, [r0, #8]
 8625	ldr	r7, [r0, #12]
 8626#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8627	# REV r4, r4
 8628	eor	r3, r4, r4, ror #16
 8629	bic	r3, r3, #0xff0000
 8630	ror	r4, r4, #8
 8631	eor	r4, r4, r3, lsr #8
 8632	# REV r5, r5
 8633	eor	r3, r5, r5, ror #16
 8634	bic	r3, r3, #0xff0000
 8635	ror	r5, r5, #8
 8636	eor	r5, r5, r3, lsr #8
 8637	# REV r6, r6
 8638	eor	r3, r6, r6, ror #16
 8639	bic	r3, r3, #0xff0000
 8640	ror	r6, r6, #8
 8641	eor	r6, r6, r3, lsr #8
 8642	# REV r7, r7
 8643	eor	r3, r7, r7, ror #16
 8644	bic	r3, r3, #0xff0000
 8645	ror	r7, r7, #8
 8646	eor	r7, r7, r3, lsr #8
 8647#else
 8648	rev	r4, r4
 8649	rev	r5, r5
 8650	rev	r6, r6
 8651	rev	r7, r7
 8652#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
 8653	stm	r2, {r4, r5, r6, r7}
 8654	mov	r12, #10
 8655L_AES_set_encrypt_key_loop_128:
 8656#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8657#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8658	lsl	r4, r7, #24
 8659	lsr	r4, r4, #24
 8660#else
 8661	uxtb	r4, r7
 8662#endif
 8663#else
 8664	ubfx	r4, r7, #0, #8
 8665#endif
 8666#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8667#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8668	lsl	r5, r7, #16
 8669	lsr	r5, r5, #24
 8670#else
 8671	uxtb	r5, r7, ror #8
 8672#endif
 8673#else
 8674	ubfx	r5, r7, #8, #8
 8675#endif
 8676#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8677#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8678	lsl	r6, r7, #8
 8679	lsr	r6, r6, #24
 8680#else
 8681	uxtb	r6, r7, ror #16
 8682#endif
 8683#else
 8684	ubfx	r6, r7, #16, #8
 8685#endif
 8686	lsr	r7, r7, #24
 8687	ldrb	r4, [r8, r4, lsl #2]
 8688	ldrb	r5, [r8, r5, lsl #2]
 8689	ldrb	r6, [r8, r6, lsl #2]
 8690	ldrb	r7, [r8, r7, lsl #2]
 8691	eor	r3, r7, r4, lsl #8
 8692	eor	r3, r3, r5, lsl #16
 8693	eor	r3, r3, r6, lsl #24
 8694	ldm	r2!, {r4, r5, r6, r7}
 8695	eor	r4, r4, r3
 8696	ldm	lr!, {r3}
 8697	eor	r4, r4, r3
 8698	eor	r5, r5, r4
 8699	eor	r6, r6, r5
 8700	eor	r7, r7, r6
 8701	stm	r2, {r4, r5, r6, r7}
 8702	subs	r12, r12, #1
 8703	bne	L_AES_set_encrypt_key_loop_128
 8704L_AES_set_encrypt_key_end:
 8705	pop	{r4, r5, r6, r7, r8, pc}
 8706	.size	AES_set_encrypt_key,.-AES_set_encrypt_key
 8707#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
 8708	.text
 8709	.align	4
 8710	.globl	AES_encrypt_block
 8711	.type	AES_encrypt_block, %function
 8712AES_encrypt_block:
 8713	push	{lr}
 8714L_AES_encrypt_block_nr:
 8715#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8716#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8717	lsl	r8, r5, #8
 8718	lsr	r8, r8, #24
 8719#else
 8720	uxtb	r8, r5, ror #16
 8721#endif
 8722#else
 8723	ubfx	r8, r5, #16, #8
 8724#endif
 8725	lsr	r11, r4, #24
 8726#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8727#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8728	lsl	lr, r6, #16
 8729	lsr	lr, lr, #24
 8730#else
 8731	uxtb	lr, r6, ror #8
 8732#endif
 8733#else
 8734	ubfx	lr, r6, #8, #8
 8735#endif
 8736#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8737#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8738	lsl	r2, r7, #24
 8739	lsr	r2, r2, #24
 8740#else
 8741	uxtb	r2, r7
 8742#endif
 8743#else
 8744	ubfx	r2, r7, #0, #8
 8745#endif
 8746	ldr	r8, [r0, r8, lsl #2]
 8747	ldr	r11, [r0, r11, lsl #2]
 8748	ldr	lr, [r0, lr, lsl #2]
 8749	ldr	r2, [r0, r2, lsl #2]
 8750#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8751#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8752	lsl	r9, r6, #8
 8753	lsr	r9, r9, #24
 8754#else
 8755	uxtb	r9, r6, ror #16
 8756#endif
 8757#else
 8758	ubfx	r9, r6, #16, #8
 8759#endif
 8760	eor	r8, r8, r11, ror #24
 8761	lsr	r11, r5, #24
 8762	eor	r8, r8, lr, ror #8
 8763#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8764#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8765	lsl	lr, r7, #16
 8766	lsr	lr, lr, #24
 8767#else
 8768	uxtb	lr, r7, ror #8
 8769#endif
 8770#else
 8771	ubfx	lr, r7, #8, #8
 8772#endif
 8773	eor	r8, r8, r2, ror #16
 8774#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8775#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8776	lsl	r2, r4, #24
 8777	lsr	r2, r2, #24
 8778#else
 8779	uxtb	r2, r4
 8780#endif
 8781#else
 8782	ubfx	r2, r4, #0, #8
 8783#endif
 8784	ldr	r9, [r0, r9, lsl #2]
 8785	ldr	r11, [r0, r11, lsl #2]
 8786	ldr	lr, [r0, lr, lsl #2]
 8787	ldr	r2, [r0, r2, lsl #2]
 8788#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8789#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8790	lsl	r10, r7, #8
 8791	lsr	r10, r10, #24
 8792#else
 8793	uxtb	r10, r7, ror #16
 8794#endif
 8795#else
 8796	ubfx	r10, r7, #16, #8
 8797#endif
 8798	eor	r9, r9, r11, ror #24
 8799	lsr	r11, r6, #24
 8800	eor	r9, r9, lr, ror #8
 8801#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8802#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8803	lsl	lr, r4, #16
 8804	lsr	lr, lr, #24
 8805#else
 8806	uxtb	lr, r4, ror #8
 8807#endif
 8808#else
 8809	ubfx	lr, r4, #8, #8
 8810#endif
 8811	eor	r9, r9, r2, ror #16
 8812#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8813#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8814	lsl	r2, r5, #24
 8815	lsr	r2, r2, #24
 8816#else
 8817	uxtb	r2, r5
 8818#endif
 8819#else
 8820	ubfx	r2, r5, #0, #8
 8821#endif
 8822	ldr	r10, [r0, r10, lsl #2]
 8823	ldr	r11, [r0, r11, lsl #2]
 8824	ldr	lr, [r0, lr, lsl #2]
 8825	ldr	r2, [r0, r2, lsl #2]
 8826#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8827#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8828	lsl	r6, r6, #24
 8829	lsr	r6, r6, #24
 8830#else
 8831	uxtb	r6, r6
 8832#endif
 8833#else
 8834	ubfx	r6, r6, #0, #8
 8835#endif
 8836	eor	r10, r10, r11, ror #24
 8837#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8838#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8839	lsl	r11, r4, #8
 8840	lsr	r11, r11, #24
 8841#else
 8842	uxtb	r11, r4, ror #16
 8843#endif
 8844#else
 8845	ubfx	r11, r4, #16, #8
 8846#endif
 8847	eor	r10, r10, lr, ror #8
 8848	lsr	lr, r7, #24
 8849	eor	r10, r10, r2, ror #16
 8850#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8851#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8852	lsl	r2, r5, #16
 8853	lsr	r2, r2, #24
 8854#else
 8855	uxtb	r2, r5, ror #8
 8856#endif
 8857#else
 8858	ubfx	r2, r5, #8, #8
 8859#endif
 8860	ldr	r6, [r0, r6, lsl #2]
 8861	ldr	lr, [r0, lr, lsl #2]
 8862	ldr	r11, [r0, r11, lsl #2]
 8863	ldr	r2, [r0, r2, lsl #2]
 8864	eor	lr, lr, r6, ror #24
 8865	ldm	r3!, {r4, r5, r6, r7}
 8866	eor	r11, r11, lr, ror #24
 8867	eor	r11, r11, r2, ror #8
 8868	#   XOR in Key Schedule
 8869	eor	r8, r8, r4
 8870	eor	r9, r9, r5
 8871	eor	r10, r10, r6
 8872	eor	r11, r11, r7
 8873#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8874#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8875	lsl	r4, r9, #8
 8876	lsr	r4, r4, #24
 8877#else
 8878	uxtb	r4, r9, ror #16
 8879#endif
 8880#else
 8881	ubfx	r4, r9, #16, #8
 8882#endif
 8883	lsr	r7, r8, #24
 8884#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8885#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8886	lsl	lr, r10, #16
 8887	lsr	lr, lr, #24
 8888#else
 8889	uxtb	lr, r10, ror #8
 8890#endif
 8891#else
 8892	ubfx	lr, r10, #8, #8
 8893#endif
 8894#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8895#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8896	lsl	r2, r11, #24
 8897	lsr	r2, r2, #24
 8898#else
 8899	uxtb	r2, r11
 8900#endif
 8901#else
 8902	ubfx	r2, r11, #0, #8
 8903#endif
 8904	ldr	r4, [r0, r4, lsl #2]
 8905	ldr	r7, [r0, r7, lsl #2]
 8906	ldr	lr, [r0, lr, lsl #2]
 8907	ldr	r2, [r0, r2, lsl #2]
 8908#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8909#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8910	lsl	r5, r10, #8
 8911	lsr	r5, r5, #24
 8912#else
 8913	uxtb	r5, r10, ror #16
 8914#endif
 8915#else
 8916	ubfx	r5, r10, #16, #8
 8917#endif
 8918	eor	r4, r4, r7, ror #24
 8919	lsr	r7, r9, #24
 8920	eor	r4, r4, lr, ror #8
 8921#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8922#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8923	lsl	lr, r11, #16
 8924	lsr	lr, lr, #24
 8925#else
 8926	uxtb	lr, r11, ror #8
 8927#endif
 8928#else
 8929	ubfx	lr, r11, #8, #8
 8930#endif
 8931	eor	r4, r4, r2, ror #16
 8932#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8933#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8934	lsl	r2, r8, #24
 8935	lsr	r2, r2, #24
 8936#else
 8937	uxtb	r2, r8
 8938#endif
 8939#else
 8940	ubfx	r2, r8, #0, #8
 8941#endif
 8942	ldr	r5, [r0, r5, lsl #2]
 8943	ldr	r7, [r0, r7, lsl #2]
 8944	ldr	lr, [r0, lr, lsl #2]
 8945	ldr	r2, [r0, r2, lsl #2]
 8946#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8947#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8948	lsl	r6, r11, #8
 8949	lsr	r6, r6, #24
 8950#else
 8951	uxtb	r6, r11, ror #16
 8952#endif
 8953#else
 8954	ubfx	r6, r11, #16, #8
 8955#endif
 8956	eor	r5, r5, r7, ror #24
 8957	lsr	r7, r10, #24
 8958	eor	r5, r5, lr, ror #8
 8959#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8960#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8961	lsl	lr, r8, #16
 8962	lsr	lr, lr, #24
 8963#else
 8964	uxtb	lr, r8, ror #8
 8965#endif
 8966#else
 8967	ubfx	lr, r8, #8, #8
 8968#endif
 8969	eor	r5, r5, r2, ror #16
 8970#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8971#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8972	lsl	r2, r9, #24
 8973	lsr	r2, r2, #24
 8974#else
 8975	uxtb	r2, r9
 8976#endif
 8977#else
 8978	ubfx	r2, r9, #0, #8
 8979#endif
 8980	ldr	r6, [r0, r6, lsl #2]
 8981	ldr	r7, [r0, r7, lsl #2]
 8982	ldr	lr, [r0, lr, lsl #2]
 8983	ldr	r2, [r0, r2, lsl #2]
 8984#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8985#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8986	lsl	r10, r10, #24
 8987	lsr	r10, r10, #24
 8988#else
 8989	uxtb	r10, r10
 8990#endif
 8991#else
 8992	ubfx	r10, r10, #0, #8
 8993#endif
 8994	eor	r6, r6, r7, ror #24
 8995#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 8996#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 8997	lsl	r7, r8, #8
 8998	lsr	r7, r7, #24
 8999#else
 9000	uxtb	r7, r8, ror #16
 9001#endif
 9002#else
 9003	ubfx	r7, r8, #16, #8
 9004#endif
 9005	eor	r6, r6, lr, ror #8
 9006	lsr	lr, r11, #24
 9007	eor	r6, r6, r2, ror #16
 9008#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9009#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9010	lsl	r2, r9, #16
 9011	lsr	r2, r2, #24
 9012#else
 9013	uxtb	r2, r9, ror #8
 9014#endif
 9015#else
 9016	ubfx	r2, r9, #8, #8
 9017#endif
 9018	ldr	r10, [r0, r10, lsl #2]
 9019	ldr	lr, [r0, lr, lsl #2]
 9020	ldr	r7, [r0, r7, lsl #2]
 9021	ldr	r2, [r0, r2, lsl #2]
 9022	eor	lr, lr, r10, ror #24
 9023	ldm	r3!, {r8, r9, r10, r11}
 9024	eor	r7, r7, lr, ror #24
 9025	eor	r7, r7, r2, ror #8
 9026	#   XOR in Key Schedule
 9027	eor	r4, r4, r8
 9028	eor	r5, r5, r9
 9029	eor	r6, r6, r10
 9030	eor	r7, r7, r11
 9031	subs	r1, r1, #1
 9032	bne	L_AES_encrypt_block_nr
 9033#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9034#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9035	lsl	r8, r5, #8
 9036	lsr	r8, r8, #24
 9037#else
 9038	uxtb	r8, r5, ror #16
 9039#endif
 9040#else
 9041	ubfx	r8, r5, #16, #8
 9042#endif
 9043	lsr	r11, r4, #24
 9044#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9045#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9046	lsl	lr, r6, #16
 9047	lsr	lr, lr, #24
 9048#else
 9049	uxtb	lr, r6, ror #8
 9050#endif
 9051#else
 9052	ubfx	lr, r6, #8, #8
 9053#endif
 9054#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9055#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9056	lsl	r2, r7, #24
 9057	lsr	r2, r2, #24
 9058#else
 9059	uxtb	r2, r7
 9060#endif
 9061#else
 9062	ubfx	r2, r7, #0, #8
 9063#endif
 9064	ldr	r8, [r0, r8, lsl #2]
 9065	ldr	r11, [r0, r11, lsl #2]
 9066	ldr	lr, [r0, lr, lsl #2]
 9067	ldr	r2, [r0, r2, lsl #2]
 9068#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9069#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9070	lsl	r9, r6, #8
 9071	lsr	r9, r9, #24
 9072#else
 9073	uxtb	r9, r6, ror #16
 9074#endif
 9075#else
 9076	ubfx	r9, r6, #16, #8
 9077#endif
 9078	eor	r8, r8, r11, ror #24
 9079	lsr	r11, r5, #24
 9080	eor	r8, r8, lr, ror #8
 9081#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9082#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9083	lsl	lr, r7, #16
 9084	lsr	lr, lr, #24
 9085#else
 9086	uxtb	lr, r7, ror #8
 9087#endif
 9088#else
 9089	ubfx	lr, r7, #8, #8
 9090#endif
 9091	eor	r8, r8, r2, ror #16
 9092#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9093#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9094	lsl	r2, r4, #24
 9095	lsr	r2, r2, #24
 9096#else
 9097	uxtb	r2, r4
 9098#endif
 9099#else
 9100	ubfx	r2, r4, #0, #8
 9101#endif
 9102	ldr	r9, [r0, r9, lsl #2]
 9103	ldr	r11, [r0, r11, lsl #2]
 9104	ldr	lr, [r0, lr, lsl #2]
 9105	ldr	r2, [r0, r2, lsl #2]
 9106#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9107#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9108	lsl	r10, r7, #8
 9109	lsr	r10, r10, #24
 9110#else
 9111	uxtb	r10, r7, ror #16
 9112#endif
 9113#else
 9114	ubfx	r10, r7, #16, #8
 9115#endif
 9116	eor	r9, r9, r11, ror #24
 9117	lsr	r11, r6, #24
 9118	eor	r9, r9, lr, ror #8
 9119#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9120#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9121	lsl	lr, r4, #16
 9122	lsr	lr, lr, #24
 9123#else
 9124	uxtb	lr, r4, ror #8
 9125#endif
 9126#else
 9127	ubfx	lr, r4, #8, #8
 9128#endif
 9129	eor	r9, r9, r2, ror #16
 9130#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9131#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9132	lsl	r2, r5, #24
 9133	lsr	r2, r2, #24
 9134#else
 9135	uxtb	r2, r5
 9136#endif
 9137#else
 9138	ubfx	r2, r5, #0, #8
 9139#endif
 9140	ldr	r10, [r0, r10, lsl #2]
 9141	ldr	r11, [r0, r11, lsl #2]
 9142	ldr	lr, [r0, lr, lsl #2]
 9143	ldr	r2, [r0, r2, lsl #2]
 9144#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9145#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9146	lsl	r6, r6, #24
 9147	lsr	r6, r6, #24
 9148#else
 9149	uxtb	r6, r6
 9150#endif
 9151#else
 9152	ubfx	r6, r6, #0, #8
 9153#endif
 9154	eor	r10, r10, r11, ror #24
 9155#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9156#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9157	lsl	r11, r4, #8
 9158	lsr	r11, r11, #24
 9159#else
 9160	uxtb	r11, r4, ror #16
 9161#endif
 9162#else
 9163	ubfx	r11, r4, #16, #8
 9164#endif
 9165	eor	r10, r10, lr, ror #8
 9166	lsr	lr, r7, #24
 9167	eor	r10, r10, r2, ror #16
 9168#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9169#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9170	lsl	r2, r5, #16
 9171	lsr	r2, r2, #24
 9172#else
 9173	uxtb	r2, r5, ror #8
 9174#endif
 9175#else
 9176	ubfx	r2, r5, #8, #8
 9177#endif
 9178	ldr	r6, [r0, r6, lsl #2]
 9179	ldr	lr, [r0, lr, lsl #2]
 9180	ldr	r11, [r0, r11, lsl #2]
 9181	ldr	r2, [r0, r2, lsl #2]
 9182	eor	lr, lr, r6, ror #24
 9183	ldm	r3!, {r4, r5, r6, r7}
 9184	eor	r11, r11, lr, ror #24
 9185	eor	r11, r11, r2, ror #8
 9186	#   XOR in Key Schedule
 9187	eor	r8, r8, r4
 9188	eor	r9, r9, r5
 9189	eor	r10, r10, r6
 9190	eor	r11, r11, r7
 9191#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9192#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9193	lsl	r4, r11, #24
 9194	lsr	r4, r4, #24
 9195#else
 9196	uxtb	r4, r11
 9197#endif
 9198#else
 9199	ubfx	r4, r11, #0, #8
 9200#endif
 9201#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9202#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9203	lsl	r7, r10, #16
 9204	lsr	r7, r7, #24
 9205#else
 9206	uxtb	r7, r10, ror #8
 9207#endif
 9208#else
 9209	ubfx	r7, r10, #8, #8
 9210#endif
 9211#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9212#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9213	lsl	lr, r9, #8
 9214	lsr	lr, lr, #24
 9215#else
 9216	uxtb	lr, r9, ror #16
 9217#endif
 9218#else
 9219	ubfx	lr, r9, #16, #8
 9220#endif
 9221	lsr	r2, r8, #24
 9222	ldrb	r4, [r0, r4, lsl #2]
 9223	ldrb	r7, [r0, r7, lsl #2]
 9224	ldrb	lr, [r0, lr, lsl #2]
 9225	ldrb	r2, [r0, r2, lsl #2]
 9226#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9227#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9228	lsl	r5, r8, #24
 9229	lsr	r5, r5, #24
 9230#else
 9231	uxtb	r5, r8
 9232#endif
 9233#else
 9234	ubfx	r5, r8, #0, #8
 9235#endif
 9236	eor	r4, r4, r7, lsl #8
 9237#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9238#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9239	lsl	r7, r11, #16
 9240	lsr	r7, r7, #24
 9241#else
 9242	uxtb	r7, r11, ror #8
 9243#endif
 9244#else
 9245	ubfx	r7, r11, #8, #8
 9246#endif
 9247	eor	r4, r4, lr, lsl #16
 9248#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9249#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9250	lsl	lr, r10, #8
 9251	lsr	lr, lr, #24
 9252#else
 9253	uxtb	lr, r10, ror #16
 9254#endif
 9255#else
 9256	ubfx	lr, r10, #16, #8
 9257#endif
 9258	eor	r4, r4, r2, lsl #24
 9259	lsr	r2, r9, #24
 9260	ldrb	r5, [r0, r5, lsl #2]
 9261	ldrb	r7, [r0, r7, lsl #2]
 9262	ldrb	lr, [r0, lr, lsl #2]
 9263	ldrb	r2, [r0, r2, lsl #2]
 9264#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9265#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9266	lsl	r6, r9, #24
 9267	lsr	r6, r6, #24
 9268#else
 9269	uxtb	r6, r9
 9270#endif
 9271#else
 9272	ubfx	r6, r9, #0, #8
 9273#endif
 9274	eor	r5, r5, r7, lsl #8
 9275#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9276#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9277	lsl	r7, r8, #16
 9278	lsr	r7, r7, #24
 9279#else
 9280	uxtb	r7, r8, ror #8
 9281#endif
 9282#else
 9283	ubfx	r7, r8, #8, #8
 9284#endif
 9285	eor	r5, r5, lr, lsl #16
 9286#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9287#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9288	lsl	lr, r11, #8
 9289	lsr	lr, lr, #24
 9290#else
 9291	uxtb	lr, r11, ror #16
 9292#endif
 9293#else
 9294	ubfx	lr, r11, #16, #8
 9295#endif
 9296	eor	r5, r5, r2, lsl #24
 9297	lsr	r2, r10, #24
 9298	ldrb	r6, [r0, r6, lsl #2]
 9299	ldrb	r7, [r0, r7, lsl #2]
 9300	ldrb	lr, [r0, lr, lsl #2]
 9301	ldrb	r2, [r0, r2, lsl #2]
 9302	lsr	r11, r11, #24
 9303	eor	r6, r6, r7, lsl #8
 9304#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9305#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9306	lsl	r7, r10, #24
 9307	lsr	r7, r7, #24
 9308#else
 9309	uxtb	r7, r10
 9310#endif
 9311#else
 9312	ubfx	r7, r10, #0, #8
 9313#endif
 9314	eor	r6, r6, lr, lsl #16
 9315#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9316#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9317	lsl	lr, r9, #16
 9318	lsr	lr, lr, #24
 9319#else
 9320	uxtb	lr, r9, ror #8
 9321#endif
 9322#else
 9323	ubfx	lr, r9, #8, #8
 9324#endif
 9325	eor	r6, r6, r2, lsl #24
 9326#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9327#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9328	lsl	r2, r8, #8
 9329	lsr	r2, r2, #24
 9330#else
 9331	uxtb	r2, r8, ror #16
 9332#endif
 9333#else
 9334	ubfx	r2, r8, #16, #8
 9335#endif
 9336	ldrb	r11, [r0, r11, lsl #2]
 9337	ldrb	r7, [r0, r7, lsl #2]
 9338	ldrb	lr, [r0, lr, lsl #2]
 9339	ldrb	r2, [r0, r2, lsl #2]
 9340	eor	lr, lr, r11, lsl #16
 9341	ldm	r3, {r8, r9, r10, r11}
 9342	eor	r7, r7, lr, lsl #8
 9343	eor	r7, r7, r2, lsl #16
 9344	#   XOR in Key Schedule
 9345	eor	r4, r4, r8
 9346	eor	r5, r5, r9
 9347	eor	r6, r6, r10
 9348	eor	r7, r7, r11
 9349	pop	{pc}
 9350	.size	AES_encrypt_block,.-AES_encrypt_block
 9351#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
 9352#if defined(HAVE_AESCCM) || defined(HAVE_AESGCM) || \
 9353    defined(WOLFSSL_AES_DIRECT) || defined(WOLFSSL_AES_COUNTER) || \
 9354    defined(HAVE_AES_ECB)
 9355#ifndef __APPLE__
 9356	.text
 9357	.type	L_AES_ARM32_te_ecb, %object
 9358	.size	L_AES_ARM32_te_ecb, 12
 9359#else
 9360	.section	__DATA,__data
 9361#endif /* __APPLE__ */
 9362	# 8-byte aligned, 64-bit aligned
 9363#ifndef __APPLE__
 9364	.align	3
 9365#else
 9366	.p2align	3
 9367#endif /* __APPLE__ */
 9368L_AES_ARM32_te_ecb:
 9369	.long	L_AES_ARM32_te_data
 9370	.text
 9371	.align	4
 9372	.globl	AES_ECB_encrypt
 9373	.type	AES_ECB_encrypt, %function
 9374AES_ECB_encrypt:
 9375	push	{r4, r5, r6, r7, r8, r9, r10, r11, lr}
 9376	mov	lr, r0
 9377	adr	r0, L_AES_ARM32_te_ecb
 9378	ldr	r0, [r0]
 9379	ldr	r12, [sp, #36]
 9380	push	{r3}
 9381	cmp	r12, #10
 9382	beq	L_AES_ECB_encrypt_start_block_128
 9383	cmp	r12, #12
 9384	beq	L_AES_ECB_encrypt_start_block_192
 9385L_AES_ECB_encrypt_loop_block_256:
 9386	ldr	r4, [lr]
 9387	ldr	r5, [lr, #4]
 9388	ldr	r6, [lr, #8]
 9389	ldr	r7, [lr, #12]
 9390#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9391	eor	r8, r4, r4, ror #16
 9392	eor	r9, r5, r5, ror #16
 9393	eor	r10, r6, r6, ror #16
 9394	eor	r11, r7, r7, ror #16
 9395	bic	r8, r8, #0xff0000
 9396	bic	r9, r9, #0xff0000
 9397	bic	r10, r10, #0xff0000
 9398	bic	r11, r11, #0xff0000
 9399	ror	r4, r4, #8
 9400	ror	r5, r5, #8
 9401	ror	r6, r6, #8
 9402	ror	r7, r7, #8
 9403	eor	r4, r4, r8, lsr #8
 9404	eor	r5, r5, r9, lsr #8
 9405	eor	r6, r6, r10, lsr #8
 9406	eor	r7, r7, r11, lsr #8
 9407#else
 9408	rev	r4, r4
 9409	rev	r5, r5
 9410	rev	r6, r6
 9411	rev	r7, r7
 9412#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
 9413	push	{r1, r2, lr}
 9414	ldm	r3!, {r8, r9, r10, r11}
 9415	# Round: 0 - XOR in key schedule
 9416	eor	r4, r4, r8
 9417	eor	r5, r5, r9
 9418	eor	r6, r6, r10
 9419	eor	r7, r7, r11
 9420	mov	r1, #6
 9421#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
 9422	bl	AES_encrypt_block
 9423#else
 9424L_AES_ECB_encrypt_block_nr_256:
 9425#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9426#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9427	lsl	r8, r5, #8
 9428	lsr	r8, r8, #24
 9429#else
 9430	uxtb	r8, r5, ror #16
 9431#endif
 9432#else
 9433	ubfx	r8, r5, #16, #8
 9434#endif
 9435	lsr	r11, r4, #24
 9436#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9437#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9438	lsl	lr, r6, #16
 9439	lsr	lr, lr, #24
 9440#else
 9441	uxtb	lr, r6, ror #8
 9442#endif
 9443#else
 9444	ubfx	lr, r6, #8, #8
 9445#endif
 9446#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9447#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9448	lsl	r2, r7, #24
 9449	lsr	r2, r2, #24
 9450#else
 9451	uxtb	r2, r7
 9452#endif
 9453#else
 9454	ubfx	r2, r7, #0, #8
 9455#endif
 9456	ldr	r8, [r0, r8, lsl #2]
 9457	ldr	r11, [r0, r11, lsl #2]
 9458	ldr	lr, [r0, lr, lsl #2]
 9459	ldr	r2, [r0, r2, lsl #2]
 9460#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9461#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9462	lsl	r9, r6, #8
 9463	lsr	r9, r9, #24
 9464#else
 9465	uxtb	r9, r6, ror #16
 9466#endif
 9467#else
 9468	ubfx	r9, r6, #16, #8
 9469#endif
 9470	eor	r8, r8, r11, ror #24
 9471	lsr	r11, r5, #24
 9472	eor	r8, r8, lr, ror #8
 9473#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9474#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9475	lsl	lr, r7, #16
 9476	lsr	lr, lr, #24
 9477#else
 9478	uxtb	lr, r7, ror #8
 9479#endif
 9480#else
 9481	ubfx	lr, r7, #8, #8
 9482#endif
 9483	eor	r8, r8, r2, ror #16
 9484#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9485#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9486	lsl	r2, r4, #24
 9487	lsr	r2, r2, #24
 9488#else
 9489	uxtb	r2, r4
 9490#endif
 9491#else
 9492	ubfx	r2, r4, #0, #8
 9493#endif
 9494	ldr	r9, [r0, r9, lsl #2]
 9495	ldr	r11, [r0, r11, lsl #2]
 9496	ldr	lr, [r0, lr, lsl #2]
 9497	ldr	r2, [r0, r2, lsl #2]
 9498#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9499#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9500	lsl	r10, r7, #8
 9501	lsr	r10, r10, #24
 9502#else
 9503	uxtb	r10, r7, ror #16
 9504#endif
 9505#else
 9506	ubfx	r10, r7, #16, #8
 9507#endif
 9508	eor	r9, r9, r11, ror #24
 9509	lsr	r11, r6, #24
 9510	eor	r9, r9, lr, ror #8
 9511#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9512#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9513	lsl	lr, r4, #16
 9514	lsr	lr, lr, #24
 9515#else
 9516	uxtb	lr, r4, ror #8
 9517#endif
 9518#else
 9519	ubfx	lr, r4, #8, #8
 9520#endif
 9521	eor	r9, r9, r2, ror #16
 9522#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9523#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9524	lsl	r2, r5, #24
 9525	lsr	r2, r2, #24
 9526#else
 9527	uxtb	r2, r5
 9528#endif
 9529#else
 9530	ubfx	r2, r5, #0, #8
 9531#endif
 9532	ldr	r10, [r0, r10, lsl #2]
 9533	ldr	r11, [r0, r11, lsl #2]
 9534	ldr	lr, [r0, lr, lsl #2]
 9535	ldr	r2, [r0, r2, lsl #2]
 9536#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9537#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9538	lsl	r6, r6, #24
 9539	lsr	r6, r6, #24
 9540#else
 9541	uxtb	r6, r6
 9542#endif
 9543#else
 9544	ubfx	r6, r6, #0, #8
 9545#endif
 9546	eor	r10, r10, r11, ror #24
 9547#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9548#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9549	lsl	r11, r4, #8
 9550	lsr	r11, r11, #24
 9551#else
 9552	uxtb	r11, r4, ror #16
 9553#endif
 9554#else
 9555	ubfx	r11, r4, #16, #8
 9556#endif
 9557	eor	r10, r10, lr, ror #8
 9558	lsr	lr, r7, #24
 9559	eor	r10, r10, r2, ror #16
 9560#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9561#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9562	lsl	r2, r5, #16
 9563	lsr	r2, r2, #24
 9564#else
 9565	uxtb	r2, r5, ror #8
 9566#endif
 9567#else
 9568	ubfx	r2, r5, #8, #8
 9569#endif
 9570	ldr	r6, [r0, r6, lsl #2]
 9571	ldr	lr, [r0, lr, lsl #2]
 9572	ldr	r11, [r0, r11, lsl #2]
 9573	ldr	r2, [r0, r2, lsl #2]
 9574	eor	lr, lr, r6, ror #24
 9575	ldm	r3!, {r4, r5, r6, r7}
 9576	eor	r11, r11, lr, ror #24
 9577	eor	r11, r11, r2, ror #8
 9578	#   XOR in Key Schedule
 9579	eor	r8, r8, r4
 9580	eor	r9, r9, r5
 9581	eor	r10, r10, r6
 9582	eor	r11, r11, r7
 9583#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9584#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9585	lsl	r4, r9, #8
 9586	lsr	r4, r4, #24
 9587#else
 9588	uxtb	r4, r9, ror #16
 9589#endif
 9590#else
 9591	ubfx	r4, r9, #16, #8
 9592#endif
 9593	lsr	r7, r8, #24
 9594#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9595#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9596	lsl	lr, r10, #16
 9597	lsr	lr, lr, #24
 9598#else
 9599	uxtb	lr, r10, ror #8
 9600#endif
 9601#else
 9602	ubfx	lr, r10, #8, #8
 9603#endif
 9604#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9605#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9606	lsl	r2, r11, #24
 9607	lsr	r2, r2, #24
 9608#else
 9609	uxtb	r2, r11
 9610#endif
 9611#else
 9612	ubfx	r2, r11, #0, #8
 9613#endif
 9614	ldr	r4, [r0, r4, lsl #2]
 9615	ldr	r7, [r0, r7, lsl #2]
 9616	ldr	lr, [r0, lr, lsl #2]
 9617	ldr	r2, [r0, r2, lsl #2]
 9618#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9619#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9620	lsl	r5, r10, #8
 9621	lsr	r5, r5, #24
 9622#else
 9623	uxtb	r5, r10, ror #16
 9624#endif
 9625#else
 9626	ubfx	r5, r10, #16, #8
 9627#endif
 9628	eor	r4, r4, r7, ror #24
 9629	lsr	r7, r9, #24
 9630	eor	r4, r4, lr, ror #8
 9631#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9632#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9633	lsl	lr, r11, #16
 9634	lsr	lr, lr, #24
 9635#else
 9636	uxtb	lr, r11, ror #8
 9637#endif
 9638#else
 9639	ubfx	lr, r11, #8, #8
 9640#endif
 9641	eor	r4, r4, r2, ror #16
 9642#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9643#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9644	lsl	r2, r8, #24
 9645	lsr	r2, r2, #24
 9646#else
 9647	uxtb	r2, r8
 9648#endif
 9649#else
 9650	ubfx	r2, r8, #0, #8
 9651#endif
 9652	ldr	r5, [r0, r5, lsl #2]
 9653	ldr	r7, [r0, r7, lsl #2]
 9654	ldr	lr, [r0, lr, lsl #2]
 9655	ldr	r2, [r0, r2, lsl #2]
 9656#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9657#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9658	lsl	r6, r11, #8
 9659	lsr	r6, r6, #24
 9660#else
 9661	uxtb	r6, r11, ror #16
 9662#endif
 9663#else
 9664	ubfx	r6, r11, #16, #8
 9665#endif
 9666	eor	r5, r5, r7, ror #24
 9667	lsr	r7, r10, #24
 9668	eor	r5, r5, lr, ror #8
 9669#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9670#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9671	lsl	lr, r8, #16
 9672	lsr	lr, lr, #24
 9673#else
 9674	uxtb	lr, r8, ror #8
 9675#endif
 9676#else
 9677	ubfx	lr, r8, #8, #8
 9678#endif
 9679	eor	r5, r5, r2, ror #16
 9680#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9681#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9682	lsl	r2, r9, #24
 9683	lsr	r2, r2, #24
 9684#else
 9685	uxtb	r2, r9
 9686#endif
 9687#else
 9688	ubfx	r2, r9, #0, #8
 9689#endif
 9690	ldr	r6, [r0, r6, lsl #2]
 9691	ldr	r7, [r0, r7, lsl #2]
 9692	ldr	lr, [r0, lr, lsl #2]
 9693	ldr	r2, [r0, r2, lsl #2]
 9694#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9695#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9696	lsl	r10, r10, #24
 9697	lsr	r10, r10, #24
 9698#else
 9699	uxtb	r10, r10
 9700#endif
 9701#else
 9702	ubfx	r10, r10, #0, #8
 9703#endif
 9704	eor	r6, r6, r7, ror #24
 9705#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9706#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9707	lsl	r7, r8, #8
 9708	lsr	r7, r7, #24
 9709#else
 9710	uxtb	r7, r8, ror #16
 9711#endif
 9712#else
 9713	ubfx	r7, r8, #16, #8
 9714#endif
 9715	eor	r6, r6, lr, ror #8
 9716	lsr	lr, r11, #24
 9717	eor	r6, r6, r2, ror #16
 9718#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9719#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9720	lsl	r2, r9, #16
 9721	lsr	r2, r2, #24
 9722#else
 9723	uxtb	r2, r9, ror #8
 9724#endif
 9725#else
 9726	ubfx	r2, r9, #8, #8
 9727#endif
 9728	ldr	r10, [r0, r10, lsl #2]
 9729	ldr	lr, [r0, lr, lsl #2]
 9730	ldr	r7, [r0, r7, lsl #2]
 9731	ldr	r2, [r0, r2, lsl #2]
 9732	eor	lr, lr, r10, ror #24
 9733	ldm	r3!, {r8, r9, r10, r11}
 9734	eor	r7, r7, lr, ror #24
 9735	eor	r7, r7, r2, ror #8
 9736	#   XOR in Key Schedule
 9737	eor	r4, r4, r8
 9738	eor	r5, r5, r9
 9739	eor	r6, r6, r10
 9740	eor	r7, r7, r11
 9741	subs	r1, r1, #1
 9742	bne	L_AES_ECB_encrypt_block_nr_256
 9743#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9744#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9745	lsl	r8, r5, #8
 9746	lsr	r8, r8, #24
 9747#else
 9748	uxtb	r8, r5, ror #16
 9749#endif
 9750#else
 9751	ubfx	r8, r5, #16, #8
 9752#endif
 9753	lsr	r11, r4, #24
 9754#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9755#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9756	lsl	lr, r6, #16
 9757	lsr	lr, lr, #24
 9758#else
 9759	uxtb	lr, r6, ror #8
 9760#endif
 9761#else
 9762	ubfx	lr, r6, #8, #8
 9763#endif
 9764#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9765#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9766	lsl	r2, r7, #24
 9767	lsr	r2, r2, #24
 9768#else
 9769	uxtb	r2, r7
 9770#endif
 9771#else
 9772	ubfx	r2, r7, #0, #8
 9773#endif
 9774	ldr	r8, [r0, r8, lsl #2]
 9775	ldr	r11, [r0, r11, lsl #2]
 9776	ldr	lr, [r0, lr, lsl #2]
 9777	ldr	r2, [r0, r2, lsl #2]
 9778#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9779#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9780	lsl	r9, r6, #8
 9781	lsr	r9, r9, #24
 9782#else
 9783	uxtb	r9, r6, ror #16
 9784#endif
 9785#else
 9786	ubfx	r9, r6, #16, #8
 9787#endif
 9788	eor	r8, r8, r11, ror #24
 9789	lsr	r11, r5, #24
 9790	eor	r8, r8, lr, ror #8
 9791#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9792#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9793	lsl	lr, r7, #16
 9794	lsr	lr, lr, #24
 9795#else
 9796	uxtb	lr, r7, ror #8
 9797#endif
 9798#else
 9799	ubfx	lr, r7, #8, #8
 9800#endif
 9801	eor	r8, r8, r2, ror #16
 9802#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9803#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9804	lsl	r2, r4, #24
 9805	lsr	r2, r2, #24
 9806#else
 9807	uxtb	r2, r4
 9808#endif
 9809#else
 9810	ubfx	r2, r4, #0, #8
 9811#endif
 9812	ldr	r9, [r0, r9, lsl #2]
 9813	ldr	r11, [r0, r11, lsl #2]
 9814	ldr	lr, [r0, lr, lsl #2]
 9815	ldr	r2, [r0, r2, lsl #2]
 9816#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9817#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9818	lsl	r10, r7, #8
 9819	lsr	r10, r10, #24
 9820#else
 9821	uxtb	r10, r7, ror #16
 9822#endif
 9823#else
 9824	ubfx	r10, r7, #16, #8
 9825#endif
 9826	eor	r9, r9, r11, ror #24
 9827	lsr	r11, r6, #24
 9828	eor	r9, r9, lr, ror #8
 9829#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9830#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9831	lsl	lr, r4, #16
 9832	lsr	lr, lr, #24
 9833#else
 9834	uxtb	lr, r4, ror #8
 9835#endif
 9836#else
 9837	ubfx	lr, r4, #8, #8
 9838#endif
 9839	eor	r9, r9, r2, ror #16
 9840#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9841#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9842	lsl	r2, r5, #24
 9843	lsr	r2, r2, #24
 9844#else
 9845	uxtb	r2, r5
 9846#endif
 9847#else
 9848	ubfx	r2, r5, #0, #8
 9849#endif
 9850	ldr	r10, [r0, r10, lsl #2]
 9851	ldr	r11, [r0, r11, lsl #2]
 9852	ldr	lr, [r0, lr, lsl #2]
 9853	ldr	r2, [r0, r2, lsl #2]
 9854#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9855#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9856	lsl	r6, r6, #24
 9857	lsr	r6, r6, #24
 9858#else
 9859	uxtb	r6, r6
 9860#endif
 9861#else
 9862	ubfx	r6, r6, #0, #8
 9863#endif
 9864	eor	r10, r10, r11, ror #24
 9865#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9866#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9867	lsl	r11, r4, #8
 9868	lsr	r11, r11, #24
 9869#else
 9870	uxtb	r11, r4, ror #16
 9871#endif
 9872#else
 9873	ubfx	r11, r4, #16, #8
 9874#endif
 9875	eor	r10, r10, lr, ror #8
 9876	lsr	lr, r7, #24
 9877	eor	r10, r10, r2, ror #16
 9878#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9879#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9880	lsl	r2, r5, #16
 9881	lsr	r2, r2, #24
 9882#else
 9883	uxtb	r2, r5, ror #8
 9884#endif
 9885#else
 9886	ubfx	r2, r5, #8, #8
 9887#endif
 9888	ldr	r6, [r0, r6, lsl #2]
 9889	ldr	lr, [r0, lr, lsl #2]
 9890	ldr	r11, [r0, r11, lsl #2]
 9891	ldr	r2, [r0, r2, lsl #2]
 9892	eor	lr, lr, r6, ror #24
 9893	ldm	r3!, {r4, r5, r6, r7}
 9894	eor	r11, r11, lr, ror #24
 9895	eor	r11, r11, r2, ror #8
 9896	#   XOR in Key Schedule
 9897	eor	r8, r8, r4
 9898	eor	r9, r9, r5
 9899	eor	r10, r10, r6
 9900	eor	r11, r11, r7
 9901#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9902#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9903	lsl	r4, r11, #24
 9904	lsr	r4, r4, #24
 9905#else
 9906	uxtb	r4, r11
 9907#endif
 9908#else
 9909	ubfx	r4, r11, #0, #8
 9910#endif
 9911#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9912#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9913	lsl	r7, r10, #16
 9914	lsr	r7, r7, #24
 9915#else
 9916	uxtb	r7, r10, ror #8
 9917#endif
 9918#else
 9919	ubfx	r7, r10, #8, #8
 9920#endif
 9921#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9922#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9923	lsl	lr, r9, #8
 9924	lsr	lr, lr, #24
 9925#else
 9926	uxtb	lr, r9, ror #16
 9927#endif
 9928#else
 9929	ubfx	lr, r9, #16, #8
 9930#endif
 9931	lsr	r2, r8, #24
 9932	ldrb	r4, [r0, r4, lsl #2]
 9933	ldrb	r7, [r0, r7, lsl #2]
 9934	ldrb	lr, [r0, lr, lsl #2]
 9935	ldrb	r2, [r0, r2, lsl #2]
 9936#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9937#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9938	lsl	r5, r8, #24
 9939	lsr	r5, r5, #24
 9940#else
 9941	uxtb	r5, r8
 9942#endif
 9943#else
 9944	ubfx	r5, r8, #0, #8
 9945#endif
 9946	eor	r4, r4, r7, lsl #8
 9947#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9948#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9949	lsl	r7, r11, #16
 9950	lsr	r7, r7, #24
 9951#else
 9952	uxtb	r7, r11, ror #8
 9953#endif
 9954#else
 9955	ubfx	r7, r11, #8, #8
 9956#endif
 9957	eor	r4, r4, lr, lsl #16
 9958#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9959#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9960	lsl	lr, r10, #8
 9961	lsr	lr, lr, #24
 9962#else
 9963	uxtb	lr, r10, ror #16
 9964#endif
 9965#else
 9966	ubfx	lr, r10, #16, #8
 9967#endif
 9968	eor	r4, r4, r2, lsl #24
 9969	lsr	r2, r9, #24
 9970	ldrb	r5, [r0, r5, lsl #2]
 9971	ldrb	r7, [r0, r7, lsl #2]
 9972	ldrb	lr, [r0, lr, lsl #2]
 9973	ldrb	r2, [r0, r2, lsl #2]
 9974#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9975#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9976	lsl	r6, r9, #24
 9977	lsr	r6, r6, #24
 9978#else
 9979	uxtb	r6, r9
 9980#endif
 9981#else
 9982	ubfx	r6, r9, #0, #8
 9983#endif
 9984	eor	r5, r5, r7, lsl #8
 9985#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9986#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9987	lsl	r7, r8, #16
 9988	lsr	r7, r7, #24
 9989#else
 9990	uxtb	r7, r8, ror #8
 9991#endif
 9992#else
 9993	ubfx	r7, r8, #8, #8
 9994#endif
 9995	eor	r5, r5, lr, lsl #16
 9996#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 9997#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 9998	lsl	lr, r11, #8
 9999	lsr	lr, lr, #24
10000#else
10001	uxtb	lr, r11, ror #16
10002#endif
10003#else
10004	ubfx	lr, r11, #16, #8
10005#endif
10006	eor	r5, r5, r2, lsl #24
10007	lsr	r2, r10, #24
10008	ldrb	r6, [r0, r6, lsl #2]
10009	ldrb	r7, [r0, r7, lsl #2]
10010	ldrb	lr, [r0, lr, lsl #2]
10011	ldrb	r2, [r0, r2, lsl #2]
10012	lsr	r11, r11, #24
10013	eor	r6, r6, r7, lsl #8
10014#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10015#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10016	lsl	r7, r10, #24
10017	lsr	r7, r7, #24
10018#else
10019	uxtb	r7, r10
10020#endif
10021#else
10022	ubfx	r7, r10, #0, #8
10023#endif
10024	eor	r6, r6, lr, lsl #16
10025#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10026#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10027	lsl	lr, r9, #16
10028	lsr	lr, lr, #24
10029#else
10030	uxtb	lr, r9, ror #8
10031#endif
10032#else
10033	ubfx	lr, r9, #8, #8
10034#endif
10035	eor	r6, r6, r2, lsl #24
10036#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10037#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10038	lsl	r2, r8, #8
10039	lsr	r2, r2, #24
10040#else
10041	uxtb	r2, r8, ror #16
10042#endif
10043#else
10044	ubfx	r2, r8, #16, #8
10045#endif
10046	ldrb	r11, [r0, r11, lsl #2]
10047	ldrb	r7, [r0, r7, lsl #2]
10048	ldrb	lr, [r0, lr, lsl #2]
10049	ldrb	r2, [r0, r2, lsl #2]
10050	eor	lr, lr, r11, lsl #16
10051	ldm	r3, {r8, r9, r10, r11}
10052	eor	r7, r7, lr, lsl #8
10053	eor	r7, r7, r2, lsl #16
10054	#   XOR in Key Schedule
10055	eor	r4, r4, r8
10056	eor	r5, r5, r9
10057	eor	r6, r6, r10
10058	eor	r7, r7, r11
10059#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
10060	pop	{r1, r2, lr}
10061	ldr	r3, [sp]
10062#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10063	eor	r8, r4, r4, ror #16
10064	eor	r9, r5, r5, ror #16
10065	eor	r10, r6, r6, ror #16
10066	eor	r11, r7, r7, ror #16
10067	bic	r8, r8, #0xff0000
10068	bic	r9, r9, #0xff0000
10069	bic	r10, r10, #0xff0000
10070	bic	r11, r11, #0xff0000
10071	ror	r4, r4, #8
10072	ror	r5, r5, #8
10073	ror	r6, r6, #8
10074	ror	r7, r7, #8
10075	eor	r4, r4, r8, lsr #8
10076	eor	r5, r5, r9, lsr #8
10077	eor	r6, r6, r10, lsr #8
10078	eor	r7, r7, r11, lsr #8
10079#else
10080	rev	r4, r4
10081	rev	r5, r5
10082	rev	r6, r6
10083	rev	r7, r7
10084#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
10085	str	r4, [r1]
10086	str	r5, [r1, #4]
10087	str	r6, [r1, #8]
10088	str	r7, [r1, #12]
10089	subs	r2, r2, #16
10090	add	lr, lr, #16
10091	add	r1, r1, #16
10092	bne	L_AES_ECB_encrypt_loop_block_256
10093	b	L_AES_ECB_encrypt_end
10094L_AES_ECB_encrypt_start_block_192:
10095L_AES_ECB_encrypt_loop_block_192:
10096	ldr	r4, [lr]
10097	ldr	r5, [lr, #4]
10098	ldr	r6, [lr, #8]
10099	ldr	r7, [lr, #12]
10100#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10101	eor	r8, r4, r4, ror #16
10102	eor	r9, r5, r5, ror #16
10103	eor	r10, r6, r6, ror #16
10104	eor	r11, r7, r7, ror #16
10105	bic	r8, r8, #0xff0000
10106	bic	r9, r9, #0xff0000
10107	bic	r10, r10, #0xff0000
10108	bic	r11, r11, #0xff0000
10109	ror	r4, r4, #8
10110	ror	r5, r5, #8
10111	ror	r6, r6, #8
10112	ror	r7, r7, #8
10113	eor	r4, r4, r8, lsr #8
10114	eor	r5, r5, r9, lsr #8
10115	eor	r6, r6, r10, lsr #8
10116	eor	r7, r7, r11, lsr #8
10117#else
10118	rev	r4, r4
10119	rev	r5, r5
10120	rev	r6, r6
10121	rev	r7, r7
10122#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
10123	push	{r1, r2, lr}
10124	ldm	r3!, {r8, r9, r10, r11}
10125	# Round: 0 - XOR in key schedule
10126	eor	r4, r4, r8
10127	eor	r5, r5, r9
10128	eor	r6, r6, r10
10129	eor	r7, r7, r11
10130	mov	r1, #5
10131#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
10132	bl	AES_encrypt_block
10133#else
10134L_AES_ECB_encrypt_block_nr_192:
10135#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10136#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10137	lsl	r8, r5, #8
10138	lsr	r8, r8, #24
10139#else
10140	uxtb	r8, r5, ror #16
10141#endif
10142#else
10143	ubfx	r8, r5, #16, #8
10144#endif
10145	lsr	r11, r4, #24
10146#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10147#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10148	lsl	lr, r6, #16
10149	lsr	lr, lr, #24
10150#else
10151	uxtb	lr, r6, ror #8
10152#endif
10153#else
10154	ubfx	lr, r6, #8, #8
10155#endif
10156#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10157#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10158	lsl	r2, r7, #24
10159	lsr	r2, r2, #24
10160#else
10161	uxtb	r2, r7
10162#endif
10163#else
10164	ubfx	r2, r7, #0, #8
10165#endif
10166	ldr	r8, [r0, r8, lsl #2]
10167	ldr	r11, [r0, r11, lsl #2]
10168	ldr	lr, [r0, lr, lsl #2]
10169	ldr	r2, [r0, r2, lsl #2]
10170#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10171#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10172	lsl	r9, r6, #8
10173	lsr	r9, r9, #24
10174#else
10175	uxtb	r9, r6, ror #16
10176#endif
10177#else
10178	ubfx	r9, r6, #16, #8
10179#endif
10180	eor	r8, r8, r11, ror #24
10181	lsr	r11, r5, #24
10182	eor	r8, r8, lr, ror #8
10183#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10184#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10185	lsl	lr, r7, #16
10186	lsr	lr, lr, #24
10187#else
10188	uxtb	lr, r7, ror #8
10189#endif
10190#else
10191	ubfx	lr, r7, #8, #8
10192#endif
10193	eor	r8, r8, r2, ror #16
10194#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10195#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10196	lsl	r2, r4, #24
10197	lsr	r2, r2, #24
10198#else
10199	uxtb	r2, r4
10200#endif
10201#else
10202	ubfx	r2, r4, #0, #8
10203#endif
10204	ldr	r9, [r0, r9, lsl #2]
10205	ldr	r11, [r0, r11, lsl #2]
10206	ldr	lr, [r0, lr, lsl #2]
10207	ldr	r2, [r0, r2, lsl #2]
10208#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10209#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10210	lsl	r10, r7, #8
10211	lsr	r10, r10, #24
10212#else
10213	uxtb	r10, r7, ror #16
10214#endif
10215#else
10216	ubfx	r10, r7, #16, #8
10217#endif
10218	eor	r9, r9, r11, ror #24
10219	lsr	r11, r6, #24
10220	eor	r9, r9, lr, ror #8
10221#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10222#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10223	lsl	lr, r4, #16
10224	lsr	lr, lr, #24
10225#else
10226	uxtb	lr, r4, ror #8
10227#endif
10228#else
10229	ubfx	lr, r4, #8, #8
10230#endif
10231	eor	r9, r9, r2, ror #16
10232#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10233#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10234	lsl	r2, r5, #24
10235	lsr	r2, r2, #24
10236#else
10237	uxtb	r2, r5
10238#endif
10239#else
10240	ubfx	r2, r5, #0, #8
10241#endif
10242	ldr	r10, [r0, r10, lsl #2]
10243	ldr	r11, [r0, r11, lsl #2]
10244	ldr	lr, [r0, lr, lsl #2]
10245	ldr	r2, [r0, r2, lsl #2]
10246#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10247#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10248	lsl	r6, r6, #24
10249	lsr	r6, r6, #24
10250#else
10251	uxtb	r6, r6
10252#endif
10253#else
10254	ubfx	r6, r6, #0, #8
10255#endif
10256	eor	r10, r10, r11, ror #24
10257#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10258#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10259	lsl	r11, r4, #8
10260	lsr	r11, r11, #24
10261#else
10262	uxtb	r11, r4, ror #16
10263#endif
10264#else
10265	ubfx	r11, r4, #16, #8
10266#endif
10267	eor	r10, r10, lr, ror #8
10268	lsr	lr, r7, #24
10269	eor	r10, r10, r2, ror #16
10270#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10271#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10272	lsl	r2, r5, #16
10273	lsr	r2, r2, #24
10274#else
10275	uxtb	r2, r5, ror #8
10276#endif
10277#else
10278	ubfx	r2, r5, #8, #8
10279#endif
10280	ldr	r6, [r0, r6, lsl #2]
10281	ldr	lr, [r0, lr, lsl #2]
10282	ldr	r11, [r0, r11, lsl #2]
10283	ldr	r2, [r0, r2, lsl #2]
10284	eor	lr, lr, r6, ror #24
10285	ldm	r3!, {r4, r5, r6, r7}
10286	eor	r11, r11, lr, ror #24
10287	eor	r11, r11, r2, ror #8
10288	#   XOR in Key Schedule
10289	eor	r8, r8, r4
10290	eor	r9, r9, r5
10291	eor	r10, r10, r6
10292	eor	r11, r11, r7
10293#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10294#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10295	lsl	r4, r9, #8
10296	lsr	r4, r4, #24
10297#else
10298	uxtb	r4, r9, ror #16
10299#endif
10300#else
10301	ubfx	r4, r9, #16, #8
10302#endif
10303	lsr	r7, r8, #24
10304#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10305#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10306	lsl	lr, r10, #16
10307	lsr	lr, lr, #24
10308#else
10309	uxtb	lr, r10, ror #8
10310#endif
10311#else
10312	ubfx	lr, r10, #8, #8
10313#endif
10314#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10315#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10316	lsl	r2, r11, #24
10317	lsr	r2, r2, #24
10318#else
10319	uxtb	r2, r11
10320#endif
10321#else
10322	ubfx	r2, r11, #0, #8
10323#endif
10324	ldr	r4, [r0, r4, lsl #2]
10325	ldr	r7, [r0, r7, lsl #2]
10326	ldr	lr, [r0, lr, lsl #2]
10327	ldr	r2, [r0, r2, lsl #2]
10328#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10329#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10330	lsl	r5, r10, #8
10331	lsr	r5, r5, #24
10332#else
10333	uxtb	r5, r10, ror #16
10334#endif
10335#else
10336	ubfx	r5, r10, #16, #8
10337#endif
10338	eor	r4, r4, r7, ror #24
10339	lsr	r7, r9, #24
10340	eor	r4, r4, lr, ror #8
10341#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10342#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10343	lsl	lr, r11, #16
10344	lsr	lr, lr, #24
10345#else
10346	uxtb	lr, r11, ror #8
10347#endif
10348#else
10349	ubfx	lr, r11, #8, #8
10350#endif
10351	eor	r4, r4, r2, ror #16
10352#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10353#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10354	lsl	r2, r8, #24
10355	lsr	r2, r2, #24
10356#else
10357	uxtb	r2, r8
10358#endif
10359#else
10360	ubfx	r2, r8, #0, #8
10361#endif
10362	ldr	r5, [r0, r5, lsl #2]
10363	ldr	r7, [r0, r7, lsl #2]
10364	ldr	lr, [r0, lr, lsl #2]
10365	ldr	r2, [r0, r2, lsl #2]
10366#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10367#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10368	lsl	r6, r11, #8
10369	lsr	r6, r6, #24
10370#else
10371	uxtb	r6, r11, ror #16
10372#endif
10373#else
10374	ubfx	r6, r11, #16, #8
10375#endif
10376	eor	r5, r5, r7, ror #24
10377	lsr	r7, r10, #24
10378	eor	r5, r5, lr, ror #8
10379#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10380#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10381	lsl	lr, r8, #16
10382	lsr	lr, lr, #24
10383#else
10384	uxtb	lr, r8, ror #8
10385#endif
10386#else
10387	ubfx	lr, r8, #8, #8
10388#endif
10389	eor	r5, r5, r2, ror #16
10390#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10391#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10392	lsl	r2, r9, #24
10393	lsr	r2, r2, #24
10394#else
10395	uxtb	r2, r9
10396#endif
10397#else
10398	ubfx	r2, r9, #0, #8
10399#endif
10400	ldr	r6, [r0, r6, lsl #2]
10401	ldr	r7, [r0, r7, lsl #2]
10402	ldr	lr, [r0, lr, lsl #2]
10403	ldr	r2, [r0, r2, lsl #2]
10404#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10405#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10406	lsl	r10, r10, #24
10407	lsr	r10, r10, #24
10408#else
10409	uxtb	r10, r10
10410#endif
10411#else
10412	ubfx	r10, r10, #0, #8
10413#endif
10414	eor	r6, r6, r7, ror #24
10415#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10416#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10417	lsl	r7, r8, #8
10418	lsr	r7, r7, #24
10419#else
10420	uxtb	r7, r8, ror #16
10421#endif
10422#else
10423	ubfx	r7, r8, #16, #8
10424#endif
10425	eor	r6, r6, lr, ror #8
10426	lsr	lr, r11, #24
10427	eor	r6, r6, r2, ror #16
10428#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10429#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10430	lsl	r2, r9, #16
10431	lsr	r2, r2, #24
10432#else
10433	uxtb	r2, r9, ror #8
10434#endif
10435#else
10436	ubfx	r2, r9, #8, #8
10437#endif
10438	ldr	r10, [r0, r10, lsl #2]
10439	ldr	lr, [r0, lr, lsl #2]
10440	ldr	r7, [r0, r7, lsl #2]
10441	ldr	r2, [r0, r2, lsl #2]
10442	eor	lr, lr, r10, ror #24
10443	ldm	r3!, {r8, r9, r10, r11}
10444	eor	r7, r7, lr, ror #24
10445	eor	r7, r7, r2, ror #8
10446	#   XOR in Key Schedule
10447	eor	r4, r4, r8
10448	eor	r5, r5, r9
10449	eor	r6, r6, r10
10450	eor	r7, r7, r11
10451	subs	r1, r1, #1
10452	bne	L_AES_ECB_encrypt_block_nr_192
10453#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10454#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10455	lsl	r8, r5, #8
10456	lsr	r8, r8, #24
10457#else
10458	uxtb	r8, r5, ror #16
10459#endif
10460#else
10461	ubfx	r8, r5, #16, #8
10462#endif
10463	lsr	r11, r4, #24
10464#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10465#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10466	lsl	lr, r6, #16
10467	lsr	lr, lr, #24
10468#else
10469	uxtb	lr, r6, ror #8
10470#endif
10471#else
10472	ubfx	lr, r6, #8, #8
10473#endif
10474#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10475#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10476	lsl	r2, r7, #24
10477	lsr	r2, r2, #24
10478#else
10479	uxtb	r2, r7
10480#endif
10481#else
10482	ubfx	r2, r7, #0, #8
10483#endif
10484	ldr	r8, [r0, r8, lsl #2]
10485	ldr	r11, [r0, r11, lsl #2]
10486	ldr	lr, [r0, lr, lsl #2]
10487	ldr	r2, [r0, r2, lsl #2]
10488#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10489#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10490	lsl	r9, r6, #8
10491	lsr	r9, r9, #24
10492#else
10493	uxtb	r9, r6, ror #16
10494#endif
10495#else
10496	ubfx	r9, r6, #16, #8
10497#endif
10498	eor	r8, r8, r11, ror #24
10499	lsr	r11, r5, #24
10500	eor	r8, r8, lr, ror #8
10501#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10502#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10503	lsl	lr, r7, #16
10504	lsr	lr, lr, #24
10505#else
10506	uxtb	lr, r7, ror #8
10507#endif
10508#else
10509	ubfx	lr, r7, #8, #8
10510#endif
10511	eor	r8, r8, r2, ror #16
10512#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10513#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10514	lsl	r2, r4, #24
10515	lsr	r2, r2, #24
10516#else
10517	uxtb	r2, r4
10518#endif
10519#else
10520	ubfx	r2, r4, #0, #8
10521#endif
10522	ldr	r9, [r0, r9, lsl #2]
10523	ldr	r11, [r0, r11, lsl #2]
10524	ldr	lr, [r0, lr, lsl #2]
10525	ldr	r2, [r0, r2, lsl #2]
10526#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10527#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10528	lsl	r10, r7, #8
10529	lsr	r10, r10, #24
10530#else
10531	uxtb	r10, r7, ror #16
10532#endif
10533#else
10534	ubfx	r10, r7, #16, #8
10535#endif
10536	eor	r9, r9, r11, ror #24
10537	lsr	r11, r6, #24
10538	eor	r9, r9, lr, ror #8
10539#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10540#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10541	lsl	lr, r4, #16
10542	lsr	lr, lr, #24
10543#else
10544	uxtb	lr, r4, ror #8
10545#endif
10546#else
10547	ubfx	lr, r4, #8, #8
10548#endif
10549	eor	r9, r9, r2, ror #16
10550#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10551#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10552	lsl	r2, r5, #24
10553	lsr	r2, r2, #24
10554#else
10555	uxtb	r2, r5
10556#endif
10557#else
10558	ubfx	r2, r5, #0, #8
10559#endif
10560	ldr	r10, [r0, r10, lsl #2]
10561	ldr	r11, [r0, r11, lsl #2]
10562	ldr	lr, [r0, lr, lsl #2]
10563	ldr	r2, [r0, r2, lsl #2]
10564#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10565#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10566	lsl	r6, r6, #24
10567	lsr	r6, r6, #24
10568#else
10569	uxtb	r6, r6
10570#endif
10571#else
10572	ubfx	r6, r6, #0, #8
10573#endif
10574	eor	r10, r10, r11, ror #24
10575#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10576#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10577	lsl	r11, r4, #8
10578	lsr	r11, r11, #24
10579#else
10580	uxtb	r11, r4, ror #16
10581#endif
10582#else
10583	ubfx	r11, r4, #16, #8
10584#endif
10585	eor	r10, r10, lr, ror #8
10586	lsr	lr, r7, #24
10587	eor	r10, r10, r2, ror #16
10588#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10589#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10590	lsl	r2, r5, #16
10591	lsr	r2, r2, #24
10592#else
10593	uxtb	r2, r5, ror #8
10594#endif
10595#else
10596	ubfx	r2, r5, #8, #8
10597#endif
10598	ldr	r6, [r0, r6, lsl #2]
10599	ldr	lr, [r0, lr, lsl #2]
10600	ldr	r11, [r0, r11, lsl #2]
10601	ldr	r2, [r0, r2, lsl #2]
10602	eor	lr, lr, r6, ror #24
10603	ldm	r3!, {r4, r5, r6, r7}
10604	eor	r11, r11, lr, ror #24
10605	eor	r11, r11, r2, ror #8
10606	#   XOR in Key Schedule
10607	eor	r8, r8, r4
10608	eor	r9, r9, r5
10609	eor	r10, r10, r6
10610	eor	r11, r11, r7
10611#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10612#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10613	lsl	r4, r11, #24
10614	lsr	r4, r4, #24
10615#else
10616	uxtb	r4, r11
10617#endif
10618#else
10619	ubfx	r4, r11, #0, #8
10620#endif
10621#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10622#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10623	lsl	r7, r10, #16
10624	lsr	r7, r7, #24
10625#else
10626	uxtb	r7, r10, ror #8
10627#endif
10628#else
10629	ubfx	r7, r10, #8, #8
10630#endif
10631#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10632#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10633	lsl	lr, r9, #8
10634	lsr	lr, lr, #24
10635#else
10636	uxtb	lr, r9, ror #16
10637#endif
10638#else
10639	ubfx	lr, r9, #16, #8
10640#endif
10641	lsr	r2, r8, #24
10642	ldrb	r4, [r0, r4, lsl #2]
10643	ldrb	r7, [r0, r7, lsl #2]
10644	ldrb	lr, [r0, lr, lsl #2]
10645	ldrb	r2, [r0, r2, lsl #2]
10646#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10647#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10648	lsl	r5, r8, #24
10649	lsr	r5, r5, #24
10650#else
10651	uxtb	r5, r8
10652#endif
10653#else
10654	ubfx	r5, r8, #0, #8
10655#endif
10656	eor	r4, r4, r7, lsl #8
10657#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10658#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10659	lsl	r7, r11, #16
10660	lsr	r7, r7, #24
10661#else
10662	uxtb	r7, r11, ror #8
10663#endif
10664#else
10665	ubfx	r7, r11, #8, #8
10666#endif
10667	eor	r4, r4, lr, lsl #16
10668#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10669#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10670	lsl	lr, r10, #8
10671	lsr	lr, lr, #24
10672#else
10673	uxtb	lr, r10, ror #16
10674#endif
10675#else
10676	ubfx	lr, r10, #16, #8
10677#endif
10678	eor	r4, r4, r2, lsl #24
10679	lsr	r2, r9, #24
10680	ldrb	r5, [r0, r5, lsl #2]
10681	ldrb	r7, [r0, r7, lsl #2]
10682	ldrb	lr, [r0, lr, lsl #2]
10683	ldrb	r2, [r0, r2, lsl #2]
10684#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10685#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10686	lsl	r6, r9, #24
10687	lsr	r6, r6, #24
10688#else
10689	uxtb	r6, r9
10690#endif
10691#else
10692	ubfx	r6, r9, #0, #8
10693#endif
10694	eor	r5, r5, r7, lsl #8
10695#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10696#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10697	lsl	r7, r8, #16
10698	lsr	r7, r7, #24
10699#else
10700	uxtb	r7, r8, ror #8
10701#endif
10702#else
10703	ubfx	r7, r8, #8, #8
10704#endif
10705	eor	r5, r5, lr, lsl #16
10706#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10707#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10708	lsl	lr, r11, #8
10709	lsr	lr, lr, #24
10710#else
10711	uxtb	lr, r11, ror #16
10712#endif
10713#else
10714	ubfx	lr, r11, #16, #8
10715#endif
10716	eor	r5, r5, r2, lsl #24
10717	lsr	r2, r10, #24
10718	ldrb	r6, [r0, r6, lsl #2]
10719	ldrb	r7, [r0, r7, lsl #2]
10720	ldrb	lr, [r0, lr, lsl #2]
10721	ldrb	r2, [r0, r2, lsl #2]
10722	lsr	r11, r11, #24
10723	eor	r6, r6, r7, lsl #8
10724#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10725#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10726	lsl	r7, r10, #24
10727	lsr	r7, r7, #24
10728#else
10729	uxtb	r7, r10
10730#endif
10731#else
10732	ubfx	r7, r10, #0, #8
10733#endif
10734	eor	r6, r6, lr, lsl #16
10735#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10736#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10737	lsl	lr, r9, #16
10738	lsr	lr, lr, #24
10739#else
10740	uxtb	lr, r9, ror #8
10741#endif
10742#else
10743	ubfx	lr, r9, #8, #8
10744#endif
10745	eor	r6, r6, r2, lsl #24
10746#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10747#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10748	lsl	r2, r8, #8
10749	lsr	r2, r2, #24
10750#else
10751	uxtb	r2, r8, ror #16
10752#endif
10753#else
10754	ubfx	r2, r8, #16, #8
10755#endif
10756	ldrb	r11, [r0, r11, lsl #2]
10757	ldrb	r7, [r0, r7, lsl #2]
10758	ldrb	lr, [r0, lr, lsl #2]
10759	ldrb	r2, [r0, r2, lsl #2]
10760	eor	lr, lr, r11, lsl #16
10761	ldm	r3, {r8, r9, r10, r11}
10762	eor	r7, r7, lr, lsl #8
10763	eor	r7, r7, r2, lsl #16
10764	#   XOR in Key Schedule
10765	eor	r4, r4, r8
10766	eor	r5, r5, r9
10767	eor	r6, r6, r10
10768	eor	r7, r7, r11
10769#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
10770	pop	{r1, r2, lr}
10771	ldr	r3, [sp]
10772#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10773	eor	r8, r4, r4, ror #16
10774	eor	r9, r5, r5, ror #16
10775	eor	r10, r6, r6, ror #16
10776	eor	r11, r7, r7, ror #16
10777	bic	r8, r8, #0xff0000
10778	bic	r9, r9, #0xff0000
10779	bic	r10, r10, #0xff0000
10780	bic	r11, r11, #0xff0000
10781	ror	r4, r4, #8
10782	ror	r5, r5, #8
10783	ror	r6, r6, #8
10784	ror	r7, r7, #8
10785	eor	r4, r4, r8, lsr #8
10786	eor	r5, r5, r9, lsr #8
10787	eor	r6, r6, r10, lsr #8
10788	eor	r7, r7, r11, lsr #8
10789#else
10790	rev	r4, r4
10791	rev	r5, r5
10792	rev	r6, r6
10793	rev	r7, r7
10794#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
10795	str	r4, [r1]
10796	str	r5, [r1, #4]
10797	str	r6, [r1, #8]
10798	str	r7, [r1, #12]
10799	subs	r2, r2, #16
10800	add	lr, lr, #16
10801	add	r1, r1, #16
10802	bne	L_AES_ECB_encrypt_loop_block_192
10803	b	L_AES_ECB_encrypt_end
10804L_AES_ECB_encrypt_start_block_128:
10805L_AES_ECB_encrypt_loop_block_128:
10806	ldr	r4, [lr]
10807	ldr	r5, [lr, #4]
10808	ldr	r6, [lr, #8]
10809	ldr	r7, [lr, #12]
10810#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10811	eor	r8, r4, r4, ror #16
10812	eor	r9, r5, r5, ror #16
10813	eor	r10, r6, r6, ror #16
10814	eor	r11, r7, r7, ror #16
10815	bic	r8, r8, #0xff0000
10816	bic	r9, r9, #0xff0000
10817	bic	r10, r10, #0xff0000
10818	bic	r11, r11, #0xff0000
10819	ror	r4, r4, #8
10820	ror	r5, r5, #8
10821	ror	r6, r6, #8
10822	ror	r7, r7, #8
10823	eor	r4, r4, r8, lsr #8
10824	eor	r5, r5, r9, lsr #8
10825	eor	r6, r6, r10, lsr #8
10826	eor	r7, r7, r11, lsr #8
10827#else
10828	rev	r4, r4
10829	rev	r5, r5
10830	rev	r6, r6
10831	rev	r7, r7
10832#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
10833	push	{r1, r2, lr}
10834	ldm	r3!, {r8, r9, r10, r11}
10835	# Round: 0 - XOR in key schedule
10836	eor	r4, r4, r8
10837	eor	r5, r5, r9
10838	eor	r6, r6, r10
10839	eor	r7, r7, r11
10840	mov	r1, #4
10841#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
10842	bl	AES_encrypt_block
10843#else
10844L_AES_ECB_encrypt_block_nr_128:
10845#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10846#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10847	lsl	r8, r5, #8
10848	lsr	r8, r8, #24
10849#else
10850	uxtb	r8, r5, ror #16
10851#endif
10852#else
10853	ubfx	r8, r5, #16, #8
10854#endif
10855	lsr	r11, r4, #24
10856#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10857#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10858	lsl	lr, r6, #16
10859	lsr	lr, lr, #24
10860#else
10861	uxtb	lr, r6, ror #8
10862#endif
10863#else
10864	ubfx	lr, r6, #8, #8
10865#endif
10866#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10867#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10868	lsl	r2, r7, #24
10869	lsr	r2, r2, #24
10870#else
10871	uxtb	r2, r7
10872#endif
10873#else
10874	ubfx	r2, r7, #0, #8
10875#endif
10876	ldr	r8, [r0, r8, lsl #2]
10877	ldr	r11, [r0, r11, lsl #2]
10878	ldr	lr, [r0, lr, lsl #2]
10879	ldr	r2, [r0, r2, lsl #2]
10880#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10881#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10882	lsl	r9, r6, #8
10883	lsr	r9, r9, #24
10884#else
10885	uxtb	r9, r6, ror #16
10886#endif
10887#else
10888	ubfx	r9, r6, #16, #8
10889#endif
10890	eor	r8, r8, r11, ror #24
10891	lsr	r11, r5, #24
10892	eor	r8, r8, lr, ror #8
10893#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10894#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10895	lsl	lr, r7, #16
10896	lsr	lr, lr, #24
10897#else
10898	uxtb	lr, r7, ror #8
10899#endif
10900#else
10901	ubfx	lr, r7, #8, #8
10902#endif
10903	eor	r8, r8, r2, ror #16
10904#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10905#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10906	lsl	r2, r4, #24
10907	lsr	r2, r2, #24
10908#else
10909	uxtb	r2, r4
10910#endif
10911#else
10912	ubfx	r2, r4, #0, #8
10913#endif
10914	ldr	r9, [r0, r9, lsl #2]
10915	ldr	r11, [r0, r11, lsl #2]
10916	ldr	lr, [r0, lr, lsl #2]
10917	ldr	r2, [r0, r2, lsl #2]
10918#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10919#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10920	lsl	r10, r7, #8
10921	lsr	r10, r10, #24
10922#else
10923	uxtb	r10, r7, ror #16
10924#endif
10925#else
10926	ubfx	r10, r7, #16, #8
10927#endif
10928	eor	r9, r9, r11, ror #24
10929	lsr	r11, r6, #24
10930	eor	r9, r9, lr, ror #8
10931#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10932#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10933	lsl	lr, r4, #16
10934	lsr	lr, lr, #24
10935#else
10936	uxtb	lr, r4, ror #8
10937#endif
10938#else
10939	ubfx	lr, r4, #8, #8
10940#endif
10941	eor	r9, r9, r2, ror #16
10942#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10943#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10944	lsl	r2, r5, #24
10945	lsr	r2, r2, #24
10946#else
10947	uxtb	r2, r5
10948#endif
10949#else
10950	ubfx	r2, r5, #0, #8
10951#endif
10952	ldr	r10, [r0, r10, lsl #2]
10953	ldr	r11, [r0, r11, lsl #2]
10954	ldr	lr, [r0, lr, lsl #2]
10955	ldr	r2, [r0, r2, lsl #2]
10956#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10957#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10958	lsl	r6, r6, #24
10959	lsr	r6, r6, #24
10960#else
10961	uxtb	r6, r6
10962#endif
10963#else
10964	ubfx	r6, r6, #0, #8
10965#endif
10966	eor	r10, r10, r11, ror #24
10967#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10968#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10969	lsl	r11, r4, #8
10970	lsr	r11, r11, #24
10971#else
10972	uxtb	r11, r4, ror #16
10973#endif
10974#else
10975	ubfx	r11, r4, #16, #8
10976#endif
10977	eor	r10, r10, lr, ror #8
10978	lsr	lr, r7, #24
10979	eor	r10, r10, r2, ror #16
10980#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
10981#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
10982	lsl	r2, r5, #16
10983	lsr	r2, r2, #24
10984#else
10985	uxtb	r2, r5, ror #8
10986#endif
10987#else
10988	ubfx	r2, r5, #8, #8
10989#endif
10990	ldr	r6, [r0, r6, lsl #2]
10991	ldr	lr, [r0, lr, lsl #2]
10992	ldr	r11, [r0, r11, lsl #2]
10993	ldr	r2, [r0, r2, lsl #2]
10994	eor	lr, lr, r6, ror #24
10995	ldm	r3!, {r4, r5, r6, r7}
10996	eor	r11, r11, lr, ror #24
10997	eor	r11, r11, r2, ror #8
10998	#   XOR in Key Schedule
10999	eor	r8, r8, r4
11000	eor	r9, r9, r5
11001	eor	r10, r10, r6
11002	eor	r11, r11, r7
11003#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11004#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11005	lsl	r4, r9, #8
11006	lsr	r4, r4, #24
11007#else
11008	uxtb	r4, r9, ror #16
11009#endif
11010#else
11011	ubfx	r4, r9, #16, #8
11012#endif
11013	lsr	r7, r8, #24
11014#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11015#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11016	lsl	lr, r10, #16
11017	lsr	lr, lr, #24
11018#else
11019	uxtb	lr, r10, ror #8
11020#endif
11021#else
11022	ubfx	lr, r10, #8, #8
11023#endif
11024#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11025#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11026	lsl	r2, r11, #24
11027	lsr	r2, r2, #24
11028#else
11029	uxtb	r2, r11
11030#endif
11031#else
11032	ubfx	r2, r11, #0, #8
11033#endif
11034	ldr	r4, [r0, r4, lsl #2]
11035	ldr	r7, [r0, r7, lsl #2]
11036	ldr	lr, [r0, lr, lsl #2]
11037	ldr	r2, [r0, r2, lsl #2]
11038#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11039#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11040	lsl	r5, r10, #8
11041	lsr	r5, r5, #24
11042#else
11043	uxtb	r5, r10, ror #16
11044#endif
11045#else
11046	ubfx	r5, r10, #16, #8
11047#endif
11048	eor	r4, r4, r7, ror #24
11049	lsr	r7, r9, #24
11050	eor	r4, r4, lr, ror #8
11051#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11052#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11053	lsl	lr, r11, #16
11054	lsr	lr, lr, #24
11055#else
11056	uxtb	lr, r11, ror #8
11057#endif
11058#else
11059	ubfx	lr, r11, #8, #8
11060#endif
11061	eor	r4, r4, r2, ror #16
11062#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11063#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11064	lsl	r2, r8, #24
11065	lsr	r2, r2, #24
11066#else
11067	uxtb	r2, r8
11068#endif
11069#else
11070	ubfx	r2, r8, #0, #8
11071#endif
11072	ldr	r5, [r0, r5, lsl #2]
11073	ldr	r7, [r0, r7, lsl #2]
11074	ldr	lr, [r0, lr, lsl #2]
11075	ldr	r2, [r0, r2, lsl #2]
11076#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11077#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11078	lsl	r6, r11, #8
11079	lsr	r6, r6, #24
11080#else
11081	uxtb	r6, r11, ror #16
11082#endif
11083#else
11084	ubfx	r6, r11, #16, #8
11085#endif
11086	eor	r5, r5, r7, ror #24
11087	lsr	r7, r10, #24
11088	eor	r5, r5, lr, ror #8
11089#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11090#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11091	lsl	lr, r8, #16
11092	lsr	lr, lr, #24
11093#else
11094	uxtb	lr, r8, ror #8
11095#endif
11096#else
11097	ubfx	lr, r8, #8, #8
11098#endif
11099	eor	r5, r5, r2, ror #16
11100#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11101#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11102	lsl	r2, r9, #24
11103	lsr	r2, r2, #24
11104#else
11105	uxtb	r2, r9
11106#endif
11107#else
11108	ubfx	r2, r9, #0, #8
11109#endif
11110	ldr	r6, [r0, r6, lsl #2]
11111	ldr	r7, [r0, r7, lsl #2]
11112	ldr	lr, [r0, lr, lsl #2]
11113	ldr	r2, [r0, r2, lsl #2]
11114#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11115#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11116	lsl	r10, r10, #24
11117	lsr	r10, r10, #24
11118#else
11119	uxtb	r10, r10
11120#endif
11121#else
11122	ubfx	r10, r10, #0, #8
11123#endif
11124	eor	r6, r6, r7, ror #24
11125#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11126#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11127	lsl	r7, r8, #8
11128	lsr	r7, r7, #24
11129#else
11130	uxtb	r7, r8, ror #16
11131#endif
11132#else
11133	ubfx	r7, r8, #16, #8
11134#endif
11135	eor	r6, r6, lr, ror #8
11136	lsr	lr, r11, #24
11137	eor	r6, r6, r2, ror #16
11138#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11139#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11140	lsl	r2, r9, #16
11141	lsr	r2, r2, #24
11142#else
11143	uxtb	r2, r9, ror #8
11144#endif
11145#else
11146	ubfx	r2, r9, #8, #8
11147#endif
11148	ldr	r10, [r0, r10, lsl #2]
11149	ldr	lr, [r0, lr, lsl #2]
11150	ldr	r7, [r0, r7, lsl #2]
11151	ldr	r2, [r0, r2, lsl #2]
11152	eor	lr, lr, r10, ror #24
11153	ldm	r3!, {r8, r9, r10, r11}
11154	eor	r7, r7, lr, ror #24
11155	eor	r7, r7, r2, ror #8
11156	#   XOR in Key Schedule
11157	eor	r4, r4, r8
11158	eor	r5, r5, r9
11159	eor	r6, r6, r10
11160	eor	r7, r7, r11
11161	subs	r1, r1, #1
11162	bne	L_AES_ECB_encrypt_block_nr_128
11163#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11164#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11165	lsl	r8, r5, #8
11166	lsr	r8, r8, #24
11167#else
11168	uxtb	r8, r5, ror #16
11169#endif
11170#else
11171	ubfx	r8, r5, #16, #8
11172#endif
11173	lsr	r11, r4, #24
11174#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11175#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11176	lsl	lr, r6, #16
11177	lsr	lr, lr, #24
11178#else
11179	uxtb	lr, r6, ror #8
11180#endif
11181#else
11182	ubfx	lr, r6, #8, #8
11183#endif
11184#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11185#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11186	lsl	r2, r7, #24
11187	lsr	r2, r2, #24
11188#else
11189	uxtb	r2, r7
11190#endif
11191#else
11192	ubfx	r2, r7, #0, #8
11193#endif
11194	ldr	r8, [r0, r8, lsl #2]
11195	ldr	r11, [r0, r11, lsl #2]
11196	ldr	lr, [r0, lr, lsl #2]
11197	ldr	r2, [r0, r2, lsl #2]
11198#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11199#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11200	lsl	r9, r6, #8
11201	lsr	r9, r9, #24
11202#else
11203	uxtb	r9, r6, ror #16
11204#endif
11205#else
11206	ubfx	r9, r6, #16, #8
11207#endif
11208	eor	r8, r8, r11, ror #24
11209	lsr	r11, r5, #24
11210	eor	r8, r8, lr, ror #8
11211#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11212#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11213	lsl	lr, r7, #16
11214	lsr	lr, lr, #24
11215#else
11216	uxtb	lr, r7, ror #8
11217#endif
11218#else
11219	ubfx	lr, r7, #8, #8
11220#endif
11221	eor	r8, r8, r2, ror #16
11222#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11223#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11224	lsl	r2, r4, #24
11225	lsr	r2, r2, #24
11226#else
11227	uxtb	r2, r4
11228#endif
11229#else
11230	ubfx	r2, r4, #0, #8
11231#endif
11232	ldr	r9, [r0, r9, lsl #2]
11233	ldr	r11, [r0, r11, lsl #2]
11234	ldr	lr, [r0, lr, lsl #2]
11235	ldr	r2, [r0, r2, lsl #2]
11236#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11237#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11238	lsl	r10, r7, #8
11239	lsr	r10, r10, #24
11240#else
11241	uxtb	r10, r7, ror #16
11242#endif
11243#else
11244	ubfx	r10, r7, #16, #8
11245#endif
11246	eor	r9, r9, r11, ror #24
11247	lsr	r11, r6, #24
11248	eor	r9, r9, lr, ror #8
11249#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11250#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11251	lsl	lr, r4, #16
11252	lsr	lr, lr, #24
11253#else
11254	uxtb	lr, r4, ror #8
11255#endif
11256#else
11257	ubfx	lr, r4, #8, #8
11258#endif
11259	eor	r9, r9, r2, ror #16
11260#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11261#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11262	lsl	r2, r5, #24
11263	lsr	r2, r2, #24
11264#else
11265	uxtb	r2, r5
11266#endif
11267#else
11268	ubfx	r2, r5, #0, #8
11269#endif
11270	ldr	r10, [r0, r10, lsl #2]
11271	ldr	r11, [r0, r11, lsl #2]
11272	ldr	lr, [r0, lr, lsl #2]
11273	ldr	r2, [r0, r2, lsl #2]
11274#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11275#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11276	lsl	r6, r6, #24
11277	lsr	r6, r6, #24
11278#else
11279	uxtb	r6, r6
11280#endif
11281#else
11282	ubfx	r6, r6, #0, #8
11283#endif
11284	eor	r10, r10, r11, ror #24
11285#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11286#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11287	lsl	r11, r4, #8
11288	lsr	r11, r11, #24
11289#else
11290	uxtb	r11, r4, ror #16
11291#endif
11292#else
11293	ubfx	r11, r4, #16, #8
11294#endif
11295	eor	r10, r10, lr, ror #8
11296	lsr	lr, r7, #24
11297	eor	r10, r10, r2, ror #16
11298#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11299#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11300	lsl	r2, r5, #16
11301	lsr	r2, r2, #24
11302#else
11303	uxtb	r2, r5, ror #8
11304#endif
11305#else
11306	ubfx	r2, r5, #8, #8
11307#endif
11308	ldr	r6, [r0, r6, lsl #2]
11309	ldr	lr, [r0, lr, lsl #2]
11310	ldr	r11, [r0, r11, lsl #2]
11311	ldr	r2, [r0, r2, lsl #2]
11312	eor	lr, lr, r6, ror #24
11313	ldm	r3!, {r4, r5, r6, r7}
11314	eor	r11, r11, lr, ror #24
11315	eor	r11, r11, r2, ror #8
11316	#   XOR in Key Schedule
11317	eor	r8, r8, r4
11318	eor	r9, r9, r5
11319	eor	r10, r10, r6
11320	eor	r11, r11, r7
11321#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11322#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11323	lsl	r4, r11, #24
11324	lsr	r4, r4, #24
11325#else
11326	uxtb	r4, r11
11327#endif
11328#else
11329	ubfx	r4, r11, #0, #8
11330#endif
11331#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11332#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11333	lsl	r7, r10, #16
11334	lsr	r7, r7, #24
11335#else
11336	uxtb	r7, r10, ror #8
11337#endif
11338#else
11339	ubfx	r7, r10, #8, #8
11340#endif
11341#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11342#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11343	lsl	lr, r9, #8
11344	lsr	lr, lr, #24
11345#else
11346	uxtb	lr, r9, ror #16
11347#endif
11348#else
11349	ubfx	lr, r9, #16, #8
11350#endif
11351	lsr	r2, r8, #24
11352	ldrb	r4, [r0, r4, lsl #2]
11353	ldrb	r7, [r0, r7, lsl #2]
11354	ldrb	lr, [r0, lr, lsl #2]
11355	ldrb	r2, [r0, r2, lsl #2]
11356#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11357#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11358	lsl	r5, r8, #24
11359	lsr	r5, r5, #24
11360#else
11361	uxtb	r5, r8
11362#endif
11363#else
11364	ubfx	r5, r8, #0, #8
11365#endif
11366	eor	r4, r4, r7, lsl #8
11367#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11368#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11369	lsl	r7, r11, #16
11370	lsr	r7, r7, #24
11371#else
11372	uxtb	r7, r11, ror #8
11373#endif
11374#else
11375	ubfx	r7, r11, #8, #8
11376#endif
11377	eor	r4, r4, lr, lsl #16
11378#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11379#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11380	lsl	lr, r10, #8
11381	lsr	lr, lr, #24
11382#else
11383	uxtb	lr, r10, ror #16
11384#endif
11385#else
11386	ubfx	lr, r10, #16, #8
11387#endif
11388	eor	r4, r4, r2, lsl #24
11389	lsr	r2, r9, #24
11390	ldrb	r5, [r0, r5, lsl #2]
11391	ldrb	r7, [r0, r7, lsl #2]
11392	ldrb	lr, [r0, lr, lsl #2]
11393	ldrb	r2, [r0, r2, lsl #2]
11394#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11395#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11396	lsl	r6, r9, #24
11397	lsr	r6, r6, #24
11398#else
11399	uxtb	r6, r9
11400#endif
11401#else
11402	ubfx	r6, r9, #0, #8
11403#endif
11404	eor	r5, r5, r7, lsl #8
11405#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11406#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11407	lsl	r7, r8, #16
11408	lsr	r7, r7, #24
11409#else
11410	uxtb	r7, r8, ror #8
11411#endif
11412#else
11413	ubfx	r7, r8, #8, #8
11414#endif
11415	eor	r5, r5, lr, lsl #16
11416#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11417#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11418	lsl	lr, r11, #8
11419	lsr	lr, lr, #24
11420#else
11421	uxtb	lr, r11, ror #16
11422#endif
11423#else
11424	ubfx	lr, r11, #16, #8
11425#endif
11426	eor	r5, r5, r2, lsl #24
11427	lsr	r2, r10, #24
11428	ldrb	r6, [r0, r6, lsl #2]
11429	ldrb	r7, [r0, r7, lsl #2]
11430	ldrb	lr, [r0, lr, lsl #2]
11431	ldrb	r2, [r0, r2, lsl #2]
11432	lsr	r11, r11, #24
11433	eor	r6, r6, r7, lsl #8
11434#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11435#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11436	lsl	r7, r10, #24
11437	lsr	r7, r7, #24
11438#else
11439	uxtb	r7, r10
11440#endif
11441#else
11442	ubfx	r7, r10, #0, #8
11443#endif
11444	eor	r6, r6, lr, lsl #16
11445#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11446#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11447	lsl	lr, r9, #16
11448	lsr	lr, lr, #24
11449#else
11450	uxtb	lr, r9, ror #8
11451#endif
11452#else
11453	ubfx	lr, r9, #8, #8
11454#endif
11455	eor	r6, r6, r2, lsl #24
11456#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11457#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11458	lsl	r2, r8, #8
11459	lsr	r2, r2, #24
11460#else
11461	uxtb	r2, r8, ror #16
11462#endif
11463#else
11464	ubfx	r2, r8, #16, #8
11465#endif
11466	ldrb	r11, [r0, r11, lsl #2]
11467	ldrb	r7, [r0, r7, lsl #2]
11468	ldrb	lr, [r0, lr, lsl #2]
11469	ldrb	r2, [r0, r2, lsl #2]
11470	eor	lr, lr, r11, lsl #16
11471	ldm	r3, {r8, r9, r10, r11}
11472	eor	r7, r7, lr, lsl #8
11473	eor	r7, r7, r2, lsl #16
11474	#   XOR in Key Schedule
11475	eor	r4, r4, r8
11476	eor	r5, r5, r9
11477	eor	r6, r6, r10
11478	eor	r7, r7, r11
11479#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
11480	pop	{r1, r2, lr}
11481	ldr	r3, [sp]
11482#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11483	eor	r8, r4, r4, ror #16
11484	eor	r9, r5, r5, ror #16
11485	eor	r10, r6, r6, ror #16
11486	eor	r11, r7, r7, ror #16
11487	bic	r8, r8, #0xff0000
11488	bic	r9, r9, #0xff0000
11489	bic	r10, r10, #0xff0000
11490	bic	r11, r11, #0xff0000
11491	ror	r4, r4, #8
11492	ror	r5, r5, #8
11493	ror	r6, r6, #8
11494	ror	r7, r7, #8
11495	eor	r4, r4, r8, lsr #8
11496	eor	r5, r5, r9, lsr #8
11497	eor	r6, r6, r10, lsr #8
11498	eor	r7, r7, r11, lsr #8
11499#else
11500	rev	r4, r4
11501	rev	r5, r5
11502	rev	r6, r6
11503	rev	r7, r7
11504#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
11505	str	r4, [r1]
11506	str	r5, [r1, #4]
11507	str	r6, [r1, #8]
11508	str	r7, [r1, #12]
11509	subs	r2, r2, #16
11510	add	lr, lr, #16
11511	add	r1, r1, #16
11512	bne	L_AES_ECB_encrypt_loop_block_128
11513L_AES_ECB_encrypt_end:
11514	pop	{r3}
11515	pop	{r4, r5, r6, r7, r8, r9, r10, r11, pc}
11516	.size	AES_ECB_encrypt,.-AES_ECB_encrypt
11517#endif /* HAVE_AESCCM || HAVE_AESGCM || WOLFSSL_AES_DIRECT ||
11518        * WOLFSSL_AES_COUNTER || HAVE_AES_ECB */
11519#ifdef HAVE_AES_CBC
11520#ifndef __APPLE__
11521	.text
11522	.type	L_AES_ARM32_te_cbc, %object
11523	.size	L_AES_ARM32_te_cbc, 12
11524#else
11525	.section	__DATA,__data
11526#endif /* __APPLE__ */
11527	# 8-byte aligned, 64-bit aligned
11528#ifndef __APPLE__
11529	.align	3
11530#else
11531	.p2align	3
11532#endif /* __APPLE__ */
11533L_AES_ARM32_te_cbc:
11534	.long	L_AES_ARM32_te_data
11535	.text
11536	.align	4
11537	.globl	AES_CBC_encrypt
11538	.type	AES_CBC_encrypt, %function
11539AES_CBC_encrypt:
11540	push	{r4, r5, r6, r7, r8, r9, r10, r11, lr}
11541	ldr	r8, [sp, #36]
11542	ldr	r9, [sp, #40]
11543	mov	lr, r0
11544	adr	r0, L_AES_ARM32_te_cbc
11545	ldr	r0, [r0]
11546	ldm	r9, {r4, r5, r6, r7}
11547	push	{r3, r9}
11548	cmp	r8, #10
11549	beq	L_AES_CBC_encrypt_start_block_128
11550	cmp	r8, #12
11551	beq	L_AES_CBC_encrypt_start_block_192
11552L_AES_CBC_encrypt_loop_block_256:
11553	ldr	r8, [lr]
11554	ldr	r9, [lr, #4]
11555	ldr	r10, [lr, #8]
11556	ldr	r11, [lr, #12]
11557	eor	r4, r4, r8
11558	eor	r5, r5, r9
11559	eor	r6, r6, r10
11560	eor	r7, r7, r11
11561	push	{r1, r2, lr}
11562#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11563	eor	r8, r4, r4, ror #16
11564	eor	r9, r5, r5, ror #16
11565	eor	r10, r6, r6, ror #16
11566	eor	r11, r7, r7, ror #16
11567	bic	r8, r8, #0xff0000
11568	bic	r9, r9, #0xff0000
11569	bic	r10, r10, #0xff0000
11570	bic	r11, r11, #0xff0000
11571	ror	r4, r4, #8
11572	ror	r5, r5, #8
11573	ror	r6, r6, #8
11574	ror	r7, r7, #8
11575	eor	r4, r4, r8, lsr #8
11576	eor	r5, r5, r9, lsr #8
11577	eor	r6, r6, r10, lsr #8
11578	eor	r7, r7, r11, lsr #8
11579#else
11580	rev	r4, r4
11581	rev	r5, r5
11582	rev	r6, r6
11583	rev	r7, r7
11584#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
11585	ldm	r3!, {r8, r9, r10, r11}
11586	# Round: 0 - XOR in key schedule
11587	eor	r4, r4, r8
11588	eor	r5, r5, r9
11589	eor	r6, r6, r10
11590	eor	r7, r7, r11
11591	mov	r1, #6
11592#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
11593	bl	AES_encrypt_block
11594#else
11595L_AES_CBC_encrypt_block_nr_256:
11596#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11597#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11598	lsl	r8, r5, #8
11599	lsr	r8, r8, #24
11600#else
11601	uxtb	r8, r5, ror #16
11602#endif
11603#else
11604	ubfx	r8, r5, #16, #8
11605#endif
11606	lsr	r11, r4, #24
11607#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11608#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11609	lsl	lr, r6, #16
11610	lsr	lr, lr, #24
11611#else
11612	uxtb	lr, r6, ror #8
11613#endif
11614#else
11615	ubfx	lr, r6, #8, #8
11616#endif
11617#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11618#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11619	lsl	r2, r7, #24
11620	lsr	r2, r2, #24
11621#else
11622	uxtb	r2, r7
11623#endif
11624#else
11625	ubfx	r2, r7, #0, #8
11626#endif
11627	ldr	r8, [r0, r8, lsl #2]
11628	ldr	r11, [r0, r11, lsl #2]
11629	ldr	lr, [r0, lr, lsl #2]
11630	ldr	r2, [r0, r2, lsl #2]
11631#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11632#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11633	lsl	r9, r6, #8
11634	lsr	r9, r9, #24
11635#else
11636	uxtb	r9, r6, ror #16
11637#endif
11638#else
11639	ubfx	r9, r6, #16, #8
11640#endif
11641	eor	r8, r8, r11, ror #24
11642	lsr	r11, r5, #24
11643	eor	r8, r8, lr, ror #8
11644#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11645#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11646	lsl	lr, r7, #16
11647	lsr	lr, lr, #24
11648#else
11649	uxtb	lr, r7, ror #8
11650#endif
11651#else
11652	ubfx	lr, r7, #8, #8
11653#endif
11654	eor	r8, r8, r2, ror #16
11655#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11656#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11657	lsl	r2, r4, #24
11658	lsr	r2, r2, #24
11659#else
11660	uxtb	r2, r4
11661#endif
11662#else
11663	ubfx	r2, r4, #0, #8
11664#endif
11665	ldr	r9, [r0, r9, lsl #2]
11666	ldr	r11, [r0, r11, lsl #2]
11667	ldr	lr, [r0, lr, lsl #2]
11668	ldr	r2, [r0, r2, lsl #2]
11669#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11670#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11671	lsl	r10, r7, #8
11672	lsr	r10, r10, #24
11673#else
11674	uxtb	r10, r7, ror #16
11675#endif
11676#else
11677	ubfx	r10, r7, #16, #8
11678#endif
11679	eor	r9, r9, r11, ror #24
11680	lsr	r11, r6, #24
11681	eor	r9, r9, lr, ror #8
11682#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11683#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11684	lsl	lr, r4, #16
11685	lsr	lr, lr, #24
11686#else
11687	uxtb	lr, r4, ror #8
11688#endif
11689#else
11690	ubfx	lr, r4, #8, #8
11691#endif
11692	eor	r9, r9, r2, ror #16
11693#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11694#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11695	lsl	r2, r5, #24
11696	lsr	r2, r2, #24
11697#else
11698	uxtb	r2, r5
11699#endif
11700#else
11701	ubfx	r2, r5, #0, #8
11702#endif
11703	ldr	r10, [r0, r10, lsl #2]
11704	ldr	r11, [r0, r11, lsl #2]
11705	ldr	lr, [r0, lr, lsl #2]
11706	ldr	r2, [r0, r2, lsl #2]
11707#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11708#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11709	lsl	r6, r6, #24
11710	lsr	r6, r6, #24
11711#else
11712	uxtb	r6, r6
11713#endif
11714#else
11715	ubfx	r6, r6, #0, #8
11716#endif
11717	eor	r10, r10, r11, ror #24
11718#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11719#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11720	lsl	r11, r4, #8
11721	lsr	r11, r11, #24
11722#else
11723	uxtb	r11, r4, ror #16
11724#endif
11725#else
11726	ubfx	r11, r4, #16, #8
11727#endif
11728	eor	r10, r10, lr, ror #8
11729	lsr	lr, r7, #24
11730	eor	r10, r10, r2, ror #16
11731#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11732#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11733	lsl	r2, r5, #16
11734	lsr	r2, r2, #24
11735#else
11736	uxtb	r2, r5, ror #8
11737#endif
11738#else
11739	ubfx	r2, r5, #8, #8
11740#endif
11741	ldr	r6, [r0, r6, lsl #2]
11742	ldr	lr, [r0, lr, lsl #2]
11743	ldr	r11, [r0, r11, lsl #2]
11744	ldr	r2, [r0, r2, lsl #2]
11745	eor	lr, lr, r6, ror #24
11746	ldm	r3!, {r4, r5, r6, r7}
11747	eor	r11, r11, lr, ror #24
11748	eor	r11, r11, r2, ror #8
11749	#   XOR in Key Schedule
11750	eor	r8, r8, r4
11751	eor	r9, r9, r5
11752	eor	r10, r10, r6
11753	eor	r11, r11, r7
11754#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11755#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11756	lsl	r4, r9, #8
11757	lsr	r4, r4, #24
11758#else
11759	uxtb	r4, r9, ror #16
11760#endif
11761#else
11762	ubfx	r4, r9, #16, #8
11763#endif
11764	lsr	r7, r8, #24
11765#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11766#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11767	lsl	lr, r10, #16
11768	lsr	lr, lr, #24
11769#else
11770	uxtb	lr, r10, ror #8
11771#endif
11772#else
11773	ubfx	lr, r10, #8, #8
11774#endif
11775#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11776#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11777	lsl	r2, r11, #24
11778	lsr	r2, r2, #24
11779#else
11780	uxtb	r2, r11
11781#endif
11782#else
11783	ubfx	r2, r11, #0, #8
11784#endif
11785	ldr	r4, [r0, r4, lsl #2]
11786	ldr	r7, [r0, r7, lsl #2]
11787	ldr	lr, [r0, lr, lsl #2]
11788	ldr	r2, [r0, r2, lsl #2]
11789#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11790#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11791	lsl	r5, r10, #8
11792	lsr	r5, r5, #24
11793#else
11794	uxtb	r5, r10, ror #16
11795#endif
11796#else
11797	ubfx	r5, r10, #16, #8
11798#endif
11799	eor	r4, r4, r7, ror #24
11800	lsr	r7, r9, #24
11801	eor	r4, r4, lr, ror #8
11802#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11803#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11804	lsl	lr, r11, #16
11805	lsr	lr, lr, #24
11806#else
11807	uxtb	lr, r11, ror #8
11808#endif
11809#else
11810	ubfx	lr, r11, #8, #8
11811#endif
11812	eor	r4, r4, r2, ror #16
11813#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11814#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11815	lsl	r2, r8, #24
11816	lsr	r2, r2, #24
11817#else
11818	uxtb	r2, r8
11819#endif
11820#else
11821	ubfx	r2, r8, #0, #8
11822#endif
11823	ldr	r5, [r0, r5, lsl #2]
11824	ldr	r7, [r0, r7, lsl #2]
11825	ldr	lr, [r0, lr, lsl #2]
11826	ldr	r2, [r0, r2, lsl #2]
11827#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11828#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11829	lsl	r6, r11, #8
11830	lsr	r6, r6, #24
11831#else
11832	uxtb	r6, r11, ror #16
11833#endif
11834#else
11835	ubfx	r6, r11, #16, #8
11836#endif
11837	eor	r5, r5, r7, ror #24
11838	lsr	r7, r10, #24
11839	eor	r5, r5, lr, ror #8
11840#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11841#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11842	lsl	lr, r8, #16
11843	lsr	lr, lr, #24
11844#else
11845	uxtb	lr, r8, ror #8
11846#endif
11847#else
11848	ubfx	lr, r8, #8, #8
11849#endif
11850	eor	r5, r5, r2, ror #16
11851#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11852#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11853	lsl	r2, r9, #24
11854	lsr	r2, r2, #24
11855#else
11856	uxtb	r2, r9
11857#endif
11858#else
11859	ubfx	r2, r9, #0, #8
11860#endif
11861	ldr	r6, [r0, r6, lsl #2]
11862	ldr	r7, [r0, r7, lsl #2]
11863	ldr	lr, [r0, lr, lsl #2]
11864	ldr	r2, [r0, r2, lsl #2]
11865#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11866#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11867	lsl	r10, r10, #24
11868	lsr	r10, r10, #24
11869#else
11870	uxtb	r10, r10
11871#endif
11872#else
11873	ubfx	r10, r10, #0, #8
11874#endif
11875	eor	r6, r6, r7, ror #24
11876#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11877#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11878	lsl	r7, r8, #8
11879	lsr	r7, r7, #24
11880#else
11881	uxtb	r7, r8, ror #16
11882#endif
11883#else
11884	ubfx	r7, r8, #16, #8
11885#endif
11886	eor	r6, r6, lr, ror #8
11887	lsr	lr, r11, #24
11888	eor	r6, r6, r2, ror #16
11889#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11890#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11891	lsl	r2, r9, #16
11892	lsr	r2, r2, #24
11893#else
11894	uxtb	r2, r9, ror #8
11895#endif
11896#else
11897	ubfx	r2, r9, #8, #8
11898#endif
11899	ldr	r10, [r0, r10, lsl #2]
11900	ldr	lr, [r0, lr, lsl #2]
11901	ldr	r7, [r0, r7, lsl #2]
11902	ldr	r2, [r0, r2, lsl #2]
11903	eor	lr, lr, r10, ror #24
11904	ldm	r3!, {r8, r9, r10, r11}
11905	eor	r7, r7, lr, ror #24
11906	eor	r7, r7, r2, ror #8
11907	#   XOR in Key Schedule
11908	eor	r4, r4, r8
11909	eor	r5, r5, r9
11910	eor	r6, r6, r10
11911	eor	r7, r7, r11
11912	subs	r1, r1, #1
11913	bne	L_AES_CBC_encrypt_block_nr_256
11914#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11915#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11916	lsl	r8, r5, #8
11917	lsr	r8, r8, #24
11918#else
11919	uxtb	r8, r5, ror #16
11920#endif
11921#else
11922	ubfx	r8, r5, #16, #8
11923#endif
11924	lsr	r11, r4, #24
11925#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11926#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11927	lsl	lr, r6, #16
11928	lsr	lr, lr, #24
11929#else
11930	uxtb	lr, r6, ror #8
11931#endif
11932#else
11933	ubfx	lr, r6, #8, #8
11934#endif
11935#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11936#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11937	lsl	r2, r7, #24
11938	lsr	r2, r2, #24
11939#else
11940	uxtb	r2, r7
11941#endif
11942#else
11943	ubfx	r2, r7, #0, #8
11944#endif
11945	ldr	r8, [r0, r8, lsl #2]
11946	ldr	r11, [r0, r11, lsl #2]
11947	ldr	lr, [r0, lr, lsl #2]
11948	ldr	r2, [r0, r2, lsl #2]
11949#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11950#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11951	lsl	r9, r6, #8
11952	lsr	r9, r9, #24
11953#else
11954	uxtb	r9, r6, ror #16
11955#endif
11956#else
11957	ubfx	r9, r6, #16, #8
11958#endif
11959	eor	r8, r8, r11, ror #24
11960	lsr	r11, r5, #24
11961	eor	r8, r8, lr, ror #8
11962#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11963#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11964	lsl	lr, r7, #16
11965	lsr	lr, lr, #24
11966#else
11967	uxtb	lr, r7, ror #8
11968#endif
11969#else
11970	ubfx	lr, r7, #8, #8
11971#endif
11972	eor	r8, r8, r2, ror #16
11973#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11974#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11975	lsl	r2, r4, #24
11976	lsr	r2, r2, #24
11977#else
11978	uxtb	r2, r4
11979#endif
11980#else
11981	ubfx	r2, r4, #0, #8
11982#endif
11983	ldr	r9, [r0, r9, lsl #2]
11984	ldr	r11, [r0, r11, lsl #2]
11985	ldr	lr, [r0, lr, lsl #2]
11986	ldr	r2, [r0, r2, lsl #2]
11987#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
11988#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
11989	lsl	r10, r7, #8
11990	lsr	r10, r10, #24
11991#else
11992	uxtb	r10, r7, ror #16
11993#endif
11994#else
11995	ubfx	r10, r7, #16, #8
11996#endif
11997	eor	r9, r9, r11, ror #24
11998	lsr	r11, r6, #24
11999	eor	r9, r9, lr, ror #8
12000#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12001#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12002	lsl	lr, r4, #16
12003	lsr	lr, lr, #24
12004#else
12005	uxtb	lr, r4, ror #8
12006#endif
12007#else
12008	ubfx	lr, r4, #8, #8
12009#endif
12010	eor	r9, r9, r2, ror #16
12011#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12012#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12013	lsl	r2, r5, #24
12014	lsr	r2, r2, #24
12015#else
12016	uxtb	r2, r5
12017#endif
12018#else
12019	ubfx	r2, r5, #0, #8
12020#endif
12021	ldr	r10, [r0, r10, lsl #2]
12022	ldr	r11, [r0, r11, lsl #2]
12023	ldr	lr, [r0, lr, lsl #2]
12024	ldr	r2, [r0, r2, lsl #2]
12025#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12026#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12027	lsl	r6, r6, #24
12028	lsr	r6, r6, #24
12029#else
12030	uxtb	r6, r6
12031#endif
12032#else
12033	ubfx	r6, r6, #0, #8
12034#endif
12035	eor	r10, r10, r11, ror #24
12036#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12037#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12038	lsl	r11, r4, #8
12039	lsr	r11, r11, #24
12040#else
12041	uxtb	r11, r4, ror #16
12042#endif
12043#else
12044	ubfx	r11, r4, #16, #8
12045#endif
12046	eor	r10, r10, lr, ror #8
12047	lsr	lr, r7, #24
12048	eor	r10, r10, r2, ror #16
12049#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12050#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12051	lsl	r2, r5, #16
12052	lsr	r2, r2, #24
12053#else
12054	uxtb	r2, r5, ror #8
12055#endif
12056#else
12057	ubfx	r2, r5, #8, #8
12058#endif
12059	ldr	r6, [r0, r6, lsl #2]
12060	ldr	lr, [r0, lr, lsl #2]
12061	ldr	r11, [r0, r11, lsl #2]
12062	ldr	r2, [r0, r2, lsl #2]
12063	eor	lr, lr, r6, ror #24
12064	ldm	r3!, {r4, r5, r6, r7}
12065	eor	r11, r11, lr, ror #24
12066	eor	r11, r11, r2, ror #8
12067	#   XOR in Key Schedule
12068	eor	r8, r8, r4
12069	eor	r9, r9, r5
12070	eor	r10, r10, r6
12071	eor	r11, r11, r7
12072#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12073#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12074	lsl	r4, r11, #24
12075	lsr	r4, r4, #24
12076#else
12077	uxtb	r4, r11
12078#endif
12079#else
12080	ubfx	r4, r11, #0, #8
12081#endif
12082#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12083#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12084	lsl	r7, r10, #16
12085	lsr	r7, r7, #24
12086#else
12087	uxtb	r7, r10, ror #8
12088#endif
12089#else
12090	ubfx	r7, r10, #8, #8
12091#endif
12092#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12093#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12094	lsl	lr, r9, #8
12095	lsr	lr, lr, #24
12096#else
12097	uxtb	lr, r9, ror #16
12098#endif
12099#else
12100	ubfx	lr, r9, #16, #8
12101#endif
12102	lsr	r2, r8, #24
12103	ldrb	r4, [r0, r4, lsl #2]
12104	ldrb	r7, [r0, r7, lsl #2]
12105	ldrb	lr, [r0, lr, lsl #2]
12106	ldrb	r2, [r0, r2, lsl #2]
12107#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12108#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12109	lsl	r5, r8, #24
12110	lsr	r5, r5, #24
12111#else
12112	uxtb	r5, r8
12113#endif
12114#else
12115	ubfx	r5, r8, #0, #8
12116#endif
12117	eor	r4, r4, r7, lsl #8
12118#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12119#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12120	lsl	r7, r11, #16
12121	lsr	r7, r7, #24
12122#else
12123	uxtb	r7, r11, ror #8
12124#endif
12125#else
12126	ubfx	r7, r11, #8, #8
12127#endif
12128	eor	r4, r4, lr, lsl #16
12129#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12130#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12131	lsl	lr, r10, #8
12132	lsr	lr, lr, #24
12133#else
12134	uxtb	lr, r10, ror #16
12135#endif
12136#else
12137	ubfx	lr, r10, #16, #8
12138#endif
12139	eor	r4, r4, r2, lsl #24
12140	lsr	r2, r9, #24
12141	ldrb	r5, [r0, r5, lsl #2]
12142	ldrb	r7, [r0, r7, lsl #2]
12143	ldrb	lr, [r0, lr, lsl #2]
12144	ldrb	r2, [r0, r2, lsl #2]
12145#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12146#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12147	lsl	r6, r9, #24
12148	lsr	r6, r6, #24
12149#else
12150	uxtb	r6, r9
12151#endif
12152#else
12153	ubfx	r6, r9, #0, #8
12154#endif
12155	eor	r5, r5, r7, lsl #8
12156#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12157#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12158	lsl	r7, r8, #16
12159	lsr	r7, r7, #24
12160#else
12161	uxtb	r7, r8, ror #8
12162#endif
12163#else
12164	ubfx	r7, r8, #8, #8
12165#endif
12166	eor	r5, r5, lr, lsl #16
12167#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12168#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12169	lsl	lr, r11, #8
12170	lsr	lr, lr, #24
12171#else
12172	uxtb	lr, r11, ror #16
12173#endif
12174#else
12175	ubfx	lr, r11, #16, #8
12176#endif
12177	eor	r5, r5, r2, lsl #24
12178	lsr	r2, r10, #24
12179	ldrb	r6, [r0, r6, lsl #2]
12180	ldrb	r7, [r0, r7, lsl #2]
12181	ldrb	lr, [r0, lr, lsl #2]
12182	ldrb	r2, [r0, r2, lsl #2]
12183	lsr	r11, r11, #24
12184	eor	r6, r6, r7, lsl #8
12185#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12186#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12187	lsl	r7, r10, #24
12188	lsr	r7, r7, #24
12189#else
12190	uxtb	r7, r10
12191#endif
12192#else
12193	ubfx	r7, r10, #0, #8
12194#endif
12195	eor	r6, r6, lr, lsl #16
12196#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12197#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12198	lsl	lr, r9, #16
12199	lsr	lr, lr, #24
12200#else
12201	uxtb	lr, r9, ror #8
12202#endif
12203#else
12204	ubfx	lr, r9, #8, #8
12205#endif
12206	eor	r6, r6, r2, lsl #24
12207#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12208#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12209	lsl	r2, r8, #8
12210	lsr	r2, r2, #24
12211#else
12212	uxtb	r2, r8, ror #16
12213#endif
12214#else
12215	ubfx	r2, r8, #16, #8
12216#endif
12217	ldrb	r11, [r0, r11, lsl #2]
12218	ldrb	r7, [r0, r7, lsl #2]
12219	ldrb	lr, [r0, lr, lsl #2]
12220	ldrb	r2, [r0, r2, lsl #2]
12221	eor	lr, lr, r11, lsl #16
12222	ldm	r3, {r8, r9, r10, r11}
12223	eor	r7, r7, lr, lsl #8
12224	eor	r7, r7, r2, lsl #16
12225	#   XOR in Key Schedule
12226	eor	r4, r4, r8
12227	eor	r5, r5, r9
12228	eor	r6, r6, r10
12229	eor	r7, r7, r11
12230#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
12231	pop	{r1, r2, lr}
12232	ldr	r3, [sp]
12233#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12234	eor	r8, r4, r4, ror #16
12235	eor	r9, r5, r5, ror #16
12236	eor	r10, r6, r6, ror #16
12237	eor	r11, r7, r7, ror #16
12238	bic	r8, r8, #0xff0000
12239	bic	r9, r9, #0xff0000
12240	bic	r10, r10, #0xff0000
12241	bic	r11, r11, #0xff0000
12242	ror	r4, r4, #8
12243	ror	r5, r5, #8
12244	ror	r6, r6, #8
12245	ror	r7, r7, #8
12246	eor	r4, r4, r8, lsr #8
12247	eor	r5, r5, r9, lsr #8
12248	eor	r6, r6, r10, lsr #8
12249	eor	r7, r7, r11, lsr #8
12250#else
12251	rev	r4, r4
12252	rev	r5, r5
12253	rev	r6, r6
12254	rev	r7, r7
12255#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
12256	str	r4, [r1]
12257	str	r5, [r1, #4]
12258	str	r6, [r1, #8]
12259	str	r7, [r1, #12]
12260	subs	r2, r2, #16
12261	add	lr, lr, #16
12262	add	r1, r1, #16
12263	bne	L_AES_CBC_encrypt_loop_block_256
12264	b	L_AES_CBC_encrypt_end
12265L_AES_CBC_encrypt_start_block_192:
12266L_AES_CBC_encrypt_loop_block_192:
12267	ldr	r8, [lr]
12268	ldr	r9, [lr, #4]
12269	ldr	r10, [lr, #8]
12270	ldr	r11, [lr, #12]
12271	eor	r4, r4, r8
12272	eor	r5, r5, r9
12273	eor	r6, r6, r10
12274	eor	r7, r7, r11
12275	push	{r1, r2, lr}
12276#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12277	eor	r8, r4, r4, ror #16
12278	eor	r9, r5, r5, ror #16
12279	eor	r10, r6, r6, ror #16
12280	eor	r11, r7, r7, ror #16
12281	bic	r8, r8, #0xff0000
12282	bic	r9, r9, #0xff0000
12283	bic	r10, r10, #0xff0000
12284	bic	r11, r11, #0xff0000
12285	ror	r4, r4, #8
12286	ror	r5, r5, #8
12287	ror	r6, r6, #8
12288	ror	r7, r7, #8
12289	eor	r4, r4, r8, lsr #8
12290	eor	r5, r5, r9, lsr #8
12291	eor	r6, r6, r10, lsr #8
12292	eor	r7, r7, r11, lsr #8
12293#else
12294	rev	r4, r4
12295	rev	r5, r5
12296	rev	r6, r6
12297	rev	r7, r7
12298#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
12299	ldm	r3!, {r8, r9, r10, r11}
12300	# Round: 0 - XOR in key schedule
12301	eor	r4, r4, r8
12302	eor	r5, r5, r9
12303	eor	r6, r6, r10
12304	eor	r7, r7, r11
12305	mov	r1, #5
12306#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
12307	bl	AES_encrypt_block
12308#else
12309L_AES_CBC_encrypt_block_nr_192:
12310#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12311#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12312	lsl	r8, r5, #8
12313	lsr	r8, r8, #24
12314#else
12315	uxtb	r8, r5, ror #16
12316#endif
12317#else
12318	ubfx	r8, r5, #16, #8
12319#endif
12320	lsr	r11, r4, #24
12321#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12322#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12323	lsl	lr, r6, #16
12324	lsr	lr, lr, #24
12325#else
12326	uxtb	lr, r6, ror #8
12327#endif
12328#else
12329	ubfx	lr, r6, #8, #8
12330#endif
12331#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12332#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12333	lsl	r2, r7, #24
12334	lsr	r2, r2, #24
12335#else
12336	uxtb	r2, r7
12337#endif
12338#else
12339	ubfx	r2, r7, #0, #8
12340#endif
12341	ldr	r8, [r0, r8, lsl #2]
12342	ldr	r11, [r0, r11, lsl #2]
12343	ldr	lr, [r0, lr, lsl #2]
12344	ldr	r2, [r0, r2, lsl #2]
12345#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12346#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12347	lsl	r9, r6, #8
12348	lsr	r9, r9, #24
12349#else
12350	uxtb	r9, r6, ror #16
12351#endif
12352#else
12353	ubfx	r9, r6, #16, #8
12354#endif
12355	eor	r8, r8, r11, ror #24
12356	lsr	r11, r5, #24
12357	eor	r8, r8, lr, ror #8
12358#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12359#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12360	lsl	lr, r7, #16
12361	lsr	lr, lr, #24
12362#else
12363	uxtb	lr, r7, ror #8
12364#endif
12365#else
12366	ubfx	lr, r7, #8, #8
12367#endif
12368	eor	r8, r8, r2, ror #16
12369#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12370#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12371	lsl	r2, r4, #24
12372	lsr	r2, r2, #24
12373#else
12374	uxtb	r2, r4
12375#endif
12376#else
12377	ubfx	r2, r4, #0, #8
12378#endif
12379	ldr	r9, [r0, r9, lsl #2]
12380	ldr	r11, [r0, r11, lsl #2]
12381	ldr	lr, [r0, lr, lsl #2]
12382	ldr	r2, [r0, r2, lsl #2]
12383#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12384#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12385	lsl	r10, r7, #8
12386	lsr	r10, r10, #24
12387#else
12388	uxtb	r10, r7, ror #16
12389#endif
12390#else
12391	ubfx	r10, r7, #16, #8
12392#endif
12393	eor	r9, r9, r11, ror #24
12394	lsr	r11, r6, #24
12395	eor	r9, r9, lr, ror #8
12396#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12397#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12398	lsl	lr, r4, #16
12399	lsr	lr, lr, #24
12400#else
12401	uxtb	lr, r4, ror #8
12402#endif
12403#else
12404	ubfx	lr, r4, #8, #8
12405#endif
12406	eor	r9, r9, r2, ror #16
12407#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12408#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12409	lsl	r2, r5, #24
12410	lsr	r2, r2, #24
12411#else
12412	uxtb	r2, r5
12413#endif
12414#else
12415	ubfx	r2, r5, #0, #8
12416#endif
12417	ldr	r10, [r0, r10, lsl #2]
12418	ldr	r11, [r0, r11, lsl #2]
12419	ldr	lr, [r0, lr, lsl #2]
12420	ldr	r2, [r0, r2, lsl #2]
12421#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12422#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12423	lsl	r6, r6, #24
12424	lsr	r6, r6, #24
12425#else
12426	uxtb	r6, r6
12427#endif
12428#else
12429	ubfx	r6, r6, #0, #8
12430#endif
12431	eor	r10, r10, r11, ror #24
12432#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12433#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12434	lsl	r11, r4, #8
12435	lsr	r11, r11, #24
12436#else
12437	uxtb	r11, r4, ror #16
12438#endif
12439#else
12440	ubfx	r11, r4, #16, #8
12441#endif
12442	eor	r10, r10, lr, ror #8
12443	lsr	lr, r7, #24
12444	eor	r10, r10, r2, ror #16
12445#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12446#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12447	lsl	r2, r5, #16
12448	lsr	r2, r2, #24
12449#else
12450	uxtb	r2, r5, ror #8
12451#endif
12452#else
12453	ubfx	r2, r5, #8, #8
12454#endif
12455	ldr	r6, [r0, r6, lsl #2]
12456	ldr	lr, [r0, lr, lsl #2]
12457	ldr	r11, [r0, r11, lsl #2]
12458	ldr	r2, [r0, r2, lsl #2]
12459	eor	lr, lr, r6, ror #24
12460	ldm	r3!, {r4, r5, r6, r7}
12461	eor	r11, r11, lr, ror #24
12462	eor	r11, r11, r2, ror #8
12463	#   XOR in Key Schedule
12464	eor	r8, r8, r4
12465	eor	r9, r9, r5
12466	eor	r10, r10, r6
12467	eor	r11, r11, r7
12468#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12469#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12470	lsl	r4, r9, #8
12471	lsr	r4, r4, #24
12472#else
12473	uxtb	r4, r9, ror #16
12474#endif
12475#else
12476	ubfx	r4, r9, #16, #8
12477#endif
12478	lsr	r7, r8, #24
12479#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12480#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12481	lsl	lr, r10, #16
12482	lsr	lr, lr, #24
12483#else
12484	uxtb	lr, r10, ror #8
12485#endif
12486#else
12487	ubfx	lr, r10, #8, #8
12488#endif
12489#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12490#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12491	lsl	r2, r11, #24
12492	lsr	r2, r2, #24
12493#else
12494	uxtb	r2, r11
12495#endif
12496#else
12497	ubfx	r2, r11, #0, #8
12498#endif
12499	ldr	r4, [r0, r4, lsl #2]
12500	ldr	r7, [r0, r7, lsl #2]
12501	ldr	lr, [r0, lr, lsl #2]
12502	ldr	r2, [r0, r2, lsl #2]
12503#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12504#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12505	lsl	r5, r10, #8
12506	lsr	r5, r5, #24
12507#else
12508	uxtb	r5, r10, ror #16
12509#endif
12510#else
12511	ubfx	r5, r10, #16, #8
12512#endif
12513	eor	r4, r4, r7, ror #24
12514	lsr	r7, r9, #24
12515	eor	r4, r4, lr, ror #8
12516#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12517#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12518	lsl	lr, r11, #16
12519	lsr	lr, lr, #24
12520#else
12521	uxtb	lr, r11, ror #8
12522#endif
12523#else
12524	ubfx	lr, r11, #8, #8
12525#endif
12526	eor	r4, r4, r2, ror #16
12527#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12528#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12529	lsl	r2, r8, #24
12530	lsr	r2, r2, #24
12531#else
12532	uxtb	r2, r8
12533#endif
12534#else
12535	ubfx	r2, r8, #0, #8
12536#endif
12537	ldr	r5, [r0, r5, lsl #2]
12538	ldr	r7, [r0, r7, lsl #2]
12539	ldr	lr, [r0, lr, lsl #2]
12540	ldr	r2, [r0, r2, lsl #2]
12541#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12542#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12543	lsl	r6, r11, #8
12544	lsr	r6, r6, #24
12545#else
12546	uxtb	r6, r11, ror #16
12547#endif
12548#else
12549	ubfx	r6, r11, #16, #8
12550#endif
12551	eor	r5, r5, r7, ror #24
12552	lsr	r7, r10, #24
12553	eor	r5, r5, lr, ror #8
12554#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12555#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12556	lsl	lr, r8, #16
12557	lsr	lr, lr, #24
12558#else
12559	uxtb	lr, r8, ror #8
12560#endif
12561#else
12562	ubfx	lr, r8, #8, #8
12563#endif
12564	eor	r5, r5, r2, ror #16
12565#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12566#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12567	lsl	r2, r9, #24
12568	lsr	r2, r2, #24
12569#else
12570	uxtb	r2, r9
12571#endif
12572#else
12573	ubfx	r2, r9, #0, #8
12574#endif
12575	ldr	r6, [r0, r6, lsl #2]
12576	ldr	r7, [r0, r7, lsl #2]
12577	ldr	lr, [r0, lr, lsl #2]
12578	ldr	r2, [r0, r2, lsl #2]
12579#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12580#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12581	lsl	r10, r10, #24
12582	lsr	r10, r10, #24
12583#else
12584	uxtb	r10, r10
12585#endif
12586#else
12587	ubfx	r10, r10, #0, #8
12588#endif
12589	eor	r6, r6, r7, ror #24
12590#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12591#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12592	lsl	r7, r8, #8
12593	lsr	r7, r7, #24
12594#else
12595	uxtb	r7, r8, ror #16
12596#endif
12597#else
12598	ubfx	r7, r8, #16, #8
12599#endif
12600	eor	r6, r6, lr, ror #8
12601	lsr	lr, r11, #24
12602	eor	r6, r6, r2, ror #16
12603#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12604#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12605	lsl	r2, r9, #16
12606	lsr	r2, r2, #24
12607#else
12608	uxtb	r2, r9, ror #8
12609#endif
12610#else
12611	ubfx	r2, r9, #8, #8
12612#endif
12613	ldr	r10, [r0, r10, lsl #2]
12614	ldr	lr, [r0, lr, lsl #2]
12615	ldr	r7, [r0, r7, lsl #2]
12616	ldr	r2, [r0, r2, lsl #2]
12617	eor	lr, lr, r10, ror #24
12618	ldm	r3!, {r8, r9, r10, r11}
12619	eor	r7, r7, lr, ror #24
12620	eor	r7, r7, r2, ror #8
12621	#   XOR in Key Schedule
12622	eor	r4, r4, r8
12623	eor	r5, r5, r9
12624	eor	r6, r6, r10
12625	eor	r7, r7, r11
12626	subs	r1, r1, #1
12627	bne	L_AES_CBC_encrypt_block_nr_192
12628#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12629#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12630	lsl	r8, r5, #8
12631	lsr	r8, r8, #24
12632#else
12633	uxtb	r8, r5, ror #16
12634#endif
12635#else
12636	ubfx	r8, r5, #16, #8
12637#endif
12638	lsr	r11, r4, #24
12639#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12640#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12641	lsl	lr, r6, #16
12642	lsr	lr, lr, #24
12643#else
12644	uxtb	lr, r6, ror #8
12645#endif
12646#else
12647	ubfx	lr, r6, #8, #8
12648#endif
12649#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12650#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12651	lsl	r2, r7, #24
12652	lsr	r2, r2, #24
12653#else
12654	uxtb	r2, r7
12655#endif
12656#else
12657	ubfx	r2, r7, #0, #8
12658#endif
12659	ldr	r8, [r0, r8, lsl #2]
12660	ldr	r11, [r0, r11, lsl #2]
12661	ldr	lr, [r0, lr, lsl #2]
12662	ldr	r2, [r0, r2, lsl #2]
12663#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12664#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12665	lsl	r9, r6, #8
12666	lsr	r9, r9, #24
12667#else
12668	uxtb	r9, r6, ror #16
12669#endif
12670#else
12671	ubfx	r9, r6, #16, #8
12672#endif
12673	eor	r8, r8, r11, ror #24
12674	lsr	r11, r5, #24
12675	eor	r8, r8, lr, ror #8
12676#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12677#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12678	lsl	lr, r7, #16
12679	lsr	lr, lr, #24
12680#else
12681	uxtb	lr, r7, ror #8
12682#endif
12683#else
12684	ubfx	lr, r7, #8, #8
12685#endif
12686	eor	r8, r8, r2, ror #16
12687#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12688#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12689	lsl	r2, r4, #24
12690	lsr	r2, r2, #24
12691#else
12692	uxtb	r2, r4
12693#endif
12694#else
12695	ubfx	r2, r4, #0, #8
12696#endif
12697	ldr	r9, [r0, r9, lsl #2]
12698	ldr	r11, [r0, r11, lsl #2]
12699	ldr	lr, [r0, lr, lsl #2]
12700	ldr	r2, [r0, r2, lsl #2]
12701#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12702#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12703	lsl	r10, r7, #8
12704	lsr	r10, r10, #24
12705#else
12706	uxtb	r10, r7, ror #16
12707#endif
12708#else
12709	ubfx	r10, r7, #16, #8
12710#endif
12711	eor	r9, r9, r11, ror #24
12712	lsr	r11, r6, #24
12713	eor	r9, r9, lr, ror #8
12714#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12715#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12716	lsl	lr, r4, #16
12717	lsr	lr, lr, #24
12718#else
12719	uxtb	lr, r4, ror #8
12720#endif
12721#else
12722	ubfx	lr, r4, #8, #8
12723#endif
12724	eor	r9, r9, r2, ror #16
12725#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12726#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12727	lsl	r2, r5, #24
12728	lsr	r2, r2, #24
12729#else
12730	uxtb	r2, r5
12731#endif
12732#else
12733	ubfx	r2, r5, #0, #8
12734#endif
12735	ldr	r10, [r0, r10, lsl #2]
12736	ldr	r11, [r0, r11, lsl #2]
12737	ldr	lr, [r0, lr, lsl #2]
12738	ldr	r2, [r0, r2, lsl #2]
12739#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12740#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12741	lsl	r6, r6, #24
12742	lsr	r6, r6, #24
12743#else
12744	uxtb	r6, r6
12745#endif
12746#else
12747	ubfx	r6, r6, #0, #8
12748#endif
12749	eor	r10, r10, r11, ror #24
12750#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12751#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12752	lsl	r11, r4, #8
12753	lsr	r11, r11, #24
12754#else
12755	uxtb	r11, r4, ror #16
12756#endif
12757#else
12758	ubfx	r11, r4, #16, #8
12759#endif
12760	eor	r10, r10, lr, ror #8
12761	lsr	lr, r7, #24
12762	eor	r10, r10, r2, ror #16
12763#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12764#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12765	lsl	r2, r5, #16
12766	lsr	r2, r2, #24
12767#else
12768	uxtb	r2, r5, ror #8
12769#endif
12770#else
12771	ubfx	r2, r5, #8, #8
12772#endif
12773	ldr	r6, [r0, r6, lsl #2]
12774	ldr	lr, [r0, lr, lsl #2]
12775	ldr	r11, [r0, r11, lsl #2]
12776	ldr	r2, [r0, r2, lsl #2]
12777	eor	lr, lr, r6, ror #24
12778	ldm	r3!, {r4, r5, r6, r7}
12779	eor	r11, r11, lr, ror #24
12780	eor	r11, r11, r2, ror #8
12781	#   XOR in Key Schedule
12782	eor	r8, r8, r4
12783	eor	r9, r9, r5
12784	eor	r10, r10, r6
12785	eor	r11, r11, r7
12786#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12787#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12788	lsl	r4, r11, #24
12789	lsr	r4, r4, #24
12790#else
12791	uxtb	r4, r11
12792#endif
12793#else
12794	ubfx	r4, r11, #0, #8
12795#endif
12796#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12797#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12798	lsl	r7, r10, #16
12799	lsr	r7, r7, #24
12800#else
12801	uxtb	r7, r10, ror #8
12802#endif
12803#else
12804	ubfx	r7, r10, #8, #8
12805#endif
12806#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12807#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12808	lsl	lr, r9, #8
12809	lsr	lr, lr, #24
12810#else
12811	uxtb	lr, r9, ror #16
12812#endif
12813#else
12814	ubfx	lr, r9, #16, #8
12815#endif
12816	lsr	r2, r8, #24
12817	ldrb	r4, [r0, r4, lsl #2]
12818	ldrb	r7, [r0, r7, lsl #2]
12819	ldrb	lr, [r0, lr, lsl #2]
12820	ldrb	r2, [r0, r2, lsl #2]
12821#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12822#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12823	lsl	r5, r8, #24
12824	lsr	r5, r5, #24
12825#else
12826	uxtb	r5, r8
12827#endif
12828#else
12829	ubfx	r5, r8, #0, #8
12830#endif
12831	eor	r4, r4, r7, lsl #8
12832#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12833#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12834	lsl	r7, r11, #16
12835	lsr	r7, r7, #24
12836#else
12837	uxtb	r7, r11, ror #8
12838#endif
12839#else
12840	ubfx	r7, r11, #8, #8
12841#endif
12842	eor	r4, r4, lr, lsl #16
12843#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12844#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12845	lsl	lr, r10, #8
12846	lsr	lr, lr, #24
12847#else
12848	uxtb	lr, r10, ror #16
12849#endif
12850#else
12851	ubfx	lr, r10, #16, #8
12852#endif
12853	eor	r4, r4, r2, lsl #24
12854	lsr	r2, r9, #24
12855	ldrb	r5, [r0, r5, lsl #2]
12856	ldrb	r7, [r0, r7, lsl #2]
12857	ldrb	lr, [r0, lr, lsl #2]
12858	ldrb	r2, [r0, r2, lsl #2]
12859#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12860#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12861	lsl	r6, r9, #24
12862	lsr	r6, r6, #24
12863#else
12864	uxtb	r6, r9
12865#endif
12866#else
12867	ubfx	r6, r9, #0, #8
12868#endif
12869	eor	r5, r5, r7, lsl #8
12870#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12871#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12872	lsl	r7, r8, #16
12873	lsr	r7, r7, #24
12874#else
12875	uxtb	r7, r8, ror #8
12876#endif
12877#else
12878	ubfx	r7, r8, #8, #8
12879#endif
12880	eor	r5, r5, lr, lsl #16
12881#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12882#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12883	lsl	lr, r11, #8
12884	lsr	lr, lr, #24
12885#else
12886	uxtb	lr, r11, ror #16
12887#endif
12888#else
12889	ubfx	lr, r11, #16, #8
12890#endif
12891	eor	r5, r5, r2, lsl #24
12892	lsr	r2, r10, #24
12893	ldrb	r6, [r0, r6, lsl #2]
12894	ldrb	r7, [r0, r7, lsl #2]
12895	ldrb	lr, [r0, lr, lsl #2]
12896	ldrb	r2, [r0, r2, lsl #2]
12897	lsr	r11, r11, #24
12898	eor	r6, r6, r7, lsl #8
12899#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12900#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12901	lsl	r7, r10, #24
12902	lsr	r7, r7, #24
12903#else
12904	uxtb	r7, r10
12905#endif
12906#else
12907	ubfx	r7, r10, #0, #8
12908#endif
12909	eor	r6, r6, lr, lsl #16
12910#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12911#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12912	lsl	lr, r9, #16
12913	lsr	lr, lr, #24
12914#else
12915	uxtb	lr, r9, ror #8
12916#endif
12917#else
12918	ubfx	lr, r9, #8, #8
12919#endif
12920	eor	r6, r6, r2, lsl #24
12921#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
12922#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12923	lsl	r2, r8, #8
12924	lsr	r2, r2, #24
12925#else
12926	uxtb	r2, r8, ror #16
12927#endif
12928#else
12929	ubfx	r2, r8, #16, #8
12930#endif
12931	ldrb	r11, [r0, r11, lsl #2]
12932	ldrb	r7, [r0, r7, lsl #2]
12933	ldrb	lr, [r0, lr, lsl #2]
12934	ldrb	r2, [r0, r2, lsl #2]
12935	eor	lr, lr, r11, lsl #16
12936	ldm	r3, {r8, r9, r10, r11}
12937	eor	r7, r7, lr, lsl #8
12938	eor	r7, r7, r2, lsl #16
12939	#   XOR in Key Schedule
12940	eor	r4, r4, r8
12941	eor	r5, r5, r9
12942	eor	r6, r6, r10
12943	eor	r7, r7, r11
12944#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
12945	pop	{r1, r2, lr}
12946	ldr	r3, [sp]
12947#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12948	eor	r8, r4, r4, ror #16
12949	eor	r9, r5, r5, ror #16
12950	eor	r10, r6, r6, ror #16
12951	eor	r11, r7, r7, ror #16
12952	bic	r8, r8, #0xff0000
12953	bic	r9, r9, #0xff0000
12954	bic	r10, r10, #0xff0000
12955	bic	r11, r11, #0xff0000
12956	ror	r4, r4, #8
12957	ror	r5, r5, #8
12958	ror	r6, r6, #8
12959	ror	r7, r7, #8
12960	eor	r4, r4, r8, lsr #8
12961	eor	r5, r5, r9, lsr #8
12962	eor	r6, r6, r10, lsr #8
12963	eor	r7, r7, r11, lsr #8
12964#else
12965	rev	r4, r4
12966	rev	r5, r5
12967	rev	r6, r6
12968	rev	r7, r7
12969#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
12970	str	r4, [r1]
12971	str	r5, [r1, #4]
12972	str	r6, [r1, #8]
12973	str	r7, [r1, #12]
12974	subs	r2, r2, #16
12975	add	lr, lr, #16
12976	add	r1, r1, #16
12977	bne	L_AES_CBC_encrypt_loop_block_192
12978	b	L_AES_CBC_encrypt_end
12979L_AES_CBC_encrypt_start_block_128:
12980L_AES_CBC_encrypt_loop_block_128:
12981	ldr	r8, [lr]
12982	ldr	r9, [lr, #4]
12983	ldr	r10, [lr, #8]
12984	ldr	r11, [lr, #12]
12985	eor	r4, r4, r8
12986	eor	r5, r5, r9
12987	eor	r6, r6, r10
12988	eor	r7, r7, r11
12989	push	{r1, r2, lr}
12990#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
12991	eor	r8, r4, r4, ror #16
12992	eor	r9, r5, r5, ror #16
12993	eor	r10, r6, r6, ror #16
12994	eor	r11, r7, r7, ror #16
12995	bic	r8, r8, #0xff0000
12996	bic	r9, r9, #0xff0000
12997	bic	r10, r10, #0xff0000
12998	bic	r11, r11, #0xff0000
12999	ror	r4, r4, #8
13000	ror	r5, r5, #8
13001	ror	r6, r6, #8
13002	ror	r7, r7, #8
13003	eor	r4, r4, r8, lsr #8
13004	eor	r5, r5, r9, lsr #8
13005	eor	r6, r6, r10, lsr #8
13006	eor	r7, r7, r11, lsr #8
13007#else
13008	rev	r4, r4
13009	rev	r5, r5
13010	rev	r6, r6
13011	rev	r7, r7
13012#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
13013	ldm	r3!, {r8, r9, r10, r11}
13014	# Round: 0 - XOR in key schedule
13015	eor	r4, r4, r8
13016	eor	r5, r5, r9
13017	eor	r6, r6, r10
13018	eor	r7, r7, r11
13019	mov	r1, #4
13020#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
13021	bl	AES_encrypt_block
13022#else
13023L_AES_CBC_encrypt_block_nr_128:
13024#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13025#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13026	lsl	r8, r5, #8
13027	lsr	r8, r8, #24
13028#else
13029	uxtb	r8, r5, ror #16
13030#endif
13031#else
13032	ubfx	r8, r5, #16, #8
13033#endif
13034	lsr	r11, r4, #24
13035#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13036#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13037	lsl	lr, r6, #16
13038	lsr	lr, lr, #24
13039#else
13040	uxtb	lr, r6, ror #8
13041#endif
13042#else
13043	ubfx	lr, r6, #8, #8
13044#endif
13045#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13046#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13047	lsl	r2, r7, #24
13048	lsr	r2, r2, #24
13049#else
13050	uxtb	r2, r7
13051#endif
13052#else
13053	ubfx	r2, r7, #0, #8
13054#endif
13055	ldr	r8, [r0, r8, lsl #2]
13056	ldr	r11, [r0, r11, lsl #2]
13057	ldr	lr, [r0, lr, lsl #2]
13058	ldr	r2, [r0, r2, lsl #2]
13059#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13060#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13061	lsl	r9, r6, #8
13062	lsr	r9, r9, #24
13063#else
13064	uxtb	r9, r6, ror #16
13065#endif
13066#else
13067	ubfx	r9, r6, #16, #8
13068#endif
13069	eor	r8, r8, r11, ror #24
13070	lsr	r11, r5, #24
13071	eor	r8, r8, lr, ror #8
13072#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13073#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13074	lsl	lr, r7, #16
13075	lsr	lr, lr, #24
13076#else
13077	uxtb	lr, r7, ror #8
13078#endif
13079#else
13080	ubfx	lr, r7, #8, #8
13081#endif
13082	eor	r8, r8, r2, ror #16
13083#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13084#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13085	lsl	r2, r4, #24
13086	lsr	r2, r2, #24
13087#else
13088	uxtb	r2, r4
13089#endif
13090#else
13091	ubfx	r2, r4, #0, #8
13092#endif
13093	ldr	r9, [r0, r9, lsl #2]
13094	ldr	r11, [r0, r11, lsl #2]
13095	ldr	lr, [r0, lr, lsl #2]
13096	ldr	r2, [r0, r2, lsl #2]
13097#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13098#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13099	lsl	r10, r7, #8
13100	lsr	r10, r10, #24
13101#else
13102	uxtb	r10, r7, ror #16
13103#endif
13104#else
13105	ubfx	r10, r7, #16, #8
13106#endif
13107	eor	r9, r9, r11, ror #24
13108	lsr	r11, r6, #24
13109	eor	r9, r9, lr, ror #8
13110#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13111#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13112	lsl	lr, r4, #16
13113	lsr	lr, lr, #24
13114#else
13115	uxtb	lr, r4, ror #8
13116#endif
13117#else
13118	ubfx	lr, r4, #8, #8
13119#endif
13120	eor	r9, r9, r2, ror #16
13121#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13122#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13123	lsl	r2, r5, #24
13124	lsr	r2, r2, #24
13125#else
13126	uxtb	r2, r5
13127#endif
13128#else
13129	ubfx	r2, r5, #0, #8
13130#endif
13131	ldr	r10, [r0, r10, lsl #2]
13132	ldr	r11, [r0, r11, lsl #2]
13133	ldr	lr, [r0, lr, lsl #2]
13134	ldr	r2, [r0, r2, lsl #2]
13135#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13136#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13137	lsl	r6, r6, #24
13138	lsr	r6, r6, #24
13139#else
13140	uxtb	r6, r6
13141#endif
13142#else
13143	ubfx	r6, r6, #0, #8
13144#endif
13145	eor	r10, r10, r11, ror #24
13146#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13147#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13148	lsl	r11, r4, #8
13149	lsr	r11, r11, #24
13150#else
13151	uxtb	r11, r4, ror #16
13152#endif
13153#else
13154	ubfx	r11, r4, #16, #8
13155#endif
13156	eor	r10, r10, lr, ror #8
13157	lsr	lr, r7, #24
13158	eor	r10, r10, r2, ror #16
13159#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13160#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13161	lsl	r2, r5, #16
13162	lsr	r2, r2, #24
13163#else
13164	uxtb	r2, r5, ror #8
13165#endif
13166#else
13167	ubfx	r2, r5, #8, #8
13168#endif
13169	ldr	r6, [r0, r6, lsl #2]
13170	ldr	lr, [r0, lr, lsl #2]
13171	ldr	r11, [r0, r11, lsl #2]
13172	ldr	r2, [r0, r2, lsl #2]
13173	eor	lr, lr, r6, ror #24
13174	ldm	r3!, {r4, r5, r6, r7}
13175	eor	r11, r11, lr, ror #24
13176	eor	r11, r11, r2, ror #8
13177	#   XOR in Key Schedule
13178	eor	r8, r8, r4
13179	eor	r9, r9, r5
13180	eor	r10, r10, r6
13181	eor	r11, r11, r7
13182#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13183#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13184	lsl	r4, r9, #8
13185	lsr	r4, r4, #24
13186#else
13187	uxtb	r4, r9, ror #16
13188#endif
13189#else
13190	ubfx	r4, r9, #16, #8
13191#endif
13192	lsr	r7, r8, #24
13193#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13194#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13195	lsl	lr, r10, #16
13196	lsr	lr, lr, #24
13197#else
13198	uxtb	lr, r10, ror #8
13199#endif
13200#else
13201	ubfx	lr, r10, #8, #8
13202#endif
13203#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13204#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13205	lsl	r2, r11, #24
13206	lsr	r2, r2, #24
13207#else
13208	uxtb	r2, r11
13209#endif
13210#else
13211	ubfx	r2, r11, #0, #8
13212#endif
13213	ldr	r4, [r0, r4, lsl #2]
13214	ldr	r7, [r0, r7, lsl #2]
13215	ldr	lr, [r0, lr, lsl #2]
13216	ldr	r2, [r0, r2, lsl #2]
13217#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13218#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13219	lsl	r5, r10, #8
13220	lsr	r5, r5, #24
13221#else
13222	uxtb	r5, r10, ror #16
13223#endif
13224#else
13225	ubfx	r5, r10, #16, #8
13226#endif
13227	eor	r4, r4, r7, ror #24
13228	lsr	r7, r9, #24
13229	eor	r4, r4, lr, ror #8
13230#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13231#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13232	lsl	lr, r11, #16
13233	lsr	lr, lr, #24
13234#else
13235	uxtb	lr, r11, ror #8
13236#endif
13237#else
13238	ubfx	lr, r11, #8, #8
13239#endif
13240	eor	r4, r4, r2, ror #16
13241#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13242#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13243	lsl	r2, r8, #24
13244	lsr	r2, r2, #24
13245#else
13246	uxtb	r2, r8
13247#endif
13248#else
13249	ubfx	r2, r8, #0, #8
13250#endif
13251	ldr	r5, [r0, r5, lsl #2]
13252	ldr	r7, [r0, r7, lsl #2]
13253	ldr	lr, [r0, lr, lsl #2]
13254	ldr	r2, [r0, r2, lsl #2]
13255#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13256#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13257	lsl	r6, r11, #8
13258	lsr	r6, r6, #24
13259#else
13260	uxtb	r6, r11, ror #16
13261#endif
13262#else
13263	ubfx	r6, r11, #16, #8
13264#endif
13265	eor	r5, r5, r7, ror #24
13266	lsr	r7, r10, #24
13267	eor	r5, r5, lr, ror #8
13268#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13269#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13270	lsl	lr, r8, #16
13271	lsr	lr, lr, #24
13272#else
13273	uxtb	lr, r8, ror #8
13274#endif
13275#else
13276	ubfx	lr, r8, #8, #8
13277#endif
13278	eor	r5, r5, r2, ror #16
13279#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13280#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13281	lsl	r2, r9, #24
13282	lsr	r2, r2, #24
13283#else
13284	uxtb	r2, r9
13285#endif
13286#else
13287	ubfx	r2, r9, #0, #8
13288#endif
13289	ldr	r6, [r0, r6, lsl #2]
13290	ldr	r7, [r0, r7, lsl #2]
13291	ldr	lr, [r0, lr, lsl #2]
13292	ldr	r2, [r0, r2, lsl #2]
13293#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13294#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13295	lsl	r10, r10, #24
13296	lsr	r10, r10, #24
13297#else
13298	uxtb	r10, r10
13299#endif
13300#else
13301	ubfx	r10, r10, #0, #8
13302#endif
13303	eor	r6, r6, r7, ror #24
13304#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13305#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13306	lsl	r7, r8, #8
13307	lsr	r7, r7, #24
13308#else
13309	uxtb	r7, r8, ror #16
13310#endif
13311#else
13312	ubfx	r7, r8, #16, #8
13313#endif
13314	eor	r6, r6, lr, ror #8
13315	lsr	lr, r11, #24
13316	eor	r6, r6, r2, ror #16
13317#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13318#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13319	lsl	r2, r9, #16
13320	lsr	r2, r2, #24
13321#else
13322	uxtb	r2, r9, ror #8
13323#endif
13324#else
13325	ubfx	r2, r9, #8, #8
13326#endif
13327	ldr	r10, [r0, r10, lsl #2]
13328	ldr	lr, [r0, lr, lsl #2]
13329	ldr	r7, [r0, r7, lsl #2]
13330	ldr	r2, [r0, r2, lsl #2]
13331	eor	lr, lr, r10, ror #24
13332	ldm	r3!, {r8, r9, r10, r11}
13333	eor	r7, r7, lr, ror #24
13334	eor	r7, r7, r2, ror #8
13335	#   XOR in Key Schedule
13336	eor	r4, r4, r8
13337	eor	r5, r5, r9
13338	eor	r6, r6, r10
13339	eor	r7, r7, r11
13340	subs	r1, r1, #1
13341	bne	L_AES_CBC_encrypt_block_nr_128
13342#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13343#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13344	lsl	r8, r5, #8
13345	lsr	r8, r8, #24
13346#else
13347	uxtb	r8, r5, ror #16
13348#endif
13349#else
13350	ubfx	r8, r5, #16, #8
13351#endif
13352	lsr	r11, r4, #24
13353#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13354#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13355	lsl	lr, r6, #16
13356	lsr	lr, lr, #24
13357#else
13358	uxtb	lr, r6, ror #8
13359#endif
13360#else
13361	ubfx	lr, r6, #8, #8
13362#endif
13363#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13364#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13365	lsl	r2, r7, #24
13366	lsr	r2, r2, #24
13367#else
13368	uxtb	r2, r7
13369#endif
13370#else
13371	ubfx	r2, r7, #0, #8
13372#endif
13373	ldr	r8, [r0, r8, lsl #2]
13374	ldr	r11, [r0, r11, lsl #2]
13375	ldr	lr, [r0, lr, lsl #2]
13376	ldr	r2, [r0, r2, lsl #2]
13377#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13378#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13379	lsl	r9, r6, #8
13380	lsr	r9, r9, #24
13381#else
13382	uxtb	r9, r6, ror #16
13383#endif
13384#else
13385	ubfx	r9, r6, #16, #8
13386#endif
13387	eor	r8, r8, r11, ror #24
13388	lsr	r11, r5, #24
13389	eor	r8, r8, lr, ror #8
13390#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13391#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13392	lsl	lr, r7, #16
13393	lsr	lr, lr, #24
13394#else
13395	uxtb	lr, r7, ror #8
13396#endif
13397#else
13398	ubfx	lr, r7, #8, #8
13399#endif
13400	eor	r8, r8, r2, ror #16
13401#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13402#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13403	lsl	r2, r4, #24
13404	lsr	r2, r2, #24
13405#else
13406	uxtb	r2, r4
13407#endif
13408#else
13409	ubfx	r2, r4, #0, #8
13410#endif
13411	ldr	r9, [r0, r9, lsl #2]
13412	ldr	r11, [r0, r11, lsl #2]
13413	ldr	lr, [r0, lr, lsl #2]
13414	ldr	r2, [r0, r2, lsl #2]
13415#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13416#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13417	lsl	r10, r7, #8
13418	lsr	r10, r10, #24
13419#else
13420	uxtb	r10, r7, ror #16
13421#endif
13422#else
13423	ubfx	r10, r7, #16, #8
13424#endif
13425	eor	r9, r9, r11, ror #24
13426	lsr	r11, r6, #24
13427	eor	r9, r9, lr, ror #8
13428#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13429#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13430	lsl	lr, r4, #16
13431	lsr	lr, lr, #24
13432#else
13433	uxtb	lr, r4, ror #8
13434#endif
13435#else
13436	ubfx	lr, r4, #8, #8
13437#endif
13438	eor	r9, r9, r2, ror #16
13439#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13440#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13441	lsl	r2, r5, #24
13442	lsr	r2, r2, #24
13443#else
13444	uxtb	r2, r5
13445#endif
13446#else
13447	ubfx	r2, r5, #0, #8
13448#endif
13449	ldr	r10, [r0, r10, lsl #2]
13450	ldr	r11, [r0, r11, lsl #2]
13451	ldr	lr, [r0, lr, lsl #2]
13452	ldr	r2, [r0, r2, lsl #2]
13453#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13454#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13455	lsl	r6, r6, #24
13456	lsr	r6, r6, #24
13457#else
13458	uxtb	r6, r6
13459#endif
13460#else
13461	ubfx	r6, r6, #0, #8
13462#endif
13463	eor	r10, r10, r11, ror #24
13464#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13465#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13466	lsl	r11, r4, #8
13467	lsr	r11, r11, #24
13468#else
13469	uxtb	r11, r4, ror #16
13470#endif
13471#else
13472	ubfx	r11, r4, #16, #8
13473#endif
13474	eor	r10, r10, lr, ror #8
13475	lsr	lr, r7, #24
13476	eor	r10, r10, r2, ror #16
13477#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13478#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13479	lsl	r2, r5, #16
13480	lsr	r2, r2, #24
13481#else
13482	uxtb	r2, r5, ror #8
13483#endif
13484#else
13485	ubfx	r2, r5, #8, #8
13486#endif
13487	ldr	r6, [r0, r6, lsl #2]
13488	ldr	lr, [r0, lr, lsl #2]
13489	ldr	r11, [r0, r11, lsl #2]
13490	ldr	r2, [r0, r2, lsl #2]
13491	eor	lr, lr, r6, ror #24
13492	ldm	r3!, {r4, r5, r6, r7}
13493	eor	r11, r11, lr, ror #24
13494	eor	r11, r11, r2, ror #8
13495	#   XOR in Key Schedule
13496	eor	r8, r8, r4
13497	eor	r9, r9, r5
13498	eor	r10, r10, r6
13499	eor	r11, r11, r7
13500#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13501#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13502	lsl	r4, r11, #24
13503	lsr	r4, r4, #24
13504#else
13505	uxtb	r4, r11
13506#endif
13507#else
13508	ubfx	r4, r11, #0, #8
13509#endif
13510#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13511#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13512	lsl	r7, r10, #16
13513	lsr	r7, r7, #24
13514#else
13515	uxtb	r7, r10, ror #8
13516#endif
13517#else
13518	ubfx	r7, r10, #8, #8
13519#endif
13520#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13521#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13522	lsl	lr, r9, #8
13523	lsr	lr, lr, #24
13524#else
13525	uxtb	lr, r9, ror #16
13526#endif
13527#else
13528	ubfx	lr, r9, #16, #8
13529#endif
13530	lsr	r2, r8, #24
13531	ldrb	r4, [r0, r4, lsl #2]
13532	ldrb	r7, [r0, r7, lsl #2]
13533	ldrb	lr, [r0, lr, lsl #2]
13534	ldrb	r2, [r0, r2, lsl #2]
13535#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13536#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13537	lsl	r5, r8, #24
13538	lsr	r5, r5, #24
13539#else
13540	uxtb	r5, r8
13541#endif
13542#else
13543	ubfx	r5, r8, #0, #8
13544#endif
13545	eor	r4, r4, r7, lsl #8
13546#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13547#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13548	lsl	r7, r11, #16
13549	lsr	r7, r7, #24
13550#else
13551	uxtb	r7, r11, ror #8
13552#endif
13553#else
13554	ubfx	r7, r11, #8, #8
13555#endif
13556	eor	r4, r4, lr, lsl #16
13557#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13558#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13559	lsl	lr, r10, #8
13560	lsr	lr, lr, #24
13561#else
13562	uxtb	lr, r10, ror #16
13563#endif
13564#else
13565	ubfx	lr, r10, #16, #8
13566#endif
13567	eor	r4, r4, r2, lsl #24
13568	lsr	r2, r9, #24
13569	ldrb	r5, [r0, r5, lsl #2]
13570	ldrb	r7, [r0, r7, lsl #2]
13571	ldrb	lr, [r0, lr, lsl #2]
13572	ldrb	r2, [r0, r2, lsl #2]
13573#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13574#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13575	lsl	r6, r9, #24
13576	lsr	r6, r6, #24
13577#else
13578	uxtb	r6, r9
13579#endif
13580#else
13581	ubfx	r6, r9, #0, #8
13582#endif
13583	eor	r5, r5, r7, lsl #8
13584#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13585#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13586	lsl	r7, r8, #16
13587	lsr	r7, r7, #24
13588#else
13589	uxtb	r7, r8, ror #8
13590#endif
13591#else
13592	ubfx	r7, r8, #8, #8
13593#endif
13594	eor	r5, r5, lr, lsl #16
13595#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13596#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13597	lsl	lr, r11, #8
13598	lsr	lr, lr, #24
13599#else
13600	uxtb	lr, r11, ror #16
13601#endif
13602#else
13603	ubfx	lr, r11, #16, #8
13604#endif
13605	eor	r5, r5, r2, lsl #24
13606	lsr	r2, r10, #24
13607	ldrb	r6, [r0, r6, lsl #2]
13608	ldrb	r7, [r0, r7, lsl #2]
13609	ldrb	lr, [r0, lr, lsl #2]
13610	ldrb	r2, [r0, r2, lsl #2]
13611	lsr	r11, r11, #24
13612	eor	r6, r6, r7, lsl #8
13613#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13614#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13615	lsl	r7, r10, #24
13616	lsr	r7, r7, #24
13617#else
13618	uxtb	r7, r10
13619#endif
13620#else
13621	ubfx	r7, r10, #0, #8
13622#endif
13623	eor	r6, r6, lr, lsl #16
13624#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13625#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13626	lsl	lr, r9, #16
13627	lsr	lr, lr, #24
13628#else
13629	uxtb	lr, r9, ror #8
13630#endif
13631#else
13632	ubfx	lr, r9, #8, #8
13633#endif
13634	eor	r6, r6, r2, lsl #24
13635#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13636#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13637	lsl	r2, r8, #8
13638	lsr	r2, r2, #24
13639#else
13640	uxtb	r2, r8, ror #16
13641#endif
13642#else
13643	ubfx	r2, r8, #16, #8
13644#endif
13645	ldrb	r11, [r0, r11, lsl #2]
13646	ldrb	r7, [r0, r7, lsl #2]
13647	ldrb	lr, [r0, lr, lsl #2]
13648	ldrb	r2, [r0, r2, lsl #2]
13649	eor	lr, lr, r11, lsl #16
13650	ldm	r3, {r8, r9, r10, r11}
13651	eor	r7, r7, lr, lsl #8
13652	eor	r7, r7, r2, lsl #16
13653	#   XOR in Key Schedule
13654	eor	r4, r4, r8
13655	eor	r5, r5, r9
13656	eor	r6, r6, r10
13657	eor	r7, r7, r11
13658#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
13659	pop	{r1, r2, lr}
13660	ldr	r3, [sp]
13661#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13662	eor	r8, r4, r4, ror #16
13663	eor	r9, r5, r5, ror #16
13664	eor	r10, r6, r6, ror #16
13665	eor	r11, r7, r7, ror #16
13666	bic	r8, r8, #0xff0000
13667	bic	r9, r9, #0xff0000
13668	bic	r10, r10, #0xff0000
13669	bic	r11, r11, #0xff0000
13670	ror	r4, r4, #8
13671	ror	r5, r5, #8
13672	ror	r6, r6, #8
13673	ror	r7, r7, #8
13674	eor	r4, r4, r8, lsr #8
13675	eor	r5, r5, r9, lsr #8
13676	eor	r6, r6, r10, lsr #8
13677	eor	r7, r7, r11, lsr #8
13678#else
13679	rev	r4, r4
13680	rev	r5, r5
13681	rev	r6, r6
13682	rev	r7, r7
13683#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
13684	str	r4, [r1]
13685	str	r5, [r1, #4]
13686	str	r6, [r1, #8]
13687	str	r7, [r1, #12]
13688	subs	r2, r2, #16
13689	add	lr, lr, #16
13690	add	r1, r1, #16
13691	bne	L_AES_CBC_encrypt_loop_block_128
13692L_AES_CBC_encrypt_end:
13693	pop	{r3, r9}
13694	stm	r9, {r4, r5, r6, r7}
13695	pop	{r4, r5, r6, r7, r8, r9, r10, r11, pc}
13696	.size	AES_CBC_encrypt,.-AES_CBC_encrypt
13697#endif /* HAVE_AES_CBC */
13698#ifdef WOLFSSL_AES_COUNTER
13699#ifndef __APPLE__
13700	.text
13701	.type	L_AES_ARM32_te_ctr, %object
13702	.size	L_AES_ARM32_te_ctr, 12
13703#else
13704	.section	__DATA,__data
13705#endif /* __APPLE__ */
13706	# 8-byte aligned, 64-bit aligned
13707#ifndef __APPLE__
13708	.align	3
13709#else
13710	.p2align	3
13711#endif /* __APPLE__ */
13712L_AES_ARM32_te_ctr:
13713	.long	L_AES_ARM32_te_data
13714	.text
13715	.align	4
13716	.globl	AES_CTR_encrypt
13717	.type	AES_CTR_encrypt, %function
13718AES_CTR_encrypt:
13719	push	{r4, r5, r6, r7, r8, r9, r10, r11, lr}
13720	ldr	r12, [sp, #36]
13721	ldr	r8, [sp, #40]
13722	mov	lr, r0
13723	adr	r0, L_AES_ARM32_te_ctr
13724	ldr	r0, [r0]
13725	ldm	r8, {r4, r5, r6, r7}
13726#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13727	eor	r10, r4, r4, ror #16
13728	eor	r11, r5, r5, ror #16
13729	bic	r10, r10, #0xff0000
13730	bic	r11, r11, #0xff0000
13731	ror	r4, r4, #8
13732	ror	r5, r5, #8
13733	eor	r4, r4, r10, lsr #8
13734	eor	r5, r5, r11, lsr #8
13735	eor	r10, r6, r6, ror #16
13736	eor	r11, r7, r7, ror #16
13737	bic	r10, r10, #0xff0000
13738	bic	r11, r11, #0xff0000
13739	ror	r6, r6, #8
13740	ror	r7, r7, #8
13741	eor	r6, r6, r10, lsr #8
13742	eor	r7, r7, r11, lsr #8
13743#else
13744	rev	r4, r4
13745	rev	r5, r5
13746	rev	r6, r6
13747	rev	r7, r7
13748#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
13749	stm	r8, {r4, r5, r6, r7}
13750	push	{r3, r8}
13751	cmp	r12, #10
13752	beq	L_AES_CTR_encrypt_start_block_128
13753	cmp	r12, #12
13754	beq	L_AES_CTR_encrypt_start_block_192
13755L_AES_CTR_encrypt_loop_block_256:
13756	push	{r1, r2, lr}
13757	ldr	lr, [sp, #16]
13758	adds	r11, r7, #1
13759	adcs	r10, r6, #0
13760	adcs	r9, r5, #0
13761	adc	r8, r4, #0
13762	stm	lr, {r8, r9, r10, r11}
13763	ldm	r3!, {r8, r9, r10, r11}
13764	# Round: 0 - XOR in key schedule
13765	eor	r4, r4, r8
13766	eor	r5, r5, r9
13767	eor	r6, r6, r10
13768	eor	r7, r7, r11
13769	mov	r1, #6
13770#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
13771	bl	AES_encrypt_block
13772#else
13773L_AES_CTR_encrypt_block_nr_256:
13774#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13775#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13776	lsl	r8, r5, #8
13777	lsr	r8, r8, #24
13778#else
13779	uxtb	r8, r5, ror #16
13780#endif
13781#else
13782	ubfx	r8, r5, #16, #8
13783#endif
13784	lsr	r11, r4, #24
13785#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13786#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13787	lsl	lr, r6, #16
13788	lsr	lr, lr, #24
13789#else
13790	uxtb	lr, r6, ror #8
13791#endif
13792#else
13793	ubfx	lr, r6, #8, #8
13794#endif
13795#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13796#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13797	lsl	r2, r7, #24
13798	lsr	r2, r2, #24
13799#else
13800	uxtb	r2, r7
13801#endif
13802#else
13803	ubfx	r2, r7, #0, #8
13804#endif
13805	ldr	r8, [r0, r8, lsl #2]
13806	ldr	r11, [r0, r11, lsl #2]
13807	ldr	lr, [r0, lr, lsl #2]
13808	ldr	r2, [r0, r2, lsl #2]
13809#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13810#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13811	lsl	r9, r6, #8
13812	lsr	r9, r9, #24
13813#else
13814	uxtb	r9, r6, ror #16
13815#endif
13816#else
13817	ubfx	r9, r6, #16, #8
13818#endif
13819	eor	r8, r8, r11, ror #24
13820	lsr	r11, r5, #24
13821	eor	r8, r8, lr, ror #8
13822#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13823#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13824	lsl	lr, r7, #16
13825	lsr	lr, lr, #24
13826#else
13827	uxtb	lr, r7, ror #8
13828#endif
13829#else
13830	ubfx	lr, r7, #8, #8
13831#endif
13832	eor	r8, r8, r2, ror #16
13833#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13834#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13835	lsl	r2, r4, #24
13836	lsr	r2, r2, #24
13837#else
13838	uxtb	r2, r4
13839#endif
13840#else
13841	ubfx	r2, r4, #0, #8
13842#endif
13843	ldr	r9, [r0, r9, lsl #2]
13844	ldr	r11, [r0, r11, lsl #2]
13845	ldr	lr, [r0, lr, lsl #2]
13846	ldr	r2, [r0, r2, lsl #2]
13847#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13848#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13849	lsl	r10, r7, #8
13850	lsr	r10, r10, #24
13851#else
13852	uxtb	r10, r7, ror #16
13853#endif
13854#else
13855	ubfx	r10, r7, #16, #8
13856#endif
13857	eor	r9, r9, r11, ror #24
13858	lsr	r11, r6, #24
13859	eor	r9, r9, lr, ror #8
13860#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13861#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13862	lsl	lr, r4, #16
13863	lsr	lr, lr, #24
13864#else
13865	uxtb	lr, r4, ror #8
13866#endif
13867#else
13868	ubfx	lr, r4, #8, #8
13869#endif
13870	eor	r9, r9, r2, ror #16
13871#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13872#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13873	lsl	r2, r5, #24
13874	lsr	r2, r2, #24
13875#else
13876	uxtb	r2, r5
13877#endif
13878#else
13879	ubfx	r2, r5, #0, #8
13880#endif
13881	ldr	r10, [r0, r10, lsl #2]
13882	ldr	r11, [r0, r11, lsl #2]
13883	ldr	lr, [r0, lr, lsl #2]
13884	ldr	r2, [r0, r2, lsl #2]
13885#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13886#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13887	lsl	r6, r6, #24
13888	lsr	r6, r6, #24
13889#else
13890	uxtb	r6, r6
13891#endif
13892#else
13893	ubfx	r6, r6, #0, #8
13894#endif
13895	eor	r10, r10, r11, ror #24
13896#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13897#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13898	lsl	r11, r4, #8
13899	lsr	r11, r11, #24
13900#else
13901	uxtb	r11, r4, ror #16
13902#endif
13903#else
13904	ubfx	r11, r4, #16, #8
13905#endif
13906	eor	r10, r10, lr, ror #8
13907	lsr	lr, r7, #24
13908	eor	r10, r10, r2, ror #16
13909#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13910#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13911	lsl	r2, r5, #16
13912	lsr	r2, r2, #24
13913#else
13914	uxtb	r2, r5, ror #8
13915#endif
13916#else
13917	ubfx	r2, r5, #8, #8
13918#endif
13919	ldr	r6, [r0, r6, lsl #2]
13920	ldr	lr, [r0, lr, lsl #2]
13921	ldr	r11, [r0, r11, lsl #2]
13922	ldr	r2, [r0, r2, lsl #2]
13923	eor	lr, lr, r6, ror #24
13924	ldm	r3!, {r4, r5, r6, r7}
13925	eor	r11, r11, lr, ror #24
13926	eor	r11, r11, r2, ror #8
13927	#   XOR in Key Schedule
13928	eor	r8, r8, r4
13929	eor	r9, r9, r5
13930	eor	r10, r10, r6
13931	eor	r11, r11, r7
13932#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13933#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13934	lsl	r4, r9, #8
13935	lsr	r4, r4, #24
13936#else
13937	uxtb	r4, r9, ror #16
13938#endif
13939#else
13940	ubfx	r4, r9, #16, #8
13941#endif
13942	lsr	r7, r8, #24
13943#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13944#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13945	lsl	lr, r10, #16
13946	lsr	lr, lr, #24
13947#else
13948	uxtb	lr, r10, ror #8
13949#endif
13950#else
13951	ubfx	lr, r10, #8, #8
13952#endif
13953#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13954#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13955	lsl	r2, r11, #24
13956	lsr	r2, r2, #24
13957#else
13958	uxtb	r2, r11
13959#endif
13960#else
13961	ubfx	r2, r11, #0, #8
13962#endif
13963	ldr	r4, [r0, r4, lsl #2]
13964	ldr	r7, [r0, r7, lsl #2]
13965	ldr	lr, [r0, lr, lsl #2]
13966	ldr	r2, [r0, r2, lsl #2]
13967#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13968#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13969	lsl	r5, r10, #8
13970	lsr	r5, r5, #24
13971#else
13972	uxtb	r5, r10, ror #16
13973#endif
13974#else
13975	ubfx	r5, r10, #16, #8
13976#endif
13977	eor	r4, r4, r7, ror #24
13978	lsr	r7, r9, #24
13979	eor	r4, r4, lr, ror #8
13980#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13981#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13982	lsl	lr, r11, #16
13983	lsr	lr, lr, #24
13984#else
13985	uxtb	lr, r11, ror #8
13986#endif
13987#else
13988	ubfx	lr, r11, #8, #8
13989#endif
13990	eor	r4, r4, r2, ror #16
13991#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
13992#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
13993	lsl	r2, r8, #24
13994	lsr	r2, r2, #24
13995#else
13996	uxtb	r2, r8
13997#endif
13998#else
13999	ubfx	r2, r8, #0, #8
14000#endif
14001	ldr	r5, [r0, r5, lsl #2]
14002	ldr	r7, [r0, r7, lsl #2]
14003	ldr	lr, [r0, lr, lsl #2]
14004	ldr	r2, [r0, r2, lsl #2]
14005#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14006#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14007	lsl	r6, r11, #8
14008	lsr	r6, r6, #24
14009#else
14010	uxtb	r6, r11, ror #16
14011#endif
14012#else
14013	ubfx	r6, r11, #16, #8
14014#endif
14015	eor	r5, r5, r7, ror #24
14016	lsr	r7, r10, #24
14017	eor	r5, r5, lr, ror #8
14018#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14019#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14020	lsl	lr, r8, #16
14021	lsr	lr, lr, #24
14022#else
14023	uxtb	lr, r8, ror #8
14024#endif
14025#else
14026	ubfx	lr, r8, #8, #8
14027#endif
14028	eor	r5, r5, r2, ror #16
14029#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14030#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14031	lsl	r2, r9, #24
14032	lsr	r2, r2, #24
14033#else
14034	uxtb	r2, r9
14035#endif
14036#else
14037	ubfx	r2, r9, #0, #8
14038#endif
14039	ldr	r6, [r0, r6, lsl #2]
14040	ldr	r7, [r0, r7, lsl #2]
14041	ldr	lr, [r0, lr, lsl #2]
14042	ldr	r2, [r0, r2, lsl #2]
14043#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14044#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14045	lsl	r10, r10, #24
14046	lsr	r10, r10, #24
14047#else
14048	uxtb	r10, r10
14049#endif
14050#else
14051	ubfx	r10, r10, #0, #8
14052#endif
14053	eor	r6, r6, r7, ror #24
14054#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14055#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14056	lsl	r7, r8, #8
14057	lsr	r7, r7, #24
14058#else
14059	uxtb	r7, r8, ror #16
14060#endif
14061#else
14062	ubfx	r7, r8, #16, #8
14063#endif
14064	eor	r6, r6, lr, ror #8
14065	lsr	lr, r11, #24
14066	eor	r6, r6, r2, ror #16
14067#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14068#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14069	lsl	r2, r9, #16
14070	lsr	r2, r2, #24
14071#else
14072	uxtb	r2, r9, ror #8
14073#endif
14074#else
14075	ubfx	r2, r9, #8, #8
14076#endif
14077	ldr	r10, [r0, r10, lsl #2]
14078	ldr	lr, [r0, lr, lsl #2]
14079	ldr	r7, [r0, r7, lsl #2]
14080	ldr	r2, [r0, r2, lsl #2]
14081	eor	lr, lr, r10, ror #24
14082	ldm	r3!, {r8, r9, r10, r11}
14083	eor	r7, r7, lr, ror #24
14084	eor	r7, r7, r2, ror #8
14085	#   XOR in Key Schedule
14086	eor	r4, r4, r8
14087	eor	r5, r5, r9
14088	eor	r6, r6, r10
14089	eor	r7, r7, r11
14090	subs	r1, r1, #1
14091	bne	L_AES_CTR_encrypt_block_nr_256
14092#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14093#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14094	lsl	r8, r5, #8
14095	lsr	r8, r8, #24
14096#else
14097	uxtb	r8, r5, ror #16
14098#endif
14099#else
14100	ubfx	r8, r5, #16, #8
14101#endif
14102	lsr	r11, r4, #24
14103#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14104#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14105	lsl	lr, r6, #16
14106	lsr	lr, lr, #24
14107#else
14108	uxtb	lr, r6, ror #8
14109#endif
14110#else
14111	ubfx	lr, r6, #8, #8
14112#endif
14113#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14114#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14115	lsl	r2, r7, #24
14116	lsr	r2, r2, #24
14117#else
14118	uxtb	r2, r7
14119#endif
14120#else
14121	ubfx	r2, r7, #0, #8
14122#endif
14123	ldr	r8, [r0, r8, lsl #2]
14124	ldr	r11, [r0, r11, lsl #2]
14125	ldr	lr, [r0, lr, lsl #2]
14126	ldr	r2, [r0, r2, lsl #2]
14127#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14128#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14129	lsl	r9, r6, #8
14130	lsr	r9, r9, #24
14131#else
14132	uxtb	r9, r6, ror #16
14133#endif
14134#else
14135	ubfx	r9, r6, #16, #8
14136#endif
14137	eor	r8, r8, r11, ror #24
14138	lsr	r11, r5, #24
14139	eor	r8, r8, lr, ror #8
14140#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14141#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14142	lsl	lr, r7, #16
14143	lsr	lr, lr, #24
14144#else
14145	uxtb	lr, r7, ror #8
14146#endif
14147#else
14148	ubfx	lr, r7, #8, #8
14149#endif
14150	eor	r8, r8, r2, ror #16
14151#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14152#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14153	lsl	r2, r4, #24
14154	lsr	r2, r2, #24
14155#else
14156	uxtb	r2, r4
14157#endif
14158#else
14159	ubfx	r2, r4, #0, #8
14160#endif
14161	ldr	r9, [r0, r9, lsl #2]
14162	ldr	r11, [r0, r11, lsl #2]
14163	ldr	lr, [r0, lr, lsl #2]
14164	ldr	r2, [r0, r2, lsl #2]
14165#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14166#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14167	lsl	r10, r7, #8
14168	lsr	r10, r10, #24
14169#else
14170	uxtb	r10, r7, ror #16
14171#endif
14172#else
14173	ubfx	r10, r7, #16, #8
14174#endif
14175	eor	r9, r9, r11, ror #24
14176	lsr	r11, r6, #24
14177	eor	r9, r9, lr, ror #8
14178#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14179#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14180	lsl	lr, r4, #16
14181	lsr	lr, lr, #24
14182#else
14183	uxtb	lr, r4, ror #8
14184#endif
14185#else
14186	ubfx	lr, r4, #8, #8
14187#endif
14188	eor	r9, r9, r2, ror #16
14189#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14190#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14191	lsl	r2, r5, #24
14192	lsr	r2, r2, #24
14193#else
14194	uxtb	r2, r5
14195#endif
14196#else
14197	ubfx	r2, r5, #0, #8
14198#endif
14199	ldr	r10, [r0, r10, lsl #2]
14200	ldr	r11, [r0, r11, lsl #2]
14201	ldr	lr, [r0, lr, lsl #2]
14202	ldr	r2, [r0, r2, lsl #2]
14203#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14204#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14205	lsl	r6, r6, #24
14206	lsr	r6, r6, #24
14207#else
14208	uxtb	r6, r6
14209#endif
14210#else
14211	ubfx	r6, r6, #0, #8
14212#endif
14213	eor	r10, r10, r11, ror #24
14214#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14215#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14216	lsl	r11, r4, #8
14217	lsr	r11, r11, #24
14218#else
14219	uxtb	r11, r4, ror #16
14220#endif
14221#else
14222	ubfx	r11, r4, #16, #8
14223#endif
14224	eor	r10, r10, lr, ror #8
14225	lsr	lr, r7, #24
14226	eor	r10, r10, r2, ror #16
14227#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14228#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14229	lsl	r2, r5, #16
14230	lsr	r2, r2, #24
14231#else
14232	uxtb	r2, r5, ror #8
14233#endif
14234#else
14235	ubfx	r2, r5, #8, #8
14236#endif
14237	ldr	r6, [r0, r6, lsl #2]
14238	ldr	lr, [r0, lr, lsl #2]
14239	ldr	r11, [r0, r11, lsl #2]
14240	ldr	r2, [r0, r2, lsl #2]
14241	eor	lr, lr, r6, ror #24
14242	ldm	r3!, {r4, r5, r6, r7}
14243	eor	r11, r11, lr, ror #24
14244	eor	r11, r11, r2, ror #8
14245	#   XOR in Key Schedule
14246	eor	r8, r8, r4
14247	eor	r9, r9, r5
14248	eor	r10, r10, r6
14249	eor	r11, r11, r7
14250#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14251#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14252	lsl	r4, r11, #24
14253	lsr	r4, r4, #24
14254#else
14255	uxtb	r4, r11
14256#endif
14257#else
14258	ubfx	r4, r11, #0, #8
14259#endif
14260#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14261#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14262	lsl	r7, r10, #16
14263	lsr	r7, r7, #24
14264#else
14265	uxtb	r7, r10, ror #8
14266#endif
14267#else
14268	ubfx	r7, r10, #8, #8
14269#endif
14270#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14271#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14272	lsl	lr, r9, #8
14273	lsr	lr, lr, #24
14274#else
14275	uxtb	lr, r9, ror #16
14276#endif
14277#else
14278	ubfx	lr, r9, #16, #8
14279#endif
14280	lsr	r2, r8, #24
14281	ldrb	r4, [r0, r4, lsl #2]
14282	ldrb	r7, [r0, r7, lsl #2]
14283	ldrb	lr, [r0, lr, lsl #2]
14284	ldrb	r2, [r0, r2, lsl #2]
14285#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14286#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14287	lsl	r5, r8, #24
14288	lsr	r5, r5, #24
14289#else
14290	uxtb	r5, r8
14291#endif
14292#else
14293	ubfx	r5, r8, #0, #8
14294#endif
14295	eor	r4, r4, r7, lsl #8
14296#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14297#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14298	lsl	r7, r11, #16
14299	lsr	r7, r7, #24
14300#else
14301	uxtb	r7, r11, ror #8
14302#endif
14303#else
14304	ubfx	r7, r11, #8, #8
14305#endif
14306	eor	r4, r4, lr, lsl #16
14307#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14308#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14309	lsl	lr, r10, #8
14310	lsr	lr, lr, #24
14311#else
14312	uxtb	lr, r10, ror #16
14313#endif
14314#else
14315	ubfx	lr, r10, #16, #8
14316#endif
14317	eor	r4, r4, r2, lsl #24
14318	lsr	r2, r9, #24
14319	ldrb	r5, [r0, r5, lsl #2]
14320	ldrb	r7, [r0, r7, lsl #2]
14321	ldrb	lr, [r0, lr, lsl #2]
14322	ldrb	r2, [r0, r2, lsl #2]
14323#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14324#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14325	lsl	r6, r9, #24
14326	lsr	r6, r6, #24
14327#else
14328	uxtb	r6, r9
14329#endif
14330#else
14331	ubfx	r6, r9, #0, #8
14332#endif
14333	eor	r5, r5, r7, lsl #8
14334#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14335#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14336	lsl	r7, r8, #16
14337	lsr	r7, r7, #24
14338#else
14339	uxtb	r7, r8, ror #8
14340#endif
14341#else
14342	ubfx	r7, r8, #8, #8
14343#endif
14344	eor	r5, r5, lr, lsl #16
14345#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14346#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14347	lsl	lr, r11, #8
14348	lsr	lr, lr, #24
14349#else
14350	uxtb	lr, r11, ror #16
14351#endif
14352#else
14353	ubfx	lr, r11, #16, #8
14354#endif
14355	eor	r5, r5, r2, lsl #24
14356	lsr	r2, r10, #24
14357	ldrb	r6, [r0, r6, lsl #2]
14358	ldrb	r7, [r0, r7, lsl #2]
14359	ldrb	lr, [r0, lr, lsl #2]
14360	ldrb	r2, [r0, r2, lsl #2]
14361	lsr	r11, r11, #24
14362	eor	r6, r6, r7, lsl #8
14363#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14364#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14365	lsl	r7, r10, #24
14366	lsr	r7, r7, #24
14367#else
14368	uxtb	r7, r10
14369#endif
14370#else
14371	ubfx	r7, r10, #0, #8
14372#endif
14373	eor	r6, r6, lr, lsl #16
14374#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14375#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14376	lsl	lr, r9, #16
14377	lsr	lr, lr, #24
14378#else
14379	uxtb	lr, r9, ror #8
14380#endif
14381#else
14382	ubfx	lr, r9, #8, #8
14383#endif
14384	eor	r6, r6, r2, lsl #24
14385#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14386#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14387	lsl	r2, r8, #8
14388	lsr	r2, r2, #24
14389#else
14390	uxtb	r2, r8, ror #16
14391#endif
14392#else
14393	ubfx	r2, r8, #16, #8
14394#endif
14395	ldrb	r11, [r0, r11, lsl #2]
14396	ldrb	r7, [r0, r7, lsl #2]
14397	ldrb	lr, [r0, lr, lsl #2]
14398	ldrb	r2, [r0, r2, lsl #2]
14399	eor	lr, lr, r11, lsl #16
14400	ldm	r3, {r8, r9, r10, r11}
14401	eor	r7, r7, lr, lsl #8
14402	eor	r7, r7, r2, lsl #16
14403	#   XOR in Key Schedule
14404	eor	r4, r4, r8
14405	eor	r5, r5, r9
14406	eor	r6, r6, r10
14407	eor	r7, r7, r11
14408#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
14409	pop	{r1, r2, lr}
14410	ldr	r3, [sp]
14411#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14412	eor	r8, r4, r4, ror #16
14413	eor	r9, r5, r5, ror #16
14414	eor	r10, r6, r6, ror #16
14415	eor	r11, r7, r7, ror #16
14416	bic	r8, r8, #0xff0000
14417	bic	r9, r9, #0xff0000
14418	bic	r10, r10, #0xff0000
14419	bic	r11, r11, #0xff0000
14420	ror	r4, r4, #8
14421	ror	r5, r5, #8
14422	ror	r6, r6, #8
14423	ror	r7, r7, #8
14424	eor	r4, r4, r8, lsr #8
14425	eor	r5, r5, r9, lsr #8
14426	eor	r6, r6, r10, lsr #8
14427	eor	r7, r7, r11, lsr #8
14428#else
14429	rev	r4, r4
14430	rev	r5, r5
14431	rev	r6, r6
14432	rev	r7, r7
14433#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
14434	ldr	r8, [lr]
14435	ldr	r9, [lr, #4]
14436	ldr	r10, [lr, #8]
14437	ldr	r11, [lr, #12]
14438	eor	r4, r4, r8
14439	eor	r5, r5, r9
14440	eor	r6, r6, r10
14441	eor	r7, r7, r11
14442	ldr	r8, [sp, #4]
14443	str	r4, [r1]
14444	str	r5, [r1, #4]
14445	str	r6, [r1, #8]
14446	str	r7, [r1, #12]
14447	ldm	r8, {r4, r5, r6, r7}
14448	subs	r2, r2, #16
14449	add	lr, lr, #16
14450	add	r1, r1, #16
14451	bne	L_AES_CTR_encrypt_loop_block_256
14452	b	L_AES_CTR_encrypt_end
14453L_AES_CTR_encrypt_start_block_192:
14454L_AES_CTR_encrypt_loop_block_192:
14455	push	{r1, r2, lr}
14456	ldr	lr, [sp, #16]
14457	adds	r11, r7, #1
14458	adcs	r10, r6, #0
14459	adcs	r9, r5, #0
14460	adc	r8, r4, #0
14461	stm	lr, {r8, r9, r10, r11}
14462	ldm	r3!, {r8, r9, r10, r11}
14463	# Round: 0 - XOR in key schedule
14464	eor	r4, r4, r8
14465	eor	r5, r5, r9
14466	eor	r6, r6, r10
14467	eor	r7, r7, r11
14468	mov	r1, #5
14469#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
14470	bl	AES_encrypt_block
14471#else
14472L_AES_CTR_encrypt_block_nr_192:
14473#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14474#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14475	lsl	r8, r5, #8
14476	lsr	r8, r8, #24
14477#else
14478	uxtb	r8, r5, ror #16
14479#endif
14480#else
14481	ubfx	r8, r5, #16, #8
14482#endif
14483	lsr	r11, r4, #24
14484#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14485#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14486	lsl	lr, r6, #16
14487	lsr	lr, lr, #24
14488#else
14489	uxtb	lr, r6, ror #8
14490#endif
14491#else
14492	ubfx	lr, r6, #8, #8
14493#endif
14494#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14495#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14496	lsl	r2, r7, #24
14497	lsr	r2, r2, #24
14498#else
14499	uxtb	r2, r7
14500#endif
14501#else
14502	ubfx	r2, r7, #0, #8
14503#endif
14504	ldr	r8, [r0, r8, lsl #2]
14505	ldr	r11, [r0, r11, lsl #2]
14506	ldr	lr, [r0, lr, lsl #2]
14507	ldr	r2, [r0, r2, lsl #2]
14508#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14509#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14510	lsl	r9, r6, #8
14511	lsr	r9, r9, #24
14512#else
14513	uxtb	r9, r6, ror #16
14514#endif
14515#else
14516	ubfx	r9, r6, #16, #8
14517#endif
14518	eor	r8, r8, r11, ror #24
14519	lsr	r11, r5, #24
14520	eor	r8, r8, lr, ror #8
14521#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14522#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14523	lsl	lr, r7, #16
14524	lsr	lr, lr, #24
14525#else
14526	uxtb	lr, r7, ror #8
14527#endif
14528#else
14529	ubfx	lr, r7, #8, #8
14530#endif
14531	eor	r8, r8, r2, ror #16
14532#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14533#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14534	lsl	r2, r4, #24
14535	lsr	r2, r2, #24
14536#else
14537	uxtb	r2, r4
14538#endif
14539#else
14540	ubfx	r2, r4, #0, #8
14541#endif
14542	ldr	r9, [r0, r9, lsl #2]
14543	ldr	r11, [r0, r11, lsl #2]
14544	ldr	lr, [r0, lr, lsl #2]
14545	ldr	r2, [r0, r2, lsl #2]
14546#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14547#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14548	lsl	r10, r7, #8
14549	lsr	r10, r10, #24
14550#else
14551	uxtb	r10, r7, ror #16
14552#endif
14553#else
14554	ubfx	r10, r7, #16, #8
14555#endif
14556	eor	r9, r9, r11, ror #24
14557	lsr	r11, r6, #24
14558	eor	r9, r9, lr, ror #8
14559#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14560#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14561	lsl	lr, r4, #16
14562	lsr	lr, lr, #24
14563#else
14564	uxtb	lr, r4, ror #8
14565#endif
14566#else
14567	ubfx	lr, r4, #8, #8
14568#endif
14569	eor	r9, r9, r2, ror #16
14570#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14571#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14572	lsl	r2, r5, #24
14573	lsr	r2, r2, #24
14574#else
14575	uxtb	r2, r5
14576#endif
14577#else
14578	ubfx	r2, r5, #0, #8
14579#endif
14580	ldr	r10, [r0, r10, lsl #2]
14581	ldr	r11, [r0, r11, lsl #2]
14582	ldr	lr, [r0, lr, lsl #2]
14583	ldr	r2, [r0, r2, lsl #2]
14584#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14585#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14586	lsl	r6, r6, #24
14587	lsr	r6, r6, #24
14588#else
14589	uxtb	r6, r6
14590#endif
14591#else
14592	ubfx	r6, r6, #0, #8
14593#endif
14594	eor	r10, r10, r11, ror #24
14595#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14596#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14597	lsl	r11, r4, #8
14598	lsr	r11, r11, #24
14599#else
14600	uxtb	r11, r4, ror #16
14601#endif
14602#else
14603	ubfx	r11, r4, #16, #8
14604#endif
14605	eor	r10, r10, lr, ror #8
14606	lsr	lr, r7, #24
14607	eor	r10, r10, r2, ror #16
14608#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14609#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14610	lsl	r2, r5, #16
14611	lsr	r2, r2, #24
14612#else
14613	uxtb	r2, r5, ror #8
14614#endif
14615#else
14616	ubfx	r2, r5, #8, #8
14617#endif
14618	ldr	r6, [r0, r6, lsl #2]
14619	ldr	lr, [r0, lr, lsl #2]
14620	ldr	r11, [r0, r11, lsl #2]
14621	ldr	r2, [r0, r2, lsl #2]
14622	eor	lr, lr, r6, ror #24
14623	ldm	r3!, {r4, r5, r6, r7}
14624	eor	r11, r11, lr, ror #24
14625	eor	r11, r11, r2, ror #8
14626	#   XOR in Key Schedule
14627	eor	r8, r8, r4
14628	eor	r9, r9, r5
14629	eor	r10, r10, r6
14630	eor	r11, r11, r7
14631#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14632#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14633	lsl	r4, r9, #8
14634	lsr	r4, r4, #24
14635#else
14636	uxtb	r4, r9, ror #16
14637#endif
14638#else
14639	ubfx	r4, r9, #16, #8
14640#endif
14641	lsr	r7, r8, #24
14642#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14643#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14644	lsl	lr, r10, #16
14645	lsr	lr, lr, #24
14646#else
14647	uxtb	lr, r10, ror #8
14648#endif
14649#else
14650	ubfx	lr, r10, #8, #8
14651#endif
14652#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14653#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14654	lsl	r2, r11, #24
14655	lsr	r2, r2, #24
14656#else
14657	uxtb	r2, r11
14658#endif
14659#else
14660	ubfx	r2, r11, #0, #8
14661#endif
14662	ldr	r4, [r0, r4, lsl #2]
14663	ldr	r7, [r0, r7, lsl #2]
14664	ldr	lr, [r0, lr, lsl #2]
14665	ldr	r2, [r0, r2, lsl #2]
14666#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14667#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14668	lsl	r5, r10, #8
14669	lsr	r5, r5, #24
14670#else
14671	uxtb	r5, r10, ror #16
14672#endif
14673#else
14674	ubfx	r5, r10, #16, #8
14675#endif
14676	eor	r4, r4, r7, ror #24
14677	lsr	r7, r9, #24
14678	eor	r4, r4, lr, ror #8
14679#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14680#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14681	lsl	lr, r11, #16
14682	lsr	lr, lr, #24
14683#else
14684	uxtb	lr, r11, ror #8
14685#endif
14686#else
14687	ubfx	lr, r11, #8, #8
14688#endif
14689	eor	r4, r4, r2, ror #16
14690#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14691#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14692	lsl	r2, r8, #24
14693	lsr	r2, r2, #24
14694#else
14695	uxtb	r2, r8
14696#endif
14697#else
14698	ubfx	r2, r8, #0, #8
14699#endif
14700	ldr	r5, [r0, r5, lsl #2]
14701	ldr	r7, [r0, r7, lsl #2]
14702	ldr	lr, [r0, lr, lsl #2]
14703	ldr	r2, [r0, r2, lsl #2]
14704#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14705#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14706	lsl	r6, r11, #8
14707	lsr	r6, r6, #24
14708#else
14709	uxtb	r6, r11, ror #16
14710#endif
14711#else
14712	ubfx	r6, r11, #16, #8
14713#endif
14714	eor	r5, r5, r7, ror #24
14715	lsr	r7, r10, #24
14716	eor	r5, r5, lr, ror #8
14717#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14718#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14719	lsl	lr, r8, #16
14720	lsr	lr, lr, #24
14721#else
14722	uxtb	lr, r8, ror #8
14723#endif
14724#else
14725	ubfx	lr, r8, #8, #8
14726#endif
14727	eor	r5, r5, r2, ror #16
14728#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14729#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14730	lsl	r2, r9, #24
14731	lsr	r2, r2, #24
14732#else
14733	uxtb	r2, r9
14734#endif
14735#else
14736	ubfx	r2, r9, #0, #8
14737#endif
14738	ldr	r6, [r0, r6, lsl #2]
14739	ldr	r7, [r0, r7, lsl #2]
14740	ldr	lr, [r0, lr, lsl #2]
14741	ldr	r2, [r0, r2, lsl #2]
14742#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14743#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14744	lsl	r10, r10, #24
14745	lsr	r10, r10, #24
14746#else
14747	uxtb	r10, r10
14748#endif
14749#else
14750	ubfx	r10, r10, #0, #8
14751#endif
14752	eor	r6, r6, r7, ror #24
14753#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14754#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14755	lsl	r7, r8, #8
14756	lsr	r7, r7, #24
14757#else
14758	uxtb	r7, r8, ror #16
14759#endif
14760#else
14761	ubfx	r7, r8, #16, #8
14762#endif
14763	eor	r6, r6, lr, ror #8
14764	lsr	lr, r11, #24
14765	eor	r6, r6, r2, ror #16
14766#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14767#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14768	lsl	r2, r9, #16
14769	lsr	r2, r2, #24
14770#else
14771	uxtb	r2, r9, ror #8
14772#endif
14773#else
14774	ubfx	r2, r9, #8, #8
14775#endif
14776	ldr	r10, [r0, r10, lsl #2]
14777	ldr	lr, [r0, lr, lsl #2]
14778	ldr	r7, [r0, r7, lsl #2]
14779	ldr	r2, [r0, r2, lsl #2]
14780	eor	lr, lr, r10, ror #24
14781	ldm	r3!, {r8, r9, r10, r11}
14782	eor	r7, r7, lr, ror #24
14783	eor	r7, r7, r2, ror #8
14784	#   XOR in Key Schedule
14785	eor	r4, r4, r8
14786	eor	r5, r5, r9
14787	eor	r6, r6, r10
14788	eor	r7, r7, r11
14789	subs	r1, r1, #1
14790	bne	L_AES_CTR_encrypt_block_nr_192
14791#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14792#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14793	lsl	r8, r5, #8
14794	lsr	r8, r8, #24
14795#else
14796	uxtb	r8, r5, ror #16
14797#endif
14798#else
14799	ubfx	r8, r5, #16, #8
14800#endif
14801	lsr	r11, r4, #24
14802#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14803#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14804	lsl	lr, r6, #16
14805	lsr	lr, lr, #24
14806#else
14807	uxtb	lr, r6, ror #8
14808#endif
14809#else
14810	ubfx	lr, r6, #8, #8
14811#endif
14812#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14813#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14814	lsl	r2, r7, #24
14815	lsr	r2, r2, #24
14816#else
14817	uxtb	r2, r7
14818#endif
14819#else
14820	ubfx	r2, r7, #0, #8
14821#endif
14822	ldr	r8, [r0, r8, lsl #2]
14823	ldr	r11, [r0, r11, lsl #2]
14824	ldr	lr, [r0, lr, lsl #2]
14825	ldr	r2, [r0, r2, lsl #2]
14826#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14827#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14828	lsl	r9, r6, #8
14829	lsr	r9, r9, #24
14830#else
14831	uxtb	r9, r6, ror #16
14832#endif
14833#else
14834	ubfx	r9, r6, #16, #8
14835#endif
14836	eor	r8, r8, r11, ror #24
14837	lsr	r11, r5, #24
14838	eor	r8, r8, lr, ror #8
14839#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14840#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14841	lsl	lr, r7, #16
14842	lsr	lr, lr, #24
14843#else
14844	uxtb	lr, r7, ror #8
14845#endif
14846#else
14847	ubfx	lr, r7, #8, #8
14848#endif
14849	eor	r8, r8, r2, ror #16
14850#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14851#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14852	lsl	r2, r4, #24
14853	lsr	r2, r2, #24
14854#else
14855	uxtb	r2, r4
14856#endif
14857#else
14858	ubfx	r2, r4, #0, #8
14859#endif
14860	ldr	r9, [r0, r9, lsl #2]
14861	ldr	r11, [r0, r11, lsl #2]
14862	ldr	lr, [r0, lr, lsl #2]
14863	ldr	r2, [r0, r2, lsl #2]
14864#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14865#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14866	lsl	r10, r7, #8
14867	lsr	r10, r10, #24
14868#else
14869	uxtb	r10, r7, ror #16
14870#endif
14871#else
14872	ubfx	r10, r7, #16, #8
14873#endif
14874	eor	r9, r9, r11, ror #24
14875	lsr	r11, r6, #24
14876	eor	r9, r9, lr, ror #8
14877#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14878#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14879	lsl	lr, r4, #16
14880	lsr	lr, lr, #24
14881#else
14882	uxtb	lr, r4, ror #8
14883#endif
14884#else
14885	ubfx	lr, r4, #8, #8
14886#endif
14887	eor	r9, r9, r2, ror #16
14888#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14889#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14890	lsl	r2, r5, #24
14891	lsr	r2, r2, #24
14892#else
14893	uxtb	r2, r5
14894#endif
14895#else
14896	ubfx	r2, r5, #0, #8
14897#endif
14898	ldr	r10, [r0, r10, lsl #2]
14899	ldr	r11, [r0, r11, lsl #2]
14900	ldr	lr, [r0, lr, lsl #2]
14901	ldr	r2, [r0, r2, lsl #2]
14902#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14903#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14904	lsl	r6, r6, #24
14905	lsr	r6, r6, #24
14906#else
14907	uxtb	r6, r6
14908#endif
14909#else
14910	ubfx	r6, r6, #0, #8
14911#endif
14912	eor	r10, r10, r11, ror #24
14913#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14914#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14915	lsl	r11, r4, #8
14916	lsr	r11, r11, #24
14917#else
14918	uxtb	r11, r4, ror #16
14919#endif
14920#else
14921	ubfx	r11, r4, #16, #8
14922#endif
14923	eor	r10, r10, lr, ror #8
14924	lsr	lr, r7, #24
14925	eor	r10, r10, r2, ror #16
14926#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14927#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14928	lsl	r2, r5, #16
14929	lsr	r2, r2, #24
14930#else
14931	uxtb	r2, r5, ror #8
14932#endif
14933#else
14934	ubfx	r2, r5, #8, #8
14935#endif
14936	ldr	r6, [r0, r6, lsl #2]
14937	ldr	lr, [r0, lr, lsl #2]
14938	ldr	r11, [r0, r11, lsl #2]
14939	ldr	r2, [r0, r2, lsl #2]
14940	eor	lr, lr, r6, ror #24
14941	ldm	r3!, {r4, r5, r6, r7}
14942	eor	r11, r11, lr, ror #24
14943	eor	r11, r11, r2, ror #8
14944	#   XOR in Key Schedule
14945	eor	r8, r8, r4
14946	eor	r9, r9, r5
14947	eor	r10, r10, r6
14948	eor	r11, r11, r7
14949#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14950#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14951	lsl	r4, r11, #24
14952	lsr	r4, r4, #24
14953#else
14954	uxtb	r4, r11
14955#endif
14956#else
14957	ubfx	r4, r11, #0, #8
14958#endif
14959#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14960#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14961	lsl	r7, r10, #16
14962	lsr	r7, r7, #24
14963#else
14964	uxtb	r7, r10, ror #8
14965#endif
14966#else
14967	ubfx	r7, r10, #8, #8
14968#endif
14969#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14970#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14971	lsl	lr, r9, #8
14972	lsr	lr, lr, #24
14973#else
14974	uxtb	lr, r9, ror #16
14975#endif
14976#else
14977	ubfx	lr, r9, #16, #8
14978#endif
14979	lsr	r2, r8, #24
14980	ldrb	r4, [r0, r4, lsl #2]
14981	ldrb	r7, [r0, r7, lsl #2]
14982	ldrb	lr, [r0, lr, lsl #2]
14983	ldrb	r2, [r0, r2, lsl #2]
14984#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14985#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14986	lsl	r5, r8, #24
14987	lsr	r5, r5, #24
14988#else
14989	uxtb	r5, r8
14990#endif
14991#else
14992	ubfx	r5, r8, #0, #8
14993#endif
14994	eor	r4, r4, r7, lsl #8
14995#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
14996#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
14997	lsl	r7, r11, #16
14998	lsr	r7, r7, #24
14999#else
15000	uxtb	r7, r11, ror #8
15001#endif
15002#else
15003	ubfx	r7, r11, #8, #8
15004#endif
15005	eor	r4, r4, lr, lsl #16
15006#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15007#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15008	lsl	lr, r10, #8
15009	lsr	lr, lr, #24
15010#else
15011	uxtb	lr, r10, ror #16
15012#endif
15013#else
15014	ubfx	lr, r10, #16, #8
15015#endif
15016	eor	r4, r4, r2, lsl #24
15017	lsr	r2, r9, #24
15018	ldrb	r5, [r0, r5, lsl #2]
15019	ldrb	r7, [r0, r7, lsl #2]
15020	ldrb	lr, [r0, lr, lsl #2]
15021	ldrb	r2, [r0, r2, lsl #2]
15022#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15023#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15024	lsl	r6, r9, #24
15025	lsr	r6, r6, #24
15026#else
15027	uxtb	r6, r9
15028#endif
15029#else
15030	ubfx	r6, r9, #0, #8
15031#endif
15032	eor	r5, r5, r7, lsl #8
15033#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15034#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15035	lsl	r7, r8, #16
15036	lsr	r7, r7, #24
15037#else
15038	uxtb	r7, r8, ror #8
15039#endif
15040#else
15041	ubfx	r7, r8, #8, #8
15042#endif
15043	eor	r5, r5, lr, lsl #16
15044#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15045#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15046	lsl	lr, r11, #8
15047	lsr	lr, lr, #24
15048#else
15049	uxtb	lr, r11, ror #16
15050#endif
15051#else
15052	ubfx	lr, r11, #16, #8
15053#endif
15054	eor	r5, r5, r2, lsl #24
15055	lsr	r2, r10, #24
15056	ldrb	r6, [r0, r6, lsl #2]
15057	ldrb	r7, [r0, r7, lsl #2]
15058	ldrb	lr, [r0, lr, lsl #2]
15059	ldrb	r2, [r0, r2, lsl #2]
15060	lsr	r11, r11, #24
15061	eor	r6, r6, r7, lsl #8
15062#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15063#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15064	lsl	r7, r10, #24
15065	lsr	r7, r7, #24
15066#else
15067	uxtb	r7, r10
15068#endif
15069#else
15070	ubfx	r7, r10, #0, #8
15071#endif
15072	eor	r6, r6, lr, lsl #16
15073#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15074#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15075	lsl	lr, r9, #16
15076	lsr	lr, lr, #24
15077#else
15078	uxtb	lr, r9, ror #8
15079#endif
15080#else
15081	ubfx	lr, r9, #8, #8
15082#endif
15083	eor	r6, r6, r2, lsl #24
15084#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15085#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15086	lsl	r2, r8, #8
15087	lsr	r2, r2, #24
15088#else
15089	uxtb	r2, r8, ror #16
15090#endif
15091#else
15092	ubfx	r2, r8, #16, #8
15093#endif
15094	ldrb	r11, [r0, r11, lsl #2]
15095	ldrb	r7, [r0, r7, lsl #2]
15096	ldrb	lr, [r0, lr, lsl #2]
15097	ldrb	r2, [r0, r2, lsl #2]
15098	eor	lr, lr, r11, lsl #16
15099	ldm	r3, {r8, r9, r10, r11}
15100	eor	r7, r7, lr, lsl #8
15101	eor	r7, r7, r2, lsl #16
15102	#   XOR in Key Schedule
15103	eor	r4, r4, r8
15104	eor	r5, r5, r9
15105	eor	r6, r6, r10
15106	eor	r7, r7, r11
15107#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
15108	pop	{r1, r2, lr}
15109	ldr	r3, [sp]
15110#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15111	eor	r8, r4, r4, ror #16
15112	eor	r9, r5, r5, ror #16
15113	eor	r10, r6, r6, ror #16
15114	eor	r11, r7, r7, ror #16
15115	bic	r8, r8, #0xff0000
15116	bic	r9, r9, #0xff0000
15117	bic	r10, r10, #0xff0000
15118	bic	r11, r11, #0xff0000
15119	ror	r4, r4, #8
15120	ror	r5, r5, #8
15121	ror	r6, r6, #8
15122	ror	r7, r7, #8
15123	eor	r4, r4, r8, lsr #8
15124	eor	r5, r5, r9, lsr #8
15125	eor	r6, r6, r10, lsr #8
15126	eor	r7, r7, r11, lsr #8
15127#else
15128	rev	r4, r4
15129	rev	r5, r5
15130	rev	r6, r6
15131	rev	r7, r7
15132#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
15133	ldr	r8, [lr]
15134	ldr	r9, [lr, #4]
15135	ldr	r10, [lr, #8]
15136	ldr	r11, [lr, #12]
15137	eor	r4, r4, r8
15138	eor	r5, r5, r9
15139	eor	r6, r6, r10
15140	eor	r7, r7, r11
15141	ldr	r8, [sp, #4]
15142	str	r4, [r1]
15143	str	r5, [r1, #4]
15144	str	r6, [r1, #8]
15145	str	r7, [r1, #12]
15146	ldm	r8, {r4, r5, r6, r7}
15147	subs	r2, r2, #16
15148	add	lr, lr, #16
15149	add	r1, r1, #16
15150	bne	L_AES_CTR_encrypt_loop_block_192
15151	b	L_AES_CTR_encrypt_end
15152L_AES_CTR_encrypt_start_block_128:
15153L_AES_CTR_encrypt_loop_block_128:
15154	push	{r1, r2, lr}
15155	ldr	lr, [sp, #16]
15156	adds	r11, r7, #1
15157	adcs	r10, r6, #0
15158	adcs	r9, r5, #0
15159	adc	r8, r4, #0
15160	stm	lr, {r8, r9, r10, r11}
15161	ldm	r3!, {r8, r9, r10, r11}
15162	# Round: 0 - XOR in key schedule
15163	eor	r4, r4, r8
15164	eor	r5, r5, r9
15165	eor	r6, r6, r10
15166	eor	r7, r7, r11
15167	mov	r1, #4
15168#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
15169	bl	AES_encrypt_block
15170#else
15171L_AES_CTR_encrypt_block_nr_128:
15172#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15173#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15174	lsl	r8, r5, #8
15175	lsr	r8, r8, #24
15176#else
15177	uxtb	r8, r5, ror #16
15178#endif
15179#else
15180	ubfx	r8, r5, #16, #8
15181#endif
15182	lsr	r11, r4, #24
15183#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15184#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15185	lsl	lr, r6, #16
15186	lsr	lr, lr, #24
15187#else
15188	uxtb	lr, r6, ror #8
15189#endif
15190#else
15191	ubfx	lr, r6, #8, #8
15192#endif
15193#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15194#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15195	lsl	r2, r7, #24
15196	lsr	r2, r2, #24
15197#else
15198	uxtb	r2, r7
15199#endif
15200#else
15201	ubfx	r2, r7, #0, #8
15202#endif
15203	ldr	r8, [r0, r8, lsl #2]
15204	ldr	r11, [r0, r11, lsl #2]
15205	ldr	lr, [r0, lr, lsl #2]
15206	ldr	r2, [r0, r2, lsl #2]
15207#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15208#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15209	lsl	r9, r6, #8
15210	lsr	r9, r9, #24
15211#else
15212	uxtb	r9, r6, ror #16
15213#endif
15214#else
15215	ubfx	r9, r6, #16, #8
15216#endif
15217	eor	r8, r8, r11, ror #24
15218	lsr	r11, r5, #24
15219	eor	r8, r8, lr, ror #8
15220#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15221#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15222	lsl	lr, r7, #16
15223	lsr	lr, lr, #24
15224#else
15225	uxtb	lr, r7, ror #8
15226#endif
15227#else
15228	ubfx	lr, r7, #8, #8
15229#endif
15230	eor	r8, r8, r2, ror #16
15231#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15232#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15233	lsl	r2, r4, #24
15234	lsr	r2, r2, #24
15235#else
15236	uxtb	r2, r4
15237#endif
15238#else
15239	ubfx	r2, r4, #0, #8
15240#endif
15241	ldr	r9, [r0, r9, lsl #2]
15242	ldr	r11, [r0, r11, lsl #2]
15243	ldr	lr, [r0, lr, lsl #2]
15244	ldr	r2, [r0, r2, lsl #2]
15245#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15246#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15247	lsl	r10, r7, #8
15248	lsr	r10, r10, #24
15249#else
15250	uxtb	r10, r7, ror #16
15251#endif
15252#else
15253	ubfx	r10, r7, #16, #8
15254#endif
15255	eor	r9, r9, r11, ror #24
15256	lsr	r11, r6, #24
15257	eor	r9, r9, lr, ror #8
15258#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15259#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15260	lsl	lr, r4, #16
15261	lsr	lr, lr, #24
15262#else
15263	uxtb	lr, r4, ror #8
15264#endif
15265#else
15266	ubfx	lr, r4, #8, #8
15267#endif
15268	eor	r9, r9, r2, ror #16
15269#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15270#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15271	lsl	r2, r5, #24
15272	lsr	r2, r2, #24
15273#else
15274	uxtb	r2, r5
15275#endif
15276#else
15277	ubfx	r2, r5, #0, #8
15278#endif
15279	ldr	r10, [r0, r10, lsl #2]
15280	ldr	r11, [r0, r11, lsl #2]
15281	ldr	lr, [r0, lr, lsl #2]
15282	ldr	r2, [r0, r2, lsl #2]
15283#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15284#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15285	lsl	r6, r6, #24
15286	lsr	r6, r6, #24
15287#else
15288	uxtb	r6, r6
15289#endif
15290#else
15291	ubfx	r6, r6, #0, #8
15292#endif
15293	eor	r10, r10, r11, ror #24
15294#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15295#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15296	lsl	r11, r4, #8
15297	lsr	r11, r11, #24
15298#else
15299	uxtb	r11, r4, ror #16
15300#endif
15301#else
15302	ubfx	r11, r4, #16, #8
15303#endif
15304	eor	r10, r10, lr, ror #8
15305	lsr	lr, r7, #24
15306	eor	r10, r10, r2, ror #16
15307#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15308#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15309	lsl	r2, r5, #16
15310	lsr	r2, r2, #24
15311#else
15312	uxtb	r2, r5, ror #8
15313#endif
15314#else
15315	ubfx	r2, r5, #8, #8
15316#endif
15317	ldr	r6, [r0, r6, lsl #2]
15318	ldr	lr, [r0, lr, lsl #2]
15319	ldr	r11, [r0, r11, lsl #2]
15320	ldr	r2, [r0, r2, lsl #2]
15321	eor	lr, lr, r6, ror #24
15322	ldm	r3!, {r4, r5, r6, r7}
15323	eor	r11, r11, lr, ror #24
15324	eor	r11, r11, r2, ror #8
15325	#   XOR in Key Schedule
15326	eor	r8, r8, r4
15327	eor	r9, r9, r5
15328	eor	r10, r10, r6
15329	eor	r11, r11, r7
15330#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15331#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15332	lsl	r4, r9, #8
15333	lsr	r4, r4, #24
15334#else
15335	uxtb	r4, r9, ror #16
15336#endif
15337#else
15338	ubfx	r4, r9, #16, #8
15339#endif
15340	lsr	r7, r8, #24
15341#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15342#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15343	lsl	lr, r10, #16
15344	lsr	lr, lr, #24
15345#else
15346	uxtb	lr, r10, ror #8
15347#endif
15348#else
15349	ubfx	lr, r10, #8, #8
15350#endif
15351#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15352#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15353	lsl	r2, r11, #24
15354	lsr	r2, r2, #24
15355#else
15356	uxtb	r2, r11
15357#endif
15358#else
15359	ubfx	r2, r11, #0, #8
15360#endif
15361	ldr	r4, [r0, r4, lsl #2]
15362	ldr	r7, [r0, r7, lsl #2]
15363	ldr	lr, [r0, lr, lsl #2]
15364	ldr	r2, [r0, r2, lsl #2]
15365#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15366#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15367	lsl	r5, r10, #8
15368	lsr	r5, r5, #24
15369#else
15370	uxtb	r5, r10, ror #16
15371#endif
15372#else
15373	ubfx	r5, r10, #16, #8
15374#endif
15375	eor	r4, r4, r7, ror #24
15376	lsr	r7, r9, #24
15377	eor	r4, r4, lr, ror #8
15378#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15379#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15380	lsl	lr, r11, #16
15381	lsr	lr, lr, #24
15382#else
15383	uxtb	lr, r11, ror #8
15384#endif
15385#else
15386	ubfx	lr, r11, #8, #8
15387#endif
15388	eor	r4, r4, r2, ror #16
15389#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15390#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15391	lsl	r2, r8, #24
15392	lsr	r2, r2, #24
15393#else
15394	uxtb	r2, r8
15395#endif
15396#else
15397	ubfx	r2, r8, #0, #8
15398#endif
15399	ldr	r5, [r0, r5, lsl #2]
15400	ldr	r7, [r0, r7, lsl #2]
15401	ldr	lr, [r0, lr, lsl #2]
15402	ldr	r2, [r0, r2, lsl #2]
15403#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15404#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15405	lsl	r6, r11, #8
15406	lsr	r6, r6, #24
15407#else
15408	uxtb	r6, r11, ror #16
15409#endif
15410#else
15411	ubfx	r6, r11, #16, #8
15412#endif
15413	eor	r5, r5, r7, ror #24
15414	lsr	r7, r10, #24
15415	eor	r5, r5, lr, ror #8
15416#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15417#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15418	lsl	lr, r8, #16
15419	lsr	lr, lr, #24
15420#else
15421	uxtb	lr, r8, ror #8
15422#endif
15423#else
15424	ubfx	lr, r8, #8, #8
15425#endif
15426	eor	r5, r5, r2, ror #16
15427#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15428#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15429	lsl	r2, r9, #24
15430	lsr	r2, r2, #24
15431#else
15432	uxtb	r2, r9
15433#endif
15434#else
15435	ubfx	r2, r9, #0, #8
15436#endif
15437	ldr	r6, [r0, r6, lsl #2]
15438	ldr	r7, [r0, r7, lsl #2]
15439	ldr	lr, [r0, lr, lsl #2]
15440	ldr	r2, [r0, r2, lsl #2]
15441#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15442#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15443	lsl	r10, r10, #24
15444	lsr	r10, r10, #24
15445#else
15446	uxtb	r10, r10
15447#endif
15448#else
15449	ubfx	r10, r10, #0, #8
15450#endif
15451	eor	r6, r6, r7, ror #24
15452#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15453#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15454	lsl	r7, r8, #8
15455	lsr	r7, r7, #24
15456#else
15457	uxtb	r7, r8, ror #16
15458#endif
15459#else
15460	ubfx	r7, r8, #16, #8
15461#endif
15462	eor	r6, r6, lr, ror #8
15463	lsr	lr, r11, #24
15464	eor	r6, r6, r2, ror #16
15465#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15466#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15467	lsl	r2, r9, #16
15468	lsr	r2, r2, #24
15469#else
15470	uxtb	r2, r9, ror #8
15471#endif
15472#else
15473	ubfx	r2, r9, #8, #8
15474#endif
15475	ldr	r10, [r0, r10, lsl #2]
15476	ldr	lr, [r0, lr, lsl #2]
15477	ldr	r7, [r0, r7, lsl #2]
15478	ldr	r2, [r0, r2, lsl #2]
15479	eor	lr, lr, r10, ror #24
15480	ldm	r3!, {r8, r9, r10, r11}
15481	eor	r7, r7, lr, ror #24
15482	eor	r7, r7, r2, ror #8
15483	#   XOR in Key Schedule
15484	eor	r4, r4, r8
15485	eor	r5, r5, r9
15486	eor	r6, r6, r10
15487	eor	r7, r7, r11
15488	subs	r1, r1, #1
15489	bne	L_AES_CTR_encrypt_block_nr_128
15490#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15491#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15492	lsl	r8, r5, #8
15493	lsr	r8, r8, #24
15494#else
15495	uxtb	r8, r5, ror #16
15496#endif
15497#else
15498	ubfx	r8, r5, #16, #8
15499#endif
15500	lsr	r11, r4, #24
15501#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15502#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15503	lsl	lr, r6, #16
15504	lsr	lr, lr, #24
15505#else
15506	uxtb	lr, r6, ror #8
15507#endif
15508#else
15509	ubfx	lr, r6, #8, #8
15510#endif
15511#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15512#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15513	lsl	r2, r7, #24
15514	lsr	r2, r2, #24
15515#else
15516	uxtb	r2, r7
15517#endif
15518#else
15519	ubfx	r2, r7, #0, #8
15520#endif
15521	ldr	r8, [r0, r8, lsl #2]
15522	ldr	r11, [r0, r11, lsl #2]
15523	ldr	lr, [r0, lr, lsl #2]
15524	ldr	r2, [r0, r2, lsl #2]
15525#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15526#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15527	lsl	r9, r6, #8
15528	lsr	r9, r9, #24
15529#else
15530	uxtb	r9, r6, ror #16
15531#endif
15532#else
15533	ubfx	r9, r6, #16, #8
15534#endif
15535	eor	r8, r8, r11, ror #24
15536	lsr	r11, r5, #24
15537	eor	r8, r8, lr, ror #8
15538#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15539#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15540	lsl	lr, r7, #16
15541	lsr	lr, lr, #24
15542#else
15543	uxtb	lr, r7, ror #8
15544#endif
15545#else
15546	ubfx	lr, r7, #8, #8
15547#endif
15548	eor	r8, r8, r2, ror #16
15549#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15550#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15551	lsl	r2, r4, #24
15552	lsr	r2, r2, #24
15553#else
15554	uxtb	r2, r4
15555#endif
15556#else
15557	ubfx	r2, r4, #0, #8
15558#endif
15559	ldr	r9, [r0, r9, lsl #2]
15560	ldr	r11, [r0, r11, lsl #2]
15561	ldr	lr, [r0, lr, lsl #2]
15562	ldr	r2, [r0, r2, lsl #2]
15563#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15564#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15565	lsl	r10, r7, #8
15566	lsr	r10, r10, #24
15567#else
15568	uxtb	r10, r7, ror #16
15569#endif
15570#else
15571	ubfx	r10, r7, #16, #8
15572#endif
15573	eor	r9, r9, r11, ror #24
15574	lsr	r11, r6, #24
15575	eor	r9, r9, lr, ror #8
15576#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15577#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15578	lsl	lr, r4, #16
15579	lsr	lr, lr, #24
15580#else
15581	uxtb	lr, r4, ror #8
15582#endif
15583#else
15584	ubfx	lr, r4, #8, #8
15585#endif
15586	eor	r9, r9, r2, ror #16
15587#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15588#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15589	lsl	r2, r5, #24
15590	lsr	r2, r2, #24
15591#else
15592	uxtb	r2, r5
15593#endif
15594#else
15595	ubfx	r2, r5, #0, #8
15596#endif
15597	ldr	r10, [r0, r10, lsl #2]
15598	ldr	r11, [r0, r11, lsl #2]
15599	ldr	lr, [r0, lr, lsl #2]
15600	ldr	r2, [r0, r2, lsl #2]
15601#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15602#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15603	lsl	r6, r6, #24
15604	lsr	r6, r6, #24
15605#else
15606	uxtb	r6, r6
15607#endif
15608#else
15609	ubfx	r6, r6, #0, #8
15610#endif
15611	eor	r10, r10, r11, ror #24
15612#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15613#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15614	lsl	r11, r4, #8
15615	lsr	r11, r11, #24
15616#else
15617	uxtb	r11, r4, ror #16
15618#endif
15619#else
15620	ubfx	r11, r4, #16, #8
15621#endif
15622	eor	r10, r10, lr, ror #8
15623	lsr	lr, r7, #24
15624	eor	r10, r10, r2, ror #16
15625#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15626#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15627	lsl	r2, r5, #16
15628	lsr	r2, r2, #24
15629#else
15630	uxtb	r2, r5, ror #8
15631#endif
15632#else
15633	ubfx	r2, r5, #8, #8
15634#endif
15635	ldr	r6, [r0, r6, lsl #2]
15636	ldr	lr, [r0, lr, lsl #2]
15637	ldr	r11, [r0, r11, lsl #2]
15638	ldr	r2, [r0, r2, lsl #2]
15639	eor	lr, lr, r6, ror #24
15640	ldm	r3!, {r4, r5, r6, r7}
15641	eor	r11, r11, lr, ror #24
15642	eor	r11, r11, r2, ror #8
15643	#   XOR in Key Schedule
15644	eor	r8, r8, r4
15645	eor	r9, r9, r5
15646	eor	r10, r10, r6
15647	eor	r11, r11, r7
15648#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15649#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15650	lsl	r4, r11, #24
15651	lsr	r4, r4, #24
15652#else
15653	uxtb	r4, r11
15654#endif
15655#else
15656	ubfx	r4, r11, #0, #8
15657#endif
15658#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15659#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15660	lsl	r7, r10, #16
15661	lsr	r7, r7, #24
15662#else
15663	uxtb	r7, r10, ror #8
15664#endif
15665#else
15666	ubfx	r7, r10, #8, #8
15667#endif
15668#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15669#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15670	lsl	lr, r9, #8
15671	lsr	lr, lr, #24
15672#else
15673	uxtb	lr, r9, ror #16
15674#endif
15675#else
15676	ubfx	lr, r9, #16, #8
15677#endif
15678	lsr	r2, r8, #24
15679	ldrb	r4, [r0, r4, lsl #2]
15680	ldrb	r7, [r0, r7, lsl #2]
15681	ldrb	lr, [r0, lr, lsl #2]
15682	ldrb	r2, [r0, r2, lsl #2]
15683#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15684#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15685	lsl	r5, r8, #24
15686	lsr	r5, r5, #24
15687#else
15688	uxtb	r5, r8
15689#endif
15690#else
15691	ubfx	r5, r8, #0, #8
15692#endif
15693	eor	r4, r4, r7, lsl #8
15694#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15695#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15696	lsl	r7, r11, #16
15697	lsr	r7, r7, #24
15698#else
15699	uxtb	r7, r11, ror #8
15700#endif
15701#else
15702	ubfx	r7, r11, #8, #8
15703#endif
15704	eor	r4, r4, lr, lsl #16
15705#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15706#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15707	lsl	lr, r10, #8
15708	lsr	lr, lr, #24
15709#else
15710	uxtb	lr, r10, ror #16
15711#endif
15712#else
15713	ubfx	lr, r10, #16, #8
15714#endif
15715	eor	r4, r4, r2, lsl #24
15716	lsr	r2, r9, #24
15717	ldrb	r5, [r0, r5, lsl #2]
15718	ldrb	r7, [r0, r7, lsl #2]
15719	ldrb	lr, [r0, lr, lsl #2]
15720	ldrb	r2, [r0, r2, lsl #2]
15721#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15722#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15723	lsl	r6, r9, #24
15724	lsr	r6, r6, #24
15725#else
15726	uxtb	r6, r9
15727#endif
15728#else
15729	ubfx	r6, r9, #0, #8
15730#endif
15731	eor	r5, r5, r7, lsl #8
15732#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15733#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15734	lsl	r7, r8, #16
15735	lsr	r7, r7, #24
15736#else
15737	uxtb	r7, r8, ror #8
15738#endif
15739#else
15740	ubfx	r7, r8, #8, #8
15741#endif
15742	eor	r5, r5, lr, lsl #16
15743#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15744#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15745	lsl	lr, r11, #8
15746	lsr	lr, lr, #24
15747#else
15748	uxtb	lr, r11, ror #16
15749#endif
15750#else
15751	ubfx	lr, r11, #16, #8
15752#endif
15753	eor	r5, r5, r2, lsl #24
15754	lsr	r2, r10, #24
15755	ldrb	r6, [r0, r6, lsl #2]
15756	ldrb	r7, [r0, r7, lsl #2]
15757	ldrb	lr, [r0, lr, lsl #2]
15758	ldrb	r2, [r0, r2, lsl #2]
15759	lsr	r11, r11, #24
15760	eor	r6, r6, r7, lsl #8
15761#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15762#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15763	lsl	r7, r10, #24
15764	lsr	r7, r7, #24
15765#else
15766	uxtb	r7, r10
15767#endif
15768#else
15769	ubfx	r7, r10, #0, #8
15770#endif
15771	eor	r6, r6, lr, lsl #16
15772#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15773#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15774	lsl	lr, r9, #16
15775	lsr	lr, lr, #24
15776#else
15777	uxtb	lr, r9, ror #8
15778#endif
15779#else
15780	ubfx	lr, r9, #8, #8
15781#endif
15782	eor	r6, r6, r2, lsl #24
15783#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15784#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15785	lsl	r2, r8, #8
15786	lsr	r2, r2, #24
15787#else
15788	uxtb	r2, r8, ror #16
15789#endif
15790#else
15791	ubfx	r2, r8, #16, #8
15792#endif
15793	ldrb	r11, [r0, r11, lsl #2]
15794	ldrb	r7, [r0, r7, lsl #2]
15795	ldrb	lr, [r0, lr, lsl #2]
15796	ldrb	r2, [r0, r2, lsl #2]
15797	eor	lr, lr, r11, lsl #16
15798	ldm	r3, {r8, r9, r10, r11}
15799	eor	r7, r7, lr, lsl #8
15800	eor	r7, r7, r2, lsl #16
15801	#   XOR in Key Schedule
15802	eor	r4, r4, r8
15803	eor	r5, r5, r9
15804	eor	r6, r6, r10
15805	eor	r7, r7, r11
15806#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
15807	pop	{r1, r2, lr}
15808	ldr	r3, [sp]
15809#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15810	eor	r8, r4, r4, ror #16
15811	eor	r9, r5, r5, ror #16
15812	eor	r10, r6, r6, ror #16
15813	eor	r11, r7, r7, ror #16
15814	bic	r8, r8, #0xff0000
15815	bic	r9, r9, #0xff0000
15816	bic	r10, r10, #0xff0000
15817	bic	r11, r11, #0xff0000
15818	ror	r4, r4, #8
15819	ror	r5, r5, #8
15820	ror	r6, r6, #8
15821	ror	r7, r7, #8
15822	eor	r4, r4, r8, lsr #8
15823	eor	r5, r5, r9, lsr #8
15824	eor	r6, r6, r10, lsr #8
15825	eor	r7, r7, r11, lsr #8
15826#else
15827	rev	r4, r4
15828	rev	r5, r5
15829	rev	r6, r6
15830	rev	r7, r7
15831#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
15832	ldr	r8, [lr]
15833	ldr	r9, [lr, #4]
15834	ldr	r10, [lr, #8]
15835	ldr	r11, [lr, #12]
15836	eor	r4, r4, r8
15837	eor	r5, r5, r9
15838	eor	r6, r6, r10
15839	eor	r7, r7, r11
15840	ldr	r8, [sp, #4]
15841	str	r4, [r1]
15842	str	r5, [r1, #4]
15843	str	r6, [r1, #8]
15844	str	r7, [r1, #12]
15845	ldm	r8, {r4, r5, r6, r7}
15846	subs	r2, r2, #16
15847	add	lr, lr, #16
15848	add	r1, r1, #16
15849	bne	L_AES_CTR_encrypt_loop_block_128
15850L_AES_CTR_encrypt_end:
15851	pop	{r3, r8}
15852#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15853	eor	r10, r4, r4, ror #16
15854	eor	r11, r5, r5, ror #16
15855	bic	r10, r10, #0xff0000
15856	bic	r11, r11, #0xff0000
15857	ror	r4, r4, #8
15858	ror	r5, r5, #8
15859	eor	r4, r4, r10, lsr #8
15860	eor	r5, r5, r11, lsr #8
15861	eor	r10, r6, r6, ror #16
15862	eor	r11, r7, r7, ror #16
15863	bic	r10, r10, #0xff0000
15864	bic	r11, r11, #0xff0000
15865	ror	r6, r6, #8
15866	ror	r7, r7, #8
15867	eor	r6, r6, r10, lsr #8
15868	eor	r7, r7, r11, lsr #8
15869#else
15870	rev	r4, r4
15871	rev	r5, r5
15872	rev	r6, r6
15873	rev	r7, r7
15874#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
15875	stm	r8, {r4, r5, r6, r7}
15876	pop	{r4, r5, r6, r7, r8, r9, r10, r11, pc}
15877	.size	AES_CTR_encrypt,.-AES_CTR_encrypt
15878#endif /* WOLFSSL_AES_COUNTER */
15879#ifdef HAVE_AES_DECRYPT
15880#if defined(WOLFSSL_AES_DIRECT) || defined(WOLFSSL_AES_COUNTER) || \
15881    defined(HAVE_AES_CBC) || defined(HAVE_AES_ECB)
15882#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
15883	.text
15884	.align	4
15885	.globl	AES_decrypt_block
15886	.type	AES_decrypt_block, %function
15887AES_decrypt_block:
15888	push	{lr}
15889L_AES_decrypt_block_nr:
15890#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15891#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15892	lsl	r8, r7, #8
15893	lsr	r8, r8, #24
15894#else
15895	uxtb	r8, r7, ror #16
15896#endif
15897#else
15898	ubfx	r8, r7, #16, #8
15899#endif
15900	lsr	r11, r4, #24
15901#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15902#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15903	lsl	r12, r6, #16
15904	lsr	r12, r12, #24
15905#else
15906	uxtb	r12, r6, ror #8
15907#endif
15908#else
15909	ubfx	r12, r6, #8, #8
15910#endif
15911#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15912#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15913	lsl	lr, r5, #24
15914	lsr	lr, lr, #24
15915#else
15916	uxtb	lr, r5
15917#endif
15918#else
15919	ubfx	lr, r5, #0, #8
15920#endif
15921	ldr	r8, [r0, r8, lsl #2]
15922	ldr	r11, [r0, r11, lsl #2]
15923	ldr	r12, [r0, r12, lsl #2]
15924	ldr	lr, [r0, lr, lsl #2]
15925#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15926#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15927	lsl	r9, r4, #8
15928	lsr	r9, r9, #24
15929#else
15930	uxtb	r9, r4, ror #16
15931#endif
15932#else
15933	ubfx	r9, r4, #16, #8
15934#endif
15935	eor	r8, r8, r11, ror #24
15936	lsr	r11, r5, #24
15937	eor	r8, r8, r12, ror #8
15938#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15939#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15940	lsl	r12, r7, #16
15941	lsr	r12, r12, #24
15942#else
15943	uxtb	r12, r7, ror #8
15944#endif
15945#else
15946	ubfx	r12, r7, #8, #8
15947#endif
15948	eor	r8, r8, lr, ror #16
15949#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15950#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15951	lsl	lr, r6, #24
15952	lsr	lr, lr, #24
15953#else
15954	uxtb	lr, r6
15955#endif
15956#else
15957	ubfx	lr, r6, #0, #8
15958#endif
15959	ldr	r9, [r0, r9, lsl #2]
15960	ldr	r11, [r0, r11, lsl #2]
15961	ldr	r12, [r0, r12, lsl #2]
15962	ldr	lr, [r0, lr, lsl #2]
15963#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15964#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15965	lsl	r10, r5, #8
15966	lsr	r10, r10, #24
15967#else
15968	uxtb	r10, r5, ror #16
15969#endif
15970#else
15971	ubfx	r10, r5, #16, #8
15972#endif
15973	eor	r9, r9, r11, ror #24
15974	lsr	r11, r6, #24
15975	eor	r9, r9, r12, ror #8
15976#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15977#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15978	lsl	r12, r4, #16
15979	lsr	r12, r12, #24
15980#else
15981	uxtb	r12, r4, ror #8
15982#endif
15983#else
15984	ubfx	r12, r4, #8, #8
15985#endif
15986	eor	r9, r9, lr, ror #16
15987#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
15988#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
15989	lsl	lr, r7, #24
15990	lsr	lr, lr, #24
15991#else
15992	uxtb	lr, r7
15993#endif
15994#else
15995	ubfx	lr, r7, #0, #8
15996#endif
15997	ldr	r10, [r0, r10, lsl #2]
15998	ldr	r11, [r0, r11, lsl #2]
15999	ldr	r12, [r0, r12, lsl #2]
16000	ldr	lr, [r0, lr, lsl #2]
16001#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16002#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16003	lsl	r4, r4, #24
16004	lsr	r4, r4, #24
16005#else
16006	uxtb	r4, r4
16007#endif
16008#else
16009	ubfx	r4, r4, #0, #8
16010#endif
16011	eor	r10, r10, r11, ror #24
16012#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16013#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16014	lsl	r11, r6, #8
16015	lsr	r11, r11, #24
16016#else
16017	uxtb	r11, r6, ror #16
16018#endif
16019#else
16020	ubfx	r11, r6, #16, #8
16021#endif
16022	eor	r10, r10, r12, ror #8
16023	lsr	r12, r7, #24
16024	eor	r10, r10, lr, ror #16
16025#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16026#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16027	lsl	lr, r5, #16
16028	lsr	lr, lr, #24
16029#else
16030	uxtb	lr, r5, ror #8
16031#endif
16032#else
16033	ubfx	lr, r5, #8, #8
16034#endif
16035	ldr	r4, [r0, r4, lsl #2]
16036	ldr	r12, [r0, r12, lsl #2]
16037	ldr	r11, [r0, r11, lsl #2]
16038	ldr	lr, [r0, lr, lsl #2]
16039	eor	r12, r12, r4, ror #24
16040	ldm	r3!, {r4, r5, r6, r7}
16041	eor	r11, r11, lr, ror #8
16042	eor	r11, r11, r12, ror #24
16043	#   XOR in Key Schedule
16044	eor	r8, r8, r4
16045	eor	r9, r9, r5
16046	eor	r10, r10, r6
16047	eor	r11, r11, r7
16048#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16049#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16050	lsl	r4, r11, #8
16051	lsr	r4, r4, #24
16052#else
16053	uxtb	r4, r11, ror #16
16054#endif
16055#else
16056	ubfx	r4, r11, #16, #8
16057#endif
16058	lsr	r7, r8, #24
16059#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16060#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16061	lsl	r12, r10, #16
16062	lsr	r12, r12, #24
16063#else
16064	uxtb	r12, r10, ror #8
16065#endif
16066#else
16067	ubfx	r12, r10, #8, #8
16068#endif
16069#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16070#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16071	lsl	lr, r9, #24
16072	lsr	lr, lr, #24
16073#else
16074	uxtb	lr, r9
16075#endif
16076#else
16077	ubfx	lr, r9, #0, #8
16078#endif
16079	ldr	r4, [r0, r4, lsl #2]
16080	ldr	r7, [r0, r7, lsl #2]
16081	ldr	r12, [r0, r12, lsl #2]
16082	ldr	lr, [r0, lr, lsl #2]
16083#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16084#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16085	lsl	r5, r8, #8
16086	lsr	r5, r5, #24
16087#else
16088	uxtb	r5, r8, ror #16
16089#endif
16090#else
16091	ubfx	r5, r8, #16, #8
16092#endif
16093	eor	r4, r4, r7, ror #24
16094	lsr	r7, r9, #24
16095	eor	r4, r4, r12, ror #8
16096#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16097#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16098	lsl	r12, r11, #16
16099	lsr	r12, r12, #24
16100#else
16101	uxtb	r12, r11, ror #8
16102#endif
16103#else
16104	ubfx	r12, r11, #8, #8
16105#endif
16106	eor	r4, r4, lr, ror #16
16107#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16108#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16109	lsl	lr, r10, #24
16110	lsr	lr, lr, #24
16111#else
16112	uxtb	lr, r10
16113#endif
16114#else
16115	ubfx	lr, r10, #0, #8
16116#endif
16117	ldr	r5, [r0, r5, lsl #2]
16118	ldr	r7, [r0, r7, lsl #2]
16119	ldr	r12, [r0, r12, lsl #2]
16120	ldr	lr, [r0, lr, lsl #2]
16121#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16122#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16123	lsl	r6, r9, #8
16124	lsr	r6, r6, #24
16125#else
16126	uxtb	r6, r9, ror #16
16127#endif
16128#else
16129	ubfx	r6, r9, #16, #8
16130#endif
16131	eor	r5, r5, r7, ror #24
16132	lsr	r7, r10, #24
16133	eor	r5, r5, r12, ror #8
16134#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16135#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16136	lsl	r12, r8, #16
16137	lsr	r12, r12, #24
16138#else
16139	uxtb	r12, r8, ror #8
16140#endif
16141#else
16142	ubfx	r12, r8, #8, #8
16143#endif
16144	eor	r5, r5, lr, ror #16
16145#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16146#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16147	lsl	lr, r11, #24
16148	lsr	lr, lr, #24
16149#else
16150	uxtb	lr, r11
16151#endif
16152#else
16153	ubfx	lr, r11, #0, #8
16154#endif
16155	ldr	r6, [r0, r6, lsl #2]
16156	ldr	r7, [r0, r7, lsl #2]
16157	ldr	r12, [r0, r12, lsl #2]
16158	ldr	lr, [r0, lr, lsl #2]
16159#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16160#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16161	lsl	r8, r8, #24
16162	lsr	r8, r8, #24
16163#else
16164	uxtb	r8, r8
16165#endif
16166#else
16167	ubfx	r8, r8, #0, #8
16168#endif
16169	eor	r6, r6, r7, ror #24
16170#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16171#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16172	lsl	r7, r10, #8
16173	lsr	r7, r7, #24
16174#else
16175	uxtb	r7, r10, ror #16
16176#endif
16177#else
16178	ubfx	r7, r10, #16, #8
16179#endif
16180	eor	r6, r6, r12, ror #8
16181	lsr	r12, r11, #24
16182	eor	r6, r6, lr, ror #16
16183#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16184#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16185	lsl	lr, r9, #16
16186	lsr	lr, lr, #24
16187#else
16188	uxtb	lr, r9, ror #8
16189#endif
16190#else
16191	ubfx	lr, r9, #8, #8
16192#endif
16193	ldr	r8, [r0, r8, lsl #2]
16194	ldr	r12, [r0, r12, lsl #2]
16195	ldr	r7, [r0, r7, lsl #2]
16196	ldr	lr, [r0, lr, lsl #2]
16197	eor	r12, r12, r8, ror #24
16198	ldm	r3!, {r8, r9, r10, r11}
16199	eor	r7, r7, lr, ror #8
16200	eor	r7, r7, r12, ror #24
16201	#   XOR in Key Schedule
16202	eor	r4, r4, r8
16203	eor	r5, r5, r9
16204	eor	r6, r6, r10
16205	eor	r7, r7, r11
16206	subs	r1, r1, #1
16207	bne	L_AES_decrypt_block_nr
16208#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16209#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16210	lsl	r8, r7, #8
16211	lsr	r8, r8, #24
16212#else
16213	uxtb	r8, r7, ror #16
16214#endif
16215#else
16216	ubfx	r8, r7, #16, #8
16217#endif
16218	lsr	r11, r4, #24
16219#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16220#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16221	lsl	r12, r6, #16
16222	lsr	r12, r12, #24
16223#else
16224	uxtb	r12, r6, ror #8
16225#endif
16226#else
16227	ubfx	r12, r6, #8, #8
16228#endif
16229#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16230#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16231	lsl	lr, r5, #24
16232	lsr	lr, lr, #24
16233#else
16234	uxtb	lr, r5
16235#endif
16236#else
16237	ubfx	lr, r5, #0, #8
16238#endif
16239	ldr	r8, [r0, r8, lsl #2]
16240	ldr	r11, [r0, r11, lsl #2]
16241	ldr	r12, [r0, r12, lsl #2]
16242	ldr	lr, [r0, lr, lsl #2]
16243#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16244#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16245	lsl	r9, r4, #8
16246	lsr	r9, r9, #24
16247#else
16248	uxtb	r9, r4, ror #16
16249#endif
16250#else
16251	ubfx	r9, r4, #16, #8
16252#endif
16253	eor	r8, r8, r11, ror #24
16254	lsr	r11, r5, #24
16255	eor	r8, r8, r12, ror #8
16256#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16257#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16258	lsl	r12, r7, #16
16259	lsr	r12, r12, #24
16260#else
16261	uxtb	r12, r7, ror #8
16262#endif
16263#else
16264	ubfx	r12, r7, #8, #8
16265#endif
16266	eor	r8, r8, lr, ror #16
16267#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16268#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16269	lsl	lr, r6, #24
16270	lsr	lr, lr, #24
16271#else
16272	uxtb	lr, r6
16273#endif
16274#else
16275	ubfx	lr, r6, #0, #8
16276#endif
16277	ldr	r9, [r0, r9, lsl #2]
16278	ldr	r11, [r0, r11, lsl #2]
16279	ldr	r12, [r0, r12, lsl #2]
16280	ldr	lr, [r0, lr, lsl #2]
16281#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16282#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16283	lsl	r10, r5, #8
16284	lsr	r10, r10, #24
16285#else
16286	uxtb	r10, r5, ror #16
16287#endif
16288#else
16289	ubfx	r10, r5, #16, #8
16290#endif
16291	eor	r9, r9, r11, ror #24
16292	lsr	r11, r6, #24
16293	eor	r9, r9, r12, ror #8
16294#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16295#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16296	lsl	r12, r4, #16
16297	lsr	r12, r12, #24
16298#else
16299	uxtb	r12, r4, ror #8
16300#endif
16301#else
16302	ubfx	r12, r4, #8, #8
16303#endif
16304	eor	r9, r9, lr, ror #16
16305#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16306#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16307	lsl	lr, r7, #24
16308	lsr	lr, lr, #24
16309#else
16310	uxtb	lr, r7
16311#endif
16312#else
16313	ubfx	lr, r7, #0, #8
16314#endif
16315	ldr	r10, [r0, r10, lsl #2]
16316	ldr	r11, [r0, r11, lsl #2]
16317	ldr	r12, [r0, r12, lsl #2]
16318	ldr	lr, [r0, lr, lsl #2]
16319#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16320#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16321	lsl	r4, r4, #24
16322	lsr	r4, r4, #24
16323#else
16324	uxtb	r4, r4
16325#endif
16326#else
16327	ubfx	r4, r4, #0, #8
16328#endif
16329	eor	r10, r10, r11, ror #24
16330#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16331#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16332	lsl	r11, r6, #8
16333	lsr	r11, r11, #24
16334#else
16335	uxtb	r11, r6, ror #16
16336#endif
16337#else
16338	ubfx	r11, r6, #16, #8
16339#endif
16340	eor	r10, r10, r12, ror #8
16341	lsr	r12, r7, #24
16342	eor	r10, r10, lr, ror #16
16343#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16344#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16345	lsl	lr, r5, #16
16346	lsr	lr, lr, #24
16347#else
16348	uxtb	lr, r5, ror #8
16349#endif
16350#else
16351	ubfx	lr, r5, #8, #8
16352#endif
16353	ldr	r4, [r0, r4, lsl #2]
16354	ldr	r12, [r0, r12, lsl #2]
16355	ldr	r11, [r0, r11, lsl #2]
16356	ldr	lr, [r0, lr, lsl #2]
16357	eor	r12, r12, r4, ror #24
16358	ldm	r3!, {r4, r5, r6, r7}
16359	eor	r11, r11, lr, ror #8
16360	eor	r11, r11, r12, ror #24
16361	#   XOR in Key Schedule
16362	eor	r8, r8, r4
16363	eor	r9, r9, r5
16364	eor	r10, r10, r6
16365	eor	r11, r11, r7
16366#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16367#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16368	lsl	r4, r9, #24
16369	lsr	r4, r4, #24
16370#else
16371	uxtb	r4, r9
16372#endif
16373#else
16374	ubfx	r4, r9, #0, #8
16375#endif
16376#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16377#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16378	lsl	r7, r10, #16
16379	lsr	r7, r7, #24
16380#else
16381	uxtb	r7, r10, ror #8
16382#endif
16383#else
16384	ubfx	r7, r10, #8, #8
16385#endif
16386#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16387#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16388	lsl	r12, r11, #8
16389	lsr	r12, r12, #24
16390#else
16391	uxtb	r12, r11, ror #16
16392#endif
16393#else
16394	ubfx	r12, r11, #16, #8
16395#endif
16396	lsr	lr, r8, #24
16397	ldrb	r4, [r2, r4]
16398	ldrb	r7, [r2, r7]
16399	ldrb	r12, [r2, r12]
16400	ldrb	lr, [r2, lr]
16401#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16402#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16403	lsl	r5, r10, #24
16404	lsr	r5, r5, #24
16405#else
16406	uxtb	r5, r10
16407#endif
16408#else
16409	ubfx	r5, r10, #0, #8
16410#endif
16411	eor	r4, r4, r7, lsl #8
16412#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16413#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16414	lsl	r7, r11, #16
16415	lsr	r7, r7, #24
16416#else
16417	uxtb	r7, r11, ror #8
16418#endif
16419#else
16420	ubfx	r7, r11, #8, #8
16421#endif
16422	eor	r4, r4, r12, lsl #16
16423#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16424#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16425	lsl	r12, r8, #8
16426	lsr	r12, r12, #24
16427#else
16428	uxtb	r12, r8, ror #16
16429#endif
16430#else
16431	ubfx	r12, r8, #16, #8
16432#endif
16433	eor	r4, r4, lr, lsl #24
16434	lsr	lr, r9, #24
16435	ldrb	r7, [r2, r7]
16436	ldrb	lr, [r2, lr]
16437	ldrb	r5, [r2, r5]
16438	ldrb	r12, [r2, r12]
16439#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16440#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16441	lsl	r6, r11, #24
16442	lsr	r6, r6, #24
16443#else
16444	uxtb	r6, r11
16445#endif
16446#else
16447	ubfx	r6, r11, #0, #8
16448#endif
16449	eor	r5, r5, r7, lsl #8
16450#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16451#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16452	lsl	r7, r8, #16
16453	lsr	r7, r7, #24
16454#else
16455	uxtb	r7, r8, ror #8
16456#endif
16457#else
16458	ubfx	r7, r8, #8, #8
16459#endif
16460	eor	r5, r5, r12, lsl #16
16461#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16462#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16463	lsl	r12, r9, #8
16464	lsr	r12, r12, #24
16465#else
16466	uxtb	r12, r9, ror #16
16467#endif
16468#else
16469	ubfx	r12, r9, #16, #8
16470#endif
16471	eor	r5, r5, lr, lsl #24
16472	lsr	lr, r10, #24
16473	ldrb	r7, [r2, r7]
16474	ldrb	lr, [r2, lr]
16475	ldrb	r6, [r2, r6]
16476	ldrb	r12, [r2, r12]
16477	lsr	r11, r11, #24
16478	eor	r6, r6, r7, lsl #8
16479#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16480#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16481	lsl	r7, r8, #24
16482	lsr	r7, r7, #24
16483#else
16484	uxtb	r7, r8
16485#endif
16486#else
16487	ubfx	r7, r8, #0, #8
16488#endif
16489	eor	r6, r6, r12, lsl #16
16490#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16491#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16492	lsl	r12, r9, #16
16493	lsr	r12, r12, #24
16494#else
16495	uxtb	r12, r9, ror #8
16496#endif
16497#else
16498	ubfx	r12, r9, #8, #8
16499#endif
16500	eor	r6, r6, lr, lsl #24
16501#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16502#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16503	lsl	lr, r10, #8
16504	lsr	lr, lr, #24
16505#else
16506	uxtb	lr, r10, ror #16
16507#endif
16508#else
16509	ubfx	lr, r10, #16, #8
16510#endif
16511	ldrb	r11, [r2, r11]
16512	ldrb	r12, [r2, r12]
16513	ldrb	r7, [r2, r7]
16514	ldrb	lr, [r2, lr]
16515	eor	r12, r12, r11, lsl #16
16516	ldm	r3, {r8, r9, r10, r11}
16517	eor	r7, r7, r12, lsl #8
16518	eor	r7, r7, lr, lsl #16
16519	#   XOR in Key Schedule
16520	eor	r4, r4, r8
16521	eor	r5, r5, r9
16522	eor	r6, r6, r10
16523	eor	r7, r7, r11
16524	pop	{pc}
16525	.size	AES_decrypt_block,.-AES_decrypt_block
16526#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
16527#ifndef __APPLE__
16528	.text
16529	.type	L_AES_ARM32_td_ecb, %object
16530	.size	L_AES_ARM32_td_ecb, 12
16531#else
16532	.section	__DATA,__data
16533#endif /* __APPLE__ */
16534	# 8-byte aligned, 64-bit aligned
16535#ifndef __APPLE__
16536	.align	3
16537#else
16538	.p2align	3
16539#endif /* __APPLE__ */
16540L_AES_ARM32_td_ecb:
16541	.long	L_AES_ARM32_td_data
16542#if defined(WOLFSSL_AES_DIRECT) || defined(WOLFSSL_AES_COUNTER) || defined(HAVE_AES_ECB)
16543#ifndef __APPLE__
16544	.text
16545	.type	L_AES_ARM32_ecb_td4, %object
16546	.size	L_AES_ARM32_ecb_td4, 256
16547#else
16548	.section	__DATA,__data
16549#endif /* __APPLE__ */
16550	# 4-byte aligned, 32-bit aligned
16551#ifndef __APPLE__
16552	.align	2
16553#else
16554	.p2align	2
16555#endif /* __APPLE__ */
16556L_AES_ARM32_ecb_td4:
16557	.byte	0x52,0x09,0x6a,0xd5,0x30,0x36,0xa5,0x38
16558	.byte	0xbf,0x40,0xa3,0x9e,0x81,0xf3,0xd7,0xfb
16559	.byte	0x7c,0xe3,0x39,0x82,0x9b,0x2f,0xff,0x87
16560	.byte	0x34,0x8e,0x43,0x44,0xc4,0xde,0xe9,0xcb
16561	.byte	0x54,0x7b,0x94,0x32,0xa6,0xc2,0x23,0x3d
16562	.byte	0xee,0x4c,0x95,0x0b,0x42,0xfa,0xc3,0x4e
16563	.byte	0x08,0x2e,0xa1,0x66,0x28,0xd9,0x24,0xb2
16564	.byte	0x76,0x5b,0xa2,0x49,0x6d,0x8b,0xd1,0x25
16565	.byte	0x72,0xf8,0xf6,0x64,0x86,0x68,0x98,0x16
16566	.byte	0xd4,0xa4,0x5c,0xcc,0x5d,0x65,0xb6,0x92
16567	.byte	0x6c,0x70,0x48,0x50,0xfd,0xed,0xb9,0xda
16568	.byte	0x5e,0x15,0x46,0x57,0xa7,0x8d,0x9d,0x84
16569	.byte	0x90,0xd8,0xab,0x00,0x8c,0xbc,0xd3,0x0a
16570	.byte	0xf7,0xe4,0x58,0x05,0xb8,0xb3,0x45,0x06
16571	.byte	0xd0,0x2c,0x1e,0x8f,0xca,0x3f,0x0f,0x02
16572	.byte	0xc1,0xaf,0xbd,0x03,0x01,0x13,0x8a,0x6b
16573	.byte	0x3a,0x91,0x11,0x41,0x4f,0x67,0xdc,0xea
16574	.byte	0x97,0xf2,0xcf,0xce,0xf0,0xb4,0xe6,0x73
16575	.byte	0x96,0xac,0x74,0x22,0xe7,0xad,0x35,0x85
16576	.byte	0xe2,0xf9,0x37,0xe8,0x1c,0x75,0xdf,0x6e
16577	.byte	0x47,0xf1,0x1a,0x71,0x1d,0x29,0xc5,0x89
16578	.byte	0x6f,0xb7,0x62,0x0e,0xaa,0x18,0xbe,0x1b
16579	.byte	0xfc,0x56,0x3e,0x4b,0xc6,0xd2,0x79,0x20
16580	.byte	0x9a,0xdb,0xc0,0xfe,0x78,0xcd,0x5a,0xf4
16581	.byte	0x1f,0xdd,0xa8,0x33,0x88,0x07,0xc7,0x31
16582	.byte	0xb1,0x12,0x10,0x59,0x27,0x80,0xec,0x5f
16583	.byte	0x60,0x51,0x7f,0xa9,0x19,0xb5,0x4a,0x0d
16584	.byte	0x2d,0xe5,0x7a,0x9f,0x93,0xc9,0x9c,0xef
16585	.byte	0xa0,0xe0,0x3b,0x4d,0xae,0x2a,0xf5,0xb0
16586	.byte	0xc8,0xeb,0xbb,0x3c,0x83,0x53,0x99,0x61
16587	.byte	0x17,0x2b,0x04,0x7e,0xba,0x77,0xd6,0x26
16588	.byte	0xe1,0x69,0x14,0x63,0x55,0x21,0x0c,0x7d
16589	.text
16590	.align	4
16591	.globl	AES_ECB_decrypt
16592	.type	AES_ECB_decrypt, %function
16593AES_ECB_decrypt:
16594	push	{r4, r5, r6, r7, r8, r9, r10, r11, lr}
16595	ldr	r8, [sp, #36]
16596	mov	lr, r0
16597	adr	r0, L_AES_ARM32_td_ecb
16598	ldr	r0, [r0]
16599	mov	r12, r2
16600	adr	r2, L_AES_ARM32_ecb_td4
16601	cmp	r8, #10
16602	beq	L_AES_ECB_decrypt_start_block_128
16603	cmp	r8, #12
16604	beq	L_AES_ECB_decrypt_start_block_192
16605L_AES_ECB_decrypt_loop_block_256:
16606	ldr	r4, [lr]
16607	ldr	r5, [lr, #4]
16608	ldr	r6, [lr, #8]
16609	ldr	r7, [lr, #12]
16610#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16611	eor	r8, r4, r4, ror #16
16612	eor	r9, r5, r5, ror #16
16613	eor	r10, r6, r6, ror #16
16614	eor	r11, r7, r7, ror #16
16615	bic	r8, r8, #0xff0000
16616	bic	r9, r9, #0xff0000
16617	bic	r10, r10, #0xff0000
16618	bic	r11, r11, #0xff0000
16619	ror	r4, r4, #8
16620	ror	r5, r5, #8
16621	ror	r6, r6, #8
16622	ror	r7, r7, #8
16623	eor	r4, r4, r8, lsr #8
16624	eor	r5, r5, r9, lsr #8
16625	eor	r6, r6, r10, lsr #8
16626	eor	r7, r7, r11, lsr #8
16627#else
16628	rev	r4, r4
16629	rev	r5, r5
16630	rev	r6, r6
16631	rev	r7, r7
16632#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
16633	push	{r1, r3, r12, lr}
16634	ldm	r3!, {r8, r9, r10, r11}
16635	# Round: 0 - XOR in key schedule
16636	eor	r4, r4, r8
16637	eor	r5, r5, r9
16638	eor	r6, r6, r10
16639	eor	r7, r7, r11
16640	mov	r1, #6
16641#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
16642	bl	AES_decrypt_block
16643#else
16644L_AES_ECB_decrypt_block_nr_256:
16645#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16646#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16647	lsl	r8, r7, #8
16648	lsr	r8, r8, #24
16649#else
16650	uxtb	r8, r7, ror #16
16651#endif
16652#else
16653	ubfx	r8, r7, #16, #8
16654#endif
16655	lsr	r11, r4, #24
16656#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16657#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16658	lsl	r12, r6, #16
16659	lsr	r12, r12, #24
16660#else
16661	uxtb	r12, r6, ror #8
16662#endif
16663#else
16664	ubfx	r12, r6, #8, #8
16665#endif
16666#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16667#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16668	lsl	lr, r5, #24
16669	lsr	lr, lr, #24
16670#else
16671	uxtb	lr, r5
16672#endif
16673#else
16674	ubfx	lr, r5, #0, #8
16675#endif
16676	ldr	r8, [r0, r8, lsl #2]
16677	ldr	r11, [r0, r11, lsl #2]
16678	ldr	r12, [r0, r12, lsl #2]
16679	ldr	lr, [r0, lr, lsl #2]
16680#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16681#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16682	lsl	r9, r4, #8
16683	lsr	r9, r9, #24
16684#else
16685	uxtb	r9, r4, ror #16
16686#endif
16687#else
16688	ubfx	r9, r4, #16, #8
16689#endif
16690	eor	r8, r8, r11, ror #24
16691	lsr	r11, r5, #24
16692	eor	r8, r8, r12, ror #8
16693#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16694#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16695	lsl	r12, r7, #16
16696	lsr	r12, r12, #24
16697#else
16698	uxtb	r12, r7, ror #8
16699#endif
16700#else
16701	ubfx	r12, r7, #8, #8
16702#endif
16703	eor	r8, r8, lr, ror #16
16704#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16705#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16706	lsl	lr, r6, #24
16707	lsr	lr, lr, #24
16708#else
16709	uxtb	lr, r6
16710#endif
16711#else
16712	ubfx	lr, r6, #0, #8
16713#endif
16714	ldr	r9, [r0, r9, lsl #2]
16715	ldr	r11, [r0, r11, lsl #2]
16716	ldr	r12, [r0, r12, lsl #2]
16717	ldr	lr, [r0, lr, lsl #2]
16718#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16719#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16720	lsl	r10, r5, #8
16721	lsr	r10, r10, #24
16722#else
16723	uxtb	r10, r5, ror #16
16724#endif
16725#else
16726	ubfx	r10, r5, #16, #8
16727#endif
16728	eor	r9, r9, r11, ror #24
16729	lsr	r11, r6, #24
16730	eor	r9, r9, r12, ror #8
16731#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16732#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16733	lsl	r12, r4, #16
16734	lsr	r12, r12, #24
16735#else
16736	uxtb	r12, r4, ror #8
16737#endif
16738#else
16739	ubfx	r12, r4, #8, #8
16740#endif
16741	eor	r9, r9, lr, ror #16
16742#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16743#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16744	lsl	lr, r7, #24
16745	lsr	lr, lr, #24
16746#else
16747	uxtb	lr, r7
16748#endif
16749#else
16750	ubfx	lr, r7, #0, #8
16751#endif
16752	ldr	r10, [r0, r10, lsl #2]
16753	ldr	r11, [r0, r11, lsl #2]
16754	ldr	r12, [r0, r12, lsl #2]
16755	ldr	lr, [r0, lr, lsl #2]
16756#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16757#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16758	lsl	r4, r4, #24
16759	lsr	r4, r4, #24
16760#else
16761	uxtb	r4, r4
16762#endif
16763#else
16764	ubfx	r4, r4, #0, #8
16765#endif
16766	eor	r10, r10, r11, ror #24
16767#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16768#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16769	lsl	r11, r6, #8
16770	lsr	r11, r11, #24
16771#else
16772	uxtb	r11, r6, ror #16
16773#endif
16774#else
16775	ubfx	r11, r6, #16, #8
16776#endif
16777	eor	r10, r10, r12, ror #8
16778	lsr	r12, r7, #24
16779	eor	r10, r10, lr, ror #16
16780#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16781#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16782	lsl	lr, r5, #16
16783	lsr	lr, lr, #24
16784#else
16785	uxtb	lr, r5, ror #8
16786#endif
16787#else
16788	ubfx	lr, r5, #8, #8
16789#endif
16790	ldr	r4, [r0, r4, lsl #2]
16791	ldr	r12, [r0, r12, lsl #2]
16792	ldr	r11, [r0, r11, lsl #2]
16793	ldr	lr, [r0, lr, lsl #2]
16794	eor	r12, r12, r4, ror #24
16795	ldm	r3!, {r4, r5, r6, r7}
16796	eor	r11, r11, lr, ror #8
16797	eor	r11, r11, r12, ror #24
16798	#   XOR in Key Schedule
16799	eor	r8, r8, r4
16800	eor	r9, r9, r5
16801	eor	r10, r10, r6
16802	eor	r11, r11, r7
16803#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16804#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16805	lsl	r4, r11, #8
16806	lsr	r4, r4, #24
16807#else
16808	uxtb	r4, r11, ror #16
16809#endif
16810#else
16811	ubfx	r4, r11, #16, #8
16812#endif
16813	lsr	r7, r8, #24
16814#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16815#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16816	lsl	r12, r10, #16
16817	lsr	r12, r12, #24
16818#else
16819	uxtb	r12, r10, ror #8
16820#endif
16821#else
16822	ubfx	r12, r10, #8, #8
16823#endif
16824#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16825#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16826	lsl	lr, r9, #24
16827	lsr	lr, lr, #24
16828#else
16829	uxtb	lr, r9
16830#endif
16831#else
16832	ubfx	lr, r9, #0, #8
16833#endif
16834	ldr	r4, [r0, r4, lsl #2]
16835	ldr	r7, [r0, r7, lsl #2]
16836	ldr	r12, [r0, r12, lsl #2]
16837	ldr	lr, [r0, lr, lsl #2]
16838#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16839#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16840	lsl	r5, r8, #8
16841	lsr	r5, r5, #24
16842#else
16843	uxtb	r5, r8, ror #16
16844#endif
16845#else
16846	ubfx	r5, r8, #16, #8
16847#endif
16848	eor	r4, r4, r7, ror #24
16849	lsr	r7, r9, #24
16850	eor	r4, r4, r12, ror #8
16851#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16852#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16853	lsl	r12, r11, #16
16854	lsr	r12, r12, #24
16855#else
16856	uxtb	r12, r11, ror #8
16857#endif
16858#else
16859	ubfx	r12, r11, #8, #8
16860#endif
16861	eor	r4, r4, lr, ror #16
16862#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16863#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16864	lsl	lr, r10, #24
16865	lsr	lr, lr, #24
16866#else
16867	uxtb	lr, r10
16868#endif
16869#else
16870	ubfx	lr, r10, #0, #8
16871#endif
16872	ldr	r5, [r0, r5, lsl #2]
16873	ldr	r7, [r0, r7, lsl #2]
16874	ldr	r12, [r0, r12, lsl #2]
16875	ldr	lr, [r0, lr, lsl #2]
16876#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16877#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16878	lsl	r6, r9, #8
16879	lsr	r6, r6, #24
16880#else
16881	uxtb	r6, r9, ror #16
16882#endif
16883#else
16884	ubfx	r6, r9, #16, #8
16885#endif
16886	eor	r5, r5, r7, ror #24
16887	lsr	r7, r10, #24
16888	eor	r5, r5, r12, ror #8
16889#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16890#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16891	lsl	r12, r8, #16
16892	lsr	r12, r12, #24
16893#else
16894	uxtb	r12, r8, ror #8
16895#endif
16896#else
16897	ubfx	r12, r8, #8, #8
16898#endif
16899	eor	r5, r5, lr, ror #16
16900#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16901#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16902	lsl	lr, r11, #24
16903	lsr	lr, lr, #24
16904#else
16905	uxtb	lr, r11
16906#endif
16907#else
16908	ubfx	lr, r11, #0, #8
16909#endif
16910	ldr	r6, [r0, r6, lsl #2]
16911	ldr	r7, [r0, r7, lsl #2]
16912	ldr	r12, [r0, r12, lsl #2]
16913	ldr	lr, [r0, lr, lsl #2]
16914#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16915#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16916	lsl	r8, r8, #24
16917	lsr	r8, r8, #24
16918#else
16919	uxtb	r8, r8
16920#endif
16921#else
16922	ubfx	r8, r8, #0, #8
16923#endif
16924	eor	r6, r6, r7, ror #24
16925#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16926#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16927	lsl	r7, r10, #8
16928	lsr	r7, r7, #24
16929#else
16930	uxtb	r7, r10, ror #16
16931#endif
16932#else
16933	ubfx	r7, r10, #16, #8
16934#endif
16935	eor	r6, r6, r12, ror #8
16936	lsr	r12, r11, #24
16937	eor	r6, r6, lr, ror #16
16938#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16939#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16940	lsl	lr, r9, #16
16941	lsr	lr, lr, #24
16942#else
16943	uxtb	lr, r9, ror #8
16944#endif
16945#else
16946	ubfx	lr, r9, #8, #8
16947#endif
16948	ldr	r8, [r0, r8, lsl #2]
16949	ldr	r12, [r0, r12, lsl #2]
16950	ldr	r7, [r0, r7, lsl #2]
16951	ldr	lr, [r0, lr, lsl #2]
16952	eor	r12, r12, r8, ror #24
16953	ldm	r3!, {r8, r9, r10, r11}
16954	eor	r7, r7, lr, ror #8
16955	eor	r7, r7, r12, ror #24
16956	#   XOR in Key Schedule
16957	eor	r4, r4, r8
16958	eor	r5, r5, r9
16959	eor	r6, r6, r10
16960	eor	r7, r7, r11
16961	subs	r1, r1, #1
16962	bne	L_AES_ECB_decrypt_block_nr_256
16963#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16964#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16965	lsl	r8, r7, #8
16966	lsr	r8, r8, #24
16967#else
16968	uxtb	r8, r7, ror #16
16969#endif
16970#else
16971	ubfx	r8, r7, #16, #8
16972#endif
16973	lsr	r11, r4, #24
16974#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16975#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16976	lsl	r12, r6, #16
16977	lsr	r12, r12, #24
16978#else
16979	uxtb	r12, r6, ror #8
16980#endif
16981#else
16982	ubfx	r12, r6, #8, #8
16983#endif
16984#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16985#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
16986	lsl	lr, r5, #24
16987	lsr	lr, lr, #24
16988#else
16989	uxtb	lr, r5
16990#endif
16991#else
16992	ubfx	lr, r5, #0, #8
16993#endif
16994	ldr	r8, [r0, r8, lsl #2]
16995	ldr	r11, [r0, r11, lsl #2]
16996	ldr	r12, [r0, r12, lsl #2]
16997	ldr	lr, [r0, lr, lsl #2]
16998#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
16999#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17000	lsl	r9, r4, #8
17001	lsr	r9, r9, #24
17002#else
17003	uxtb	r9, r4, ror #16
17004#endif
17005#else
17006	ubfx	r9, r4, #16, #8
17007#endif
17008	eor	r8, r8, r11, ror #24
17009	lsr	r11, r5, #24
17010	eor	r8, r8, r12, ror #8
17011#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17012#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17013	lsl	r12, r7, #16
17014	lsr	r12, r12, #24
17015#else
17016	uxtb	r12, r7, ror #8
17017#endif
17018#else
17019	ubfx	r12, r7, #8, #8
17020#endif
17021	eor	r8, r8, lr, ror #16
17022#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17023#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17024	lsl	lr, r6, #24
17025	lsr	lr, lr, #24
17026#else
17027	uxtb	lr, r6
17028#endif
17029#else
17030	ubfx	lr, r6, #0, #8
17031#endif
17032	ldr	r9, [r0, r9, lsl #2]
17033	ldr	r11, [r0, r11, lsl #2]
17034	ldr	r12, [r0, r12, lsl #2]
17035	ldr	lr, [r0, lr, lsl #2]
17036#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17037#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17038	lsl	r10, r5, #8
17039	lsr	r10, r10, #24
17040#else
17041	uxtb	r10, r5, ror #16
17042#endif
17043#else
17044	ubfx	r10, r5, #16, #8
17045#endif
17046	eor	r9, r9, r11, ror #24
17047	lsr	r11, r6, #24
17048	eor	r9, r9, r12, ror #8
17049#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17050#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17051	lsl	r12, r4, #16
17052	lsr	r12, r12, #24
17053#else
17054	uxtb	r12, r4, ror #8
17055#endif
17056#else
17057	ubfx	r12, r4, #8, #8
17058#endif
17059	eor	r9, r9, lr, ror #16
17060#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17061#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17062	lsl	lr, r7, #24
17063	lsr	lr, lr, #24
17064#else
17065	uxtb	lr, r7
17066#endif
17067#else
17068	ubfx	lr, r7, #0, #8
17069#endif
17070	ldr	r10, [r0, r10, lsl #2]
17071	ldr	r11, [r0, r11, lsl #2]
17072	ldr	r12, [r0, r12, lsl #2]
17073	ldr	lr, [r0, lr, lsl #2]
17074#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17075#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17076	lsl	r4, r4, #24
17077	lsr	r4, r4, #24
17078#else
17079	uxtb	r4, r4
17080#endif
17081#else
17082	ubfx	r4, r4, #0, #8
17083#endif
17084	eor	r10, r10, r11, ror #24
17085#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17086#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17087	lsl	r11, r6, #8
17088	lsr	r11, r11, #24
17089#else
17090	uxtb	r11, r6, ror #16
17091#endif
17092#else
17093	ubfx	r11, r6, #16, #8
17094#endif
17095	eor	r10, r10, r12, ror #8
17096	lsr	r12, r7, #24
17097	eor	r10, r10, lr, ror #16
17098#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17099#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17100	lsl	lr, r5, #16
17101	lsr	lr, lr, #24
17102#else
17103	uxtb	lr, r5, ror #8
17104#endif
17105#else
17106	ubfx	lr, r5, #8, #8
17107#endif
17108	ldr	r4, [r0, r4, lsl #2]
17109	ldr	r12, [r0, r12, lsl #2]
17110	ldr	r11, [r0, r11, lsl #2]
17111	ldr	lr, [r0, lr, lsl #2]
17112	eor	r12, r12, r4, ror #24
17113	ldm	r3!, {r4, r5, r6, r7}
17114	eor	r11, r11, lr, ror #8
17115	eor	r11, r11, r12, ror #24
17116	#   XOR in Key Schedule
17117	eor	r8, r8, r4
17118	eor	r9, r9, r5
17119	eor	r10, r10, r6
17120	eor	r11, r11, r7
17121#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17122#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17123	lsl	r4, r9, #24
17124	lsr	r4, r4, #24
17125#else
17126	uxtb	r4, r9
17127#endif
17128#else
17129	ubfx	r4, r9, #0, #8
17130#endif
17131#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17132#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17133	lsl	r7, r10, #16
17134	lsr	r7, r7, #24
17135#else
17136	uxtb	r7, r10, ror #8
17137#endif
17138#else
17139	ubfx	r7, r10, #8, #8
17140#endif
17141#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17142#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17143	lsl	r12, r11, #8
17144	lsr	r12, r12, #24
17145#else
17146	uxtb	r12, r11, ror #16
17147#endif
17148#else
17149	ubfx	r12, r11, #16, #8
17150#endif
17151	lsr	lr, r8, #24
17152	ldrb	r4, [r2, r4]
17153	ldrb	r7, [r2, r7]
17154	ldrb	r12, [r2, r12]
17155	ldrb	lr, [r2, lr]
17156#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17157#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17158	lsl	r5, r10, #24
17159	lsr	r5, r5, #24
17160#else
17161	uxtb	r5, r10
17162#endif
17163#else
17164	ubfx	r5, r10, #0, #8
17165#endif
17166	eor	r4, r4, r7, lsl #8
17167#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17168#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17169	lsl	r7, r11, #16
17170	lsr	r7, r7, #24
17171#else
17172	uxtb	r7, r11, ror #8
17173#endif
17174#else
17175	ubfx	r7, r11, #8, #8
17176#endif
17177	eor	r4, r4, r12, lsl #16
17178#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17179#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17180	lsl	r12, r8, #8
17181	lsr	r12, r12, #24
17182#else
17183	uxtb	r12, r8, ror #16
17184#endif
17185#else
17186	ubfx	r12, r8, #16, #8
17187#endif
17188	eor	r4, r4, lr, lsl #24
17189	lsr	lr, r9, #24
17190	ldrb	r7, [r2, r7]
17191	ldrb	lr, [r2, lr]
17192	ldrb	r5, [r2, r5]
17193	ldrb	r12, [r2, r12]
17194#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17195#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17196	lsl	r6, r11, #24
17197	lsr	r6, r6, #24
17198#else
17199	uxtb	r6, r11
17200#endif
17201#else
17202	ubfx	r6, r11, #0, #8
17203#endif
17204	eor	r5, r5, r7, lsl #8
17205#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17206#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17207	lsl	r7, r8, #16
17208	lsr	r7, r7, #24
17209#else
17210	uxtb	r7, r8, ror #8
17211#endif
17212#else
17213	ubfx	r7, r8, #8, #8
17214#endif
17215	eor	r5, r5, r12, lsl #16
17216#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17217#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17218	lsl	r12, r9, #8
17219	lsr	r12, r12, #24
17220#else
17221	uxtb	r12, r9, ror #16
17222#endif
17223#else
17224	ubfx	r12, r9, #16, #8
17225#endif
17226	eor	r5, r5, lr, lsl #24
17227	lsr	lr, r10, #24
17228	ldrb	r7, [r2, r7]
17229	ldrb	lr, [r2, lr]
17230	ldrb	r6, [r2, r6]
17231	ldrb	r12, [r2, r12]
17232	lsr	r11, r11, #24
17233	eor	r6, r6, r7, lsl #8
17234#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17235#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17236	lsl	r7, r8, #24
17237	lsr	r7, r7, #24
17238#else
17239	uxtb	r7, r8
17240#endif
17241#else
17242	ubfx	r7, r8, #0, #8
17243#endif
17244	eor	r6, r6, r12, lsl #16
17245#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17246#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17247	lsl	r12, r9, #16
17248	lsr	r12, r12, #24
17249#else
17250	uxtb	r12, r9, ror #8
17251#endif
17252#else
17253	ubfx	r12, r9, #8, #8
17254#endif
17255	eor	r6, r6, lr, lsl #24
17256#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17257#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17258	lsl	lr, r10, #8
17259	lsr	lr, lr, #24
17260#else
17261	uxtb	lr, r10, ror #16
17262#endif
17263#else
17264	ubfx	lr, r10, #16, #8
17265#endif
17266	ldrb	r11, [r2, r11]
17267	ldrb	r12, [r2, r12]
17268	ldrb	r7, [r2, r7]
17269	ldrb	lr, [r2, lr]
17270	eor	r12, r12, r11, lsl #16
17271	ldm	r3, {r8, r9, r10, r11}
17272	eor	r7, r7, r12, lsl #8
17273	eor	r7, r7, lr, lsl #16
17274	#   XOR in Key Schedule
17275	eor	r4, r4, r8
17276	eor	r5, r5, r9
17277	eor	r6, r6, r10
17278	eor	r7, r7, r11
17279#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
17280	pop	{r1, r3, r12, lr}
17281#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17282	eor	r8, r4, r4, ror #16
17283	eor	r9, r5, r5, ror #16
17284	eor	r10, r6, r6, ror #16
17285	eor	r11, r7, r7, ror #16
17286	bic	r8, r8, #0xff0000
17287	bic	r9, r9, #0xff0000
17288	bic	r10, r10, #0xff0000
17289	bic	r11, r11, #0xff0000
17290	ror	r4, r4, #8
17291	ror	r5, r5, #8
17292	ror	r6, r6, #8
17293	ror	r7, r7, #8
17294	eor	r4, r4, r8, lsr #8
17295	eor	r5, r5, r9, lsr #8
17296	eor	r6, r6, r10, lsr #8
17297	eor	r7, r7, r11, lsr #8
17298#else
17299	rev	r4, r4
17300	rev	r5, r5
17301	rev	r6, r6
17302	rev	r7, r7
17303#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
17304	str	r4, [r1]
17305	str	r5, [r1, #4]
17306	str	r6, [r1, #8]
17307	str	r7, [r1, #12]
17308	subs	r12, r12, #16
17309	add	lr, lr, #16
17310	add	r1, r1, #16
17311	bne	L_AES_ECB_decrypt_loop_block_256
17312	b	L_AES_ECB_decrypt_end
17313L_AES_ECB_decrypt_start_block_192:
17314L_AES_ECB_decrypt_loop_block_192:
17315	ldr	r4, [lr]
17316	ldr	r5, [lr, #4]
17317	ldr	r6, [lr, #8]
17318	ldr	r7, [lr, #12]
17319#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17320	eor	r8, r4, r4, ror #16
17321	eor	r9, r5, r5, ror #16
17322	eor	r10, r6, r6, ror #16
17323	eor	r11, r7, r7, ror #16
17324	bic	r8, r8, #0xff0000
17325	bic	r9, r9, #0xff0000
17326	bic	r10, r10, #0xff0000
17327	bic	r11, r11, #0xff0000
17328	ror	r4, r4, #8
17329	ror	r5, r5, #8
17330	ror	r6, r6, #8
17331	ror	r7, r7, #8
17332	eor	r4, r4, r8, lsr #8
17333	eor	r5, r5, r9, lsr #8
17334	eor	r6, r6, r10, lsr #8
17335	eor	r7, r7, r11, lsr #8
17336#else
17337	rev	r4, r4
17338	rev	r5, r5
17339	rev	r6, r6
17340	rev	r7, r7
17341#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
17342	push	{r1, r3, r12, lr}
17343	ldm	r3!, {r8, r9, r10, r11}
17344	# Round: 0 - XOR in key schedule
17345	eor	r4, r4, r8
17346	eor	r5, r5, r9
17347	eor	r6, r6, r10
17348	eor	r7, r7, r11
17349	mov	r1, #5
17350#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
17351	bl	AES_decrypt_block
17352#else
17353L_AES_ECB_decrypt_block_nr_192:
17354#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17355#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17356	lsl	r8, r7, #8
17357	lsr	r8, r8, #24
17358#else
17359	uxtb	r8, r7, ror #16
17360#endif
17361#else
17362	ubfx	r8, r7, #16, #8
17363#endif
17364	lsr	r11, r4, #24
17365#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17366#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17367	lsl	r12, r6, #16
17368	lsr	r12, r12, #24
17369#else
17370	uxtb	r12, r6, ror #8
17371#endif
17372#else
17373	ubfx	r12, r6, #8, #8
17374#endif
17375#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17376#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17377	lsl	lr, r5, #24
17378	lsr	lr, lr, #24
17379#else
17380	uxtb	lr, r5
17381#endif
17382#else
17383	ubfx	lr, r5, #0, #8
17384#endif
17385	ldr	r8, [r0, r8, lsl #2]
17386	ldr	r11, [r0, r11, lsl #2]
17387	ldr	r12, [r0, r12, lsl #2]
17388	ldr	lr, [r0, lr, lsl #2]
17389#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17390#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17391	lsl	r9, r4, #8
17392	lsr	r9, r9, #24
17393#else
17394	uxtb	r9, r4, ror #16
17395#endif
17396#else
17397	ubfx	r9, r4, #16, #8
17398#endif
17399	eor	r8, r8, r11, ror #24
17400	lsr	r11, r5, #24
17401	eor	r8, r8, r12, ror #8
17402#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17403#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17404	lsl	r12, r7, #16
17405	lsr	r12, r12, #24
17406#else
17407	uxtb	r12, r7, ror #8
17408#endif
17409#else
17410	ubfx	r12, r7, #8, #8
17411#endif
17412	eor	r8, r8, lr, ror #16
17413#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17414#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17415	lsl	lr, r6, #24
17416	lsr	lr, lr, #24
17417#else
17418	uxtb	lr, r6
17419#endif
17420#else
17421	ubfx	lr, r6, #0, #8
17422#endif
17423	ldr	r9, [r0, r9, lsl #2]
17424	ldr	r11, [r0, r11, lsl #2]
17425	ldr	r12, [r0, r12, lsl #2]
17426	ldr	lr, [r0, lr, lsl #2]
17427#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17428#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17429	lsl	r10, r5, #8
17430	lsr	r10, r10, #24
17431#else
17432	uxtb	r10, r5, ror #16
17433#endif
17434#else
17435	ubfx	r10, r5, #16, #8
17436#endif
17437	eor	r9, r9, r11, ror #24
17438	lsr	r11, r6, #24
17439	eor	r9, r9, r12, ror #8
17440#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17441#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17442	lsl	r12, r4, #16
17443	lsr	r12, r12, #24
17444#else
17445	uxtb	r12, r4, ror #8
17446#endif
17447#else
17448	ubfx	r12, r4, #8, #8
17449#endif
17450	eor	r9, r9, lr, ror #16
17451#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17452#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17453	lsl	lr, r7, #24
17454	lsr	lr, lr, #24
17455#else
17456	uxtb	lr, r7
17457#endif
17458#else
17459	ubfx	lr, r7, #0, #8
17460#endif
17461	ldr	r10, [r0, r10, lsl #2]
17462	ldr	r11, [r0, r11, lsl #2]
17463	ldr	r12, [r0, r12, lsl #2]
17464	ldr	lr, [r0, lr, lsl #2]
17465#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17466#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17467	lsl	r4, r4, #24
17468	lsr	r4, r4, #24
17469#else
17470	uxtb	r4, r4
17471#endif
17472#else
17473	ubfx	r4, r4, #0, #8
17474#endif
17475	eor	r10, r10, r11, ror #24
17476#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17477#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17478	lsl	r11, r6, #8
17479	lsr	r11, r11, #24
17480#else
17481	uxtb	r11, r6, ror #16
17482#endif
17483#else
17484	ubfx	r11, r6, #16, #8
17485#endif
17486	eor	r10, r10, r12, ror #8
17487	lsr	r12, r7, #24
17488	eor	r10, r10, lr, ror #16
17489#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17490#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17491	lsl	lr, r5, #16
17492	lsr	lr, lr, #24
17493#else
17494	uxtb	lr, r5, ror #8
17495#endif
17496#else
17497	ubfx	lr, r5, #8, #8
17498#endif
17499	ldr	r4, [r0, r4, lsl #2]
17500	ldr	r12, [r0, r12, lsl #2]
17501	ldr	r11, [r0, r11, lsl #2]
17502	ldr	lr, [r0, lr, lsl #2]
17503	eor	r12, r12, r4, ror #24
17504	ldm	r3!, {r4, r5, r6, r7}
17505	eor	r11, r11, lr, ror #8
17506	eor	r11, r11, r12, ror #24
17507	#   XOR in Key Schedule
17508	eor	r8, r8, r4
17509	eor	r9, r9, r5
17510	eor	r10, r10, r6
17511	eor	r11, r11, r7
17512#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17513#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17514	lsl	r4, r11, #8
17515	lsr	r4, r4, #24
17516#else
17517	uxtb	r4, r11, ror #16
17518#endif
17519#else
17520	ubfx	r4, r11, #16, #8
17521#endif
17522	lsr	r7, r8, #24
17523#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17524#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17525	lsl	r12, r10, #16
17526	lsr	r12, r12, #24
17527#else
17528	uxtb	r12, r10, ror #8
17529#endif
17530#else
17531	ubfx	r12, r10, #8, #8
17532#endif
17533#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17534#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17535	lsl	lr, r9, #24
17536	lsr	lr, lr, #24
17537#else
17538	uxtb	lr, r9
17539#endif
17540#else
17541	ubfx	lr, r9, #0, #8
17542#endif
17543	ldr	r4, [r0, r4, lsl #2]
17544	ldr	r7, [r0, r7, lsl #2]
17545	ldr	r12, [r0, r12, lsl #2]
17546	ldr	lr, [r0, lr, lsl #2]
17547#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17548#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17549	lsl	r5, r8, #8
17550	lsr	r5, r5, #24
17551#else
17552	uxtb	r5, r8, ror #16
17553#endif
17554#else
17555	ubfx	r5, r8, #16, #8
17556#endif
17557	eor	r4, r4, r7, ror #24
17558	lsr	r7, r9, #24
17559	eor	r4, r4, r12, ror #8
17560#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17561#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17562	lsl	r12, r11, #16
17563	lsr	r12, r12, #24
17564#else
17565	uxtb	r12, r11, ror #8
17566#endif
17567#else
17568	ubfx	r12, r11, #8, #8
17569#endif
17570	eor	r4, r4, lr, ror #16
17571#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17572#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17573	lsl	lr, r10, #24
17574	lsr	lr, lr, #24
17575#else
17576	uxtb	lr, r10
17577#endif
17578#else
17579	ubfx	lr, r10, #0, #8
17580#endif
17581	ldr	r5, [r0, r5, lsl #2]
17582	ldr	r7, [r0, r7, lsl #2]
17583	ldr	r12, [r0, r12, lsl #2]
17584	ldr	lr, [r0, lr, lsl #2]
17585#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17586#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17587	lsl	r6, r9, #8
17588	lsr	r6, r6, #24
17589#else
17590	uxtb	r6, r9, ror #16
17591#endif
17592#else
17593	ubfx	r6, r9, #16, #8
17594#endif
17595	eor	r5, r5, r7, ror #24
17596	lsr	r7, r10, #24
17597	eor	r5, r5, r12, ror #8
17598#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17599#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17600	lsl	r12, r8, #16
17601	lsr	r12, r12, #24
17602#else
17603	uxtb	r12, r8, ror #8
17604#endif
17605#else
17606	ubfx	r12, r8, #8, #8
17607#endif
17608	eor	r5, r5, lr, ror #16
17609#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17610#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17611	lsl	lr, r11, #24
17612	lsr	lr, lr, #24
17613#else
17614	uxtb	lr, r11
17615#endif
17616#else
17617	ubfx	lr, r11, #0, #8
17618#endif
17619	ldr	r6, [r0, r6, lsl #2]
17620	ldr	r7, [r0, r7, lsl #2]
17621	ldr	r12, [r0, r12, lsl #2]
17622	ldr	lr, [r0, lr, lsl #2]
17623#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17624#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17625	lsl	r8, r8, #24
17626	lsr	r8, r8, #24
17627#else
17628	uxtb	r8, r8
17629#endif
17630#else
17631	ubfx	r8, r8, #0, #8
17632#endif
17633	eor	r6, r6, r7, ror #24
17634#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17635#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17636	lsl	r7, r10, #8
17637	lsr	r7, r7, #24
17638#else
17639	uxtb	r7, r10, ror #16
17640#endif
17641#else
17642	ubfx	r7, r10, #16, #8
17643#endif
17644	eor	r6, r6, r12, ror #8
17645	lsr	r12, r11, #24
17646	eor	r6, r6, lr, ror #16
17647#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17648#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17649	lsl	lr, r9, #16
17650	lsr	lr, lr, #24
17651#else
17652	uxtb	lr, r9, ror #8
17653#endif
17654#else
17655	ubfx	lr, r9, #8, #8
17656#endif
17657	ldr	r8, [r0, r8, lsl #2]
17658	ldr	r12, [r0, r12, lsl #2]
17659	ldr	r7, [r0, r7, lsl #2]
17660	ldr	lr, [r0, lr, lsl #2]
17661	eor	r12, r12, r8, ror #24
17662	ldm	r3!, {r8, r9, r10, r11}
17663	eor	r7, r7, lr, ror #8
17664	eor	r7, r7, r12, ror #24
17665	#   XOR in Key Schedule
17666	eor	r4, r4, r8
17667	eor	r5, r5, r9
17668	eor	r6, r6, r10
17669	eor	r7, r7, r11
17670	subs	r1, r1, #1
17671	bne	L_AES_ECB_decrypt_block_nr_192
17672#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17673#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17674	lsl	r8, r7, #8
17675	lsr	r8, r8, #24
17676#else
17677	uxtb	r8, r7, ror #16
17678#endif
17679#else
17680	ubfx	r8, r7, #16, #8
17681#endif
17682	lsr	r11, r4, #24
17683#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17684#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17685	lsl	r12, r6, #16
17686	lsr	r12, r12, #24
17687#else
17688	uxtb	r12, r6, ror #8
17689#endif
17690#else
17691	ubfx	r12, r6, #8, #8
17692#endif
17693#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17694#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17695	lsl	lr, r5, #24
17696	lsr	lr, lr, #24
17697#else
17698	uxtb	lr, r5
17699#endif
17700#else
17701	ubfx	lr, r5, #0, #8
17702#endif
17703	ldr	r8, [r0, r8, lsl #2]
17704	ldr	r11, [r0, r11, lsl #2]
17705	ldr	r12, [r0, r12, lsl #2]
17706	ldr	lr, [r0, lr, lsl #2]
17707#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17708#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17709	lsl	r9, r4, #8
17710	lsr	r9, r9, #24
17711#else
17712	uxtb	r9, r4, ror #16
17713#endif
17714#else
17715	ubfx	r9, r4, #16, #8
17716#endif
17717	eor	r8, r8, r11, ror #24
17718	lsr	r11, r5, #24
17719	eor	r8, r8, r12, ror #8
17720#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17721#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17722	lsl	r12, r7, #16
17723	lsr	r12, r12, #24
17724#else
17725	uxtb	r12, r7, ror #8
17726#endif
17727#else
17728	ubfx	r12, r7, #8, #8
17729#endif
17730	eor	r8, r8, lr, ror #16
17731#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17732#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17733	lsl	lr, r6, #24
17734	lsr	lr, lr, #24
17735#else
17736	uxtb	lr, r6
17737#endif
17738#else
17739	ubfx	lr, r6, #0, #8
17740#endif
17741	ldr	r9, [r0, r9, lsl #2]
17742	ldr	r11, [r0, r11, lsl #2]
17743	ldr	r12, [r0, r12, lsl #2]
17744	ldr	lr, [r0, lr, lsl #2]
17745#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17746#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17747	lsl	r10, r5, #8
17748	lsr	r10, r10, #24
17749#else
17750	uxtb	r10, r5, ror #16
17751#endif
17752#else
17753	ubfx	r10, r5, #16, #8
17754#endif
17755	eor	r9, r9, r11, ror #24
17756	lsr	r11, r6, #24
17757	eor	r9, r9, r12, ror #8
17758#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17759#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17760	lsl	r12, r4, #16
17761	lsr	r12, r12, #24
17762#else
17763	uxtb	r12, r4, ror #8
17764#endif
17765#else
17766	ubfx	r12, r4, #8, #8
17767#endif
17768	eor	r9, r9, lr, ror #16
17769#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17770#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17771	lsl	lr, r7, #24
17772	lsr	lr, lr, #24
17773#else
17774	uxtb	lr, r7
17775#endif
17776#else
17777	ubfx	lr, r7, #0, #8
17778#endif
17779	ldr	r10, [r0, r10, lsl #2]
17780	ldr	r11, [r0, r11, lsl #2]
17781	ldr	r12, [r0, r12, lsl #2]
17782	ldr	lr, [r0, lr, lsl #2]
17783#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17784#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17785	lsl	r4, r4, #24
17786	lsr	r4, r4, #24
17787#else
17788	uxtb	r4, r4
17789#endif
17790#else
17791	ubfx	r4, r4, #0, #8
17792#endif
17793	eor	r10, r10, r11, ror #24
17794#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17795#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17796	lsl	r11, r6, #8
17797	lsr	r11, r11, #24
17798#else
17799	uxtb	r11, r6, ror #16
17800#endif
17801#else
17802	ubfx	r11, r6, #16, #8
17803#endif
17804	eor	r10, r10, r12, ror #8
17805	lsr	r12, r7, #24
17806	eor	r10, r10, lr, ror #16
17807#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17808#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17809	lsl	lr, r5, #16
17810	lsr	lr, lr, #24
17811#else
17812	uxtb	lr, r5, ror #8
17813#endif
17814#else
17815	ubfx	lr, r5, #8, #8
17816#endif
17817	ldr	r4, [r0, r4, lsl #2]
17818	ldr	r12, [r0, r12, lsl #2]
17819	ldr	r11, [r0, r11, lsl #2]
17820	ldr	lr, [r0, lr, lsl #2]
17821	eor	r12, r12, r4, ror #24
17822	ldm	r3!, {r4, r5, r6, r7}
17823	eor	r11, r11, lr, ror #8
17824	eor	r11, r11, r12, ror #24
17825	#   XOR in Key Schedule
17826	eor	r8, r8, r4
17827	eor	r9, r9, r5
17828	eor	r10, r10, r6
17829	eor	r11, r11, r7
17830#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17831#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17832	lsl	r4, r9, #24
17833	lsr	r4, r4, #24
17834#else
17835	uxtb	r4, r9
17836#endif
17837#else
17838	ubfx	r4, r9, #0, #8
17839#endif
17840#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17841#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17842	lsl	r7, r10, #16
17843	lsr	r7, r7, #24
17844#else
17845	uxtb	r7, r10, ror #8
17846#endif
17847#else
17848	ubfx	r7, r10, #8, #8
17849#endif
17850#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17851#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17852	lsl	r12, r11, #8
17853	lsr	r12, r12, #24
17854#else
17855	uxtb	r12, r11, ror #16
17856#endif
17857#else
17858	ubfx	r12, r11, #16, #8
17859#endif
17860	lsr	lr, r8, #24
17861	ldrb	r4, [r2, r4]
17862	ldrb	r7, [r2, r7]
17863	ldrb	r12, [r2, r12]
17864	ldrb	lr, [r2, lr]
17865#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17866#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17867	lsl	r5, r10, #24
17868	lsr	r5, r5, #24
17869#else
17870	uxtb	r5, r10
17871#endif
17872#else
17873	ubfx	r5, r10, #0, #8
17874#endif
17875	eor	r4, r4, r7, lsl #8
17876#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17877#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17878	lsl	r7, r11, #16
17879	lsr	r7, r7, #24
17880#else
17881	uxtb	r7, r11, ror #8
17882#endif
17883#else
17884	ubfx	r7, r11, #8, #8
17885#endif
17886	eor	r4, r4, r12, lsl #16
17887#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17888#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17889	lsl	r12, r8, #8
17890	lsr	r12, r12, #24
17891#else
17892	uxtb	r12, r8, ror #16
17893#endif
17894#else
17895	ubfx	r12, r8, #16, #8
17896#endif
17897	eor	r4, r4, lr, lsl #24
17898	lsr	lr, r9, #24
17899	ldrb	r7, [r2, r7]
17900	ldrb	lr, [r2, lr]
17901	ldrb	r5, [r2, r5]
17902	ldrb	r12, [r2, r12]
17903#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17904#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17905	lsl	r6, r11, #24
17906	lsr	r6, r6, #24
17907#else
17908	uxtb	r6, r11
17909#endif
17910#else
17911	ubfx	r6, r11, #0, #8
17912#endif
17913	eor	r5, r5, r7, lsl #8
17914#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17915#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17916	lsl	r7, r8, #16
17917	lsr	r7, r7, #24
17918#else
17919	uxtb	r7, r8, ror #8
17920#endif
17921#else
17922	ubfx	r7, r8, #8, #8
17923#endif
17924	eor	r5, r5, r12, lsl #16
17925#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17926#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17927	lsl	r12, r9, #8
17928	lsr	r12, r12, #24
17929#else
17930	uxtb	r12, r9, ror #16
17931#endif
17932#else
17933	ubfx	r12, r9, #16, #8
17934#endif
17935	eor	r5, r5, lr, lsl #24
17936	lsr	lr, r10, #24
17937	ldrb	r7, [r2, r7]
17938	ldrb	lr, [r2, lr]
17939	ldrb	r6, [r2, r6]
17940	ldrb	r12, [r2, r12]
17941	lsr	r11, r11, #24
17942	eor	r6, r6, r7, lsl #8
17943#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17944#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17945	lsl	r7, r8, #24
17946	lsr	r7, r7, #24
17947#else
17948	uxtb	r7, r8
17949#endif
17950#else
17951	ubfx	r7, r8, #0, #8
17952#endif
17953	eor	r6, r6, r12, lsl #16
17954#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17955#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17956	lsl	r12, r9, #16
17957	lsr	r12, r12, #24
17958#else
17959	uxtb	r12, r9, ror #8
17960#endif
17961#else
17962	ubfx	r12, r9, #8, #8
17963#endif
17964	eor	r6, r6, lr, lsl #24
17965#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
17966#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17967	lsl	lr, r10, #8
17968	lsr	lr, lr, #24
17969#else
17970	uxtb	lr, r10, ror #16
17971#endif
17972#else
17973	ubfx	lr, r10, #16, #8
17974#endif
17975	ldrb	r11, [r2, r11]
17976	ldrb	r12, [r2, r12]
17977	ldrb	r7, [r2, r7]
17978	ldrb	lr, [r2, lr]
17979	eor	r12, r12, r11, lsl #16
17980	ldm	r3, {r8, r9, r10, r11}
17981	eor	r7, r7, r12, lsl #8
17982	eor	r7, r7, lr, lsl #16
17983	#   XOR in Key Schedule
17984	eor	r4, r4, r8
17985	eor	r5, r5, r9
17986	eor	r6, r6, r10
17987	eor	r7, r7, r11
17988#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
17989	pop	{r1, r3, r12, lr}
17990#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
17991	eor	r8, r4, r4, ror #16
17992	eor	r9, r5, r5, ror #16
17993	eor	r10, r6, r6, ror #16
17994	eor	r11, r7, r7, ror #16
17995	bic	r8, r8, #0xff0000
17996	bic	r9, r9, #0xff0000
17997	bic	r10, r10, #0xff0000
17998	bic	r11, r11, #0xff0000
17999	ror	r4, r4, #8
18000	ror	r5, r5, #8
18001	ror	r6, r6, #8
18002	ror	r7, r7, #8
18003	eor	r4, r4, r8, lsr #8
18004	eor	r5, r5, r9, lsr #8
18005	eor	r6, r6, r10, lsr #8
18006	eor	r7, r7, r11, lsr #8
18007#else
18008	rev	r4, r4
18009	rev	r5, r5
18010	rev	r6, r6
18011	rev	r7, r7
18012#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
18013	str	r4, [r1]
18014	str	r5, [r1, #4]
18015	str	r6, [r1, #8]
18016	str	r7, [r1, #12]
18017	subs	r12, r12, #16
18018	add	lr, lr, #16
18019	add	r1, r1, #16
18020	bne	L_AES_ECB_decrypt_loop_block_192
18021	b	L_AES_ECB_decrypt_end
18022L_AES_ECB_decrypt_start_block_128:
18023L_AES_ECB_decrypt_loop_block_128:
18024	ldr	r4, [lr]
18025	ldr	r5, [lr, #4]
18026	ldr	r6, [lr, #8]
18027	ldr	r7, [lr, #12]
18028#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18029	eor	r8, r4, r4, ror #16
18030	eor	r9, r5, r5, ror #16
18031	eor	r10, r6, r6, ror #16
18032	eor	r11, r7, r7, ror #16
18033	bic	r8, r8, #0xff0000
18034	bic	r9, r9, #0xff0000
18035	bic	r10, r10, #0xff0000
18036	bic	r11, r11, #0xff0000
18037	ror	r4, r4, #8
18038	ror	r5, r5, #8
18039	ror	r6, r6, #8
18040	ror	r7, r7, #8
18041	eor	r4, r4, r8, lsr #8
18042	eor	r5, r5, r9, lsr #8
18043	eor	r6, r6, r10, lsr #8
18044	eor	r7, r7, r11, lsr #8
18045#else
18046	rev	r4, r4
18047	rev	r5, r5
18048	rev	r6, r6
18049	rev	r7, r7
18050#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
18051	push	{r1, r3, r12, lr}
18052	ldm	r3!, {r8, r9, r10, r11}
18053	# Round: 0 - XOR in key schedule
18054	eor	r4, r4, r8
18055	eor	r5, r5, r9
18056	eor	r6, r6, r10
18057	eor	r7, r7, r11
18058	mov	r1, #4
18059#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
18060	bl	AES_decrypt_block
18061#else
18062L_AES_ECB_decrypt_block_nr_128:
18063#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18064#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18065	lsl	r8, r7, #8
18066	lsr	r8, r8, #24
18067#else
18068	uxtb	r8, r7, ror #16
18069#endif
18070#else
18071	ubfx	r8, r7, #16, #8
18072#endif
18073	lsr	r11, r4, #24
18074#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18075#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18076	lsl	r12, r6, #16
18077	lsr	r12, r12, #24
18078#else
18079	uxtb	r12, r6, ror #8
18080#endif
18081#else
18082	ubfx	r12, r6, #8, #8
18083#endif
18084#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18085#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18086	lsl	lr, r5, #24
18087	lsr	lr, lr, #24
18088#else
18089	uxtb	lr, r5
18090#endif
18091#else
18092	ubfx	lr, r5, #0, #8
18093#endif
18094	ldr	r8, [r0, r8, lsl #2]
18095	ldr	r11, [r0, r11, lsl #2]
18096	ldr	r12, [r0, r12, lsl #2]
18097	ldr	lr, [r0, lr, lsl #2]
18098#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18099#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18100	lsl	r9, r4, #8
18101	lsr	r9, r9, #24
18102#else
18103	uxtb	r9, r4, ror #16
18104#endif
18105#else
18106	ubfx	r9, r4, #16, #8
18107#endif
18108	eor	r8, r8, r11, ror #24
18109	lsr	r11, r5, #24
18110	eor	r8, r8, r12, ror #8
18111#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18112#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18113	lsl	r12, r7, #16
18114	lsr	r12, r12, #24
18115#else
18116	uxtb	r12, r7, ror #8
18117#endif
18118#else
18119	ubfx	r12, r7, #8, #8
18120#endif
18121	eor	r8, r8, lr, ror #16
18122#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18123#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18124	lsl	lr, r6, #24
18125	lsr	lr, lr, #24
18126#else
18127	uxtb	lr, r6
18128#endif
18129#else
18130	ubfx	lr, r6, #0, #8
18131#endif
18132	ldr	r9, [r0, r9, lsl #2]
18133	ldr	r11, [r0, r11, lsl #2]
18134	ldr	r12, [r0, r12, lsl #2]
18135	ldr	lr, [r0, lr, lsl #2]
18136#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18137#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18138	lsl	r10, r5, #8
18139	lsr	r10, r10, #24
18140#else
18141	uxtb	r10, r5, ror #16
18142#endif
18143#else
18144	ubfx	r10, r5, #16, #8
18145#endif
18146	eor	r9, r9, r11, ror #24
18147	lsr	r11, r6, #24
18148	eor	r9, r9, r12, ror #8
18149#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18150#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18151	lsl	r12, r4, #16
18152	lsr	r12, r12, #24
18153#else
18154	uxtb	r12, r4, ror #8
18155#endif
18156#else
18157	ubfx	r12, r4, #8, #8
18158#endif
18159	eor	r9, r9, lr, ror #16
18160#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18161#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18162	lsl	lr, r7, #24
18163	lsr	lr, lr, #24
18164#else
18165	uxtb	lr, r7
18166#endif
18167#else
18168	ubfx	lr, r7, #0, #8
18169#endif
18170	ldr	r10, [r0, r10, lsl #2]
18171	ldr	r11, [r0, r11, lsl #2]
18172	ldr	r12, [r0, r12, lsl #2]
18173	ldr	lr, [r0, lr, lsl #2]
18174#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18175#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18176	lsl	r4, r4, #24
18177	lsr	r4, r4, #24
18178#else
18179	uxtb	r4, r4
18180#endif
18181#else
18182	ubfx	r4, r4, #0, #8
18183#endif
18184	eor	r10, r10, r11, ror #24
18185#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18186#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18187	lsl	r11, r6, #8
18188	lsr	r11, r11, #24
18189#else
18190	uxtb	r11, r6, ror #16
18191#endif
18192#else
18193	ubfx	r11, r6, #16, #8
18194#endif
18195	eor	r10, r10, r12, ror #8
18196	lsr	r12, r7, #24
18197	eor	r10, r10, lr, ror #16
18198#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18199#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18200	lsl	lr, r5, #16
18201	lsr	lr, lr, #24
18202#else
18203	uxtb	lr, r5, ror #8
18204#endif
18205#else
18206	ubfx	lr, r5, #8, #8
18207#endif
18208	ldr	r4, [r0, r4, lsl #2]
18209	ldr	r12, [r0, r12, lsl #2]
18210	ldr	r11, [r0, r11, lsl #2]
18211	ldr	lr, [r0, lr, lsl #2]
18212	eor	r12, r12, r4, ror #24
18213	ldm	r3!, {r4, r5, r6, r7}
18214	eor	r11, r11, lr, ror #8
18215	eor	r11, r11, r12, ror #24
18216	#   XOR in Key Schedule
18217	eor	r8, r8, r4
18218	eor	r9, r9, r5
18219	eor	r10, r10, r6
18220	eor	r11, r11, r7
18221#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18222#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18223	lsl	r4, r11, #8
18224	lsr	r4, r4, #24
18225#else
18226	uxtb	r4, r11, ror #16
18227#endif
18228#else
18229	ubfx	r4, r11, #16, #8
18230#endif
18231	lsr	r7, r8, #24
18232#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18233#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18234	lsl	r12, r10, #16
18235	lsr	r12, r12, #24
18236#else
18237	uxtb	r12, r10, ror #8
18238#endif
18239#else
18240	ubfx	r12, r10, #8, #8
18241#endif
18242#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18243#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18244	lsl	lr, r9, #24
18245	lsr	lr, lr, #24
18246#else
18247	uxtb	lr, r9
18248#endif
18249#else
18250	ubfx	lr, r9, #0, #8
18251#endif
18252	ldr	r4, [r0, r4, lsl #2]
18253	ldr	r7, [r0, r7, lsl #2]
18254	ldr	r12, [r0, r12, lsl #2]
18255	ldr	lr, [r0, lr, lsl #2]
18256#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18257#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18258	lsl	r5, r8, #8
18259	lsr	r5, r5, #24
18260#else
18261	uxtb	r5, r8, ror #16
18262#endif
18263#else
18264	ubfx	r5, r8, #16, #8
18265#endif
18266	eor	r4, r4, r7, ror #24
18267	lsr	r7, r9, #24
18268	eor	r4, r4, r12, ror #8
18269#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18270#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18271	lsl	r12, r11, #16
18272	lsr	r12, r12, #24
18273#else
18274	uxtb	r12, r11, ror #8
18275#endif
18276#else
18277	ubfx	r12, r11, #8, #8
18278#endif
18279	eor	r4, r4, lr, ror #16
18280#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18281#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18282	lsl	lr, r10, #24
18283	lsr	lr, lr, #24
18284#else
18285	uxtb	lr, r10
18286#endif
18287#else
18288	ubfx	lr, r10, #0, #8
18289#endif
18290	ldr	r5, [r0, r5, lsl #2]
18291	ldr	r7, [r0, r7, lsl #2]
18292	ldr	r12, [r0, r12, lsl #2]
18293	ldr	lr, [r0, lr, lsl #2]
18294#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18295#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18296	lsl	r6, r9, #8
18297	lsr	r6, r6, #24
18298#else
18299	uxtb	r6, r9, ror #16
18300#endif
18301#else
18302	ubfx	r6, r9, #16, #8
18303#endif
18304	eor	r5, r5, r7, ror #24
18305	lsr	r7, r10, #24
18306	eor	r5, r5, r12, ror #8
18307#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18308#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18309	lsl	r12, r8, #16
18310	lsr	r12, r12, #24
18311#else
18312	uxtb	r12, r8, ror #8
18313#endif
18314#else
18315	ubfx	r12, r8, #8, #8
18316#endif
18317	eor	r5, r5, lr, ror #16
18318#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18319#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18320	lsl	lr, r11, #24
18321	lsr	lr, lr, #24
18322#else
18323	uxtb	lr, r11
18324#endif
18325#else
18326	ubfx	lr, r11, #0, #8
18327#endif
18328	ldr	r6, [r0, r6, lsl #2]
18329	ldr	r7, [r0, r7, lsl #2]
18330	ldr	r12, [r0, r12, lsl #2]
18331	ldr	lr, [r0, lr, lsl #2]
18332#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18333#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18334	lsl	r8, r8, #24
18335	lsr	r8, r8, #24
18336#else
18337	uxtb	r8, r8
18338#endif
18339#else
18340	ubfx	r8, r8, #0, #8
18341#endif
18342	eor	r6, r6, r7, ror #24
18343#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18344#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18345	lsl	r7, r10, #8
18346	lsr	r7, r7, #24
18347#else
18348	uxtb	r7, r10, ror #16
18349#endif
18350#else
18351	ubfx	r7, r10, #16, #8
18352#endif
18353	eor	r6, r6, r12, ror #8
18354	lsr	r12, r11, #24
18355	eor	r6, r6, lr, ror #16
18356#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18357#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18358	lsl	lr, r9, #16
18359	lsr	lr, lr, #24
18360#else
18361	uxtb	lr, r9, ror #8
18362#endif
18363#else
18364	ubfx	lr, r9, #8, #8
18365#endif
18366	ldr	r8, [r0, r8, lsl #2]
18367	ldr	r12, [r0, r12, lsl #2]
18368	ldr	r7, [r0, r7, lsl #2]
18369	ldr	lr, [r0, lr, lsl #2]
18370	eor	r12, r12, r8, ror #24
18371	ldm	r3!, {r8, r9, r10, r11}
18372	eor	r7, r7, lr, ror #8
18373	eor	r7, r7, r12, ror #24
18374	#   XOR in Key Schedule
18375	eor	r4, r4, r8
18376	eor	r5, r5, r9
18377	eor	r6, r6, r10
18378	eor	r7, r7, r11
18379	subs	r1, r1, #1
18380	bne	L_AES_ECB_decrypt_block_nr_128
18381#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18382#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18383	lsl	r8, r7, #8
18384	lsr	r8, r8, #24
18385#else
18386	uxtb	r8, r7, ror #16
18387#endif
18388#else
18389	ubfx	r8, r7, #16, #8
18390#endif
18391	lsr	r11, r4, #24
18392#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18393#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18394	lsl	r12, r6, #16
18395	lsr	r12, r12, #24
18396#else
18397	uxtb	r12, r6, ror #8
18398#endif
18399#else
18400	ubfx	r12, r6, #8, #8
18401#endif
18402#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18403#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18404	lsl	lr, r5, #24
18405	lsr	lr, lr, #24
18406#else
18407	uxtb	lr, r5
18408#endif
18409#else
18410	ubfx	lr, r5, #0, #8
18411#endif
18412	ldr	r8, [r0, r8, lsl #2]
18413	ldr	r11, [r0, r11, lsl #2]
18414	ldr	r12, [r0, r12, lsl #2]
18415	ldr	lr, [r0, lr, lsl #2]
18416#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18417#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18418	lsl	r9, r4, #8
18419	lsr	r9, r9, #24
18420#else
18421	uxtb	r9, r4, ror #16
18422#endif
18423#else
18424	ubfx	r9, r4, #16, #8
18425#endif
18426	eor	r8, r8, r11, ror #24
18427	lsr	r11, r5, #24
18428	eor	r8, r8, r12, ror #8
18429#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18430#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18431	lsl	r12, r7, #16
18432	lsr	r12, r12, #24
18433#else
18434	uxtb	r12, r7, ror #8
18435#endif
18436#else
18437	ubfx	r12, r7, #8, #8
18438#endif
18439	eor	r8, r8, lr, ror #16
18440#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18441#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18442	lsl	lr, r6, #24
18443	lsr	lr, lr, #24
18444#else
18445	uxtb	lr, r6
18446#endif
18447#else
18448	ubfx	lr, r6, #0, #8
18449#endif
18450	ldr	r9, [r0, r9, lsl #2]
18451	ldr	r11, [r0, r11, lsl #2]
18452	ldr	r12, [r0, r12, lsl #2]
18453	ldr	lr, [r0, lr, lsl #2]
18454#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18455#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18456	lsl	r10, r5, #8
18457	lsr	r10, r10, #24
18458#else
18459	uxtb	r10, r5, ror #16
18460#endif
18461#else
18462	ubfx	r10, r5, #16, #8
18463#endif
18464	eor	r9, r9, r11, ror #24
18465	lsr	r11, r6, #24
18466	eor	r9, r9, r12, ror #8
18467#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18468#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18469	lsl	r12, r4, #16
18470	lsr	r12, r12, #24
18471#else
18472	uxtb	r12, r4, ror #8
18473#endif
18474#else
18475	ubfx	r12, r4, #8, #8
18476#endif
18477	eor	r9, r9, lr, ror #16
18478#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18479#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18480	lsl	lr, r7, #24
18481	lsr	lr, lr, #24
18482#else
18483	uxtb	lr, r7
18484#endif
18485#else
18486	ubfx	lr, r7, #0, #8
18487#endif
18488	ldr	r10, [r0, r10, lsl #2]
18489	ldr	r11, [r0, r11, lsl #2]
18490	ldr	r12, [r0, r12, lsl #2]
18491	ldr	lr, [r0, lr, lsl #2]
18492#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18493#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18494	lsl	r4, r4, #24
18495	lsr	r4, r4, #24
18496#else
18497	uxtb	r4, r4
18498#endif
18499#else
18500	ubfx	r4, r4, #0, #8
18501#endif
18502	eor	r10, r10, r11, ror #24
18503#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18504#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18505	lsl	r11, r6, #8
18506	lsr	r11, r11, #24
18507#else
18508	uxtb	r11, r6, ror #16
18509#endif
18510#else
18511	ubfx	r11, r6, #16, #8
18512#endif
18513	eor	r10, r10, r12, ror #8
18514	lsr	r12, r7, #24
18515	eor	r10, r10, lr, ror #16
18516#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18517#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18518	lsl	lr, r5, #16
18519	lsr	lr, lr, #24
18520#else
18521	uxtb	lr, r5, ror #8
18522#endif
18523#else
18524	ubfx	lr, r5, #8, #8
18525#endif
18526	ldr	r4, [r0, r4, lsl #2]
18527	ldr	r12, [r0, r12, lsl #2]
18528	ldr	r11, [r0, r11, lsl #2]
18529	ldr	lr, [r0, lr, lsl #2]
18530	eor	r12, r12, r4, ror #24
18531	ldm	r3!, {r4, r5, r6, r7}
18532	eor	r11, r11, lr, ror #8
18533	eor	r11, r11, r12, ror #24
18534	#   XOR in Key Schedule
18535	eor	r8, r8, r4
18536	eor	r9, r9, r5
18537	eor	r10, r10, r6
18538	eor	r11, r11, r7
18539#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18540#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18541	lsl	r4, r9, #24
18542	lsr	r4, r4, #24
18543#else
18544	uxtb	r4, r9
18545#endif
18546#else
18547	ubfx	r4, r9, #0, #8
18548#endif
18549#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18550#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18551	lsl	r7, r10, #16
18552	lsr	r7, r7, #24
18553#else
18554	uxtb	r7, r10, ror #8
18555#endif
18556#else
18557	ubfx	r7, r10, #8, #8
18558#endif
18559#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18560#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18561	lsl	r12, r11, #8
18562	lsr	r12, r12, #24
18563#else
18564	uxtb	r12, r11, ror #16
18565#endif
18566#else
18567	ubfx	r12, r11, #16, #8
18568#endif
18569	lsr	lr, r8, #24
18570	ldrb	r4, [r2, r4]
18571	ldrb	r7, [r2, r7]
18572	ldrb	r12, [r2, r12]
18573	ldrb	lr, [r2, lr]
18574#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18575#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18576	lsl	r5, r10, #24
18577	lsr	r5, r5, #24
18578#else
18579	uxtb	r5, r10
18580#endif
18581#else
18582	ubfx	r5, r10, #0, #8
18583#endif
18584	eor	r4, r4, r7, lsl #8
18585#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18586#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18587	lsl	r7, r11, #16
18588	lsr	r7, r7, #24
18589#else
18590	uxtb	r7, r11, ror #8
18591#endif
18592#else
18593	ubfx	r7, r11, #8, #8
18594#endif
18595	eor	r4, r4, r12, lsl #16
18596#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18597#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18598	lsl	r12, r8, #8
18599	lsr	r12, r12, #24
18600#else
18601	uxtb	r12, r8, ror #16
18602#endif
18603#else
18604	ubfx	r12, r8, #16, #8
18605#endif
18606	eor	r4, r4, lr, lsl #24
18607	lsr	lr, r9, #24
18608	ldrb	r7, [r2, r7]
18609	ldrb	lr, [r2, lr]
18610	ldrb	r5, [r2, r5]
18611	ldrb	r12, [r2, r12]
18612#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18613#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18614	lsl	r6, r11, #24
18615	lsr	r6, r6, #24
18616#else
18617	uxtb	r6, r11
18618#endif
18619#else
18620	ubfx	r6, r11, #0, #8
18621#endif
18622	eor	r5, r5, r7, lsl #8
18623#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18624#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18625	lsl	r7, r8, #16
18626	lsr	r7, r7, #24
18627#else
18628	uxtb	r7, r8, ror #8
18629#endif
18630#else
18631	ubfx	r7, r8, #8, #8
18632#endif
18633	eor	r5, r5, r12, lsl #16
18634#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18635#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18636	lsl	r12, r9, #8
18637	lsr	r12, r12, #24
18638#else
18639	uxtb	r12, r9, ror #16
18640#endif
18641#else
18642	ubfx	r12, r9, #16, #8
18643#endif
18644	eor	r5, r5, lr, lsl #24
18645	lsr	lr, r10, #24
18646	ldrb	r7, [r2, r7]
18647	ldrb	lr, [r2, lr]
18648	ldrb	r6, [r2, r6]
18649	ldrb	r12, [r2, r12]
18650	lsr	r11, r11, #24
18651	eor	r6, r6, r7, lsl #8
18652#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18653#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18654	lsl	r7, r8, #24
18655	lsr	r7, r7, #24
18656#else
18657	uxtb	r7, r8
18658#endif
18659#else
18660	ubfx	r7, r8, #0, #8
18661#endif
18662	eor	r6, r6, r12, lsl #16
18663#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18664#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18665	lsl	r12, r9, #16
18666	lsr	r12, r12, #24
18667#else
18668	uxtb	r12, r9, ror #8
18669#endif
18670#else
18671	ubfx	r12, r9, #8, #8
18672#endif
18673	eor	r6, r6, lr, lsl #24
18674#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18675#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18676	lsl	lr, r10, #8
18677	lsr	lr, lr, #24
18678#else
18679	uxtb	lr, r10, ror #16
18680#endif
18681#else
18682	ubfx	lr, r10, #16, #8
18683#endif
18684	ldrb	r11, [r2, r11]
18685	ldrb	r12, [r2, r12]
18686	ldrb	r7, [r2, r7]
18687	ldrb	lr, [r2, lr]
18688	eor	r12, r12, r11, lsl #16
18689	ldm	r3, {r8, r9, r10, r11}
18690	eor	r7, r7, r12, lsl #8
18691	eor	r7, r7, lr, lsl #16
18692	#   XOR in Key Schedule
18693	eor	r4, r4, r8
18694	eor	r5, r5, r9
18695	eor	r6, r6, r10
18696	eor	r7, r7, r11
18697#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
18698	pop	{r1, r3, r12, lr}
18699#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18700	eor	r8, r4, r4, ror #16
18701	eor	r9, r5, r5, ror #16
18702	eor	r10, r6, r6, ror #16
18703	eor	r11, r7, r7, ror #16
18704	bic	r8, r8, #0xff0000
18705	bic	r9, r9, #0xff0000
18706	bic	r10, r10, #0xff0000
18707	bic	r11, r11, #0xff0000
18708	ror	r4, r4, #8
18709	ror	r5, r5, #8
18710	ror	r6, r6, #8
18711	ror	r7, r7, #8
18712	eor	r4, r4, r8, lsr #8
18713	eor	r5, r5, r9, lsr #8
18714	eor	r6, r6, r10, lsr #8
18715	eor	r7, r7, r11, lsr #8
18716#else
18717	rev	r4, r4
18718	rev	r5, r5
18719	rev	r6, r6
18720	rev	r7, r7
18721#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
18722	str	r4, [r1]
18723	str	r5, [r1, #4]
18724	str	r6, [r1, #8]
18725	str	r7, [r1, #12]
18726	subs	r12, r12, #16
18727	add	lr, lr, #16
18728	add	r1, r1, #16
18729	bne	L_AES_ECB_decrypt_loop_block_128
18730L_AES_ECB_decrypt_end:
18731	pop	{r4, r5, r6, r7, r8, r9, r10, r11, pc}
18732	.size	AES_ECB_decrypt,.-AES_ECB_decrypt
18733#endif /* WOLFSSL_AES_DIRECT || WOLFSSL_AES_COUNTER || defined(HAVE_AES_ECB) */
18734#ifdef HAVE_AES_CBC
18735#ifndef __APPLE__
18736	.text
18737	.type	L_AES_ARM32_cbc_td4, %object
18738	.size	L_AES_ARM32_cbc_td4, 256
18739#else
18740	.section	__DATA,__data
18741#endif /* __APPLE__ */
18742	# 4-byte aligned, 32-bit aligned
18743#ifndef __APPLE__
18744	.align	2
18745#else
18746	.p2align	2
18747#endif /* __APPLE__ */
18748L_AES_ARM32_cbc_td4:
18749	.byte	0x52,0x09,0x6a,0xd5,0x30,0x36,0xa5,0x38
18750	.byte	0xbf,0x40,0xa3,0x9e,0x81,0xf3,0xd7,0xfb
18751	.byte	0x7c,0xe3,0x39,0x82,0x9b,0x2f,0xff,0x87
18752	.byte	0x34,0x8e,0x43,0x44,0xc4,0xde,0xe9,0xcb
18753	.byte	0x54,0x7b,0x94,0x32,0xa6,0xc2,0x23,0x3d
18754	.byte	0xee,0x4c,0x95,0x0b,0x42,0xfa,0xc3,0x4e
18755	.byte	0x08,0x2e,0xa1,0x66,0x28,0xd9,0x24,0xb2
18756	.byte	0x76,0x5b,0xa2,0x49,0x6d,0x8b,0xd1,0x25
18757	.byte	0x72,0xf8,0xf6,0x64,0x86,0x68,0x98,0x16
18758	.byte	0xd4,0xa4,0x5c,0xcc,0x5d,0x65,0xb6,0x92
18759	.byte	0x6c,0x70,0x48,0x50,0xfd,0xed,0xb9,0xda
18760	.byte	0x5e,0x15,0x46,0x57,0xa7,0x8d,0x9d,0x84
18761	.byte	0x90,0xd8,0xab,0x00,0x8c,0xbc,0xd3,0x0a
18762	.byte	0xf7,0xe4,0x58,0x05,0xb8,0xb3,0x45,0x06
18763	.byte	0xd0,0x2c,0x1e,0x8f,0xca,0x3f,0x0f,0x02
18764	.byte	0xc1,0xaf,0xbd,0x03,0x01,0x13,0x8a,0x6b
18765	.byte	0x3a,0x91,0x11,0x41,0x4f,0x67,0xdc,0xea
18766	.byte	0x97,0xf2,0xcf,0xce,0xf0,0xb4,0xe6,0x73
18767	.byte	0x96,0xac,0x74,0x22,0xe7,0xad,0x35,0x85
18768	.byte	0xe2,0xf9,0x37,0xe8,0x1c,0x75,0xdf,0x6e
18769	.byte	0x47,0xf1,0x1a,0x71,0x1d,0x29,0xc5,0x89
18770	.byte	0x6f,0xb7,0x62,0x0e,0xaa,0x18,0xbe,0x1b
18771	.byte	0xfc,0x56,0x3e,0x4b,0xc6,0xd2,0x79,0x20
18772	.byte	0x9a,0xdb,0xc0,0xfe,0x78,0xcd,0x5a,0xf4
18773	.byte	0x1f,0xdd,0xa8,0x33,0x88,0x07,0xc7,0x31
18774	.byte	0xb1,0x12,0x10,0x59,0x27,0x80,0xec,0x5f
18775	.byte	0x60,0x51,0x7f,0xa9,0x19,0xb5,0x4a,0x0d
18776	.byte	0x2d,0xe5,0x7a,0x9f,0x93,0xc9,0x9c,0xef
18777	.byte	0xa0,0xe0,0x3b,0x4d,0xae,0x2a,0xf5,0xb0
18778	.byte	0xc8,0xeb,0xbb,0x3c,0x83,0x53,0x99,0x61
18779	.byte	0x17,0x2b,0x04,0x7e,0xba,0x77,0xd6,0x26
18780	.byte	0xe1,0x69,0x14,0x63,0x55,0x21,0x0c,0x7d
18781	.text
18782	.align	4
18783	.globl	AES_CBC_decrypt
18784	.type	AES_CBC_decrypt, %function
18785AES_CBC_decrypt:
18786	push	{r4, r5, r6, r7, r8, r9, r10, r11, lr}
18787	mov	lr, r0
18788	adr	r0, L_AES_ARM32_td_ecb
18789	ldr	r0, [r0]
18790	mov	r12, r2
18791	adr	r2, L_AES_ARM32_cbc_td4
18792	ldr	r8, [sp, #36]
18793	ldr	r4, [sp, #40]
18794	push	{r3-r4}
18795	cmp	r8, #10
18796	beq	L_AES_CBC_decrypt_loop_block_128
18797	cmp	r8, #12
18798	beq	L_AES_CBC_decrypt_loop_block_192
18799L_AES_CBC_decrypt_loop_block_256:
18800	push	{r1, r12, lr}
18801	ldr	r4, [lr]
18802	ldr	r5, [lr, #4]
18803	ldr	r6, [lr, #8]
18804	ldr	r7, [lr, #12]
18805	ldr	lr, [sp, #16]
18806#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18807	str	r4, [lr, #16]
18808	str	r5, [lr, #20]
18809#else
18810	strd	r4, r5, [lr, #16]
18811#endif
18812#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18813	str	r6, [lr, #24]
18814	str	r7, [lr, #28]
18815#else
18816	strd	r6, r7, [lr, #24]
18817#endif
18818#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18819	eor	r8, r4, r4, ror #16
18820	eor	r9, r5, r5, ror #16
18821	eor	r10, r6, r6, ror #16
18822	eor	r11, r7, r7, ror #16
18823	bic	r8, r8, #0xff0000
18824	bic	r9, r9, #0xff0000
18825	bic	r10, r10, #0xff0000
18826	bic	r11, r11, #0xff0000
18827	ror	r4, r4, #8
18828	ror	r5, r5, #8
18829	ror	r6, r6, #8
18830	ror	r7, r7, #8
18831	eor	r4, r4, r8, lsr #8
18832	eor	r5, r5, r9, lsr #8
18833	eor	r6, r6, r10, lsr #8
18834	eor	r7, r7, r11, lsr #8
18835#else
18836	rev	r4, r4
18837	rev	r5, r5
18838	rev	r6, r6
18839	rev	r7, r7
18840#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
18841	ldm	r3!, {r8, r9, r10, r11}
18842	# Round: 0 - XOR in key schedule
18843	eor	r4, r4, r8
18844	eor	r5, r5, r9
18845	eor	r6, r6, r10
18846	eor	r7, r7, r11
18847	mov	r1, #6
18848#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
18849	bl	AES_decrypt_block
18850#else
18851L_AES_CBC_decrypt_block_nr_256_odd:
18852#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18853#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18854	lsl	r8, r7, #8
18855	lsr	r8, r8, #24
18856#else
18857	uxtb	r8, r7, ror #16
18858#endif
18859#else
18860	ubfx	r8, r7, #16, #8
18861#endif
18862	lsr	r11, r4, #24
18863#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18864#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18865	lsl	r12, r6, #16
18866	lsr	r12, r12, #24
18867#else
18868	uxtb	r12, r6, ror #8
18869#endif
18870#else
18871	ubfx	r12, r6, #8, #8
18872#endif
18873#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18874#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18875	lsl	lr, r5, #24
18876	lsr	lr, lr, #24
18877#else
18878	uxtb	lr, r5
18879#endif
18880#else
18881	ubfx	lr, r5, #0, #8
18882#endif
18883	ldr	r8, [r0, r8, lsl #2]
18884	ldr	r11, [r0, r11, lsl #2]
18885	ldr	r12, [r0, r12, lsl #2]
18886	ldr	lr, [r0, lr, lsl #2]
18887#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18888#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18889	lsl	r9, r4, #8
18890	lsr	r9, r9, #24
18891#else
18892	uxtb	r9, r4, ror #16
18893#endif
18894#else
18895	ubfx	r9, r4, #16, #8
18896#endif
18897	eor	r8, r8, r11, ror #24
18898	lsr	r11, r5, #24
18899	eor	r8, r8, r12, ror #8
18900#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18901#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18902	lsl	r12, r7, #16
18903	lsr	r12, r12, #24
18904#else
18905	uxtb	r12, r7, ror #8
18906#endif
18907#else
18908	ubfx	r12, r7, #8, #8
18909#endif
18910	eor	r8, r8, lr, ror #16
18911#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18912#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18913	lsl	lr, r6, #24
18914	lsr	lr, lr, #24
18915#else
18916	uxtb	lr, r6
18917#endif
18918#else
18919	ubfx	lr, r6, #0, #8
18920#endif
18921	ldr	r9, [r0, r9, lsl #2]
18922	ldr	r11, [r0, r11, lsl #2]
18923	ldr	r12, [r0, r12, lsl #2]
18924	ldr	lr, [r0, lr, lsl #2]
18925#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18926#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18927	lsl	r10, r5, #8
18928	lsr	r10, r10, #24
18929#else
18930	uxtb	r10, r5, ror #16
18931#endif
18932#else
18933	ubfx	r10, r5, #16, #8
18934#endif
18935	eor	r9, r9, r11, ror #24
18936	lsr	r11, r6, #24
18937	eor	r9, r9, r12, ror #8
18938#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18939#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18940	lsl	r12, r4, #16
18941	lsr	r12, r12, #24
18942#else
18943	uxtb	r12, r4, ror #8
18944#endif
18945#else
18946	ubfx	r12, r4, #8, #8
18947#endif
18948	eor	r9, r9, lr, ror #16
18949#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18950#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18951	lsl	lr, r7, #24
18952	lsr	lr, lr, #24
18953#else
18954	uxtb	lr, r7
18955#endif
18956#else
18957	ubfx	lr, r7, #0, #8
18958#endif
18959	ldr	r10, [r0, r10, lsl #2]
18960	ldr	r11, [r0, r11, lsl #2]
18961	ldr	r12, [r0, r12, lsl #2]
18962	ldr	lr, [r0, lr, lsl #2]
18963#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18964#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18965	lsl	r4, r4, #24
18966	lsr	r4, r4, #24
18967#else
18968	uxtb	r4, r4
18969#endif
18970#else
18971	ubfx	r4, r4, #0, #8
18972#endif
18973	eor	r10, r10, r11, ror #24
18974#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18975#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18976	lsl	r11, r6, #8
18977	lsr	r11, r11, #24
18978#else
18979	uxtb	r11, r6, ror #16
18980#endif
18981#else
18982	ubfx	r11, r6, #16, #8
18983#endif
18984	eor	r10, r10, r12, ror #8
18985	lsr	r12, r7, #24
18986	eor	r10, r10, lr, ror #16
18987#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
18988#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
18989	lsl	lr, r5, #16
18990	lsr	lr, lr, #24
18991#else
18992	uxtb	lr, r5, ror #8
18993#endif
18994#else
18995	ubfx	lr, r5, #8, #8
18996#endif
18997	ldr	r4, [r0, r4, lsl #2]
18998	ldr	r12, [r0, r12, lsl #2]
18999	ldr	r11, [r0, r11, lsl #2]
19000	ldr	lr, [r0, lr, lsl #2]
19001	eor	r12, r12, r4, ror #24
19002	ldm	r3!, {r4, r5, r6, r7}
19003	eor	r11, r11, lr, ror #8
19004	eor	r11, r11, r12, ror #24
19005	#   XOR in Key Schedule
19006	eor	r8, r8, r4
19007	eor	r9, r9, r5
19008	eor	r10, r10, r6
19009	eor	r11, r11, r7
19010#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19011#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19012	lsl	r4, r11, #8
19013	lsr	r4, r4, #24
19014#else
19015	uxtb	r4, r11, ror #16
19016#endif
19017#else
19018	ubfx	r4, r11, #16, #8
19019#endif
19020	lsr	r7, r8, #24
19021#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19022#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19023	lsl	r12, r10, #16
19024	lsr	r12, r12, #24
19025#else
19026	uxtb	r12, r10, ror #8
19027#endif
19028#else
19029	ubfx	r12, r10, #8, #8
19030#endif
19031#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19032#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19033	lsl	lr, r9, #24
19034	lsr	lr, lr, #24
19035#else
19036	uxtb	lr, r9
19037#endif
19038#else
19039	ubfx	lr, r9, #0, #8
19040#endif
19041	ldr	r4, [r0, r4, lsl #2]
19042	ldr	r7, [r0, r7, lsl #2]
19043	ldr	r12, [r0, r12, lsl #2]
19044	ldr	lr, [r0, lr, lsl #2]
19045#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19046#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19047	lsl	r5, r8, #8
19048	lsr	r5, r5, #24
19049#else
19050	uxtb	r5, r8, ror #16
19051#endif
19052#else
19053	ubfx	r5, r8, #16, #8
19054#endif
19055	eor	r4, r4, r7, ror #24
19056	lsr	r7, r9, #24
19057	eor	r4, r4, r12, ror #8
19058#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19059#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19060	lsl	r12, r11, #16
19061	lsr	r12, r12, #24
19062#else
19063	uxtb	r12, r11, ror #8
19064#endif
19065#else
19066	ubfx	r12, r11, #8, #8
19067#endif
19068	eor	r4, r4, lr, ror #16
19069#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19070#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19071	lsl	lr, r10, #24
19072	lsr	lr, lr, #24
19073#else
19074	uxtb	lr, r10
19075#endif
19076#else
19077	ubfx	lr, r10, #0, #8
19078#endif
19079	ldr	r5, [r0, r5, lsl #2]
19080	ldr	r7, [r0, r7, lsl #2]
19081	ldr	r12, [r0, r12, lsl #2]
19082	ldr	lr, [r0, lr, lsl #2]
19083#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19084#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19085	lsl	r6, r9, #8
19086	lsr	r6, r6, #24
19087#else
19088	uxtb	r6, r9, ror #16
19089#endif
19090#else
19091	ubfx	r6, r9, #16, #8
19092#endif
19093	eor	r5, r5, r7, ror #24
19094	lsr	r7, r10, #24
19095	eor	r5, r5, r12, ror #8
19096#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19097#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19098	lsl	r12, r8, #16
19099	lsr	r12, r12, #24
19100#else
19101	uxtb	r12, r8, ror #8
19102#endif
19103#else
19104	ubfx	r12, r8, #8, #8
19105#endif
19106	eor	r5, r5, lr, ror #16
19107#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19108#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19109	lsl	lr, r11, #24
19110	lsr	lr, lr, #24
19111#else
19112	uxtb	lr, r11
19113#endif
19114#else
19115	ubfx	lr, r11, #0, #8
19116#endif
19117	ldr	r6, [r0, r6, lsl #2]
19118	ldr	r7, [r0, r7, lsl #2]
19119	ldr	r12, [r0, r12, lsl #2]
19120	ldr	lr, [r0, lr, lsl #2]
19121#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19122#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19123	lsl	r8, r8, #24
19124	lsr	r8, r8, #24
19125#else
19126	uxtb	r8, r8
19127#endif
19128#else
19129	ubfx	r8, r8, #0, #8
19130#endif
19131	eor	r6, r6, r7, ror #24
19132#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19133#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19134	lsl	r7, r10, #8
19135	lsr	r7, r7, #24
19136#else
19137	uxtb	r7, r10, ror #16
19138#endif
19139#else
19140	ubfx	r7, r10, #16, #8
19141#endif
19142	eor	r6, r6, r12, ror #8
19143	lsr	r12, r11, #24
19144	eor	r6, r6, lr, ror #16
19145#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19146#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19147	lsl	lr, r9, #16
19148	lsr	lr, lr, #24
19149#else
19150	uxtb	lr, r9, ror #8
19151#endif
19152#else
19153	ubfx	lr, r9, #8, #8
19154#endif
19155	ldr	r8, [r0, r8, lsl #2]
19156	ldr	r12, [r0, r12, lsl #2]
19157	ldr	r7, [r0, r7, lsl #2]
19158	ldr	lr, [r0, lr, lsl #2]
19159	eor	r12, r12, r8, ror #24
19160	ldm	r3!, {r8, r9, r10, r11}
19161	eor	r7, r7, lr, ror #8
19162	eor	r7, r7, r12, ror #24
19163	#   XOR in Key Schedule
19164	eor	r4, r4, r8
19165	eor	r5, r5, r9
19166	eor	r6, r6, r10
19167	eor	r7, r7, r11
19168	subs	r1, r1, #1
19169	bne	L_AES_CBC_decrypt_block_nr_256_odd
19170#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19171#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19172	lsl	r8, r7, #8
19173	lsr	r8, r8, #24
19174#else
19175	uxtb	r8, r7, ror #16
19176#endif
19177#else
19178	ubfx	r8, r7, #16, #8
19179#endif
19180	lsr	r11, r4, #24
19181#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19182#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19183	lsl	r12, r6, #16
19184	lsr	r12, r12, #24
19185#else
19186	uxtb	r12, r6, ror #8
19187#endif
19188#else
19189	ubfx	r12, r6, #8, #8
19190#endif
19191#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19192#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19193	lsl	lr, r5, #24
19194	lsr	lr, lr, #24
19195#else
19196	uxtb	lr, r5
19197#endif
19198#else
19199	ubfx	lr, r5, #0, #8
19200#endif
19201	ldr	r8, [r0, r8, lsl #2]
19202	ldr	r11, [r0, r11, lsl #2]
19203	ldr	r12, [r0, r12, lsl #2]
19204	ldr	lr, [r0, lr, lsl #2]
19205#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19206#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19207	lsl	r9, r4, #8
19208	lsr	r9, r9, #24
19209#else
19210	uxtb	r9, r4, ror #16
19211#endif
19212#else
19213	ubfx	r9, r4, #16, #8
19214#endif
19215	eor	r8, r8, r11, ror #24
19216	lsr	r11, r5, #24
19217	eor	r8, r8, r12, ror #8
19218#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19219#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19220	lsl	r12, r7, #16
19221	lsr	r12, r12, #24
19222#else
19223	uxtb	r12, r7, ror #8
19224#endif
19225#else
19226	ubfx	r12, r7, #8, #8
19227#endif
19228	eor	r8, r8, lr, ror #16
19229#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19230#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19231	lsl	lr, r6, #24
19232	lsr	lr, lr, #24
19233#else
19234	uxtb	lr, r6
19235#endif
19236#else
19237	ubfx	lr, r6, #0, #8
19238#endif
19239	ldr	r9, [r0, r9, lsl #2]
19240	ldr	r11, [r0, r11, lsl #2]
19241	ldr	r12, [r0, r12, lsl #2]
19242	ldr	lr, [r0, lr, lsl #2]
19243#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19244#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19245	lsl	r10, r5, #8
19246	lsr	r10, r10, #24
19247#else
19248	uxtb	r10, r5, ror #16
19249#endif
19250#else
19251	ubfx	r10, r5, #16, #8
19252#endif
19253	eor	r9, r9, r11, ror #24
19254	lsr	r11, r6, #24
19255	eor	r9, r9, r12, ror #8
19256#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19257#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19258	lsl	r12, r4, #16
19259	lsr	r12, r12, #24
19260#else
19261	uxtb	r12, r4, ror #8
19262#endif
19263#else
19264	ubfx	r12, r4, #8, #8
19265#endif
19266	eor	r9, r9, lr, ror #16
19267#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19268#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19269	lsl	lr, r7, #24
19270	lsr	lr, lr, #24
19271#else
19272	uxtb	lr, r7
19273#endif
19274#else
19275	ubfx	lr, r7, #0, #8
19276#endif
19277	ldr	r10, [r0, r10, lsl #2]
19278	ldr	r11, [r0, r11, lsl #2]
19279	ldr	r12, [r0, r12, lsl #2]
19280	ldr	lr, [r0, lr, lsl #2]
19281#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19282#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19283	lsl	r4, r4, #24
19284	lsr	r4, r4, #24
19285#else
19286	uxtb	r4, r4
19287#endif
19288#else
19289	ubfx	r4, r4, #0, #8
19290#endif
19291	eor	r10, r10, r11, ror #24
19292#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19293#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19294	lsl	r11, r6, #8
19295	lsr	r11, r11, #24
19296#else
19297	uxtb	r11, r6, ror #16
19298#endif
19299#else
19300	ubfx	r11, r6, #16, #8
19301#endif
19302	eor	r10, r10, r12, ror #8
19303	lsr	r12, r7, #24
19304	eor	r10, r10, lr, ror #16
19305#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19306#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19307	lsl	lr, r5, #16
19308	lsr	lr, lr, #24
19309#else
19310	uxtb	lr, r5, ror #8
19311#endif
19312#else
19313	ubfx	lr, r5, #8, #8
19314#endif
19315	ldr	r4, [r0, r4, lsl #2]
19316	ldr	r12, [r0, r12, lsl #2]
19317	ldr	r11, [r0, r11, lsl #2]
19318	ldr	lr, [r0, lr, lsl #2]
19319	eor	r12, r12, r4, ror #24
19320	ldm	r3!, {r4, r5, r6, r7}
19321	eor	r11, r11, lr, ror #8
19322	eor	r11, r11, r12, ror #24
19323	#   XOR in Key Schedule
19324	eor	r8, r8, r4
19325	eor	r9, r9, r5
19326	eor	r10, r10, r6
19327	eor	r11, r11, r7
19328#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19329#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19330	lsl	r4, r9, #24
19331	lsr	r4, r4, #24
19332#else
19333	uxtb	r4, r9
19334#endif
19335#else
19336	ubfx	r4, r9, #0, #8
19337#endif
19338#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19339#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19340	lsl	r7, r10, #16
19341	lsr	r7, r7, #24
19342#else
19343	uxtb	r7, r10, ror #8
19344#endif
19345#else
19346	ubfx	r7, r10, #8, #8
19347#endif
19348#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19349#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19350	lsl	r12, r11, #8
19351	lsr	r12, r12, #24
19352#else
19353	uxtb	r12, r11, ror #16
19354#endif
19355#else
19356	ubfx	r12, r11, #16, #8
19357#endif
19358	lsr	lr, r8, #24
19359	ldrb	r4, [r2, r4]
19360	ldrb	r7, [r2, r7]
19361	ldrb	r12, [r2, r12]
19362	ldrb	lr, [r2, lr]
19363#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19364#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19365	lsl	r5, r10, #24
19366	lsr	r5, r5, #24
19367#else
19368	uxtb	r5, r10
19369#endif
19370#else
19371	ubfx	r5, r10, #0, #8
19372#endif
19373	eor	r4, r4, r7, lsl #8
19374#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19375#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19376	lsl	r7, r11, #16
19377	lsr	r7, r7, #24
19378#else
19379	uxtb	r7, r11, ror #8
19380#endif
19381#else
19382	ubfx	r7, r11, #8, #8
19383#endif
19384	eor	r4, r4, r12, lsl #16
19385#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19386#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19387	lsl	r12, r8, #8
19388	lsr	r12, r12, #24
19389#else
19390	uxtb	r12, r8, ror #16
19391#endif
19392#else
19393	ubfx	r12, r8, #16, #8
19394#endif
19395	eor	r4, r4, lr, lsl #24
19396	lsr	lr, r9, #24
19397	ldrb	r7, [r2, r7]
19398	ldrb	lr, [r2, lr]
19399	ldrb	r5, [r2, r5]
19400	ldrb	r12, [r2, r12]
19401#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19402#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19403	lsl	r6, r11, #24
19404	lsr	r6, r6, #24
19405#else
19406	uxtb	r6, r11
19407#endif
19408#else
19409	ubfx	r6, r11, #0, #8
19410#endif
19411	eor	r5, r5, r7, lsl #8
19412#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19413#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19414	lsl	r7, r8, #16
19415	lsr	r7, r7, #24
19416#else
19417	uxtb	r7, r8, ror #8
19418#endif
19419#else
19420	ubfx	r7, r8, #8, #8
19421#endif
19422	eor	r5, r5, r12, lsl #16
19423#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19424#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19425	lsl	r12, r9, #8
19426	lsr	r12, r12, #24
19427#else
19428	uxtb	r12, r9, ror #16
19429#endif
19430#else
19431	ubfx	r12, r9, #16, #8
19432#endif
19433	eor	r5, r5, lr, lsl #24
19434	lsr	lr, r10, #24
19435	ldrb	r7, [r2, r7]
19436	ldrb	lr, [r2, lr]
19437	ldrb	r6, [r2, r6]
19438	ldrb	r12, [r2, r12]
19439	lsr	r11, r11, #24
19440	eor	r6, r6, r7, lsl #8
19441#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19442#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19443	lsl	r7, r8, #24
19444	lsr	r7, r7, #24
19445#else
19446	uxtb	r7, r8
19447#endif
19448#else
19449	ubfx	r7, r8, #0, #8
19450#endif
19451	eor	r6, r6, r12, lsl #16
19452#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19453#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19454	lsl	r12, r9, #16
19455	lsr	r12, r12, #24
19456#else
19457	uxtb	r12, r9, ror #8
19458#endif
19459#else
19460	ubfx	r12, r9, #8, #8
19461#endif
19462	eor	r6, r6, lr, lsl #24
19463#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19464#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19465	lsl	lr, r10, #8
19466	lsr	lr, lr, #24
19467#else
19468	uxtb	lr, r10, ror #16
19469#endif
19470#else
19471	ubfx	lr, r10, #16, #8
19472#endif
19473	ldrb	r11, [r2, r11]
19474	ldrb	r12, [r2, r12]
19475	ldrb	r7, [r2, r7]
19476	ldrb	lr, [r2, lr]
19477	eor	r12, r12, r11, lsl #16
19478	ldm	r3, {r8, r9, r10, r11}
19479	eor	r7, r7, r12, lsl #8
19480	eor	r7, r7, lr, lsl #16
19481	#   XOR in Key Schedule
19482	eor	r4, r4, r8
19483	eor	r5, r5, r9
19484	eor	r6, r6, r10
19485	eor	r7, r7, r11
19486#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
19487	ldr	lr, [sp, #16]
19488#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19489	eor	r8, r4, r4, ror #16
19490	eor	r9, r5, r5, ror #16
19491	eor	r10, r6, r6, ror #16
19492	eor	r11, r7, r7, ror #16
19493	bic	r8, r8, #0xff0000
19494	bic	r9, r9, #0xff0000
19495	bic	r10, r10, #0xff0000
19496	bic	r11, r11, #0xff0000
19497	ror	r4, r4, #8
19498	ror	r5, r5, #8
19499	ror	r6, r6, #8
19500	ror	r7, r7, #8
19501	eor	r4, r4, r8, lsr #8
19502	eor	r5, r5, r9, lsr #8
19503	eor	r6, r6, r10, lsr #8
19504	eor	r7, r7, r11, lsr #8
19505#else
19506	rev	r4, r4
19507	rev	r5, r5
19508	rev	r6, r6
19509	rev	r7, r7
19510#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
19511	ldm	lr, {r8, r9, r10, r11}
19512	pop	{r1, r12, lr}
19513	ldr	r3, [sp]
19514	eor	r4, r4, r8
19515	eor	r5, r5, r9
19516	eor	r6, r6, r10
19517	eor	r7, r7, r11
19518	str	r4, [r1]
19519	str	r5, [r1, #4]
19520	str	r6, [r1, #8]
19521	str	r7, [r1, #12]
19522	subs	r12, r12, #16
19523	add	lr, lr, #16
19524	add	r1, r1, #16
19525	beq	L_AES_CBC_decrypt_end_odd
19526	push	{r1, r12, lr}
19527	ldr	r4, [lr]
19528	ldr	r5, [lr, #4]
19529	ldr	r6, [lr, #8]
19530	ldr	r7, [lr, #12]
19531	ldr	lr, [sp, #16]
19532#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19533	stm	lr, {r4, r5}
19534#else
19535	strd	r4, r5, [lr]
19536#endif
19537#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19538	str	r6, [lr, #8]
19539	str	r7, [lr, #12]
19540#else
19541	strd	r6, r7, [lr, #8]
19542#endif
19543#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19544	eor	r8, r4, r4, ror #16
19545	eor	r9, r5, r5, ror #16
19546	eor	r10, r6, r6, ror #16
19547	eor	r11, r7, r7, ror #16
19548	bic	r8, r8, #0xff0000
19549	bic	r9, r9, #0xff0000
19550	bic	r10, r10, #0xff0000
19551	bic	r11, r11, #0xff0000
19552	ror	r4, r4, #8
19553	ror	r5, r5, #8
19554	ror	r6, r6, #8
19555	ror	r7, r7, #8
19556	eor	r4, r4, r8, lsr #8
19557	eor	r5, r5, r9, lsr #8
19558	eor	r6, r6, r10, lsr #8
19559	eor	r7, r7, r11, lsr #8
19560#else
19561	rev	r4, r4
19562	rev	r5, r5
19563	rev	r6, r6
19564	rev	r7, r7
19565#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
19566	ldm	r3!, {r8, r9, r10, r11}
19567	# Round: 0 - XOR in key schedule
19568	eor	r4, r4, r8
19569	eor	r5, r5, r9
19570	eor	r6, r6, r10
19571	eor	r7, r7, r11
19572	mov	r1, #6
19573#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
19574	bl	AES_decrypt_block
19575#else
19576L_AES_CBC_decrypt_block_nr_256_even:
19577#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19578#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19579	lsl	r8, r7, #8
19580	lsr	r8, r8, #24
19581#else
19582	uxtb	r8, r7, ror #16
19583#endif
19584#else
19585	ubfx	r8, r7, #16, #8
19586#endif
19587	lsr	r11, r4, #24
19588#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19589#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19590	lsl	r12, r6, #16
19591	lsr	r12, r12, #24
19592#else
19593	uxtb	r12, r6, ror #8
19594#endif
19595#else
19596	ubfx	r12, r6, #8, #8
19597#endif
19598#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19599#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19600	lsl	lr, r5, #24
19601	lsr	lr, lr, #24
19602#else
19603	uxtb	lr, r5
19604#endif
19605#else
19606	ubfx	lr, r5, #0, #8
19607#endif
19608	ldr	r8, [r0, r8, lsl #2]
19609	ldr	r11, [r0, r11, lsl #2]
19610	ldr	r12, [r0, r12, lsl #2]
19611	ldr	lr, [r0, lr, lsl #2]
19612#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19613#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19614	lsl	r9, r4, #8
19615	lsr	r9, r9, #24
19616#else
19617	uxtb	r9, r4, ror #16
19618#endif
19619#else
19620	ubfx	r9, r4, #16, #8
19621#endif
19622	eor	r8, r8, r11, ror #24
19623	lsr	r11, r5, #24
19624	eor	r8, r8, r12, ror #8
19625#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19626#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19627	lsl	r12, r7, #16
19628	lsr	r12, r12, #24
19629#else
19630	uxtb	r12, r7, ror #8
19631#endif
19632#else
19633	ubfx	r12, r7, #8, #8
19634#endif
19635	eor	r8, r8, lr, ror #16
19636#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19637#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19638	lsl	lr, r6, #24
19639	lsr	lr, lr, #24
19640#else
19641	uxtb	lr, r6
19642#endif
19643#else
19644	ubfx	lr, r6, #0, #8
19645#endif
19646	ldr	r9, [r0, r9, lsl #2]
19647	ldr	r11, [r0, r11, lsl #2]
19648	ldr	r12, [r0, r12, lsl #2]
19649	ldr	lr, [r0, lr, lsl #2]
19650#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19651#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19652	lsl	r10, r5, #8
19653	lsr	r10, r10, #24
19654#else
19655	uxtb	r10, r5, ror #16
19656#endif
19657#else
19658	ubfx	r10, r5, #16, #8
19659#endif
19660	eor	r9, r9, r11, ror #24
19661	lsr	r11, r6, #24
19662	eor	r9, r9, r12, ror #8
19663#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19664#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19665	lsl	r12, r4, #16
19666	lsr	r12, r12, #24
19667#else
19668	uxtb	r12, r4, ror #8
19669#endif
19670#else
19671	ubfx	r12, r4, #8, #8
19672#endif
19673	eor	r9, r9, lr, ror #16
19674#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19675#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19676	lsl	lr, r7, #24
19677	lsr	lr, lr, #24
19678#else
19679	uxtb	lr, r7
19680#endif
19681#else
19682	ubfx	lr, r7, #0, #8
19683#endif
19684	ldr	r10, [r0, r10, lsl #2]
19685	ldr	r11, [r0, r11, lsl #2]
19686	ldr	r12, [r0, r12, lsl #2]
19687	ldr	lr, [r0, lr, lsl #2]
19688#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19689#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19690	lsl	r4, r4, #24
19691	lsr	r4, r4, #24
19692#else
19693	uxtb	r4, r4
19694#endif
19695#else
19696	ubfx	r4, r4, #0, #8
19697#endif
19698	eor	r10, r10, r11, ror #24
19699#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19700#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19701	lsl	r11, r6, #8
19702	lsr	r11, r11, #24
19703#else
19704	uxtb	r11, r6, ror #16
19705#endif
19706#else
19707	ubfx	r11, r6, #16, #8
19708#endif
19709	eor	r10, r10, r12, ror #8
19710	lsr	r12, r7, #24
19711	eor	r10, r10, lr, ror #16
19712#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19713#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19714	lsl	lr, r5, #16
19715	lsr	lr, lr, #24
19716#else
19717	uxtb	lr, r5, ror #8
19718#endif
19719#else
19720	ubfx	lr, r5, #8, #8
19721#endif
19722	ldr	r4, [r0, r4, lsl #2]
19723	ldr	r12, [r0, r12, lsl #2]
19724	ldr	r11, [r0, r11, lsl #2]
19725	ldr	lr, [r0, lr, lsl #2]
19726	eor	r12, r12, r4, ror #24
19727	ldm	r3!, {r4, r5, r6, r7}
19728	eor	r11, r11, lr, ror #8
19729	eor	r11, r11, r12, ror #24
19730	#   XOR in Key Schedule
19731	eor	r8, r8, r4
19732	eor	r9, r9, r5
19733	eor	r10, r10, r6
19734	eor	r11, r11, r7
19735#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19736#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19737	lsl	r4, r11, #8
19738	lsr	r4, r4, #24
19739#else
19740	uxtb	r4, r11, ror #16
19741#endif
19742#else
19743	ubfx	r4, r11, #16, #8
19744#endif
19745	lsr	r7, r8, #24
19746#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19747#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19748	lsl	r12, r10, #16
19749	lsr	r12, r12, #24
19750#else
19751	uxtb	r12, r10, ror #8
19752#endif
19753#else
19754	ubfx	r12, r10, #8, #8
19755#endif
19756#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19757#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19758	lsl	lr, r9, #24
19759	lsr	lr, lr, #24
19760#else
19761	uxtb	lr, r9
19762#endif
19763#else
19764	ubfx	lr, r9, #0, #8
19765#endif
19766	ldr	r4, [r0, r4, lsl #2]
19767	ldr	r7, [r0, r7, lsl #2]
19768	ldr	r12, [r0, r12, lsl #2]
19769	ldr	lr, [r0, lr, lsl #2]
19770#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19771#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19772	lsl	r5, r8, #8
19773	lsr	r5, r5, #24
19774#else
19775	uxtb	r5, r8, ror #16
19776#endif
19777#else
19778	ubfx	r5, r8, #16, #8
19779#endif
19780	eor	r4, r4, r7, ror #24
19781	lsr	r7, r9, #24
19782	eor	r4, r4, r12, ror #8
19783#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19784#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19785	lsl	r12, r11, #16
19786	lsr	r12, r12, #24
19787#else
19788	uxtb	r12, r11, ror #8
19789#endif
19790#else
19791	ubfx	r12, r11, #8, #8
19792#endif
19793	eor	r4, r4, lr, ror #16
19794#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19795#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19796	lsl	lr, r10, #24
19797	lsr	lr, lr, #24
19798#else
19799	uxtb	lr, r10
19800#endif
19801#else
19802	ubfx	lr, r10, #0, #8
19803#endif
19804	ldr	r5, [r0, r5, lsl #2]
19805	ldr	r7, [r0, r7, lsl #2]
19806	ldr	r12, [r0, r12, lsl #2]
19807	ldr	lr, [r0, lr, lsl #2]
19808#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19809#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19810	lsl	r6, r9, #8
19811	lsr	r6, r6, #24
19812#else
19813	uxtb	r6, r9, ror #16
19814#endif
19815#else
19816	ubfx	r6, r9, #16, #8
19817#endif
19818	eor	r5, r5, r7, ror #24
19819	lsr	r7, r10, #24
19820	eor	r5, r5, r12, ror #8
19821#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19822#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19823	lsl	r12, r8, #16
19824	lsr	r12, r12, #24
19825#else
19826	uxtb	r12, r8, ror #8
19827#endif
19828#else
19829	ubfx	r12, r8, #8, #8
19830#endif
19831	eor	r5, r5, lr, ror #16
19832#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19833#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19834	lsl	lr, r11, #24
19835	lsr	lr, lr, #24
19836#else
19837	uxtb	lr, r11
19838#endif
19839#else
19840	ubfx	lr, r11, #0, #8
19841#endif
19842	ldr	r6, [r0, r6, lsl #2]
19843	ldr	r7, [r0, r7, lsl #2]
19844	ldr	r12, [r0, r12, lsl #2]
19845	ldr	lr, [r0, lr, lsl #2]
19846#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19847#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19848	lsl	r8, r8, #24
19849	lsr	r8, r8, #24
19850#else
19851	uxtb	r8, r8
19852#endif
19853#else
19854	ubfx	r8, r8, #0, #8
19855#endif
19856	eor	r6, r6, r7, ror #24
19857#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19858#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19859	lsl	r7, r10, #8
19860	lsr	r7, r7, #24
19861#else
19862	uxtb	r7, r10, ror #16
19863#endif
19864#else
19865	ubfx	r7, r10, #16, #8
19866#endif
19867	eor	r6, r6, r12, ror #8
19868	lsr	r12, r11, #24
19869	eor	r6, r6, lr, ror #16
19870#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19871#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19872	lsl	lr, r9, #16
19873	lsr	lr, lr, #24
19874#else
19875	uxtb	lr, r9, ror #8
19876#endif
19877#else
19878	ubfx	lr, r9, #8, #8
19879#endif
19880	ldr	r8, [r0, r8, lsl #2]
19881	ldr	r12, [r0, r12, lsl #2]
19882	ldr	r7, [r0, r7, lsl #2]
19883	ldr	lr, [r0, lr, lsl #2]
19884	eor	r12, r12, r8, ror #24
19885	ldm	r3!, {r8, r9, r10, r11}
19886	eor	r7, r7, lr, ror #8
19887	eor	r7, r7, r12, ror #24
19888	#   XOR in Key Schedule
19889	eor	r4, r4, r8
19890	eor	r5, r5, r9
19891	eor	r6, r6, r10
19892	eor	r7, r7, r11
19893	subs	r1, r1, #1
19894	bne	L_AES_CBC_decrypt_block_nr_256_even
19895#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19896#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19897	lsl	r8, r7, #8
19898	lsr	r8, r8, #24
19899#else
19900	uxtb	r8, r7, ror #16
19901#endif
19902#else
19903	ubfx	r8, r7, #16, #8
19904#endif
19905	lsr	r11, r4, #24
19906#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19907#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19908	lsl	r12, r6, #16
19909	lsr	r12, r12, #24
19910#else
19911	uxtb	r12, r6, ror #8
19912#endif
19913#else
19914	ubfx	r12, r6, #8, #8
19915#endif
19916#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19917#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19918	lsl	lr, r5, #24
19919	lsr	lr, lr, #24
19920#else
19921	uxtb	lr, r5
19922#endif
19923#else
19924	ubfx	lr, r5, #0, #8
19925#endif
19926	ldr	r8, [r0, r8, lsl #2]
19927	ldr	r11, [r0, r11, lsl #2]
19928	ldr	r12, [r0, r12, lsl #2]
19929	ldr	lr, [r0, lr, lsl #2]
19930#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19931#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19932	lsl	r9, r4, #8
19933	lsr	r9, r9, #24
19934#else
19935	uxtb	r9, r4, ror #16
19936#endif
19937#else
19938	ubfx	r9, r4, #16, #8
19939#endif
19940	eor	r8, r8, r11, ror #24
19941	lsr	r11, r5, #24
19942	eor	r8, r8, r12, ror #8
19943#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19944#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19945	lsl	r12, r7, #16
19946	lsr	r12, r12, #24
19947#else
19948	uxtb	r12, r7, ror #8
19949#endif
19950#else
19951	ubfx	r12, r7, #8, #8
19952#endif
19953	eor	r8, r8, lr, ror #16
19954#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19955#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19956	lsl	lr, r6, #24
19957	lsr	lr, lr, #24
19958#else
19959	uxtb	lr, r6
19960#endif
19961#else
19962	ubfx	lr, r6, #0, #8
19963#endif
19964	ldr	r9, [r0, r9, lsl #2]
19965	ldr	r11, [r0, r11, lsl #2]
19966	ldr	r12, [r0, r12, lsl #2]
19967	ldr	lr, [r0, lr, lsl #2]
19968#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19969#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19970	lsl	r10, r5, #8
19971	lsr	r10, r10, #24
19972#else
19973	uxtb	r10, r5, ror #16
19974#endif
19975#else
19976	ubfx	r10, r5, #16, #8
19977#endif
19978	eor	r9, r9, r11, ror #24
19979	lsr	r11, r6, #24
19980	eor	r9, r9, r12, ror #8
19981#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19982#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19983	lsl	r12, r4, #16
19984	lsr	r12, r12, #24
19985#else
19986	uxtb	r12, r4, ror #8
19987#endif
19988#else
19989	ubfx	r12, r4, #8, #8
19990#endif
19991	eor	r9, r9, lr, ror #16
19992#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
19993#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
19994	lsl	lr, r7, #24
19995	lsr	lr, lr, #24
19996#else
19997	uxtb	lr, r7
19998#endif
19999#else
20000	ubfx	lr, r7, #0, #8
20001#endif
20002	ldr	r10, [r0, r10, lsl #2]
20003	ldr	r11, [r0, r11, lsl #2]
20004	ldr	r12, [r0, r12, lsl #2]
20005	ldr	lr, [r0, lr, lsl #2]
20006#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20007#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20008	lsl	r4, r4, #24
20009	lsr	r4, r4, #24
20010#else
20011	uxtb	r4, r4
20012#endif
20013#else
20014	ubfx	r4, r4, #0, #8
20015#endif
20016	eor	r10, r10, r11, ror #24
20017#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20018#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20019	lsl	r11, r6, #8
20020	lsr	r11, r11, #24
20021#else
20022	uxtb	r11, r6, ror #16
20023#endif
20024#else
20025	ubfx	r11, r6, #16, #8
20026#endif
20027	eor	r10, r10, r12, ror #8
20028	lsr	r12, r7, #24
20029	eor	r10, r10, lr, ror #16
20030#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20031#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20032	lsl	lr, r5, #16
20033	lsr	lr, lr, #24
20034#else
20035	uxtb	lr, r5, ror #8
20036#endif
20037#else
20038	ubfx	lr, r5, #8, #8
20039#endif
20040	ldr	r4, [r0, r4, lsl #2]
20041	ldr	r12, [r0, r12, lsl #2]
20042	ldr	r11, [r0, r11, lsl #2]
20043	ldr	lr, [r0, lr, lsl #2]
20044	eor	r12, r12, r4, ror #24
20045	ldm	r3!, {r4, r5, r6, r7}
20046	eor	r11, r11, lr, ror #8
20047	eor	r11, r11, r12, ror #24
20048	#   XOR in Key Schedule
20049	eor	r8, r8, r4
20050	eor	r9, r9, r5
20051	eor	r10, r10, r6
20052	eor	r11, r11, r7
20053#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20054#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20055	lsl	r4, r9, #24
20056	lsr	r4, r4, #24
20057#else
20058	uxtb	r4, r9
20059#endif
20060#else
20061	ubfx	r4, r9, #0, #8
20062#endif
20063#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20064#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20065	lsl	r7, r10, #16
20066	lsr	r7, r7, #24
20067#else
20068	uxtb	r7, r10, ror #8
20069#endif
20070#else
20071	ubfx	r7, r10, #8, #8
20072#endif
20073#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20074#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20075	lsl	r12, r11, #8
20076	lsr	r12, r12, #24
20077#else
20078	uxtb	r12, r11, ror #16
20079#endif
20080#else
20081	ubfx	r12, r11, #16, #8
20082#endif
20083	lsr	lr, r8, #24
20084	ldrb	r4, [r2, r4]
20085	ldrb	r7, [r2, r7]
20086	ldrb	r12, [r2, r12]
20087	ldrb	lr, [r2, lr]
20088#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20089#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20090	lsl	r5, r10, #24
20091	lsr	r5, r5, #24
20092#else
20093	uxtb	r5, r10
20094#endif
20095#else
20096	ubfx	r5, r10, #0, #8
20097#endif
20098	eor	r4, r4, r7, lsl #8
20099#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20100#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20101	lsl	r7, r11, #16
20102	lsr	r7, r7, #24
20103#else
20104	uxtb	r7, r11, ror #8
20105#endif
20106#else
20107	ubfx	r7, r11, #8, #8
20108#endif
20109	eor	r4, r4, r12, lsl #16
20110#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20111#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20112	lsl	r12, r8, #8
20113	lsr	r12, r12, #24
20114#else
20115	uxtb	r12, r8, ror #16
20116#endif
20117#else
20118	ubfx	r12, r8, #16, #8
20119#endif
20120	eor	r4, r4, lr, lsl #24
20121	lsr	lr, r9, #24
20122	ldrb	r7, [r2, r7]
20123	ldrb	lr, [r2, lr]
20124	ldrb	r5, [r2, r5]
20125	ldrb	r12, [r2, r12]
20126#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20127#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20128	lsl	r6, r11, #24
20129	lsr	r6, r6, #24
20130#else
20131	uxtb	r6, r11
20132#endif
20133#else
20134	ubfx	r6, r11, #0, #8
20135#endif
20136	eor	r5, r5, r7, lsl #8
20137#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20138#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20139	lsl	r7, r8, #16
20140	lsr	r7, r7, #24
20141#else
20142	uxtb	r7, r8, ror #8
20143#endif
20144#else
20145	ubfx	r7, r8, #8, #8
20146#endif
20147	eor	r5, r5, r12, lsl #16
20148#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20149#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20150	lsl	r12, r9, #8
20151	lsr	r12, r12, #24
20152#else
20153	uxtb	r12, r9, ror #16
20154#endif
20155#else
20156	ubfx	r12, r9, #16, #8
20157#endif
20158	eor	r5, r5, lr, lsl #24
20159	lsr	lr, r10, #24
20160	ldrb	r7, [r2, r7]
20161	ldrb	lr, [r2, lr]
20162	ldrb	r6, [r2, r6]
20163	ldrb	r12, [r2, r12]
20164	lsr	r11, r11, #24
20165	eor	r6, r6, r7, lsl #8
20166#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20167#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20168	lsl	r7, r8, #24
20169	lsr	r7, r7, #24
20170#else
20171	uxtb	r7, r8
20172#endif
20173#else
20174	ubfx	r7, r8, #0, #8
20175#endif
20176	eor	r6, r6, r12, lsl #16
20177#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20178#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20179	lsl	r12, r9, #16
20180	lsr	r12, r12, #24
20181#else
20182	uxtb	r12, r9, ror #8
20183#endif
20184#else
20185	ubfx	r12, r9, #8, #8
20186#endif
20187	eor	r6, r6, lr, lsl #24
20188#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20189#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20190	lsl	lr, r10, #8
20191	lsr	lr, lr, #24
20192#else
20193	uxtb	lr, r10, ror #16
20194#endif
20195#else
20196	ubfx	lr, r10, #16, #8
20197#endif
20198	ldrb	r11, [r2, r11]
20199	ldrb	r12, [r2, r12]
20200	ldrb	r7, [r2, r7]
20201	ldrb	lr, [r2, lr]
20202	eor	r12, r12, r11, lsl #16
20203	ldm	r3, {r8, r9, r10, r11}
20204	eor	r7, r7, r12, lsl #8
20205	eor	r7, r7, lr, lsl #16
20206	#   XOR in Key Schedule
20207	eor	r4, r4, r8
20208	eor	r5, r5, r9
20209	eor	r6, r6, r10
20210	eor	r7, r7, r11
20211#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
20212	ldr	lr, [sp, #16]
20213#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20214	eor	r8, r4, r4, ror #16
20215	eor	r9, r5, r5, ror #16
20216	eor	r10, r6, r6, ror #16
20217	eor	r11, r7, r7, ror #16
20218	bic	r8, r8, #0xff0000
20219	bic	r9, r9, #0xff0000
20220	bic	r10, r10, #0xff0000
20221	bic	r11, r11, #0xff0000
20222	ror	r4, r4, #8
20223	ror	r5, r5, #8
20224	ror	r6, r6, #8
20225	ror	r7, r7, #8
20226	eor	r4, r4, r8, lsr #8
20227	eor	r5, r5, r9, lsr #8
20228	eor	r6, r6, r10, lsr #8
20229	eor	r7, r7, r11, lsr #8
20230#else
20231	rev	r4, r4
20232	rev	r5, r5
20233	rev	r6, r6
20234	rev	r7, r7
20235#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
20236#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20237	ldr	r8, [lr, #16]
20238	ldr	r9, [lr, #20]
20239#else
20240	ldrd	r8, r9, [lr, #16]
20241#endif
20242#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20243	ldr	r10, [lr, #24]
20244	ldr	r11, [lr, #28]
20245#else
20246	ldrd	r10, r11, [lr, #24]
20247#endif
20248	pop	{r1, r12, lr}
20249	ldr	r3, [sp]
20250	eor	r4, r4, r8
20251	eor	r5, r5, r9
20252	eor	r6, r6, r10
20253	eor	r7, r7, r11
20254	str	r4, [r1]
20255	str	r5, [r1, #4]
20256	str	r6, [r1, #8]
20257	str	r7, [r1, #12]
20258	subs	r12, r12, #16
20259	add	lr, lr, #16
20260	add	r1, r1, #16
20261	bne	L_AES_CBC_decrypt_loop_block_256
20262	b	L_AES_CBC_decrypt_end
20263L_AES_CBC_decrypt_loop_block_192:
20264	push	{r1, r12, lr}
20265	ldr	r4, [lr]
20266	ldr	r5, [lr, #4]
20267	ldr	r6, [lr, #8]
20268	ldr	r7, [lr, #12]
20269	ldr	lr, [sp, #16]
20270#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20271	str	r4, [lr, #16]
20272	str	r5, [lr, #20]
20273#else
20274	strd	r4, r5, [lr, #16]
20275#endif
20276#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20277	str	r6, [lr, #24]
20278	str	r7, [lr, #28]
20279#else
20280	strd	r6, r7, [lr, #24]
20281#endif
20282#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20283	eor	r8, r4, r4, ror #16
20284	eor	r9, r5, r5, ror #16
20285	eor	r10, r6, r6, ror #16
20286	eor	r11, r7, r7, ror #16
20287	bic	r8, r8, #0xff0000
20288	bic	r9, r9, #0xff0000
20289	bic	r10, r10, #0xff0000
20290	bic	r11, r11, #0xff0000
20291	ror	r4, r4, #8
20292	ror	r5, r5, #8
20293	ror	r6, r6, #8
20294	ror	r7, r7, #8
20295	eor	r4, r4, r8, lsr #8
20296	eor	r5, r5, r9, lsr #8
20297	eor	r6, r6, r10, lsr #8
20298	eor	r7, r7, r11, lsr #8
20299#else
20300	rev	r4, r4
20301	rev	r5, r5
20302	rev	r6, r6
20303	rev	r7, r7
20304#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
20305	ldm	r3!, {r8, r9, r10, r11}
20306	# Round: 0 - XOR in key schedule
20307	eor	r4, r4, r8
20308	eor	r5, r5, r9
20309	eor	r6, r6, r10
20310	eor	r7, r7, r11
20311	mov	r1, #5
20312#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
20313	bl	AES_decrypt_block
20314#else
20315L_AES_CBC_decrypt_block_nr_192_odd:
20316#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20317#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20318	lsl	r8, r7, #8
20319	lsr	r8, r8, #24
20320#else
20321	uxtb	r8, r7, ror #16
20322#endif
20323#else
20324	ubfx	r8, r7, #16, #8
20325#endif
20326	lsr	r11, r4, #24
20327#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20328#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20329	lsl	r12, r6, #16
20330	lsr	r12, r12, #24
20331#else
20332	uxtb	r12, r6, ror #8
20333#endif
20334#else
20335	ubfx	r12, r6, #8, #8
20336#endif
20337#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20338#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20339	lsl	lr, r5, #24
20340	lsr	lr, lr, #24
20341#else
20342	uxtb	lr, r5
20343#endif
20344#else
20345	ubfx	lr, r5, #0, #8
20346#endif
20347	ldr	r8, [r0, r8, lsl #2]
20348	ldr	r11, [r0, r11, lsl #2]
20349	ldr	r12, [r0, r12, lsl #2]
20350	ldr	lr, [r0, lr, lsl #2]
20351#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20352#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20353	lsl	r9, r4, #8
20354	lsr	r9, r9, #24
20355#else
20356	uxtb	r9, r4, ror #16
20357#endif
20358#else
20359	ubfx	r9, r4, #16, #8
20360#endif
20361	eor	r8, r8, r11, ror #24
20362	lsr	r11, r5, #24
20363	eor	r8, r8, r12, ror #8
20364#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20365#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20366	lsl	r12, r7, #16
20367	lsr	r12, r12, #24
20368#else
20369	uxtb	r12, r7, ror #8
20370#endif
20371#else
20372	ubfx	r12, r7, #8, #8
20373#endif
20374	eor	r8, r8, lr, ror #16
20375#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20376#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20377	lsl	lr, r6, #24
20378	lsr	lr, lr, #24
20379#else
20380	uxtb	lr, r6
20381#endif
20382#else
20383	ubfx	lr, r6, #0, #8
20384#endif
20385	ldr	r9, [r0, r9, lsl #2]
20386	ldr	r11, [r0, r11, lsl #2]
20387	ldr	r12, [r0, r12, lsl #2]
20388	ldr	lr, [r0, lr, lsl #2]
20389#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20390#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20391	lsl	r10, r5, #8
20392	lsr	r10, r10, #24
20393#else
20394	uxtb	r10, r5, ror #16
20395#endif
20396#else
20397	ubfx	r10, r5, #16, #8
20398#endif
20399	eor	r9, r9, r11, ror #24
20400	lsr	r11, r6, #24
20401	eor	r9, r9, r12, ror #8
20402#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20403#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20404	lsl	r12, r4, #16
20405	lsr	r12, r12, #24
20406#else
20407	uxtb	r12, r4, ror #8
20408#endif
20409#else
20410	ubfx	r12, r4, #8, #8
20411#endif
20412	eor	r9, r9, lr, ror #16
20413#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20414#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20415	lsl	lr, r7, #24
20416	lsr	lr, lr, #24
20417#else
20418	uxtb	lr, r7
20419#endif
20420#else
20421	ubfx	lr, r7, #0, #8
20422#endif
20423	ldr	r10, [r0, r10, lsl #2]
20424	ldr	r11, [r0, r11, lsl #2]
20425	ldr	r12, [r0, r12, lsl #2]
20426	ldr	lr, [r0, lr, lsl #2]
20427#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20428#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20429	lsl	r4, r4, #24
20430	lsr	r4, r4, #24
20431#else
20432	uxtb	r4, r4
20433#endif
20434#else
20435	ubfx	r4, r4, #0, #8
20436#endif
20437	eor	r10, r10, r11, ror #24
20438#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20439#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20440	lsl	r11, r6, #8
20441	lsr	r11, r11, #24
20442#else
20443	uxtb	r11, r6, ror #16
20444#endif
20445#else
20446	ubfx	r11, r6, #16, #8
20447#endif
20448	eor	r10, r10, r12, ror #8
20449	lsr	r12, r7, #24
20450	eor	r10, r10, lr, ror #16
20451#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20452#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20453	lsl	lr, r5, #16
20454	lsr	lr, lr, #24
20455#else
20456	uxtb	lr, r5, ror #8
20457#endif
20458#else
20459	ubfx	lr, r5, #8, #8
20460#endif
20461	ldr	r4, [r0, r4, lsl #2]
20462	ldr	r12, [r0, r12, lsl #2]
20463	ldr	r11, [r0, r11, lsl #2]
20464	ldr	lr, [r0, lr, lsl #2]
20465	eor	r12, r12, r4, ror #24
20466	ldm	r3!, {r4, r5, r6, r7}
20467	eor	r11, r11, lr, ror #8
20468	eor	r11, r11, r12, ror #24
20469	#   XOR in Key Schedule
20470	eor	r8, r8, r4
20471	eor	r9, r9, r5
20472	eor	r10, r10, r6
20473	eor	r11, r11, r7
20474#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20475#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20476	lsl	r4, r11, #8
20477	lsr	r4, r4, #24
20478#else
20479	uxtb	r4, r11, ror #16
20480#endif
20481#else
20482	ubfx	r4, r11, #16, #8
20483#endif
20484	lsr	r7, r8, #24
20485#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20486#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20487	lsl	r12, r10, #16
20488	lsr	r12, r12, #24
20489#else
20490	uxtb	r12, r10, ror #8
20491#endif
20492#else
20493	ubfx	r12, r10, #8, #8
20494#endif
20495#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20496#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20497	lsl	lr, r9, #24
20498	lsr	lr, lr, #24
20499#else
20500	uxtb	lr, r9
20501#endif
20502#else
20503	ubfx	lr, r9, #0, #8
20504#endif
20505	ldr	r4, [r0, r4, lsl #2]
20506	ldr	r7, [r0, r7, lsl #2]
20507	ldr	r12, [r0, r12, lsl #2]
20508	ldr	lr, [r0, lr, lsl #2]
20509#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20510#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20511	lsl	r5, r8, #8
20512	lsr	r5, r5, #24
20513#else
20514	uxtb	r5, r8, ror #16
20515#endif
20516#else
20517	ubfx	r5, r8, #16, #8
20518#endif
20519	eor	r4, r4, r7, ror #24
20520	lsr	r7, r9, #24
20521	eor	r4, r4, r12, ror #8
20522#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20523#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20524	lsl	r12, r11, #16
20525	lsr	r12, r12, #24
20526#else
20527	uxtb	r12, r11, ror #8
20528#endif
20529#else
20530	ubfx	r12, r11, #8, #8
20531#endif
20532	eor	r4, r4, lr, ror #16
20533#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20534#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20535	lsl	lr, r10, #24
20536	lsr	lr, lr, #24
20537#else
20538	uxtb	lr, r10
20539#endif
20540#else
20541	ubfx	lr, r10, #0, #8
20542#endif
20543	ldr	r5, [r0, r5, lsl #2]
20544	ldr	r7, [r0, r7, lsl #2]
20545	ldr	r12, [r0, r12, lsl #2]
20546	ldr	lr, [r0, lr, lsl #2]
20547#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20548#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20549	lsl	r6, r9, #8
20550	lsr	r6, r6, #24
20551#else
20552	uxtb	r6, r9, ror #16
20553#endif
20554#else
20555	ubfx	r6, r9, #16, #8
20556#endif
20557	eor	r5, r5, r7, ror #24
20558	lsr	r7, r10, #24
20559	eor	r5, r5, r12, ror #8
20560#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20561#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20562	lsl	r12, r8, #16
20563	lsr	r12, r12, #24
20564#else
20565	uxtb	r12, r8, ror #8
20566#endif
20567#else
20568	ubfx	r12, r8, #8, #8
20569#endif
20570	eor	r5, r5, lr, ror #16
20571#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20572#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20573	lsl	lr, r11, #24
20574	lsr	lr, lr, #24
20575#else
20576	uxtb	lr, r11
20577#endif
20578#else
20579	ubfx	lr, r11, #0, #8
20580#endif
20581	ldr	r6, [r0, r6, lsl #2]
20582	ldr	r7, [r0, r7, lsl #2]
20583	ldr	r12, [r0, r12, lsl #2]
20584	ldr	lr, [r0, lr, lsl #2]
20585#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20586#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20587	lsl	r8, r8, #24
20588	lsr	r8, r8, #24
20589#else
20590	uxtb	r8, r8
20591#endif
20592#else
20593	ubfx	r8, r8, #0, #8
20594#endif
20595	eor	r6, r6, r7, ror #24
20596#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20597#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20598	lsl	r7, r10, #8
20599	lsr	r7, r7, #24
20600#else
20601	uxtb	r7, r10, ror #16
20602#endif
20603#else
20604	ubfx	r7, r10, #16, #8
20605#endif
20606	eor	r6, r6, r12, ror #8
20607	lsr	r12, r11, #24
20608	eor	r6, r6, lr, ror #16
20609#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20610#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20611	lsl	lr, r9, #16
20612	lsr	lr, lr, #24
20613#else
20614	uxtb	lr, r9, ror #8
20615#endif
20616#else
20617	ubfx	lr, r9, #8, #8
20618#endif
20619	ldr	r8, [r0, r8, lsl #2]
20620	ldr	r12, [r0, r12, lsl #2]
20621	ldr	r7, [r0, r7, lsl #2]
20622	ldr	lr, [r0, lr, lsl #2]
20623	eor	r12, r12, r8, ror #24
20624	ldm	r3!, {r8, r9, r10, r11}
20625	eor	r7, r7, lr, ror #8
20626	eor	r7, r7, r12, ror #24
20627	#   XOR in Key Schedule
20628	eor	r4, r4, r8
20629	eor	r5, r5, r9
20630	eor	r6, r6, r10
20631	eor	r7, r7, r11
20632	subs	r1, r1, #1
20633	bne	L_AES_CBC_decrypt_block_nr_192_odd
20634#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20635#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20636	lsl	r8, r7, #8
20637	lsr	r8, r8, #24
20638#else
20639	uxtb	r8, r7, ror #16
20640#endif
20641#else
20642	ubfx	r8, r7, #16, #8
20643#endif
20644	lsr	r11, r4, #24
20645#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20646#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20647	lsl	r12, r6, #16
20648	lsr	r12, r12, #24
20649#else
20650	uxtb	r12, r6, ror #8
20651#endif
20652#else
20653	ubfx	r12, r6, #8, #8
20654#endif
20655#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20656#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20657	lsl	lr, r5, #24
20658	lsr	lr, lr, #24
20659#else
20660	uxtb	lr, r5
20661#endif
20662#else
20663	ubfx	lr, r5, #0, #8
20664#endif
20665	ldr	r8, [r0, r8, lsl #2]
20666	ldr	r11, [r0, r11, lsl #2]
20667	ldr	r12, [r0, r12, lsl #2]
20668	ldr	lr, [r0, lr, lsl #2]
20669#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20670#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20671	lsl	r9, r4, #8
20672	lsr	r9, r9, #24
20673#else
20674	uxtb	r9, r4, ror #16
20675#endif
20676#else
20677	ubfx	r9, r4, #16, #8
20678#endif
20679	eor	r8, r8, r11, ror #24
20680	lsr	r11, r5, #24
20681	eor	r8, r8, r12, ror #8
20682#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20683#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20684	lsl	r12, r7, #16
20685	lsr	r12, r12, #24
20686#else
20687	uxtb	r12, r7, ror #8
20688#endif
20689#else
20690	ubfx	r12, r7, #8, #8
20691#endif
20692	eor	r8, r8, lr, ror #16
20693#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20694#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20695	lsl	lr, r6, #24
20696	lsr	lr, lr, #24
20697#else
20698	uxtb	lr, r6
20699#endif
20700#else
20701	ubfx	lr, r6, #0, #8
20702#endif
20703	ldr	r9, [r0, r9, lsl #2]
20704	ldr	r11, [r0, r11, lsl #2]
20705	ldr	r12, [r0, r12, lsl #2]
20706	ldr	lr, [r0, lr, lsl #2]
20707#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20708#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20709	lsl	r10, r5, #8
20710	lsr	r10, r10, #24
20711#else
20712	uxtb	r10, r5, ror #16
20713#endif
20714#else
20715	ubfx	r10, r5, #16, #8
20716#endif
20717	eor	r9, r9, r11, ror #24
20718	lsr	r11, r6, #24
20719	eor	r9, r9, r12, ror #8
20720#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20721#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20722	lsl	r12, r4, #16
20723	lsr	r12, r12, #24
20724#else
20725	uxtb	r12, r4, ror #8
20726#endif
20727#else
20728	ubfx	r12, r4, #8, #8
20729#endif
20730	eor	r9, r9, lr, ror #16
20731#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20732#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20733	lsl	lr, r7, #24
20734	lsr	lr, lr, #24
20735#else
20736	uxtb	lr, r7
20737#endif
20738#else
20739	ubfx	lr, r7, #0, #8
20740#endif
20741	ldr	r10, [r0, r10, lsl #2]
20742	ldr	r11, [r0, r11, lsl #2]
20743	ldr	r12, [r0, r12, lsl #2]
20744	ldr	lr, [r0, lr, lsl #2]
20745#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20746#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20747	lsl	r4, r4, #24
20748	lsr	r4, r4, #24
20749#else
20750	uxtb	r4, r4
20751#endif
20752#else
20753	ubfx	r4, r4, #0, #8
20754#endif
20755	eor	r10, r10, r11, ror #24
20756#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20757#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20758	lsl	r11, r6, #8
20759	lsr	r11, r11, #24
20760#else
20761	uxtb	r11, r6, ror #16
20762#endif
20763#else
20764	ubfx	r11, r6, #16, #8
20765#endif
20766	eor	r10, r10, r12, ror #8
20767	lsr	r12, r7, #24
20768	eor	r10, r10, lr, ror #16
20769#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20770#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20771	lsl	lr, r5, #16
20772	lsr	lr, lr, #24
20773#else
20774	uxtb	lr, r5, ror #8
20775#endif
20776#else
20777	ubfx	lr, r5, #8, #8
20778#endif
20779	ldr	r4, [r0, r4, lsl #2]
20780	ldr	r12, [r0, r12, lsl #2]
20781	ldr	r11, [r0, r11, lsl #2]
20782	ldr	lr, [r0, lr, lsl #2]
20783	eor	r12, r12, r4, ror #24
20784	ldm	r3!, {r4, r5, r6, r7}
20785	eor	r11, r11, lr, ror #8
20786	eor	r11, r11, r12, ror #24
20787	#   XOR in Key Schedule
20788	eor	r8, r8, r4
20789	eor	r9, r9, r5
20790	eor	r10, r10, r6
20791	eor	r11, r11, r7
20792#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20793#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20794	lsl	r4, r9, #24
20795	lsr	r4, r4, #24
20796#else
20797	uxtb	r4, r9
20798#endif
20799#else
20800	ubfx	r4, r9, #0, #8
20801#endif
20802#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20803#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20804	lsl	r7, r10, #16
20805	lsr	r7, r7, #24
20806#else
20807	uxtb	r7, r10, ror #8
20808#endif
20809#else
20810	ubfx	r7, r10, #8, #8
20811#endif
20812#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20813#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20814	lsl	r12, r11, #8
20815	lsr	r12, r12, #24
20816#else
20817	uxtb	r12, r11, ror #16
20818#endif
20819#else
20820	ubfx	r12, r11, #16, #8
20821#endif
20822	lsr	lr, r8, #24
20823	ldrb	r4, [r2, r4]
20824	ldrb	r7, [r2, r7]
20825	ldrb	r12, [r2, r12]
20826	ldrb	lr, [r2, lr]
20827#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20828#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20829	lsl	r5, r10, #24
20830	lsr	r5, r5, #24
20831#else
20832	uxtb	r5, r10
20833#endif
20834#else
20835	ubfx	r5, r10, #0, #8
20836#endif
20837	eor	r4, r4, r7, lsl #8
20838#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20839#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20840	lsl	r7, r11, #16
20841	lsr	r7, r7, #24
20842#else
20843	uxtb	r7, r11, ror #8
20844#endif
20845#else
20846	ubfx	r7, r11, #8, #8
20847#endif
20848	eor	r4, r4, r12, lsl #16
20849#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20850#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20851	lsl	r12, r8, #8
20852	lsr	r12, r12, #24
20853#else
20854	uxtb	r12, r8, ror #16
20855#endif
20856#else
20857	ubfx	r12, r8, #16, #8
20858#endif
20859	eor	r4, r4, lr, lsl #24
20860	lsr	lr, r9, #24
20861	ldrb	r7, [r2, r7]
20862	ldrb	lr, [r2, lr]
20863	ldrb	r5, [r2, r5]
20864	ldrb	r12, [r2, r12]
20865#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20866#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20867	lsl	r6, r11, #24
20868	lsr	r6, r6, #24
20869#else
20870	uxtb	r6, r11
20871#endif
20872#else
20873	ubfx	r6, r11, #0, #8
20874#endif
20875	eor	r5, r5, r7, lsl #8
20876#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20877#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20878	lsl	r7, r8, #16
20879	lsr	r7, r7, #24
20880#else
20881	uxtb	r7, r8, ror #8
20882#endif
20883#else
20884	ubfx	r7, r8, #8, #8
20885#endif
20886	eor	r5, r5, r12, lsl #16
20887#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20888#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20889	lsl	r12, r9, #8
20890	lsr	r12, r12, #24
20891#else
20892	uxtb	r12, r9, ror #16
20893#endif
20894#else
20895	ubfx	r12, r9, #16, #8
20896#endif
20897	eor	r5, r5, lr, lsl #24
20898	lsr	lr, r10, #24
20899	ldrb	r7, [r2, r7]
20900	ldrb	lr, [r2, lr]
20901	ldrb	r6, [r2, r6]
20902	ldrb	r12, [r2, r12]
20903	lsr	r11, r11, #24
20904	eor	r6, r6, r7, lsl #8
20905#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20906#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20907	lsl	r7, r8, #24
20908	lsr	r7, r7, #24
20909#else
20910	uxtb	r7, r8
20911#endif
20912#else
20913	ubfx	r7, r8, #0, #8
20914#endif
20915	eor	r6, r6, r12, lsl #16
20916#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20917#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20918	lsl	r12, r9, #16
20919	lsr	r12, r12, #24
20920#else
20921	uxtb	r12, r9, ror #8
20922#endif
20923#else
20924	ubfx	r12, r9, #8, #8
20925#endif
20926	eor	r6, r6, lr, lsl #24
20927#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20928#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20929	lsl	lr, r10, #8
20930	lsr	lr, lr, #24
20931#else
20932	uxtb	lr, r10, ror #16
20933#endif
20934#else
20935	ubfx	lr, r10, #16, #8
20936#endif
20937	ldrb	r11, [r2, r11]
20938	ldrb	r12, [r2, r12]
20939	ldrb	r7, [r2, r7]
20940	ldrb	lr, [r2, lr]
20941	eor	r12, r12, r11, lsl #16
20942	ldm	r3, {r8, r9, r10, r11}
20943	eor	r7, r7, r12, lsl #8
20944	eor	r7, r7, lr, lsl #16
20945	#   XOR in Key Schedule
20946	eor	r4, r4, r8
20947	eor	r5, r5, r9
20948	eor	r6, r6, r10
20949	eor	r7, r7, r11
20950#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
20951	ldr	lr, [sp, #16]
20952#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
20953	eor	r8, r4, r4, ror #16
20954	eor	r9, r5, r5, ror #16
20955	eor	r10, r6, r6, ror #16
20956	eor	r11, r7, r7, ror #16
20957	bic	r8, r8, #0xff0000
20958	bic	r9, r9, #0xff0000
20959	bic	r10, r10, #0xff0000
20960	bic	r11, r11, #0xff0000
20961	ror	r4, r4, #8
20962	ror	r5, r5, #8
20963	ror	r6, r6, #8
20964	ror	r7, r7, #8
20965	eor	r4, r4, r8, lsr #8
20966	eor	r5, r5, r9, lsr #8
20967	eor	r6, r6, r10, lsr #8
20968	eor	r7, r7, r11, lsr #8
20969#else
20970	rev	r4, r4
20971	rev	r5, r5
20972	rev	r6, r6
20973	rev	r7, r7
20974#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
20975	ldm	lr, {r8, r9, r10, r11}
20976	pop	{r1, r12, lr}
20977	ldr	r3, [sp]
20978	eor	r4, r4, r8
20979	eor	r5, r5, r9
20980	eor	r6, r6, r10
20981	eor	r7, r7, r11
20982	str	r4, [r1]
20983	str	r5, [r1, #4]
20984	str	r6, [r1, #8]
20985	str	r7, [r1, #12]
20986	subs	r12, r12, #16
20987	add	lr, lr, #16
20988	add	r1, r1, #16
20989	beq	L_AES_CBC_decrypt_end_odd
20990	push	{r1, r12, lr}
20991	ldr	r4, [lr]
20992	ldr	r5, [lr, #4]
20993	ldr	r6, [lr, #8]
20994	ldr	r7, [lr, #12]
20995	ldr	lr, [sp, #16]
20996#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
20997	stm	lr, {r4, r5}
20998#else
20999	strd	r4, r5, [lr]
21000#endif
21001#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21002	str	r6, [lr, #8]
21003	str	r7, [lr, #12]
21004#else
21005	strd	r6, r7, [lr, #8]
21006#endif
21007#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21008	eor	r8, r4, r4, ror #16
21009	eor	r9, r5, r5, ror #16
21010	eor	r10, r6, r6, ror #16
21011	eor	r11, r7, r7, ror #16
21012	bic	r8, r8, #0xff0000
21013	bic	r9, r9, #0xff0000
21014	bic	r10, r10, #0xff0000
21015	bic	r11, r11, #0xff0000
21016	ror	r4, r4, #8
21017	ror	r5, r5, #8
21018	ror	r6, r6, #8
21019	ror	r7, r7, #8
21020	eor	r4, r4, r8, lsr #8
21021	eor	r5, r5, r9, lsr #8
21022	eor	r6, r6, r10, lsr #8
21023	eor	r7, r7, r11, lsr #8
21024#else
21025	rev	r4, r4
21026	rev	r5, r5
21027	rev	r6, r6
21028	rev	r7, r7
21029#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
21030	ldm	r3!, {r8, r9, r10, r11}
21031	# Round: 0 - XOR in key schedule
21032	eor	r4, r4, r8
21033	eor	r5, r5, r9
21034	eor	r6, r6, r10
21035	eor	r7, r7, r11
21036	mov	r1, #5
21037#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
21038	bl	AES_decrypt_block
21039#else
21040L_AES_CBC_decrypt_block_nr_192_even:
21041#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21042#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21043	lsl	r8, r7, #8
21044	lsr	r8, r8, #24
21045#else
21046	uxtb	r8, r7, ror #16
21047#endif
21048#else
21049	ubfx	r8, r7, #16, #8
21050#endif
21051	lsr	r11, r4, #24
21052#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21053#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21054	lsl	r12, r6, #16
21055	lsr	r12, r12, #24
21056#else
21057	uxtb	r12, r6, ror #8
21058#endif
21059#else
21060	ubfx	r12, r6, #8, #8
21061#endif
21062#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21063#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21064	lsl	lr, r5, #24
21065	lsr	lr, lr, #24
21066#else
21067	uxtb	lr, r5
21068#endif
21069#else
21070	ubfx	lr, r5, #0, #8
21071#endif
21072	ldr	r8, [r0, r8, lsl #2]
21073	ldr	r11, [r0, r11, lsl #2]
21074	ldr	r12, [r0, r12, lsl #2]
21075	ldr	lr, [r0, lr, lsl #2]
21076#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21077#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21078	lsl	r9, r4, #8
21079	lsr	r9, r9, #24
21080#else
21081	uxtb	r9, r4, ror #16
21082#endif
21083#else
21084	ubfx	r9, r4, #16, #8
21085#endif
21086	eor	r8, r8, r11, ror #24
21087	lsr	r11, r5, #24
21088	eor	r8, r8, r12, ror #8
21089#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21090#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21091	lsl	r12, r7, #16
21092	lsr	r12, r12, #24
21093#else
21094	uxtb	r12, r7, ror #8
21095#endif
21096#else
21097	ubfx	r12, r7, #8, #8
21098#endif
21099	eor	r8, r8, lr, ror #16
21100#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21101#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21102	lsl	lr, r6, #24
21103	lsr	lr, lr, #24
21104#else
21105	uxtb	lr, r6
21106#endif
21107#else
21108	ubfx	lr, r6, #0, #8
21109#endif
21110	ldr	r9, [r0, r9, lsl #2]
21111	ldr	r11, [r0, r11, lsl #2]
21112	ldr	r12, [r0, r12, lsl #2]
21113	ldr	lr, [r0, lr, lsl #2]
21114#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21115#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21116	lsl	r10, r5, #8
21117	lsr	r10, r10, #24
21118#else
21119	uxtb	r10, r5, ror #16
21120#endif
21121#else
21122	ubfx	r10, r5, #16, #8
21123#endif
21124	eor	r9, r9, r11, ror #24
21125	lsr	r11, r6, #24
21126	eor	r9, r9, r12, ror #8
21127#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21128#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21129	lsl	r12, r4, #16
21130	lsr	r12, r12, #24
21131#else
21132	uxtb	r12, r4, ror #8
21133#endif
21134#else
21135	ubfx	r12, r4, #8, #8
21136#endif
21137	eor	r9, r9, lr, ror #16
21138#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21139#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21140	lsl	lr, r7, #24
21141	lsr	lr, lr, #24
21142#else
21143	uxtb	lr, r7
21144#endif
21145#else
21146	ubfx	lr, r7, #0, #8
21147#endif
21148	ldr	r10, [r0, r10, lsl #2]
21149	ldr	r11, [r0, r11, lsl #2]
21150	ldr	r12, [r0, r12, lsl #2]
21151	ldr	lr, [r0, lr, lsl #2]
21152#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21153#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21154	lsl	r4, r4, #24
21155	lsr	r4, r4, #24
21156#else
21157	uxtb	r4, r4
21158#endif
21159#else
21160	ubfx	r4, r4, #0, #8
21161#endif
21162	eor	r10, r10, r11, ror #24
21163#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21164#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21165	lsl	r11, r6, #8
21166	lsr	r11, r11, #24
21167#else
21168	uxtb	r11, r6, ror #16
21169#endif
21170#else
21171	ubfx	r11, r6, #16, #8
21172#endif
21173	eor	r10, r10, r12, ror #8
21174	lsr	r12, r7, #24
21175	eor	r10, r10, lr, ror #16
21176#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21177#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21178	lsl	lr, r5, #16
21179	lsr	lr, lr, #24
21180#else
21181	uxtb	lr, r5, ror #8
21182#endif
21183#else
21184	ubfx	lr, r5, #8, #8
21185#endif
21186	ldr	r4, [r0, r4, lsl #2]
21187	ldr	r12, [r0, r12, lsl #2]
21188	ldr	r11, [r0, r11, lsl #2]
21189	ldr	lr, [r0, lr, lsl #2]
21190	eor	r12, r12, r4, ror #24
21191	ldm	r3!, {r4, r5, r6, r7}
21192	eor	r11, r11, lr, ror #8
21193	eor	r11, r11, r12, ror #24
21194	#   XOR in Key Schedule
21195	eor	r8, r8, r4
21196	eor	r9, r9, r5
21197	eor	r10, r10, r6
21198	eor	r11, r11, r7
21199#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21200#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21201	lsl	r4, r11, #8
21202	lsr	r4, r4, #24
21203#else
21204	uxtb	r4, r11, ror #16
21205#endif
21206#else
21207	ubfx	r4, r11, #16, #8
21208#endif
21209	lsr	r7, r8, #24
21210#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21211#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21212	lsl	r12, r10, #16
21213	lsr	r12, r12, #24
21214#else
21215	uxtb	r12, r10, ror #8
21216#endif
21217#else
21218	ubfx	r12, r10, #8, #8
21219#endif
21220#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21221#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21222	lsl	lr, r9, #24
21223	lsr	lr, lr, #24
21224#else
21225	uxtb	lr, r9
21226#endif
21227#else
21228	ubfx	lr, r9, #0, #8
21229#endif
21230	ldr	r4, [r0, r4, lsl #2]
21231	ldr	r7, [r0, r7, lsl #2]
21232	ldr	r12, [r0, r12, lsl #2]
21233	ldr	lr, [r0, lr, lsl #2]
21234#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21235#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21236	lsl	r5, r8, #8
21237	lsr	r5, r5, #24
21238#else
21239	uxtb	r5, r8, ror #16
21240#endif
21241#else
21242	ubfx	r5, r8, #16, #8
21243#endif
21244	eor	r4, r4, r7, ror #24
21245	lsr	r7, r9, #24
21246	eor	r4, r4, r12, ror #8
21247#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21248#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21249	lsl	r12, r11, #16
21250	lsr	r12, r12, #24
21251#else
21252	uxtb	r12, r11, ror #8
21253#endif
21254#else
21255	ubfx	r12, r11, #8, #8
21256#endif
21257	eor	r4, r4, lr, ror #16
21258#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21259#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21260	lsl	lr, r10, #24
21261	lsr	lr, lr, #24
21262#else
21263	uxtb	lr, r10
21264#endif
21265#else
21266	ubfx	lr, r10, #0, #8
21267#endif
21268	ldr	r5, [r0, r5, lsl #2]
21269	ldr	r7, [r0, r7, lsl #2]
21270	ldr	r12, [r0, r12, lsl #2]
21271	ldr	lr, [r0, lr, lsl #2]
21272#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21273#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21274	lsl	r6, r9, #8
21275	lsr	r6, r6, #24
21276#else
21277	uxtb	r6, r9, ror #16
21278#endif
21279#else
21280	ubfx	r6, r9, #16, #8
21281#endif
21282	eor	r5, r5, r7, ror #24
21283	lsr	r7, r10, #24
21284	eor	r5, r5, r12, ror #8
21285#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21286#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21287	lsl	r12, r8, #16
21288	lsr	r12, r12, #24
21289#else
21290	uxtb	r12, r8, ror #8
21291#endif
21292#else
21293	ubfx	r12, r8, #8, #8
21294#endif
21295	eor	r5, r5, lr, ror #16
21296#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21297#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21298	lsl	lr, r11, #24
21299	lsr	lr, lr, #24
21300#else
21301	uxtb	lr, r11
21302#endif
21303#else
21304	ubfx	lr, r11, #0, #8
21305#endif
21306	ldr	r6, [r0, r6, lsl #2]
21307	ldr	r7, [r0, r7, lsl #2]
21308	ldr	r12, [r0, r12, lsl #2]
21309	ldr	lr, [r0, lr, lsl #2]
21310#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21311#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21312	lsl	r8, r8, #24
21313	lsr	r8, r8, #24
21314#else
21315	uxtb	r8, r8
21316#endif
21317#else
21318	ubfx	r8, r8, #0, #8
21319#endif
21320	eor	r6, r6, r7, ror #24
21321#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21322#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21323	lsl	r7, r10, #8
21324	lsr	r7, r7, #24
21325#else
21326	uxtb	r7, r10, ror #16
21327#endif
21328#else
21329	ubfx	r7, r10, #16, #8
21330#endif
21331	eor	r6, r6, r12, ror #8
21332	lsr	r12, r11, #24
21333	eor	r6, r6, lr, ror #16
21334#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21335#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21336	lsl	lr, r9, #16
21337	lsr	lr, lr, #24
21338#else
21339	uxtb	lr, r9, ror #8
21340#endif
21341#else
21342	ubfx	lr, r9, #8, #8
21343#endif
21344	ldr	r8, [r0, r8, lsl #2]
21345	ldr	r12, [r0, r12, lsl #2]
21346	ldr	r7, [r0, r7, lsl #2]
21347	ldr	lr, [r0, lr, lsl #2]
21348	eor	r12, r12, r8, ror #24
21349	ldm	r3!, {r8, r9, r10, r11}
21350	eor	r7, r7, lr, ror #8
21351	eor	r7, r7, r12, ror #24
21352	#   XOR in Key Schedule
21353	eor	r4, r4, r8
21354	eor	r5, r5, r9
21355	eor	r6, r6, r10
21356	eor	r7, r7, r11
21357	subs	r1, r1, #1
21358	bne	L_AES_CBC_decrypt_block_nr_192_even
21359#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21360#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21361	lsl	r8, r7, #8
21362	lsr	r8, r8, #24
21363#else
21364	uxtb	r8, r7, ror #16
21365#endif
21366#else
21367	ubfx	r8, r7, #16, #8
21368#endif
21369	lsr	r11, r4, #24
21370#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21371#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21372	lsl	r12, r6, #16
21373	lsr	r12, r12, #24
21374#else
21375	uxtb	r12, r6, ror #8
21376#endif
21377#else
21378	ubfx	r12, r6, #8, #8
21379#endif
21380#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21381#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21382	lsl	lr, r5, #24
21383	lsr	lr, lr, #24
21384#else
21385	uxtb	lr, r5
21386#endif
21387#else
21388	ubfx	lr, r5, #0, #8
21389#endif
21390	ldr	r8, [r0, r8, lsl #2]
21391	ldr	r11, [r0, r11, lsl #2]
21392	ldr	r12, [r0, r12, lsl #2]
21393	ldr	lr, [r0, lr, lsl #2]
21394#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21395#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21396	lsl	r9, r4, #8
21397	lsr	r9, r9, #24
21398#else
21399	uxtb	r9, r4, ror #16
21400#endif
21401#else
21402	ubfx	r9, r4, #16, #8
21403#endif
21404	eor	r8, r8, r11, ror #24
21405	lsr	r11, r5, #24
21406	eor	r8, r8, r12, ror #8
21407#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21408#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21409	lsl	r12, r7, #16
21410	lsr	r12, r12, #24
21411#else
21412	uxtb	r12, r7, ror #8
21413#endif
21414#else
21415	ubfx	r12, r7, #8, #8
21416#endif
21417	eor	r8, r8, lr, ror #16
21418#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21419#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21420	lsl	lr, r6, #24
21421	lsr	lr, lr, #24
21422#else
21423	uxtb	lr, r6
21424#endif
21425#else
21426	ubfx	lr, r6, #0, #8
21427#endif
21428	ldr	r9, [r0, r9, lsl #2]
21429	ldr	r11, [r0, r11, lsl #2]
21430	ldr	r12, [r0, r12, lsl #2]
21431	ldr	lr, [r0, lr, lsl #2]
21432#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21433#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21434	lsl	r10, r5, #8
21435	lsr	r10, r10, #24
21436#else
21437	uxtb	r10, r5, ror #16
21438#endif
21439#else
21440	ubfx	r10, r5, #16, #8
21441#endif
21442	eor	r9, r9, r11, ror #24
21443	lsr	r11, r6, #24
21444	eor	r9, r9, r12, ror #8
21445#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21446#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21447	lsl	r12, r4, #16
21448	lsr	r12, r12, #24
21449#else
21450	uxtb	r12, r4, ror #8
21451#endif
21452#else
21453	ubfx	r12, r4, #8, #8
21454#endif
21455	eor	r9, r9, lr, ror #16
21456#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21457#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21458	lsl	lr, r7, #24
21459	lsr	lr, lr, #24
21460#else
21461	uxtb	lr, r7
21462#endif
21463#else
21464	ubfx	lr, r7, #0, #8
21465#endif
21466	ldr	r10, [r0, r10, lsl #2]
21467	ldr	r11, [r0, r11, lsl #2]
21468	ldr	r12, [r0, r12, lsl #2]
21469	ldr	lr, [r0, lr, lsl #2]
21470#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21471#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21472	lsl	r4, r4, #24
21473	lsr	r4, r4, #24
21474#else
21475	uxtb	r4, r4
21476#endif
21477#else
21478	ubfx	r4, r4, #0, #8
21479#endif
21480	eor	r10, r10, r11, ror #24
21481#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21482#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21483	lsl	r11, r6, #8
21484	lsr	r11, r11, #24
21485#else
21486	uxtb	r11, r6, ror #16
21487#endif
21488#else
21489	ubfx	r11, r6, #16, #8
21490#endif
21491	eor	r10, r10, r12, ror #8
21492	lsr	r12, r7, #24
21493	eor	r10, r10, lr, ror #16
21494#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21495#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21496	lsl	lr, r5, #16
21497	lsr	lr, lr, #24
21498#else
21499	uxtb	lr, r5, ror #8
21500#endif
21501#else
21502	ubfx	lr, r5, #8, #8
21503#endif
21504	ldr	r4, [r0, r4, lsl #2]
21505	ldr	r12, [r0, r12, lsl #2]
21506	ldr	r11, [r0, r11, lsl #2]
21507	ldr	lr, [r0, lr, lsl #2]
21508	eor	r12, r12, r4, ror #24
21509	ldm	r3!, {r4, r5, r6, r7}
21510	eor	r11, r11, lr, ror #8
21511	eor	r11, r11, r12, ror #24
21512	#   XOR in Key Schedule
21513	eor	r8, r8, r4
21514	eor	r9, r9, r5
21515	eor	r10, r10, r6
21516	eor	r11, r11, r7
21517#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21518#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21519	lsl	r4, r9, #24
21520	lsr	r4, r4, #24
21521#else
21522	uxtb	r4, r9
21523#endif
21524#else
21525	ubfx	r4, r9, #0, #8
21526#endif
21527#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21528#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21529	lsl	r7, r10, #16
21530	lsr	r7, r7, #24
21531#else
21532	uxtb	r7, r10, ror #8
21533#endif
21534#else
21535	ubfx	r7, r10, #8, #8
21536#endif
21537#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21538#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21539	lsl	r12, r11, #8
21540	lsr	r12, r12, #24
21541#else
21542	uxtb	r12, r11, ror #16
21543#endif
21544#else
21545	ubfx	r12, r11, #16, #8
21546#endif
21547	lsr	lr, r8, #24
21548	ldrb	r4, [r2, r4]
21549	ldrb	r7, [r2, r7]
21550	ldrb	r12, [r2, r12]
21551	ldrb	lr, [r2, lr]
21552#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21553#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21554	lsl	r5, r10, #24
21555	lsr	r5, r5, #24
21556#else
21557	uxtb	r5, r10
21558#endif
21559#else
21560	ubfx	r5, r10, #0, #8
21561#endif
21562	eor	r4, r4, r7, lsl #8
21563#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21564#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21565	lsl	r7, r11, #16
21566	lsr	r7, r7, #24
21567#else
21568	uxtb	r7, r11, ror #8
21569#endif
21570#else
21571	ubfx	r7, r11, #8, #8
21572#endif
21573	eor	r4, r4, r12, lsl #16
21574#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21575#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21576	lsl	r12, r8, #8
21577	lsr	r12, r12, #24
21578#else
21579	uxtb	r12, r8, ror #16
21580#endif
21581#else
21582	ubfx	r12, r8, #16, #8
21583#endif
21584	eor	r4, r4, lr, lsl #24
21585	lsr	lr, r9, #24
21586	ldrb	r7, [r2, r7]
21587	ldrb	lr, [r2, lr]
21588	ldrb	r5, [r2, r5]
21589	ldrb	r12, [r2, r12]
21590#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21591#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21592	lsl	r6, r11, #24
21593	lsr	r6, r6, #24
21594#else
21595	uxtb	r6, r11
21596#endif
21597#else
21598	ubfx	r6, r11, #0, #8
21599#endif
21600	eor	r5, r5, r7, lsl #8
21601#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21602#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21603	lsl	r7, r8, #16
21604	lsr	r7, r7, #24
21605#else
21606	uxtb	r7, r8, ror #8
21607#endif
21608#else
21609	ubfx	r7, r8, #8, #8
21610#endif
21611	eor	r5, r5, r12, lsl #16
21612#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21613#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21614	lsl	r12, r9, #8
21615	lsr	r12, r12, #24
21616#else
21617	uxtb	r12, r9, ror #16
21618#endif
21619#else
21620	ubfx	r12, r9, #16, #8
21621#endif
21622	eor	r5, r5, lr, lsl #24
21623	lsr	lr, r10, #24
21624	ldrb	r7, [r2, r7]
21625	ldrb	lr, [r2, lr]
21626	ldrb	r6, [r2, r6]
21627	ldrb	r12, [r2, r12]
21628	lsr	r11, r11, #24
21629	eor	r6, r6, r7, lsl #8
21630#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21631#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21632	lsl	r7, r8, #24
21633	lsr	r7, r7, #24
21634#else
21635	uxtb	r7, r8
21636#endif
21637#else
21638	ubfx	r7, r8, #0, #8
21639#endif
21640	eor	r6, r6, r12, lsl #16
21641#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21642#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21643	lsl	r12, r9, #16
21644	lsr	r12, r12, #24
21645#else
21646	uxtb	r12, r9, ror #8
21647#endif
21648#else
21649	ubfx	r12, r9, #8, #8
21650#endif
21651	eor	r6, r6, lr, lsl #24
21652#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21653#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21654	lsl	lr, r10, #8
21655	lsr	lr, lr, #24
21656#else
21657	uxtb	lr, r10, ror #16
21658#endif
21659#else
21660	ubfx	lr, r10, #16, #8
21661#endif
21662	ldrb	r11, [r2, r11]
21663	ldrb	r12, [r2, r12]
21664	ldrb	r7, [r2, r7]
21665	ldrb	lr, [r2, lr]
21666	eor	r12, r12, r11, lsl #16
21667	ldm	r3, {r8, r9, r10, r11}
21668	eor	r7, r7, r12, lsl #8
21669	eor	r7, r7, lr, lsl #16
21670	#   XOR in Key Schedule
21671	eor	r4, r4, r8
21672	eor	r5, r5, r9
21673	eor	r6, r6, r10
21674	eor	r7, r7, r11
21675#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
21676	ldr	lr, [sp, #16]
21677#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21678	eor	r8, r4, r4, ror #16
21679	eor	r9, r5, r5, ror #16
21680	eor	r10, r6, r6, ror #16
21681	eor	r11, r7, r7, ror #16
21682	bic	r8, r8, #0xff0000
21683	bic	r9, r9, #0xff0000
21684	bic	r10, r10, #0xff0000
21685	bic	r11, r11, #0xff0000
21686	ror	r4, r4, #8
21687	ror	r5, r5, #8
21688	ror	r6, r6, #8
21689	ror	r7, r7, #8
21690	eor	r4, r4, r8, lsr #8
21691	eor	r5, r5, r9, lsr #8
21692	eor	r6, r6, r10, lsr #8
21693	eor	r7, r7, r11, lsr #8
21694#else
21695	rev	r4, r4
21696	rev	r5, r5
21697	rev	r6, r6
21698	rev	r7, r7
21699#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
21700#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21701	ldr	r8, [lr, #16]
21702	ldr	r9, [lr, #20]
21703#else
21704	ldrd	r8, r9, [lr, #16]
21705#endif
21706#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21707	ldr	r10, [lr, #24]
21708	ldr	r11, [lr, #28]
21709#else
21710	ldrd	r10, r11, [lr, #24]
21711#endif
21712	pop	{r1, r12, lr}
21713	ldr	r3, [sp]
21714	eor	r4, r4, r8
21715	eor	r5, r5, r9
21716	eor	r6, r6, r10
21717	eor	r7, r7, r11
21718	str	r4, [r1]
21719	str	r5, [r1, #4]
21720	str	r6, [r1, #8]
21721	str	r7, [r1, #12]
21722	subs	r12, r12, #16
21723	add	lr, lr, #16
21724	add	r1, r1, #16
21725	bne	L_AES_CBC_decrypt_loop_block_192
21726	b	L_AES_CBC_decrypt_end
21727L_AES_CBC_decrypt_loop_block_128:
21728	push	{r1, r12, lr}
21729	ldr	r4, [lr]
21730	ldr	r5, [lr, #4]
21731	ldr	r6, [lr, #8]
21732	ldr	r7, [lr, #12]
21733	ldr	lr, [sp, #16]
21734#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21735	str	r4, [lr, #16]
21736	str	r5, [lr, #20]
21737#else
21738	strd	r4, r5, [lr, #16]
21739#endif
21740#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21741	str	r6, [lr, #24]
21742	str	r7, [lr, #28]
21743#else
21744	strd	r6, r7, [lr, #24]
21745#endif
21746#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21747	eor	r8, r4, r4, ror #16
21748	eor	r9, r5, r5, ror #16
21749	eor	r10, r6, r6, ror #16
21750	eor	r11, r7, r7, ror #16
21751	bic	r8, r8, #0xff0000
21752	bic	r9, r9, #0xff0000
21753	bic	r10, r10, #0xff0000
21754	bic	r11, r11, #0xff0000
21755	ror	r4, r4, #8
21756	ror	r5, r5, #8
21757	ror	r6, r6, #8
21758	ror	r7, r7, #8
21759	eor	r4, r4, r8, lsr #8
21760	eor	r5, r5, r9, lsr #8
21761	eor	r6, r6, r10, lsr #8
21762	eor	r7, r7, r11, lsr #8
21763#else
21764	rev	r4, r4
21765	rev	r5, r5
21766	rev	r6, r6
21767	rev	r7, r7
21768#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
21769	ldm	r3!, {r8, r9, r10, r11}
21770	# Round: 0 - XOR in key schedule
21771	eor	r4, r4, r8
21772	eor	r5, r5, r9
21773	eor	r6, r6, r10
21774	eor	r7, r7, r11
21775	mov	r1, #4
21776#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
21777	bl	AES_decrypt_block
21778#else
21779L_AES_CBC_decrypt_block_nr_128_odd:
21780#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21781#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21782	lsl	r8, r7, #8
21783	lsr	r8, r8, #24
21784#else
21785	uxtb	r8, r7, ror #16
21786#endif
21787#else
21788	ubfx	r8, r7, #16, #8
21789#endif
21790	lsr	r11, r4, #24
21791#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21792#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21793	lsl	r12, r6, #16
21794	lsr	r12, r12, #24
21795#else
21796	uxtb	r12, r6, ror #8
21797#endif
21798#else
21799	ubfx	r12, r6, #8, #8
21800#endif
21801#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21802#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21803	lsl	lr, r5, #24
21804	lsr	lr, lr, #24
21805#else
21806	uxtb	lr, r5
21807#endif
21808#else
21809	ubfx	lr, r5, #0, #8
21810#endif
21811	ldr	r8, [r0, r8, lsl #2]
21812	ldr	r11, [r0, r11, lsl #2]
21813	ldr	r12, [r0, r12, lsl #2]
21814	ldr	lr, [r0, lr, lsl #2]
21815#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21816#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21817	lsl	r9, r4, #8
21818	lsr	r9, r9, #24
21819#else
21820	uxtb	r9, r4, ror #16
21821#endif
21822#else
21823	ubfx	r9, r4, #16, #8
21824#endif
21825	eor	r8, r8, r11, ror #24
21826	lsr	r11, r5, #24
21827	eor	r8, r8, r12, ror #8
21828#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21829#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21830	lsl	r12, r7, #16
21831	lsr	r12, r12, #24
21832#else
21833	uxtb	r12, r7, ror #8
21834#endif
21835#else
21836	ubfx	r12, r7, #8, #8
21837#endif
21838	eor	r8, r8, lr, ror #16
21839#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21840#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21841	lsl	lr, r6, #24
21842	lsr	lr, lr, #24
21843#else
21844	uxtb	lr, r6
21845#endif
21846#else
21847	ubfx	lr, r6, #0, #8
21848#endif
21849	ldr	r9, [r0, r9, lsl #2]
21850	ldr	r11, [r0, r11, lsl #2]
21851	ldr	r12, [r0, r12, lsl #2]
21852	ldr	lr, [r0, lr, lsl #2]
21853#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21854#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21855	lsl	r10, r5, #8
21856	lsr	r10, r10, #24
21857#else
21858	uxtb	r10, r5, ror #16
21859#endif
21860#else
21861	ubfx	r10, r5, #16, #8
21862#endif
21863	eor	r9, r9, r11, ror #24
21864	lsr	r11, r6, #24
21865	eor	r9, r9, r12, ror #8
21866#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21867#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21868	lsl	r12, r4, #16
21869	lsr	r12, r12, #24
21870#else
21871	uxtb	r12, r4, ror #8
21872#endif
21873#else
21874	ubfx	r12, r4, #8, #8
21875#endif
21876	eor	r9, r9, lr, ror #16
21877#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21878#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21879	lsl	lr, r7, #24
21880	lsr	lr, lr, #24
21881#else
21882	uxtb	lr, r7
21883#endif
21884#else
21885	ubfx	lr, r7, #0, #8
21886#endif
21887	ldr	r10, [r0, r10, lsl #2]
21888	ldr	r11, [r0, r11, lsl #2]
21889	ldr	r12, [r0, r12, lsl #2]
21890	ldr	lr, [r0, lr, lsl #2]
21891#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21892#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21893	lsl	r4, r4, #24
21894	lsr	r4, r4, #24
21895#else
21896	uxtb	r4, r4
21897#endif
21898#else
21899	ubfx	r4, r4, #0, #8
21900#endif
21901	eor	r10, r10, r11, ror #24
21902#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21903#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21904	lsl	r11, r6, #8
21905	lsr	r11, r11, #24
21906#else
21907	uxtb	r11, r6, ror #16
21908#endif
21909#else
21910	ubfx	r11, r6, #16, #8
21911#endif
21912	eor	r10, r10, r12, ror #8
21913	lsr	r12, r7, #24
21914	eor	r10, r10, lr, ror #16
21915#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21916#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21917	lsl	lr, r5, #16
21918	lsr	lr, lr, #24
21919#else
21920	uxtb	lr, r5, ror #8
21921#endif
21922#else
21923	ubfx	lr, r5, #8, #8
21924#endif
21925	ldr	r4, [r0, r4, lsl #2]
21926	ldr	r12, [r0, r12, lsl #2]
21927	ldr	r11, [r0, r11, lsl #2]
21928	ldr	lr, [r0, lr, lsl #2]
21929	eor	r12, r12, r4, ror #24
21930	ldm	r3!, {r4, r5, r6, r7}
21931	eor	r11, r11, lr, ror #8
21932	eor	r11, r11, r12, ror #24
21933	#   XOR in Key Schedule
21934	eor	r8, r8, r4
21935	eor	r9, r9, r5
21936	eor	r10, r10, r6
21937	eor	r11, r11, r7
21938#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21939#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21940	lsl	r4, r11, #8
21941	lsr	r4, r4, #24
21942#else
21943	uxtb	r4, r11, ror #16
21944#endif
21945#else
21946	ubfx	r4, r11, #16, #8
21947#endif
21948	lsr	r7, r8, #24
21949#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21950#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21951	lsl	r12, r10, #16
21952	lsr	r12, r12, #24
21953#else
21954	uxtb	r12, r10, ror #8
21955#endif
21956#else
21957	ubfx	r12, r10, #8, #8
21958#endif
21959#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21960#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21961	lsl	lr, r9, #24
21962	lsr	lr, lr, #24
21963#else
21964	uxtb	lr, r9
21965#endif
21966#else
21967	ubfx	lr, r9, #0, #8
21968#endif
21969	ldr	r4, [r0, r4, lsl #2]
21970	ldr	r7, [r0, r7, lsl #2]
21971	ldr	r12, [r0, r12, lsl #2]
21972	ldr	lr, [r0, lr, lsl #2]
21973#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21974#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21975	lsl	r5, r8, #8
21976	lsr	r5, r5, #24
21977#else
21978	uxtb	r5, r8, ror #16
21979#endif
21980#else
21981	ubfx	r5, r8, #16, #8
21982#endif
21983	eor	r4, r4, r7, ror #24
21984	lsr	r7, r9, #24
21985	eor	r4, r4, r12, ror #8
21986#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21987#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21988	lsl	r12, r11, #16
21989	lsr	r12, r12, #24
21990#else
21991	uxtb	r12, r11, ror #8
21992#endif
21993#else
21994	ubfx	r12, r11, #8, #8
21995#endif
21996	eor	r4, r4, lr, ror #16
21997#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
21998#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
21999	lsl	lr, r10, #24
22000	lsr	lr, lr, #24
22001#else
22002	uxtb	lr, r10
22003#endif
22004#else
22005	ubfx	lr, r10, #0, #8
22006#endif
22007	ldr	r5, [r0, r5, lsl #2]
22008	ldr	r7, [r0, r7, lsl #2]
22009	ldr	r12, [r0, r12, lsl #2]
22010	ldr	lr, [r0, lr, lsl #2]
22011#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22012#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22013	lsl	r6, r9, #8
22014	lsr	r6, r6, #24
22015#else
22016	uxtb	r6, r9, ror #16
22017#endif
22018#else
22019	ubfx	r6, r9, #16, #8
22020#endif
22021	eor	r5, r5, r7, ror #24
22022	lsr	r7, r10, #24
22023	eor	r5, r5, r12, ror #8
22024#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22025#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22026	lsl	r12, r8, #16
22027	lsr	r12, r12, #24
22028#else
22029	uxtb	r12, r8, ror #8
22030#endif
22031#else
22032	ubfx	r12, r8, #8, #8
22033#endif
22034	eor	r5, r5, lr, ror #16
22035#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22036#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22037	lsl	lr, r11, #24
22038	lsr	lr, lr, #24
22039#else
22040	uxtb	lr, r11
22041#endif
22042#else
22043	ubfx	lr, r11, #0, #8
22044#endif
22045	ldr	r6, [r0, r6, lsl #2]
22046	ldr	r7, [r0, r7, lsl #2]
22047	ldr	r12, [r0, r12, lsl #2]
22048	ldr	lr, [r0, lr, lsl #2]
22049#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22050#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22051	lsl	r8, r8, #24
22052	lsr	r8, r8, #24
22053#else
22054	uxtb	r8, r8
22055#endif
22056#else
22057	ubfx	r8, r8, #0, #8
22058#endif
22059	eor	r6, r6, r7, ror #24
22060#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22061#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22062	lsl	r7, r10, #8
22063	lsr	r7, r7, #24
22064#else
22065	uxtb	r7, r10, ror #16
22066#endif
22067#else
22068	ubfx	r7, r10, #16, #8
22069#endif
22070	eor	r6, r6, r12, ror #8
22071	lsr	r12, r11, #24
22072	eor	r6, r6, lr, ror #16
22073#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22074#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22075	lsl	lr, r9, #16
22076	lsr	lr, lr, #24
22077#else
22078	uxtb	lr, r9, ror #8
22079#endif
22080#else
22081	ubfx	lr, r9, #8, #8
22082#endif
22083	ldr	r8, [r0, r8, lsl #2]
22084	ldr	r12, [r0, r12, lsl #2]
22085	ldr	r7, [r0, r7, lsl #2]
22086	ldr	lr, [r0, lr, lsl #2]
22087	eor	r12, r12, r8, ror #24
22088	ldm	r3!, {r8, r9, r10, r11}
22089	eor	r7, r7, lr, ror #8
22090	eor	r7, r7, r12, ror #24
22091	#   XOR in Key Schedule
22092	eor	r4, r4, r8
22093	eor	r5, r5, r9
22094	eor	r6, r6, r10
22095	eor	r7, r7, r11
22096	subs	r1, r1, #1
22097	bne	L_AES_CBC_decrypt_block_nr_128_odd
22098#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22099#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22100	lsl	r8, r7, #8
22101	lsr	r8, r8, #24
22102#else
22103	uxtb	r8, r7, ror #16
22104#endif
22105#else
22106	ubfx	r8, r7, #16, #8
22107#endif
22108	lsr	r11, r4, #24
22109#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22110#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22111	lsl	r12, r6, #16
22112	lsr	r12, r12, #24
22113#else
22114	uxtb	r12, r6, ror #8
22115#endif
22116#else
22117	ubfx	r12, r6, #8, #8
22118#endif
22119#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22120#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22121	lsl	lr, r5, #24
22122	lsr	lr, lr, #24
22123#else
22124	uxtb	lr, r5
22125#endif
22126#else
22127	ubfx	lr, r5, #0, #8
22128#endif
22129	ldr	r8, [r0, r8, lsl #2]
22130	ldr	r11, [r0, r11, lsl #2]
22131	ldr	r12, [r0, r12, lsl #2]
22132	ldr	lr, [r0, lr, lsl #2]
22133#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22134#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22135	lsl	r9, r4, #8
22136	lsr	r9, r9, #24
22137#else
22138	uxtb	r9, r4, ror #16
22139#endif
22140#else
22141	ubfx	r9, r4, #16, #8
22142#endif
22143	eor	r8, r8, r11, ror #24
22144	lsr	r11, r5, #24
22145	eor	r8, r8, r12, ror #8
22146#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22147#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22148	lsl	r12, r7, #16
22149	lsr	r12, r12, #24
22150#else
22151	uxtb	r12, r7, ror #8
22152#endif
22153#else
22154	ubfx	r12, r7, #8, #8
22155#endif
22156	eor	r8, r8, lr, ror #16
22157#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22158#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22159	lsl	lr, r6, #24
22160	lsr	lr, lr, #24
22161#else
22162	uxtb	lr, r6
22163#endif
22164#else
22165	ubfx	lr, r6, #0, #8
22166#endif
22167	ldr	r9, [r0, r9, lsl #2]
22168	ldr	r11, [r0, r11, lsl #2]
22169	ldr	r12, [r0, r12, lsl #2]
22170	ldr	lr, [r0, lr, lsl #2]
22171#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22172#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22173	lsl	r10, r5, #8
22174	lsr	r10, r10, #24
22175#else
22176	uxtb	r10, r5, ror #16
22177#endif
22178#else
22179	ubfx	r10, r5, #16, #8
22180#endif
22181	eor	r9, r9, r11, ror #24
22182	lsr	r11, r6, #24
22183	eor	r9, r9, r12, ror #8
22184#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22185#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22186	lsl	r12, r4, #16
22187	lsr	r12, r12, #24
22188#else
22189	uxtb	r12, r4, ror #8
22190#endif
22191#else
22192	ubfx	r12, r4, #8, #8
22193#endif
22194	eor	r9, r9, lr, ror #16
22195#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22196#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22197	lsl	lr, r7, #24
22198	lsr	lr, lr, #24
22199#else
22200	uxtb	lr, r7
22201#endif
22202#else
22203	ubfx	lr, r7, #0, #8
22204#endif
22205	ldr	r10, [r0, r10, lsl #2]
22206	ldr	r11, [r0, r11, lsl #2]
22207	ldr	r12, [r0, r12, lsl #2]
22208	ldr	lr, [r0, lr, lsl #2]
22209#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22210#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22211	lsl	r4, r4, #24
22212	lsr	r4, r4, #24
22213#else
22214	uxtb	r4, r4
22215#endif
22216#else
22217	ubfx	r4, r4, #0, #8
22218#endif
22219	eor	r10, r10, r11, ror #24
22220#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22221#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22222	lsl	r11, r6, #8
22223	lsr	r11, r11, #24
22224#else
22225	uxtb	r11, r6, ror #16
22226#endif
22227#else
22228	ubfx	r11, r6, #16, #8
22229#endif
22230	eor	r10, r10, r12, ror #8
22231	lsr	r12, r7, #24
22232	eor	r10, r10, lr, ror #16
22233#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22234#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22235	lsl	lr, r5, #16
22236	lsr	lr, lr, #24
22237#else
22238	uxtb	lr, r5, ror #8
22239#endif
22240#else
22241	ubfx	lr, r5, #8, #8
22242#endif
22243	ldr	r4, [r0, r4, lsl #2]
22244	ldr	r12, [r0, r12, lsl #2]
22245	ldr	r11, [r0, r11, lsl #2]
22246	ldr	lr, [r0, lr, lsl #2]
22247	eor	r12, r12, r4, ror #24
22248	ldm	r3!, {r4, r5, r6, r7}
22249	eor	r11, r11, lr, ror #8
22250	eor	r11, r11, r12, ror #24
22251	#   XOR in Key Schedule
22252	eor	r8, r8, r4
22253	eor	r9, r9, r5
22254	eor	r10, r10, r6
22255	eor	r11, r11, r7
22256#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22257#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22258	lsl	r4, r9, #24
22259	lsr	r4, r4, #24
22260#else
22261	uxtb	r4, r9
22262#endif
22263#else
22264	ubfx	r4, r9, #0, #8
22265#endif
22266#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22267#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22268	lsl	r7, r10, #16
22269	lsr	r7, r7, #24
22270#else
22271	uxtb	r7, r10, ror #8
22272#endif
22273#else
22274	ubfx	r7, r10, #8, #8
22275#endif
22276#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22277#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22278	lsl	r12, r11, #8
22279	lsr	r12, r12, #24
22280#else
22281	uxtb	r12, r11, ror #16
22282#endif
22283#else
22284	ubfx	r12, r11, #16, #8
22285#endif
22286	lsr	lr, r8, #24
22287	ldrb	r4, [r2, r4]
22288	ldrb	r7, [r2, r7]
22289	ldrb	r12, [r2, r12]
22290	ldrb	lr, [r2, lr]
22291#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22292#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22293	lsl	r5, r10, #24
22294	lsr	r5, r5, #24
22295#else
22296	uxtb	r5, r10
22297#endif
22298#else
22299	ubfx	r5, r10, #0, #8
22300#endif
22301	eor	r4, r4, r7, lsl #8
22302#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22303#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22304	lsl	r7, r11, #16
22305	lsr	r7, r7, #24
22306#else
22307	uxtb	r7, r11, ror #8
22308#endif
22309#else
22310	ubfx	r7, r11, #8, #8
22311#endif
22312	eor	r4, r4, r12, lsl #16
22313#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22314#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22315	lsl	r12, r8, #8
22316	lsr	r12, r12, #24
22317#else
22318	uxtb	r12, r8, ror #16
22319#endif
22320#else
22321	ubfx	r12, r8, #16, #8
22322#endif
22323	eor	r4, r4, lr, lsl #24
22324	lsr	lr, r9, #24
22325	ldrb	r7, [r2, r7]
22326	ldrb	lr, [r2, lr]
22327	ldrb	r5, [r2, r5]
22328	ldrb	r12, [r2, r12]
22329#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22330#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22331	lsl	r6, r11, #24
22332	lsr	r6, r6, #24
22333#else
22334	uxtb	r6, r11
22335#endif
22336#else
22337	ubfx	r6, r11, #0, #8
22338#endif
22339	eor	r5, r5, r7, lsl #8
22340#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22341#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22342	lsl	r7, r8, #16
22343	lsr	r7, r7, #24
22344#else
22345	uxtb	r7, r8, ror #8
22346#endif
22347#else
22348	ubfx	r7, r8, #8, #8
22349#endif
22350	eor	r5, r5, r12, lsl #16
22351#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22352#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22353	lsl	r12, r9, #8
22354	lsr	r12, r12, #24
22355#else
22356	uxtb	r12, r9, ror #16
22357#endif
22358#else
22359	ubfx	r12, r9, #16, #8
22360#endif
22361	eor	r5, r5, lr, lsl #24
22362	lsr	lr, r10, #24
22363	ldrb	r7, [r2, r7]
22364	ldrb	lr, [r2, lr]
22365	ldrb	r6, [r2, r6]
22366	ldrb	r12, [r2, r12]
22367	lsr	r11, r11, #24
22368	eor	r6, r6, r7, lsl #8
22369#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22370#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22371	lsl	r7, r8, #24
22372	lsr	r7, r7, #24
22373#else
22374	uxtb	r7, r8
22375#endif
22376#else
22377	ubfx	r7, r8, #0, #8
22378#endif
22379	eor	r6, r6, r12, lsl #16
22380#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22381#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22382	lsl	r12, r9, #16
22383	lsr	r12, r12, #24
22384#else
22385	uxtb	r12, r9, ror #8
22386#endif
22387#else
22388	ubfx	r12, r9, #8, #8
22389#endif
22390	eor	r6, r6, lr, lsl #24
22391#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22392#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22393	lsl	lr, r10, #8
22394	lsr	lr, lr, #24
22395#else
22396	uxtb	lr, r10, ror #16
22397#endif
22398#else
22399	ubfx	lr, r10, #16, #8
22400#endif
22401	ldrb	r11, [r2, r11]
22402	ldrb	r12, [r2, r12]
22403	ldrb	r7, [r2, r7]
22404	ldrb	lr, [r2, lr]
22405	eor	r12, r12, r11, lsl #16
22406	ldm	r3, {r8, r9, r10, r11}
22407	eor	r7, r7, r12, lsl #8
22408	eor	r7, r7, lr, lsl #16
22409	#   XOR in Key Schedule
22410	eor	r4, r4, r8
22411	eor	r5, r5, r9
22412	eor	r6, r6, r10
22413	eor	r7, r7, r11
22414#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
22415	ldr	lr, [sp, #16]
22416#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22417	eor	r8, r4, r4, ror #16
22418	eor	r9, r5, r5, ror #16
22419	eor	r10, r6, r6, ror #16
22420	eor	r11, r7, r7, ror #16
22421	bic	r8, r8, #0xff0000
22422	bic	r9, r9, #0xff0000
22423	bic	r10, r10, #0xff0000
22424	bic	r11, r11, #0xff0000
22425	ror	r4, r4, #8
22426	ror	r5, r5, #8
22427	ror	r6, r6, #8
22428	ror	r7, r7, #8
22429	eor	r4, r4, r8, lsr #8
22430	eor	r5, r5, r9, lsr #8
22431	eor	r6, r6, r10, lsr #8
22432	eor	r7, r7, r11, lsr #8
22433#else
22434	rev	r4, r4
22435	rev	r5, r5
22436	rev	r6, r6
22437	rev	r7, r7
22438#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
22439	ldm	lr, {r8, r9, r10, r11}
22440	pop	{r1, r12, lr}
22441	ldr	r3, [sp]
22442	eor	r4, r4, r8
22443	eor	r5, r5, r9
22444	eor	r6, r6, r10
22445	eor	r7, r7, r11
22446	str	r4, [r1]
22447	str	r5, [r1, #4]
22448	str	r6, [r1, #8]
22449	str	r7, [r1, #12]
22450	subs	r12, r12, #16
22451	add	lr, lr, #16
22452	add	r1, r1, #16
22453	beq	L_AES_CBC_decrypt_end_odd
22454	push	{r1, r12, lr}
22455	ldr	r4, [lr]
22456	ldr	r5, [lr, #4]
22457	ldr	r6, [lr, #8]
22458	ldr	r7, [lr, #12]
22459	ldr	lr, [sp, #16]
22460#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22461	stm	lr, {r4, r5}
22462#else
22463	strd	r4, r5, [lr]
22464#endif
22465#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22466	str	r6, [lr, #8]
22467	str	r7, [lr, #12]
22468#else
22469	strd	r6, r7, [lr, #8]
22470#endif
22471#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22472	eor	r8, r4, r4, ror #16
22473	eor	r9, r5, r5, ror #16
22474	eor	r10, r6, r6, ror #16
22475	eor	r11, r7, r7, ror #16
22476	bic	r8, r8, #0xff0000
22477	bic	r9, r9, #0xff0000
22478	bic	r10, r10, #0xff0000
22479	bic	r11, r11, #0xff0000
22480	ror	r4, r4, #8
22481	ror	r5, r5, #8
22482	ror	r6, r6, #8
22483	ror	r7, r7, #8
22484	eor	r4, r4, r8, lsr #8
22485	eor	r5, r5, r9, lsr #8
22486	eor	r6, r6, r10, lsr #8
22487	eor	r7, r7, r11, lsr #8
22488#else
22489	rev	r4, r4
22490	rev	r5, r5
22491	rev	r6, r6
22492	rev	r7, r7
22493#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
22494	ldm	r3!, {r8, r9, r10, r11}
22495	# Round: 0 - XOR in key schedule
22496	eor	r4, r4, r8
22497	eor	r5, r5, r9
22498	eor	r6, r6, r10
22499	eor	r7, r7, r11
22500	mov	r1, #4
22501#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
22502	bl	AES_decrypt_block
22503#else
22504L_AES_CBC_decrypt_block_nr_128_even:
22505#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22506#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22507	lsl	r8, r7, #8
22508	lsr	r8, r8, #24
22509#else
22510	uxtb	r8, r7, ror #16
22511#endif
22512#else
22513	ubfx	r8, r7, #16, #8
22514#endif
22515	lsr	r11, r4, #24
22516#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22517#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22518	lsl	r12, r6, #16
22519	lsr	r12, r12, #24
22520#else
22521	uxtb	r12, r6, ror #8
22522#endif
22523#else
22524	ubfx	r12, r6, #8, #8
22525#endif
22526#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22527#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22528	lsl	lr, r5, #24
22529	lsr	lr, lr, #24
22530#else
22531	uxtb	lr, r5
22532#endif
22533#else
22534	ubfx	lr, r5, #0, #8
22535#endif
22536	ldr	r8, [r0, r8, lsl #2]
22537	ldr	r11, [r0, r11, lsl #2]
22538	ldr	r12, [r0, r12, lsl #2]
22539	ldr	lr, [r0, lr, lsl #2]
22540#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22541#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22542	lsl	r9, r4, #8
22543	lsr	r9, r9, #24
22544#else
22545	uxtb	r9, r4, ror #16
22546#endif
22547#else
22548	ubfx	r9, r4, #16, #8
22549#endif
22550	eor	r8, r8, r11, ror #24
22551	lsr	r11, r5, #24
22552	eor	r8, r8, r12, ror #8
22553#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22554#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22555	lsl	r12, r7, #16
22556	lsr	r12, r12, #24
22557#else
22558	uxtb	r12, r7, ror #8
22559#endif
22560#else
22561	ubfx	r12, r7, #8, #8
22562#endif
22563	eor	r8, r8, lr, ror #16
22564#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22565#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22566	lsl	lr, r6, #24
22567	lsr	lr, lr, #24
22568#else
22569	uxtb	lr, r6
22570#endif
22571#else
22572	ubfx	lr, r6, #0, #8
22573#endif
22574	ldr	r9, [r0, r9, lsl #2]
22575	ldr	r11, [r0, r11, lsl #2]
22576	ldr	r12, [r0, r12, lsl #2]
22577	ldr	lr, [r0, lr, lsl #2]
22578#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22579#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22580	lsl	r10, r5, #8
22581	lsr	r10, r10, #24
22582#else
22583	uxtb	r10, r5, ror #16
22584#endif
22585#else
22586	ubfx	r10, r5, #16, #8
22587#endif
22588	eor	r9, r9, r11, ror #24
22589	lsr	r11, r6, #24
22590	eor	r9, r9, r12, ror #8
22591#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22592#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22593	lsl	r12, r4, #16
22594	lsr	r12, r12, #24
22595#else
22596	uxtb	r12, r4, ror #8
22597#endif
22598#else
22599	ubfx	r12, r4, #8, #8
22600#endif
22601	eor	r9, r9, lr, ror #16
22602#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22603#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22604	lsl	lr, r7, #24
22605	lsr	lr, lr, #24
22606#else
22607	uxtb	lr, r7
22608#endif
22609#else
22610	ubfx	lr, r7, #0, #8
22611#endif
22612	ldr	r10, [r0, r10, lsl #2]
22613	ldr	r11, [r0, r11, lsl #2]
22614	ldr	r12, [r0, r12, lsl #2]
22615	ldr	lr, [r0, lr, lsl #2]
22616#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22617#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22618	lsl	r4, r4, #24
22619	lsr	r4, r4, #24
22620#else
22621	uxtb	r4, r4
22622#endif
22623#else
22624	ubfx	r4, r4, #0, #8
22625#endif
22626	eor	r10, r10, r11, ror #24
22627#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22628#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22629	lsl	r11, r6, #8
22630	lsr	r11, r11, #24
22631#else
22632	uxtb	r11, r6, ror #16
22633#endif
22634#else
22635	ubfx	r11, r6, #16, #8
22636#endif
22637	eor	r10, r10, r12, ror #8
22638	lsr	r12, r7, #24
22639	eor	r10, r10, lr, ror #16
22640#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22641#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22642	lsl	lr, r5, #16
22643	lsr	lr, lr, #24
22644#else
22645	uxtb	lr, r5, ror #8
22646#endif
22647#else
22648	ubfx	lr, r5, #8, #8
22649#endif
22650	ldr	r4, [r0, r4, lsl #2]
22651	ldr	r12, [r0, r12, lsl #2]
22652	ldr	r11, [r0, r11, lsl #2]
22653	ldr	lr, [r0, lr, lsl #2]
22654	eor	r12, r12, r4, ror #24
22655	ldm	r3!, {r4, r5, r6, r7}
22656	eor	r11, r11, lr, ror #8
22657	eor	r11, r11, r12, ror #24
22658	#   XOR in Key Schedule
22659	eor	r8, r8, r4
22660	eor	r9, r9, r5
22661	eor	r10, r10, r6
22662	eor	r11, r11, r7
22663#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22664#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22665	lsl	r4, r11, #8
22666	lsr	r4, r4, #24
22667#else
22668	uxtb	r4, r11, ror #16
22669#endif
22670#else
22671	ubfx	r4, r11, #16, #8
22672#endif
22673	lsr	r7, r8, #24
22674#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22675#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22676	lsl	r12, r10, #16
22677	lsr	r12, r12, #24
22678#else
22679	uxtb	r12, r10, ror #8
22680#endif
22681#else
22682	ubfx	r12, r10, #8, #8
22683#endif
22684#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22685#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22686	lsl	lr, r9, #24
22687	lsr	lr, lr, #24
22688#else
22689	uxtb	lr, r9
22690#endif
22691#else
22692	ubfx	lr, r9, #0, #8
22693#endif
22694	ldr	r4, [r0, r4, lsl #2]
22695	ldr	r7, [r0, r7, lsl #2]
22696	ldr	r12, [r0, r12, lsl #2]
22697	ldr	lr, [r0, lr, lsl #2]
22698#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22699#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22700	lsl	r5, r8, #8
22701	lsr	r5, r5, #24
22702#else
22703	uxtb	r5, r8, ror #16
22704#endif
22705#else
22706	ubfx	r5, r8, #16, #8
22707#endif
22708	eor	r4, r4, r7, ror #24
22709	lsr	r7, r9, #24
22710	eor	r4, r4, r12, ror #8
22711#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22712#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22713	lsl	r12, r11, #16
22714	lsr	r12, r12, #24
22715#else
22716	uxtb	r12, r11, ror #8
22717#endif
22718#else
22719	ubfx	r12, r11, #8, #8
22720#endif
22721	eor	r4, r4, lr, ror #16
22722#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22723#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22724	lsl	lr, r10, #24
22725	lsr	lr, lr, #24
22726#else
22727	uxtb	lr, r10
22728#endif
22729#else
22730	ubfx	lr, r10, #0, #8
22731#endif
22732	ldr	r5, [r0, r5, lsl #2]
22733	ldr	r7, [r0, r7, lsl #2]
22734	ldr	r12, [r0, r12, lsl #2]
22735	ldr	lr, [r0, lr, lsl #2]
22736#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22737#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22738	lsl	r6, r9, #8
22739	lsr	r6, r6, #24
22740#else
22741	uxtb	r6, r9, ror #16
22742#endif
22743#else
22744	ubfx	r6, r9, #16, #8
22745#endif
22746	eor	r5, r5, r7, ror #24
22747	lsr	r7, r10, #24
22748	eor	r5, r5, r12, ror #8
22749#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22750#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22751	lsl	r12, r8, #16
22752	lsr	r12, r12, #24
22753#else
22754	uxtb	r12, r8, ror #8
22755#endif
22756#else
22757	ubfx	r12, r8, #8, #8
22758#endif
22759	eor	r5, r5, lr, ror #16
22760#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22761#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22762	lsl	lr, r11, #24
22763	lsr	lr, lr, #24
22764#else
22765	uxtb	lr, r11
22766#endif
22767#else
22768	ubfx	lr, r11, #0, #8
22769#endif
22770	ldr	r6, [r0, r6, lsl #2]
22771	ldr	r7, [r0, r7, lsl #2]
22772	ldr	r12, [r0, r12, lsl #2]
22773	ldr	lr, [r0, lr, lsl #2]
22774#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22775#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22776	lsl	r8, r8, #24
22777	lsr	r8, r8, #24
22778#else
22779	uxtb	r8, r8
22780#endif
22781#else
22782	ubfx	r8, r8, #0, #8
22783#endif
22784	eor	r6, r6, r7, ror #24
22785#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22786#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22787	lsl	r7, r10, #8
22788	lsr	r7, r7, #24
22789#else
22790	uxtb	r7, r10, ror #16
22791#endif
22792#else
22793	ubfx	r7, r10, #16, #8
22794#endif
22795	eor	r6, r6, r12, ror #8
22796	lsr	r12, r11, #24
22797	eor	r6, r6, lr, ror #16
22798#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22799#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22800	lsl	lr, r9, #16
22801	lsr	lr, lr, #24
22802#else
22803	uxtb	lr, r9, ror #8
22804#endif
22805#else
22806	ubfx	lr, r9, #8, #8
22807#endif
22808	ldr	r8, [r0, r8, lsl #2]
22809	ldr	r12, [r0, r12, lsl #2]
22810	ldr	r7, [r0, r7, lsl #2]
22811	ldr	lr, [r0, lr, lsl #2]
22812	eor	r12, r12, r8, ror #24
22813	ldm	r3!, {r8, r9, r10, r11}
22814	eor	r7, r7, lr, ror #8
22815	eor	r7, r7, r12, ror #24
22816	#   XOR in Key Schedule
22817	eor	r4, r4, r8
22818	eor	r5, r5, r9
22819	eor	r6, r6, r10
22820	eor	r7, r7, r11
22821	subs	r1, r1, #1
22822	bne	L_AES_CBC_decrypt_block_nr_128_even
22823#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22824#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22825	lsl	r8, r7, #8
22826	lsr	r8, r8, #24
22827#else
22828	uxtb	r8, r7, ror #16
22829#endif
22830#else
22831	ubfx	r8, r7, #16, #8
22832#endif
22833	lsr	r11, r4, #24
22834#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22835#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22836	lsl	r12, r6, #16
22837	lsr	r12, r12, #24
22838#else
22839	uxtb	r12, r6, ror #8
22840#endif
22841#else
22842	ubfx	r12, r6, #8, #8
22843#endif
22844#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22845#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22846	lsl	lr, r5, #24
22847	lsr	lr, lr, #24
22848#else
22849	uxtb	lr, r5
22850#endif
22851#else
22852	ubfx	lr, r5, #0, #8
22853#endif
22854	ldr	r8, [r0, r8, lsl #2]
22855	ldr	r11, [r0, r11, lsl #2]
22856	ldr	r12, [r0, r12, lsl #2]
22857	ldr	lr, [r0, lr, lsl #2]
22858#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22859#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22860	lsl	r9, r4, #8
22861	lsr	r9, r9, #24
22862#else
22863	uxtb	r9, r4, ror #16
22864#endif
22865#else
22866	ubfx	r9, r4, #16, #8
22867#endif
22868	eor	r8, r8, r11, ror #24
22869	lsr	r11, r5, #24
22870	eor	r8, r8, r12, ror #8
22871#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22872#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22873	lsl	r12, r7, #16
22874	lsr	r12, r12, #24
22875#else
22876	uxtb	r12, r7, ror #8
22877#endif
22878#else
22879	ubfx	r12, r7, #8, #8
22880#endif
22881	eor	r8, r8, lr, ror #16
22882#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22883#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22884	lsl	lr, r6, #24
22885	lsr	lr, lr, #24
22886#else
22887	uxtb	lr, r6
22888#endif
22889#else
22890	ubfx	lr, r6, #0, #8
22891#endif
22892	ldr	r9, [r0, r9, lsl #2]
22893	ldr	r11, [r0, r11, lsl #2]
22894	ldr	r12, [r0, r12, lsl #2]
22895	ldr	lr, [r0, lr, lsl #2]
22896#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22897#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22898	lsl	r10, r5, #8
22899	lsr	r10, r10, #24
22900#else
22901	uxtb	r10, r5, ror #16
22902#endif
22903#else
22904	ubfx	r10, r5, #16, #8
22905#endif
22906	eor	r9, r9, r11, ror #24
22907	lsr	r11, r6, #24
22908	eor	r9, r9, r12, ror #8
22909#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22910#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22911	lsl	r12, r4, #16
22912	lsr	r12, r12, #24
22913#else
22914	uxtb	r12, r4, ror #8
22915#endif
22916#else
22917	ubfx	r12, r4, #8, #8
22918#endif
22919	eor	r9, r9, lr, ror #16
22920#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22921#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22922	lsl	lr, r7, #24
22923	lsr	lr, lr, #24
22924#else
22925	uxtb	lr, r7
22926#endif
22927#else
22928	ubfx	lr, r7, #0, #8
22929#endif
22930	ldr	r10, [r0, r10, lsl #2]
22931	ldr	r11, [r0, r11, lsl #2]
22932	ldr	r12, [r0, r12, lsl #2]
22933	ldr	lr, [r0, lr, lsl #2]
22934#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22935#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22936	lsl	r4, r4, #24
22937	lsr	r4, r4, #24
22938#else
22939	uxtb	r4, r4
22940#endif
22941#else
22942	ubfx	r4, r4, #0, #8
22943#endif
22944	eor	r10, r10, r11, ror #24
22945#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22946#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22947	lsl	r11, r6, #8
22948	lsr	r11, r11, #24
22949#else
22950	uxtb	r11, r6, ror #16
22951#endif
22952#else
22953	ubfx	r11, r6, #16, #8
22954#endif
22955	eor	r10, r10, r12, ror #8
22956	lsr	r12, r7, #24
22957	eor	r10, r10, lr, ror #16
22958#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22959#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22960	lsl	lr, r5, #16
22961	lsr	lr, lr, #24
22962#else
22963	uxtb	lr, r5, ror #8
22964#endif
22965#else
22966	ubfx	lr, r5, #8, #8
22967#endif
22968	ldr	r4, [r0, r4, lsl #2]
22969	ldr	r12, [r0, r12, lsl #2]
22970	ldr	r11, [r0, r11, lsl #2]
22971	ldr	lr, [r0, lr, lsl #2]
22972	eor	r12, r12, r4, ror #24
22973	ldm	r3!, {r4, r5, r6, r7}
22974	eor	r11, r11, lr, ror #8
22975	eor	r11, r11, r12, ror #24
22976	#   XOR in Key Schedule
22977	eor	r8, r8, r4
22978	eor	r9, r9, r5
22979	eor	r10, r10, r6
22980	eor	r11, r11, r7
22981#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22982#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22983	lsl	r4, r9, #24
22984	lsr	r4, r4, #24
22985#else
22986	uxtb	r4, r9
22987#endif
22988#else
22989	ubfx	r4, r9, #0, #8
22990#endif
22991#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
22992#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
22993	lsl	r7, r10, #16
22994	lsr	r7, r7, #24
22995#else
22996	uxtb	r7, r10, ror #8
22997#endif
22998#else
22999	ubfx	r7, r10, #8, #8
23000#endif
23001#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23002#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23003	lsl	r12, r11, #8
23004	lsr	r12, r12, #24
23005#else
23006	uxtb	r12, r11, ror #16
23007#endif
23008#else
23009	ubfx	r12, r11, #16, #8
23010#endif
23011	lsr	lr, r8, #24
23012	ldrb	r4, [r2, r4]
23013	ldrb	r7, [r2, r7]
23014	ldrb	r12, [r2, r12]
23015	ldrb	lr, [r2, lr]
23016#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23017#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23018	lsl	r5, r10, #24
23019	lsr	r5, r5, #24
23020#else
23021	uxtb	r5, r10
23022#endif
23023#else
23024	ubfx	r5, r10, #0, #8
23025#endif
23026	eor	r4, r4, r7, lsl #8
23027#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23028#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23029	lsl	r7, r11, #16
23030	lsr	r7, r7, #24
23031#else
23032	uxtb	r7, r11, ror #8
23033#endif
23034#else
23035	ubfx	r7, r11, #8, #8
23036#endif
23037	eor	r4, r4, r12, lsl #16
23038#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23039#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23040	lsl	r12, r8, #8
23041	lsr	r12, r12, #24
23042#else
23043	uxtb	r12, r8, ror #16
23044#endif
23045#else
23046	ubfx	r12, r8, #16, #8
23047#endif
23048	eor	r4, r4, lr, lsl #24
23049	lsr	lr, r9, #24
23050	ldrb	r7, [r2, r7]
23051	ldrb	lr, [r2, lr]
23052	ldrb	r5, [r2, r5]
23053	ldrb	r12, [r2, r12]
23054#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23055#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23056	lsl	r6, r11, #24
23057	lsr	r6, r6, #24
23058#else
23059	uxtb	r6, r11
23060#endif
23061#else
23062	ubfx	r6, r11, #0, #8
23063#endif
23064	eor	r5, r5, r7, lsl #8
23065#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23066#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23067	lsl	r7, r8, #16
23068	lsr	r7, r7, #24
23069#else
23070	uxtb	r7, r8, ror #8
23071#endif
23072#else
23073	ubfx	r7, r8, #8, #8
23074#endif
23075	eor	r5, r5, r12, lsl #16
23076#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23077#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23078	lsl	r12, r9, #8
23079	lsr	r12, r12, #24
23080#else
23081	uxtb	r12, r9, ror #16
23082#endif
23083#else
23084	ubfx	r12, r9, #16, #8
23085#endif
23086	eor	r5, r5, lr, lsl #24
23087	lsr	lr, r10, #24
23088	ldrb	r7, [r2, r7]
23089	ldrb	lr, [r2, lr]
23090	ldrb	r6, [r2, r6]
23091	ldrb	r12, [r2, r12]
23092	lsr	r11, r11, #24
23093	eor	r6, r6, r7, lsl #8
23094#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23095#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23096	lsl	r7, r8, #24
23097	lsr	r7, r7, #24
23098#else
23099	uxtb	r7, r8
23100#endif
23101#else
23102	ubfx	r7, r8, #0, #8
23103#endif
23104	eor	r6, r6, r12, lsl #16
23105#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23106#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23107	lsl	r12, r9, #16
23108	lsr	r12, r12, #24
23109#else
23110	uxtb	r12, r9, ror #8
23111#endif
23112#else
23113	ubfx	r12, r9, #8, #8
23114#endif
23115	eor	r6, r6, lr, lsl #24
23116#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23117#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23118	lsl	lr, r10, #8
23119	lsr	lr, lr, #24
23120#else
23121	uxtb	lr, r10, ror #16
23122#endif
23123#else
23124	ubfx	lr, r10, #16, #8
23125#endif
23126	ldrb	r11, [r2, r11]
23127	ldrb	r12, [r2, r12]
23128	ldrb	r7, [r2, r7]
23129	ldrb	lr, [r2, lr]
23130	eor	r12, r12, r11, lsl #16
23131	ldm	r3, {r8, r9, r10, r11}
23132	eor	r7, r7, r12, lsl #8
23133	eor	r7, r7, lr, lsl #16
23134	#   XOR in Key Schedule
23135	eor	r4, r4, r8
23136	eor	r5, r5, r9
23137	eor	r6, r6, r10
23138	eor	r7, r7, r11
23139#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
23140	ldr	lr, [sp, #16]
23141#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23142	eor	r8, r4, r4, ror #16
23143	eor	r9, r5, r5, ror #16
23144	eor	r10, r6, r6, ror #16
23145	eor	r11, r7, r7, ror #16
23146	bic	r8, r8, #0xff0000
23147	bic	r9, r9, #0xff0000
23148	bic	r10, r10, #0xff0000
23149	bic	r11, r11, #0xff0000
23150	ror	r4, r4, #8
23151	ror	r5, r5, #8
23152	ror	r6, r6, #8
23153	ror	r7, r7, #8
23154	eor	r4, r4, r8, lsr #8
23155	eor	r5, r5, r9, lsr #8
23156	eor	r6, r6, r10, lsr #8
23157	eor	r7, r7, r11, lsr #8
23158#else
23159	rev	r4, r4
23160	rev	r5, r5
23161	rev	r6, r6
23162	rev	r7, r7
23163#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
23164#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23165	ldr	r8, [lr, #16]
23166	ldr	r9, [lr, #20]
23167#else
23168	ldrd	r8, r9, [lr, #16]
23169#endif
23170#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23171	ldr	r10, [lr, #24]
23172	ldr	r11, [lr, #28]
23173#else
23174	ldrd	r10, r11, [lr, #24]
23175#endif
23176	pop	{r1, r12, lr}
23177	ldr	r3, [sp]
23178	eor	r4, r4, r8
23179	eor	r5, r5, r9
23180	eor	r6, r6, r10
23181	eor	r7, r7, r11
23182	str	r4, [r1]
23183	str	r5, [r1, #4]
23184	str	r6, [r1, #8]
23185	str	r7, [r1, #12]
23186	subs	r12, r12, #16
23187	add	lr, lr, #16
23188	add	r1, r1, #16
23189	bne	L_AES_CBC_decrypt_loop_block_128
23190	b	L_AES_CBC_decrypt_end
23191L_AES_CBC_decrypt_end_odd:
23192	ldr	r4, [sp, #4]
23193#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23194	ldr	r8, [r4, #16]
23195	ldr	r9, [r4, #20]
23196#else
23197	ldrd	r8, r9, [r4, #16]
23198#endif
23199#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23200	ldr	r10, [r4, #24]
23201	ldr	r11, [r4, #28]
23202#else
23203	ldrd	r10, r11, [r4, #24]
23204#endif
23205#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23206	stm	r4, {r8, r9}
23207#else
23208	strd	r8, r9, [r4]
23209#endif
23210#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23211	str	r10, [r4, #8]
23212	str	r11, [r4, #12]
23213#else
23214	strd	r10, r11, [r4, #8]
23215#endif
23216L_AES_CBC_decrypt_end:
23217	pop	{r3-r4}
23218	pop	{r4, r5, r6, r7, r8, r9, r10, r11, pc}
23219	.size	AES_CBC_decrypt,.-AES_CBC_decrypt
23220#endif /* HAVE_AES_CBC */
23221#endif /* WOLFSSL_AES_DIRECT || WOLFSSL_AES_COUNTER || HAVE_AES_CBC
23222        * HAVE_AES_ECB */
23223#endif /* HAVE_AES_DECRYPT */
23224#ifdef HAVE_AESGCM
23225#ifndef __APPLE__
23226	.text
23227	.type	L_GCM_gmult_len_r, %object
23228	.size	L_GCM_gmult_len_r, 64
23229#else
23230	.section	__DATA,__data
23231#endif /* __APPLE__ */
23232	# 8-byte aligned, 64-bit aligned
23233#ifndef __APPLE__
23234	.align	3
23235#else
23236	.p2align	3
23237#endif /* __APPLE__ */
23238L_GCM_gmult_len_r:
23239	.long	0x00000000,0x1c200000,0x38400000,0x24600000
23240	.long	0x70800000,0x6ca00000,0x48c00000,0x54e00000
23241	.long	0xe1000000,0xfd200000,0xd9400000,0xc5600000
23242	.long	0x91800000,0x8da00000,0xa9c00000,0xb5e00000
23243	.text
23244	.align	4
23245	.globl	GCM_gmult_len
23246	.type	GCM_gmult_len, %function
23247GCM_gmult_len:
23248	push	{r4, r5, r6, r7, r8, r9, r10, r11, lr}
23249	adr	lr, L_GCM_gmult_len_r
23250L_GCM_gmult_len_start_block:
23251	push	{r3}
23252	ldr	r12, [r0, #12]
23253	ldr	r3, [r2, #12]
23254	eor	r12, r12, r3
23255	lsr	r3, r12, #24
23256	and	r3, r3, #15
23257	add	r3, r1, r3, lsl #4
23258	ldm	r3, {r8, r9, r10, r11}
23259	lsr	r6, r10, #4
23260	and	r3, r11, #15
23261	lsr	r11, r11, #4
23262	lsr	r4, r12, #28
23263	eor	r11, r11, r10, lsl #28
23264	ldr	r3, [lr, r3, lsl #2]
23265	add	r4, r1, r4, lsl #4
23266	eor	r10, r6, r9, lsl #28
23267	lsr	r9, r9, #4
23268	ldm	r4, {r4, r5, r6, r7}
23269	eor	r9, r9, r8, lsl #28
23270	eor	r8, r3, r8, lsr #4
23271	eor	r8, r8, r4
23272	eor	r9, r9, r5
23273	eor	r10, r10, r6
23274	eor	r11, r11, r7
23275	lsr	r6, r10, #4
23276	and	r3, r11, #15
23277	lsr	r11, r11, #4
23278	lsr	r4, r12, #16
23279	eor	r11, r11, r10, lsl #28
23280	and	r4, r4, #15
23281	ldr	r3, [lr, r3, lsl #2]
23282	add	r4, r1, r4, lsl #4
23283	eor	r10, r6, r9, lsl #28
23284	lsr	r9, r9, #4
23285	ldm	r4, {r4, r5, r6, r7}
23286	eor	r9, r9, r8, lsl #28
23287	eor	r8, r3, r8, lsr #4
23288	eor	r8, r8, r4
23289	eor	r9, r9, r5
23290	eor	r10, r10, r6
23291	eor	r11, r11, r7
23292	lsr	r6, r10, #4
23293	and	r3, r11, #15
23294	lsr	r11, r11, #4
23295	lsr	r4, r12, #20
23296	eor	r11, r11, r10, lsl #28
23297	and	r4, r4, #15
23298	ldr	r3, [lr, r3, lsl #2]
23299	add	r4, r1, r4, lsl #4
23300	eor	r10, r6, r9, lsl #28
23301	lsr	r9, r9, #4
23302	ldm	r4, {r4, r5, r6, r7}
23303	eor	r9, r9, r8, lsl #28
23304	eor	r8, r3, r8, lsr #4
23305	eor	r8, r8, r4
23306	eor	r9, r9, r5
23307	eor	r10, r10, r6
23308	eor	r11, r11, r7
23309	lsr	r6, r10, #4
23310	and	r3, r11, #15
23311	lsr	r11, r11, #4
23312	lsr	r4, r12, #8
23313	eor	r11, r11, r10, lsl #28
23314	and	r4, r4, #15
23315	ldr	r3, [lr, r3, lsl #2]
23316	add	r4, r1, r4, lsl #4
23317	eor	r10, r6, r9, lsl #28
23318	lsr	r9, r9, #4
23319	ldm	r4, {r4, r5, r6, r7}
23320	eor	r9, r9, r8, lsl #28
23321	eor	r8, r3, r8, lsr #4
23322	eor	r8, r8, r4
23323	eor	r9, r9, r5
23324	eor	r10, r10, r6
23325	eor	r11, r11, r7
23326	lsr	r6, r10, #4
23327	and	r3, r11, #15
23328	lsr	r11, r11, #4
23329	lsr	r4, r12, #12
23330	eor	r11, r11, r10, lsl #28
23331	and	r4, r4, #15
23332	ldr	r3, [lr, r3, lsl #2]
23333	add	r4, r1, r4, lsl #4
23334	eor	r10, r6, r9, lsl #28
23335	lsr	r9, r9, #4
23336	ldm	r4, {r4, r5, r6, r7}
23337	eor	r9, r9, r8, lsl #28
23338	eor	r8, r3, r8, lsr #4
23339	eor	r8, r8, r4
23340	eor	r9, r9, r5
23341	eor	r10, r10, r6
23342	eor	r11, r11, r7
23343	lsr	r6, r10, #4
23344	and	r3, r11, #15
23345	lsr	r11, r11, #4
23346	and	r4, r12, #15
23347	eor	r11, r11, r10, lsl #28
23348	ldr	r3, [lr, r3, lsl #2]
23349	add	r4, r1, r4, lsl #4
23350	eor	r10, r6, r9, lsl #28
23351	lsr	r9, r9, #4
23352	ldm	r4, {r4, r5, r6, r7}
23353	eor	r9, r9, r8, lsl #28
23354	eor	r8, r3, r8, lsr #4
23355	eor	r8, r8, r4
23356	eor	r9, r9, r5
23357	eor	r10, r10, r6
23358	eor	r11, r11, r7
23359	lsr	r6, r10, #4
23360	and	r3, r11, #15
23361	lsr	r11, r11, #4
23362	lsr	r4, r12, #4
23363	eor	r11, r11, r10, lsl #28
23364	and	r4, r4, #15
23365	ldr	r3, [lr, r3, lsl #2]
23366	add	r4, r1, r4, lsl #4
23367	eor	r10, r6, r9, lsl #28
23368	lsr	r9, r9, #4
23369	ldm	r4, {r4, r5, r6, r7}
23370	eor	r9, r9, r8, lsl #28
23371	eor	r8, r3, r8, lsr #4
23372	eor	r8, r8, r4
23373	eor	r9, r9, r5
23374	eor	r10, r10, r6
23375	eor	r11, r11, r7
23376	lsr	r6, r10, #4
23377	and	r3, r11, #15
23378	lsr	r11, r11, #4
23379	eor	r11, r11, r10, lsl #28
23380	ldr	r3, [lr, r3, lsl #2]
23381	eor	r10, r6, r9, lsl #28
23382	lsr	r9, r9, #4
23383	eor	r9, r9, r8, lsl #28
23384	eor	r8, r3, r8, lsr #4
23385	ldr	r12, [r0, #8]
23386	ldr	r3, [r2, #8]
23387	eor	r12, r12, r3
23388	lsr	r3, r12, #24
23389	and	r3, r3, #15
23390	add	r3, r1, r3, lsl #4
23391	ldm	r3, {r4, r5, r6, r7}
23392	eor	r8, r8, r4
23393	eor	r9, r9, r5
23394	eor	r10, r10, r6
23395	eor	r11, r11, r7
23396	lsr	r6, r10, #4
23397	and	r3, r11, #15
23398	lsr	r11, r11, #4
23399	lsr	r4, r12, #28
23400	eor	r11, r11, r10, lsl #28
23401	ldr	r3, [lr, r3, lsl #2]
23402	add	r4, r1, r4, lsl #4
23403	eor	r10, r6, r9, lsl #28
23404	lsr	r9, r9, #4
23405	ldm	r4, {r4, r5, r6, r7}
23406	eor	r9, r9, r8, lsl #28
23407	eor	r8, r3, r8, lsr #4
23408	eor	r8, r8, r4
23409	eor	r9, r9, r5
23410	eor	r10, r10, r6
23411	eor	r11, r11, r7
23412	lsr	r6, r10, #4
23413	and	r3, r11, #15
23414	lsr	r11, r11, #4
23415	lsr	r4, r12, #16
23416	eor	r11, r11, r10, lsl #28
23417	and	r4, r4, #15
23418	ldr	r3, [lr, r3, lsl #2]
23419	add	r4, r1, r4, lsl #4
23420	eor	r10, r6, r9, lsl #28
23421	lsr	r9, r9, #4
23422	ldm	r4, {r4, r5, r6, r7}
23423	eor	r9, r9, r8, lsl #28
23424	eor	r8, r3, r8, lsr #4
23425	eor	r8, r8, r4
23426	eor	r9, r9, r5
23427	eor	r10, r10, r6
23428	eor	r11, r11, r7
23429	lsr	r6, r10, #4
23430	and	r3, r11, #15
23431	lsr	r11, r11, #4
23432	lsr	r4, r12, #20
23433	eor	r11, r11, r10, lsl #28
23434	and	r4, r4, #15
23435	ldr	r3, [lr, r3, lsl #2]
23436	add	r4, r1, r4, lsl #4
23437	eor	r10, r6, r9, lsl #28
23438	lsr	r9, r9, #4
23439	ldm	r4, {r4, r5, r6, r7}
23440	eor	r9, r9, r8, lsl #28
23441	eor	r8, r3, r8, lsr #4
23442	eor	r8, r8, r4
23443	eor	r9, r9, r5
23444	eor	r10, r10, r6
23445	eor	r11, r11, r7
23446	lsr	r6, r10, #4
23447	and	r3, r11, #15
23448	lsr	r11, r11, #4
23449	lsr	r4, r12, #8
23450	eor	r11, r11, r10, lsl #28
23451	and	r4, r4, #15
23452	ldr	r3, [lr, r3, lsl #2]
23453	add	r4, r1, r4, lsl #4
23454	eor	r10, r6, r9, lsl #28
23455	lsr	r9, r9, #4
23456	ldm	r4, {r4, r5, r6, r7}
23457	eor	r9, r9, r8, lsl #28
23458	eor	r8, r3, r8, lsr #4
23459	eor	r8, r8, r4
23460	eor	r9, r9, r5
23461	eor	r10, r10, r6
23462	eor	r11, r11, r7
23463	lsr	r6, r10, #4
23464	and	r3, r11, #15
23465	lsr	r11, r11, #4
23466	lsr	r4, r12, #12
23467	eor	r11, r11, r10, lsl #28
23468	and	r4, r4, #15
23469	ldr	r3, [lr, r3, lsl #2]
23470	add	r4, r1, r4, lsl #4
23471	eor	r10, r6, r9, lsl #28
23472	lsr	r9, r9, #4
23473	ldm	r4, {r4, r5, r6, r7}
23474	eor	r9, r9, r8, lsl #28
23475	eor	r8, r3, r8, lsr #4
23476	eor	r8, r8, r4
23477	eor	r9, r9, r5
23478	eor	r10, r10, r6
23479	eor	r11, r11, r7
23480	lsr	r6, r10, #4
23481	and	r3, r11, #15
23482	lsr	r11, r11, #4
23483	and	r4, r12, #15
23484	eor	r11, r11, r10, lsl #28
23485	ldr	r3, [lr, r3, lsl #2]
23486	add	r4, r1, r4, lsl #4
23487	eor	r10, r6, r9, lsl #28
23488	lsr	r9, r9, #4
23489	ldm	r4, {r4, r5, r6, r7}
23490	eor	r9, r9, r8, lsl #28
23491	eor	r8, r3, r8, lsr #4
23492	eor	r8, r8, r4
23493	eor	r9, r9, r5
23494	eor	r10, r10, r6
23495	eor	r11, r11, r7
23496	lsr	r6, r10, #4
23497	and	r3, r11, #15
23498	lsr	r11, r11, #4
23499	lsr	r4, r12, #4
23500	eor	r11, r11, r10, lsl #28
23501	and	r4, r4, #15
23502	ldr	r3, [lr, r3, lsl #2]
23503	add	r4, r1, r4, lsl #4
23504	eor	r10, r6, r9, lsl #28
23505	lsr	r9, r9, #4
23506	ldm	r4, {r4, r5, r6, r7}
23507	eor	r9, r9, r8, lsl #28
23508	eor	r8, r3, r8, lsr #4
23509	eor	r8, r8, r4
23510	eor	r9, r9, r5
23511	eor	r10, r10, r6
23512	eor	r11, r11, r7
23513	lsr	r6, r10, #4
23514	and	r3, r11, #15
23515	lsr	r11, r11, #4
23516	eor	r11, r11, r10, lsl #28
23517	ldr	r3, [lr, r3, lsl #2]
23518	eor	r10, r6, r9, lsl #28
23519	lsr	r9, r9, #4
23520	eor	r9, r9, r8, lsl #28
23521	eor	r8, r3, r8, lsr #4
23522	ldr	r12, [r0, #4]
23523	ldr	r3, [r2, #4]
23524	eor	r12, r12, r3
23525	lsr	r3, r12, #24
23526	and	r3, r3, #15
23527	add	r3, r1, r3, lsl #4
23528	ldm	r3, {r4, r5, r6, r7}
23529	eor	r8, r8, r4
23530	eor	r9, r9, r5
23531	eor	r10, r10, r6
23532	eor	r11, r11, r7
23533	lsr	r6, r10, #4
23534	and	r3, r11, #15
23535	lsr	r11, r11, #4
23536	lsr	r4, r12, #28
23537	eor	r11, r11, r10, lsl #28
23538	ldr	r3, [lr, r3, lsl #2]
23539	add	r4, r1, r4, lsl #4
23540	eor	r10, r6, r9, lsl #28
23541	lsr	r9, r9, #4
23542	ldm	r4, {r4, r5, r6, r7}
23543	eor	r9, r9, r8, lsl #28
23544	eor	r8, r3, r8, lsr #4
23545	eor	r8, r8, r4
23546	eor	r9, r9, r5
23547	eor	r10, r10, r6
23548	eor	r11, r11, r7
23549	lsr	r6, r10, #4
23550	and	r3, r11, #15
23551	lsr	r11, r11, #4
23552	lsr	r4, r12, #16
23553	eor	r11, r11, r10, lsl #28
23554	and	r4, r4, #15
23555	ldr	r3, [lr, r3, lsl #2]
23556	add	r4, r1, r4, lsl #4
23557	eor	r10, r6, r9, lsl #28
23558	lsr	r9, r9, #4
23559	ldm	r4, {r4, r5, r6, r7}
23560	eor	r9, r9, r8, lsl #28
23561	eor	r8, r3, r8, lsr #4
23562	eor	r8, r8, r4
23563	eor	r9, r9, r5
23564	eor	r10, r10, r6
23565	eor	r11, r11, r7
23566	lsr	r6, r10, #4
23567	and	r3, r11, #15
23568	lsr	r11, r11, #4
23569	lsr	r4, r12, #20
23570	eor	r11, r11, r10, lsl #28
23571	and	r4, r4, #15
23572	ldr	r3, [lr, r3, lsl #2]
23573	add	r4, r1, r4, lsl #4
23574	eor	r10, r6, r9, lsl #28
23575	lsr	r9, r9, #4
23576	ldm	r4, {r4, r5, r6, r7}
23577	eor	r9, r9, r8, lsl #28
23578	eor	r8, r3, r8, lsr #4
23579	eor	r8, r8, r4
23580	eor	r9, r9, r5
23581	eor	r10, r10, r6
23582	eor	r11, r11, r7
23583	lsr	r6, r10, #4
23584	and	r3, r11, #15
23585	lsr	r11, r11, #4
23586	lsr	r4, r12, #8
23587	eor	r11, r11, r10, lsl #28
23588	and	r4, r4, #15
23589	ldr	r3, [lr, r3, lsl #2]
23590	add	r4, r1, r4, lsl #4
23591	eor	r10, r6, r9, lsl #28
23592	lsr	r9, r9, #4
23593	ldm	r4, {r4, r5, r6, r7}
23594	eor	r9, r9, r8, lsl #28
23595	eor	r8, r3, r8, lsr #4
23596	eor	r8, r8, r4
23597	eor	r9, r9, r5
23598	eor	r10, r10, r6
23599	eor	r11, r11, r7
23600	lsr	r6, r10, #4
23601	and	r3, r11, #15
23602	lsr	r11, r11, #4
23603	lsr	r4, r12, #12
23604	eor	r11, r11, r10, lsl #28
23605	and	r4, r4, #15
23606	ldr	r3, [lr, r3, lsl #2]
23607	add	r4, r1, r4, lsl #4
23608	eor	r10, r6, r9, lsl #28
23609	lsr	r9, r9, #4
23610	ldm	r4, {r4, r5, r6, r7}
23611	eor	r9, r9, r8, lsl #28
23612	eor	r8, r3, r8, lsr #4
23613	eor	r8, r8, r4
23614	eor	r9, r9, r5
23615	eor	r10, r10, r6
23616	eor	r11, r11, r7
23617	lsr	r6, r10, #4
23618	and	r3, r11, #15
23619	lsr	r11, r11, #4
23620	and	r4, r12, #15
23621	eor	r11, r11, r10, lsl #28
23622	ldr	r3, [lr, r3, lsl #2]
23623	add	r4, r1, r4, lsl #4
23624	eor	r10, r6, r9, lsl #28
23625	lsr	r9, r9, #4
23626	ldm	r4, {r4, r5, r6, r7}
23627	eor	r9, r9, r8, lsl #28
23628	eor	r8, r3, r8, lsr #4
23629	eor	r8, r8, r4
23630	eor	r9, r9, r5
23631	eor	r10, r10, r6
23632	eor	r11, r11, r7
23633	lsr	r6, r10, #4
23634	and	r3, r11, #15
23635	lsr	r11, r11, #4
23636	lsr	r4, r12, #4
23637	eor	r11, r11, r10, lsl #28
23638	and	r4, r4, #15
23639	ldr	r3, [lr, r3, lsl #2]
23640	add	r4, r1, r4, lsl #4
23641	eor	r10, r6, r9, lsl #28
23642	lsr	r9, r9, #4
23643	ldm	r4, {r4, r5, r6, r7}
23644	eor	r9, r9, r8, lsl #28
23645	eor	r8, r3, r8, lsr #4
23646	eor	r8, r8, r4
23647	eor	r9, r9, r5
23648	eor	r10, r10, r6
23649	eor	r11, r11, r7
23650	lsr	r6, r10, #4
23651	and	r3, r11, #15
23652	lsr	r11, r11, #4
23653	eor	r11, r11, r10, lsl #28
23654	ldr	r3, [lr, r3, lsl #2]
23655	eor	r10, r6, r9, lsl #28
23656	lsr	r9, r9, #4
23657	eor	r9, r9, r8, lsl #28
23658	eor	r8, r3, r8, lsr #4
23659	ldr	r12, [r0]
23660	ldr	r3, [r2]
23661	eor	r12, r12, r3
23662	lsr	r3, r12, #24
23663	and	r3, r3, #15
23664	add	r3, r1, r3, lsl #4
23665	ldm	r3, {r4, r5, r6, r7}
23666	eor	r8, r8, r4
23667	eor	r9, r9, r5
23668	eor	r10, r10, r6
23669	eor	r11, r11, r7
23670	lsr	r6, r10, #4
23671	and	r3, r11, #15
23672	lsr	r11, r11, #4
23673	lsr	r4, r12, #28
23674	eor	r11, r11, r10, lsl #28
23675	ldr	r3, [lr, r3, lsl #2]
23676	add	r4, r1, r4, lsl #4
23677	eor	r10, r6, r9, lsl #28
23678	lsr	r9, r9, #4
23679	ldm	r4, {r4, r5, r6, r7}
23680	eor	r9, r9, r8, lsl #28
23681	eor	r8, r3, r8, lsr #4
23682	eor	r8, r8, r4
23683	eor	r9, r9, r5
23684	eor	r10, r10, r6
23685	eor	r11, r11, r7
23686	lsr	r6, r10, #4
23687	and	r3, r11, #15
23688	lsr	r11, r11, #4
23689	lsr	r4, r12, #16
23690	eor	r11, r11, r10, lsl #28
23691	and	r4, r4, #15
23692	ldr	r3, [lr, r3, lsl #2]
23693	add	r4, r1, r4, lsl #4
23694	eor	r10, r6, r9, lsl #28
23695	lsr	r9, r9, #4
23696	ldm	r4, {r4, r5, r6, r7}
23697	eor	r9, r9, r8, lsl #28
23698	eor	r8, r3, r8, lsr #4
23699	eor	r8, r8, r4
23700	eor	r9, r9, r5
23701	eor	r10, r10, r6
23702	eor	r11, r11, r7
23703	lsr	r6, r10, #4
23704	and	r3, r11, #15
23705	lsr	r11, r11, #4
23706	lsr	r4, r12, #20
23707	eor	r11, r11, r10, lsl #28
23708	and	r4, r4, #15
23709	ldr	r3, [lr, r3, lsl #2]
23710	add	r4, r1, r4, lsl #4
23711	eor	r10, r6, r9, lsl #28
23712	lsr	r9, r9, #4
23713	ldm	r4, {r4, r5, r6, r7}
23714	eor	r9, r9, r8, lsl #28
23715	eor	r8, r3, r8, lsr #4
23716	eor	r8, r8, r4
23717	eor	r9, r9, r5
23718	eor	r10, r10, r6
23719	eor	r11, r11, r7
23720	lsr	r6, r10, #4
23721	and	r3, r11, #15
23722	lsr	r11, r11, #4
23723	lsr	r4, r12, #8
23724	eor	r11, r11, r10, lsl #28
23725	and	r4, r4, #15
23726	ldr	r3, [lr, r3, lsl #2]
23727	add	r4, r1, r4, lsl #4
23728	eor	r10, r6, r9, lsl #28
23729	lsr	r9, r9, #4
23730	ldm	r4, {r4, r5, r6, r7}
23731	eor	r9, r9, r8, lsl #28
23732	eor	r8, r3, r8, lsr #4
23733	eor	r8, r8, r4
23734	eor	r9, r9, r5
23735	eor	r10, r10, r6
23736	eor	r11, r11, r7
23737	lsr	r6, r10, #4
23738	and	r3, r11, #15
23739	lsr	r11, r11, #4
23740	lsr	r4, r12, #12
23741	eor	r11, r11, r10, lsl #28
23742	and	r4, r4, #15
23743	ldr	r3, [lr, r3, lsl #2]
23744	add	r4, r1, r4, lsl #4
23745	eor	r10, r6, r9, lsl #28
23746	lsr	r9, r9, #4
23747	ldm	r4, {r4, r5, r6, r7}
23748	eor	r9, r9, r8, lsl #28
23749	eor	r8, r3, r8, lsr #4
23750	eor	r8, r8, r4
23751	eor	r9, r9, r5
23752	eor	r10, r10, r6
23753	eor	r11, r11, r7
23754	lsr	r6, r10, #4
23755	and	r3, r11, #15
23756	lsr	r11, r11, #4
23757	and	r4, r12, #15
23758	eor	r11, r11, r10, lsl #28
23759	ldr	r3, [lr, r3, lsl #2]
23760	add	r4, r1, r4, lsl #4
23761	eor	r10, r6, r9, lsl #28
23762	lsr	r9, r9, #4
23763	ldm	r4, {r4, r5, r6, r7}
23764	eor	r9, r9, r8, lsl #28
23765	eor	r8, r3, r8, lsr #4
23766	eor	r8, r8, r4
23767	eor	r9, r9, r5
23768	eor	r10, r10, r6
23769	eor	r11, r11, r7
23770	lsr	r6, r10, #4
23771	and	r3, r11, #15
23772	lsr	r11, r11, #4
23773	lsr	r4, r12, #4
23774	eor	r11, r11, r10, lsl #28
23775	and	r4, r4, #15
23776	ldr	r3, [lr, r3, lsl #2]
23777	add	r4, r1, r4, lsl #4
23778	eor	r10, r6, r9, lsl #28
23779	lsr	r9, r9, #4
23780	ldm	r4, {r4, r5, r6, r7}
23781	eor	r9, r9, r8, lsl #28
23782	eor	r8, r3, r8, lsr #4
23783	eor	r8, r8, r4
23784	eor	r9, r9, r5
23785	eor	r10, r10, r6
23786	eor	r11, r11, r7
23787#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23788	# REV r8, r8
23789	eor	r3, r8, r8, ror #16
23790	bic	r3, r3, #0xff0000
23791	ror	r8, r8, #8
23792	eor	r8, r8, r3, lsr #8
23793	# REV r9, r9
23794	eor	r3, r9, r9, ror #16
23795	bic	r3, r3, #0xff0000
23796	ror	r9, r9, #8
23797	eor	r9, r9, r3, lsr #8
23798	# REV r10, r10
23799	eor	r3, r10, r10, ror #16
23800	bic	r3, r3, #0xff0000
23801	ror	r10, r10, #8
23802	eor	r10, r10, r3, lsr #8
23803	# REV r11, r11
23804	eor	r3, r11, r11, ror #16
23805	bic	r3, r3, #0xff0000
23806	ror	r11, r11, #8
23807	eor	r11, r11, r3, lsr #8
23808#else
23809	rev	r8, r8
23810	rev	r9, r9
23811	rev	r10, r10
23812	rev	r11, r11
23813#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
23814	stm	r0, {r8, r9, r10, r11}
23815	pop	{r3}
23816	subs	r3, r3, #16
23817	add	r2, r2, #16
23818	bne	L_GCM_gmult_len_start_block
23819	pop	{r4, r5, r6, r7, r8, r9, r10, r11, pc}
23820	.size	GCM_gmult_len,.-GCM_gmult_len
23821#ifndef __APPLE__
23822	.text
23823	.type	L_AES_ARM32_te_gcm, %object
23824	.size	L_AES_ARM32_te_gcm, 12
23825#else
23826	.section	__DATA,__data
23827#endif /* __APPLE__ */
23828	# 8-byte aligned, 64-bit aligned
23829#ifndef __APPLE__
23830	.align	3
23831#else
23832	.p2align	3
23833#endif /* __APPLE__ */
23834L_AES_ARM32_te_gcm:
23835	.long	L_AES_ARM32_te_data
23836	.text
23837	.align	4
23838	.globl	AES_GCM_encrypt
23839	.type	AES_GCM_encrypt, %function
23840AES_GCM_encrypt:
23841	push	{r4, r5, r6, r7, r8, r9, r10, r11, lr}
23842	ldr	r12, [sp, #36]
23843	ldr	r8, [sp, #40]
23844	mov	lr, r0
23845	adr	r0, L_AES_ARM32_te_gcm
23846	ldr	r0, [r0]
23847	ldm	r8, {r4, r5, r6, r7}
23848#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23849	eor	r10, r4, r4, ror #16
23850	eor	r11, r5, r5, ror #16
23851	bic	r10, r10, #0xff0000
23852	bic	r11, r11, #0xff0000
23853	ror	r4, r4, #8
23854	ror	r5, r5, #8
23855	eor	r4, r4, r10, lsr #8
23856	eor	r5, r5, r11, lsr #8
23857	eor	r10, r6, r6, ror #16
23858	eor	r11, r7, r7, ror #16
23859	bic	r10, r10, #0xff0000
23860	bic	r11, r11, #0xff0000
23861	ror	r6, r6, #8
23862	ror	r7, r7, #8
23863	eor	r6, r6, r10, lsr #8
23864	eor	r7, r7, r11, lsr #8
23865#else
23866	rev	r4, r4
23867	rev	r5, r5
23868	rev	r6, r6
23869	rev	r7, r7
23870#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
23871	stm	r8, {r4, r5, r6, r7}
23872	push	{r3, r8}
23873	cmp	r12, #10
23874	beq	L_AES_GCM_encrypt_start_block_128
23875	cmp	r12, #12
23876	beq	L_AES_GCM_encrypt_start_block_192
23877L_AES_GCM_encrypt_loop_block_256:
23878	push	{r1, r2, lr}
23879	ldr	lr, [sp, #16]
23880	add	r7, r7, #1
23881	ldm	r3!, {r8, r9, r10, r11}
23882	str	r7, [lr, #12]
23883	# Round: 0 - XOR in key schedule
23884	eor	r4, r4, r8
23885	eor	r5, r5, r9
23886	eor	r6, r6, r10
23887	eor	r7, r7, r11
23888	mov	r1, #6
23889#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
23890	bl	AES_encrypt_block
23891#else
23892L_AES_GCM_encrypt_block_nr_256:
23893#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23894#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23895	lsl	r8, r5, #8
23896	lsr	r8, r8, #24
23897#else
23898	uxtb	r8, r5, ror #16
23899#endif
23900#else
23901	ubfx	r8, r5, #16, #8
23902#endif
23903	lsr	r11, r4, #24
23904#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23905#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23906	lsl	lr, r6, #16
23907	lsr	lr, lr, #24
23908#else
23909	uxtb	lr, r6, ror #8
23910#endif
23911#else
23912	ubfx	lr, r6, #8, #8
23913#endif
23914#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23915#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23916	lsl	r2, r7, #24
23917	lsr	r2, r2, #24
23918#else
23919	uxtb	r2, r7
23920#endif
23921#else
23922	ubfx	r2, r7, #0, #8
23923#endif
23924	ldr	r8, [r0, r8, lsl #2]
23925	ldr	r11, [r0, r11, lsl #2]
23926	ldr	lr, [r0, lr, lsl #2]
23927	ldr	r2, [r0, r2, lsl #2]
23928#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23929#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23930	lsl	r9, r6, #8
23931	lsr	r9, r9, #24
23932#else
23933	uxtb	r9, r6, ror #16
23934#endif
23935#else
23936	ubfx	r9, r6, #16, #8
23937#endif
23938	eor	r8, r8, r11, ror #24
23939	lsr	r11, r5, #24
23940	eor	r8, r8, lr, ror #8
23941#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23942#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23943	lsl	lr, r7, #16
23944	lsr	lr, lr, #24
23945#else
23946	uxtb	lr, r7, ror #8
23947#endif
23948#else
23949	ubfx	lr, r7, #8, #8
23950#endif
23951	eor	r8, r8, r2, ror #16
23952#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23953#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23954	lsl	r2, r4, #24
23955	lsr	r2, r2, #24
23956#else
23957	uxtb	r2, r4
23958#endif
23959#else
23960	ubfx	r2, r4, #0, #8
23961#endif
23962	ldr	r9, [r0, r9, lsl #2]
23963	ldr	r11, [r0, r11, lsl #2]
23964	ldr	lr, [r0, lr, lsl #2]
23965	ldr	r2, [r0, r2, lsl #2]
23966#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23967#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23968	lsl	r10, r7, #8
23969	lsr	r10, r10, #24
23970#else
23971	uxtb	r10, r7, ror #16
23972#endif
23973#else
23974	ubfx	r10, r7, #16, #8
23975#endif
23976	eor	r9, r9, r11, ror #24
23977	lsr	r11, r6, #24
23978	eor	r9, r9, lr, ror #8
23979#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23980#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23981	lsl	lr, r4, #16
23982	lsr	lr, lr, #24
23983#else
23984	uxtb	lr, r4, ror #8
23985#endif
23986#else
23987	ubfx	lr, r4, #8, #8
23988#endif
23989	eor	r9, r9, r2, ror #16
23990#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
23991#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
23992	lsl	r2, r5, #24
23993	lsr	r2, r2, #24
23994#else
23995	uxtb	r2, r5
23996#endif
23997#else
23998	ubfx	r2, r5, #0, #8
23999#endif
24000	ldr	r10, [r0, r10, lsl #2]
24001	ldr	r11, [r0, r11, lsl #2]
24002	ldr	lr, [r0, lr, lsl #2]
24003	ldr	r2, [r0, r2, lsl #2]
24004#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24005#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24006	lsl	r6, r6, #24
24007	lsr	r6, r6, #24
24008#else
24009	uxtb	r6, r6
24010#endif
24011#else
24012	ubfx	r6, r6, #0, #8
24013#endif
24014	eor	r10, r10, r11, ror #24
24015#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24016#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24017	lsl	r11, r4, #8
24018	lsr	r11, r11, #24
24019#else
24020	uxtb	r11, r4, ror #16
24021#endif
24022#else
24023	ubfx	r11, r4, #16, #8
24024#endif
24025	eor	r10, r10, lr, ror #8
24026	lsr	lr, r7, #24
24027	eor	r10, r10, r2, ror #16
24028#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24029#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24030	lsl	r2, r5, #16
24031	lsr	r2, r2, #24
24032#else
24033	uxtb	r2, r5, ror #8
24034#endif
24035#else
24036	ubfx	r2, r5, #8, #8
24037#endif
24038	ldr	r6, [r0, r6, lsl #2]
24039	ldr	lr, [r0, lr, lsl #2]
24040	ldr	r11, [r0, r11, lsl #2]
24041	ldr	r2, [r0, r2, lsl #2]
24042	eor	lr, lr, r6, ror #24
24043	ldm	r3!, {r4, r5, r6, r7}
24044	eor	r11, r11, lr, ror #24
24045	eor	r11, r11, r2, ror #8
24046	#   XOR in Key Schedule
24047	eor	r8, r8, r4
24048	eor	r9, r9, r5
24049	eor	r10, r10, r6
24050	eor	r11, r11, r7
24051#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24052#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24053	lsl	r4, r9, #8
24054	lsr	r4, r4, #24
24055#else
24056	uxtb	r4, r9, ror #16
24057#endif
24058#else
24059	ubfx	r4, r9, #16, #8
24060#endif
24061	lsr	r7, r8, #24
24062#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24063#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24064	lsl	lr, r10, #16
24065	lsr	lr, lr, #24
24066#else
24067	uxtb	lr, r10, ror #8
24068#endif
24069#else
24070	ubfx	lr, r10, #8, #8
24071#endif
24072#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24073#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24074	lsl	r2, r11, #24
24075	lsr	r2, r2, #24
24076#else
24077	uxtb	r2, r11
24078#endif
24079#else
24080	ubfx	r2, r11, #0, #8
24081#endif
24082	ldr	r4, [r0, r4, lsl #2]
24083	ldr	r7, [r0, r7, lsl #2]
24084	ldr	lr, [r0, lr, lsl #2]
24085	ldr	r2, [r0, r2, lsl #2]
24086#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24087#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24088	lsl	r5, r10, #8
24089	lsr	r5, r5, #24
24090#else
24091	uxtb	r5, r10, ror #16
24092#endif
24093#else
24094	ubfx	r5, r10, #16, #8
24095#endif
24096	eor	r4, r4, r7, ror #24
24097	lsr	r7, r9, #24
24098	eor	r4, r4, lr, ror #8
24099#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24100#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24101	lsl	lr, r11, #16
24102	lsr	lr, lr, #24
24103#else
24104	uxtb	lr, r11, ror #8
24105#endif
24106#else
24107	ubfx	lr, r11, #8, #8
24108#endif
24109	eor	r4, r4, r2, ror #16
24110#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24111#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24112	lsl	r2, r8, #24
24113	lsr	r2, r2, #24
24114#else
24115	uxtb	r2, r8
24116#endif
24117#else
24118	ubfx	r2, r8, #0, #8
24119#endif
24120	ldr	r5, [r0, r5, lsl #2]
24121	ldr	r7, [r0, r7, lsl #2]
24122	ldr	lr, [r0, lr, lsl #2]
24123	ldr	r2, [r0, r2, lsl #2]
24124#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24125#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24126	lsl	r6, r11, #8
24127	lsr	r6, r6, #24
24128#else
24129	uxtb	r6, r11, ror #16
24130#endif
24131#else
24132	ubfx	r6, r11, #16, #8
24133#endif
24134	eor	r5, r5, r7, ror #24
24135	lsr	r7, r10, #24
24136	eor	r5, r5, lr, ror #8
24137#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24138#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24139	lsl	lr, r8, #16
24140	lsr	lr, lr, #24
24141#else
24142	uxtb	lr, r8, ror #8
24143#endif
24144#else
24145	ubfx	lr, r8, #8, #8
24146#endif
24147	eor	r5, r5, r2, ror #16
24148#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24149#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24150	lsl	r2, r9, #24
24151	lsr	r2, r2, #24
24152#else
24153	uxtb	r2, r9
24154#endif
24155#else
24156	ubfx	r2, r9, #0, #8
24157#endif
24158	ldr	r6, [r0, r6, lsl #2]
24159	ldr	r7, [r0, r7, lsl #2]
24160	ldr	lr, [r0, lr, lsl #2]
24161	ldr	r2, [r0, r2, lsl #2]
24162#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24163#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24164	lsl	r10, r10, #24
24165	lsr	r10, r10, #24
24166#else
24167	uxtb	r10, r10
24168#endif
24169#else
24170	ubfx	r10, r10, #0, #8
24171#endif
24172	eor	r6, r6, r7, ror #24
24173#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24174#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24175	lsl	r7, r8, #8
24176	lsr	r7, r7, #24
24177#else
24178	uxtb	r7, r8, ror #16
24179#endif
24180#else
24181	ubfx	r7, r8, #16, #8
24182#endif
24183	eor	r6, r6, lr, ror #8
24184	lsr	lr, r11, #24
24185	eor	r6, r6, r2, ror #16
24186#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24187#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24188	lsl	r2, r9, #16
24189	lsr	r2, r2, #24
24190#else
24191	uxtb	r2, r9, ror #8
24192#endif
24193#else
24194	ubfx	r2, r9, #8, #8
24195#endif
24196	ldr	r10, [r0, r10, lsl #2]
24197	ldr	lr, [r0, lr, lsl #2]
24198	ldr	r7, [r0, r7, lsl #2]
24199	ldr	r2, [r0, r2, lsl #2]
24200	eor	lr, lr, r10, ror #24
24201	ldm	r3!, {r8, r9, r10, r11}
24202	eor	r7, r7, lr, ror #24
24203	eor	r7, r7, r2, ror #8
24204	#   XOR in Key Schedule
24205	eor	r4, r4, r8
24206	eor	r5, r5, r9
24207	eor	r6, r6, r10
24208	eor	r7, r7, r11
24209	subs	r1, r1, #1
24210	bne	L_AES_GCM_encrypt_block_nr_256
24211#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24212#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24213	lsl	r8, r5, #8
24214	lsr	r8, r8, #24
24215#else
24216	uxtb	r8, r5, ror #16
24217#endif
24218#else
24219	ubfx	r8, r5, #16, #8
24220#endif
24221	lsr	r11, r4, #24
24222#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24223#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24224	lsl	lr, r6, #16
24225	lsr	lr, lr, #24
24226#else
24227	uxtb	lr, r6, ror #8
24228#endif
24229#else
24230	ubfx	lr, r6, #8, #8
24231#endif
24232#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24233#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24234	lsl	r2, r7, #24
24235	lsr	r2, r2, #24
24236#else
24237	uxtb	r2, r7
24238#endif
24239#else
24240	ubfx	r2, r7, #0, #8
24241#endif
24242	ldr	r8, [r0, r8, lsl #2]
24243	ldr	r11, [r0, r11, lsl #2]
24244	ldr	lr, [r0, lr, lsl #2]
24245	ldr	r2, [r0, r2, lsl #2]
24246#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24247#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24248	lsl	r9, r6, #8
24249	lsr	r9, r9, #24
24250#else
24251	uxtb	r9, r6, ror #16
24252#endif
24253#else
24254	ubfx	r9, r6, #16, #8
24255#endif
24256	eor	r8, r8, r11, ror #24
24257	lsr	r11, r5, #24
24258	eor	r8, r8, lr, ror #8
24259#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24260#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24261	lsl	lr, r7, #16
24262	lsr	lr, lr, #24
24263#else
24264	uxtb	lr, r7, ror #8
24265#endif
24266#else
24267	ubfx	lr, r7, #8, #8
24268#endif
24269	eor	r8, r8, r2, ror #16
24270#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24271#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24272	lsl	r2, r4, #24
24273	lsr	r2, r2, #24
24274#else
24275	uxtb	r2, r4
24276#endif
24277#else
24278	ubfx	r2, r4, #0, #8
24279#endif
24280	ldr	r9, [r0, r9, lsl #2]
24281	ldr	r11, [r0, r11, lsl #2]
24282	ldr	lr, [r0, lr, lsl #2]
24283	ldr	r2, [r0, r2, lsl #2]
24284#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24285#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24286	lsl	r10, r7, #8
24287	lsr	r10, r10, #24
24288#else
24289	uxtb	r10, r7, ror #16
24290#endif
24291#else
24292	ubfx	r10, r7, #16, #8
24293#endif
24294	eor	r9, r9, r11, ror #24
24295	lsr	r11, r6, #24
24296	eor	r9, r9, lr, ror #8
24297#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24298#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24299	lsl	lr, r4, #16
24300	lsr	lr, lr, #24
24301#else
24302	uxtb	lr, r4, ror #8
24303#endif
24304#else
24305	ubfx	lr, r4, #8, #8
24306#endif
24307	eor	r9, r9, r2, ror #16
24308#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24309#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24310	lsl	r2, r5, #24
24311	lsr	r2, r2, #24
24312#else
24313	uxtb	r2, r5
24314#endif
24315#else
24316	ubfx	r2, r5, #0, #8
24317#endif
24318	ldr	r10, [r0, r10, lsl #2]
24319	ldr	r11, [r0, r11, lsl #2]
24320	ldr	lr, [r0, lr, lsl #2]
24321	ldr	r2, [r0, r2, lsl #2]
24322#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24323#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24324	lsl	r6, r6, #24
24325	lsr	r6, r6, #24
24326#else
24327	uxtb	r6, r6
24328#endif
24329#else
24330	ubfx	r6, r6, #0, #8
24331#endif
24332	eor	r10, r10, r11, ror #24
24333#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24334#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24335	lsl	r11, r4, #8
24336	lsr	r11, r11, #24
24337#else
24338	uxtb	r11, r4, ror #16
24339#endif
24340#else
24341	ubfx	r11, r4, #16, #8
24342#endif
24343	eor	r10, r10, lr, ror #8
24344	lsr	lr, r7, #24
24345	eor	r10, r10, r2, ror #16
24346#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24347#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24348	lsl	r2, r5, #16
24349	lsr	r2, r2, #24
24350#else
24351	uxtb	r2, r5, ror #8
24352#endif
24353#else
24354	ubfx	r2, r5, #8, #8
24355#endif
24356	ldr	r6, [r0, r6, lsl #2]
24357	ldr	lr, [r0, lr, lsl #2]
24358	ldr	r11, [r0, r11, lsl #2]
24359	ldr	r2, [r0, r2, lsl #2]
24360	eor	lr, lr, r6, ror #24
24361	ldm	r3!, {r4, r5, r6, r7}
24362	eor	r11, r11, lr, ror #24
24363	eor	r11, r11, r2, ror #8
24364	#   XOR in Key Schedule
24365	eor	r8, r8, r4
24366	eor	r9, r9, r5
24367	eor	r10, r10, r6
24368	eor	r11, r11, r7
24369#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24370#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24371	lsl	r4, r11, #24
24372	lsr	r4, r4, #24
24373#else
24374	uxtb	r4, r11
24375#endif
24376#else
24377	ubfx	r4, r11, #0, #8
24378#endif
24379#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24380#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24381	lsl	r7, r10, #16
24382	lsr	r7, r7, #24
24383#else
24384	uxtb	r7, r10, ror #8
24385#endif
24386#else
24387	ubfx	r7, r10, #8, #8
24388#endif
24389#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24390#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24391	lsl	lr, r9, #8
24392	lsr	lr, lr, #24
24393#else
24394	uxtb	lr, r9, ror #16
24395#endif
24396#else
24397	ubfx	lr, r9, #16, #8
24398#endif
24399	lsr	r2, r8, #24
24400	ldrb	r4, [r0, r4, lsl #2]
24401	ldrb	r7, [r0, r7, lsl #2]
24402	ldrb	lr, [r0, lr, lsl #2]
24403	ldrb	r2, [r0, r2, lsl #2]
24404#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24405#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24406	lsl	r5, r8, #24
24407	lsr	r5, r5, #24
24408#else
24409	uxtb	r5, r8
24410#endif
24411#else
24412	ubfx	r5, r8, #0, #8
24413#endif
24414	eor	r4, r4, r7, lsl #8
24415#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24416#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24417	lsl	r7, r11, #16
24418	lsr	r7, r7, #24
24419#else
24420	uxtb	r7, r11, ror #8
24421#endif
24422#else
24423	ubfx	r7, r11, #8, #8
24424#endif
24425	eor	r4, r4, lr, lsl #16
24426#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24427#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24428	lsl	lr, r10, #8
24429	lsr	lr, lr, #24
24430#else
24431	uxtb	lr, r10, ror #16
24432#endif
24433#else
24434	ubfx	lr, r10, #16, #8
24435#endif
24436	eor	r4, r4, r2, lsl #24
24437	lsr	r2, r9, #24
24438	ldrb	r5, [r0, r5, lsl #2]
24439	ldrb	r7, [r0, r7, lsl #2]
24440	ldrb	lr, [r0, lr, lsl #2]
24441	ldrb	r2, [r0, r2, lsl #2]
24442#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24443#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24444	lsl	r6, r9, #24
24445	lsr	r6, r6, #24
24446#else
24447	uxtb	r6, r9
24448#endif
24449#else
24450	ubfx	r6, r9, #0, #8
24451#endif
24452	eor	r5, r5, r7, lsl #8
24453#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24454#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24455	lsl	r7, r8, #16
24456	lsr	r7, r7, #24
24457#else
24458	uxtb	r7, r8, ror #8
24459#endif
24460#else
24461	ubfx	r7, r8, #8, #8
24462#endif
24463	eor	r5, r5, lr, lsl #16
24464#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24465#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24466	lsl	lr, r11, #8
24467	lsr	lr, lr, #24
24468#else
24469	uxtb	lr, r11, ror #16
24470#endif
24471#else
24472	ubfx	lr, r11, #16, #8
24473#endif
24474	eor	r5, r5, r2, lsl #24
24475	lsr	r2, r10, #24
24476	ldrb	r6, [r0, r6, lsl #2]
24477	ldrb	r7, [r0, r7, lsl #2]
24478	ldrb	lr, [r0, lr, lsl #2]
24479	ldrb	r2, [r0, r2, lsl #2]
24480	lsr	r11, r11, #24
24481	eor	r6, r6, r7, lsl #8
24482#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24483#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24484	lsl	r7, r10, #24
24485	lsr	r7, r7, #24
24486#else
24487	uxtb	r7, r10
24488#endif
24489#else
24490	ubfx	r7, r10, #0, #8
24491#endif
24492	eor	r6, r6, lr, lsl #16
24493#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24494#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24495	lsl	lr, r9, #16
24496	lsr	lr, lr, #24
24497#else
24498	uxtb	lr, r9, ror #8
24499#endif
24500#else
24501	ubfx	lr, r9, #8, #8
24502#endif
24503	eor	r6, r6, r2, lsl #24
24504#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24505#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24506	lsl	r2, r8, #8
24507	lsr	r2, r2, #24
24508#else
24509	uxtb	r2, r8, ror #16
24510#endif
24511#else
24512	ubfx	r2, r8, #16, #8
24513#endif
24514	ldrb	r11, [r0, r11, lsl #2]
24515	ldrb	r7, [r0, r7, lsl #2]
24516	ldrb	lr, [r0, lr, lsl #2]
24517	ldrb	r2, [r0, r2, lsl #2]
24518	eor	lr, lr, r11, lsl #16
24519	ldm	r3, {r8, r9, r10, r11}
24520	eor	r7, r7, lr, lsl #8
24521	eor	r7, r7, r2, lsl #16
24522	#   XOR in Key Schedule
24523	eor	r4, r4, r8
24524	eor	r5, r5, r9
24525	eor	r6, r6, r10
24526	eor	r7, r7, r11
24527#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
24528	pop	{r1, r2, lr}
24529	ldr	r3, [sp]
24530#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24531	eor	r8, r4, r4, ror #16
24532	eor	r9, r5, r5, ror #16
24533	eor	r10, r6, r6, ror #16
24534	eor	r11, r7, r7, ror #16
24535	bic	r8, r8, #0xff0000
24536	bic	r9, r9, #0xff0000
24537	bic	r10, r10, #0xff0000
24538	bic	r11, r11, #0xff0000
24539	ror	r4, r4, #8
24540	ror	r5, r5, #8
24541	ror	r6, r6, #8
24542	ror	r7, r7, #8
24543	eor	r4, r4, r8, lsr #8
24544	eor	r5, r5, r9, lsr #8
24545	eor	r6, r6, r10, lsr #8
24546	eor	r7, r7, r11, lsr #8
24547#else
24548	rev	r4, r4
24549	rev	r5, r5
24550	rev	r6, r6
24551	rev	r7, r7
24552#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
24553	ldr	r8, [lr]
24554	ldr	r9, [lr, #4]
24555	ldr	r10, [lr, #8]
24556	ldr	r11, [lr, #12]
24557	eor	r4, r4, r8
24558	eor	r5, r5, r9
24559	eor	r6, r6, r10
24560	eor	r7, r7, r11
24561	ldr	r8, [sp, #4]
24562	str	r4, [r1]
24563	str	r5, [r1, #4]
24564	str	r6, [r1, #8]
24565	str	r7, [r1, #12]
24566	ldm	r8, {r4, r5, r6, r7}
24567	subs	r2, r2, #16
24568	add	lr, lr, #16
24569	add	r1, r1, #16
24570	bne	L_AES_GCM_encrypt_loop_block_256
24571	b	L_AES_GCM_encrypt_end
24572L_AES_GCM_encrypt_start_block_192:
24573L_AES_GCM_encrypt_loop_block_192:
24574	push	{r1, r2, lr}
24575	ldr	lr, [sp, #16]
24576	add	r7, r7, #1
24577	ldm	r3!, {r8, r9, r10, r11}
24578	str	r7, [lr, #12]
24579	# Round: 0 - XOR in key schedule
24580	eor	r4, r4, r8
24581	eor	r5, r5, r9
24582	eor	r6, r6, r10
24583	eor	r7, r7, r11
24584	mov	r1, #5
24585#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
24586	bl	AES_encrypt_block
24587#else
24588L_AES_GCM_encrypt_block_nr_192:
24589#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24590#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24591	lsl	r8, r5, #8
24592	lsr	r8, r8, #24
24593#else
24594	uxtb	r8, r5, ror #16
24595#endif
24596#else
24597	ubfx	r8, r5, #16, #8
24598#endif
24599	lsr	r11, r4, #24
24600#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24601#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24602	lsl	lr, r6, #16
24603	lsr	lr, lr, #24
24604#else
24605	uxtb	lr, r6, ror #8
24606#endif
24607#else
24608	ubfx	lr, r6, #8, #8
24609#endif
24610#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24611#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24612	lsl	r2, r7, #24
24613	lsr	r2, r2, #24
24614#else
24615	uxtb	r2, r7
24616#endif
24617#else
24618	ubfx	r2, r7, #0, #8
24619#endif
24620	ldr	r8, [r0, r8, lsl #2]
24621	ldr	r11, [r0, r11, lsl #2]
24622	ldr	lr, [r0, lr, lsl #2]
24623	ldr	r2, [r0, r2, lsl #2]
24624#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24625#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24626	lsl	r9, r6, #8
24627	lsr	r9, r9, #24
24628#else
24629	uxtb	r9, r6, ror #16
24630#endif
24631#else
24632	ubfx	r9, r6, #16, #8
24633#endif
24634	eor	r8, r8, r11, ror #24
24635	lsr	r11, r5, #24
24636	eor	r8, r8, lr, ror #8
24637#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24638#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24639	lsl	lr, r7, #16
24640	lsr	lr, lr, #24
24641#else
24642	uxtb	lr, r7, ror #8
24643#endif
24644#else
24645	ubfx	lr, r7, #8, #8
24646#endif
24647	eor	r8, r8, r2, ror #16
24648#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24649#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24650	lsl	r2, r4, #24
24651	lsr	r2, r2, #24
24652#else
24653	uxtb	r2, r4
24654#endif
24655#else
24656	ubfx	r2, r4, #0, #8
24657#endif
24658	ldr	r9, [r0, r9, lsl #2]
24659	ldr	r11, [r0, r11, lsl #2]
24660	ldr	lr, [r0, lr, lsl #2]
24661	ldr	r2, [r0, r2, lsl #2]
24662#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24663#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24664	lsl	r10, r7, #8
24665	lsr	r10, r10, #24
24666#else
24667	uxtb	r10, r7, ror #16
24668#endif
24669#else
24670	ubfx	r10, r7, #16, #8
24671#endif
24672	eor	r9, r9, r11, ror #24
24673	lsr	r11, r6, #24
24674	eor	r9, r9, lr, ror #8
24675#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24676#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24677	lsl	lr, r4, #16
24678	lsr	lr, lr, #24
24679#else
24680	uxtb	lr, r4, ror #8
24681#endif
24682#else
24683	ubfx	lr, r4, #8, #8
24684#endif
24685	eor	r9, r9, r2, ror #16
24686#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24687#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24688	lsl	r2, r5, #24
24689	lsr	r2, r2, #24
24690#else
24691	uxtb	r2, r5
24692#endif
24693#else
24694	ubfx	r2, r5, #0, #8
24695#endif
24696	ldr	r10, [r0, r10, lsl #2]
24697	ldr	r11, [r0, r11, lsl #2]
24698	ldr	lr, [r0, lr, lsl #2]
24699	ldr	r2, [r0, r2, lsl #2]
24700#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24701#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24702	lsl	r6, r6, #24
24703	lsr	r6, r6, #24
24704#else
24705	uxtb	r6, r6
24706#endif
24707#else
24708	ubfx	r6, r6, #0, #8
24709#endif
24710	eor	r10, r10, r11, ror #24
24711#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24712#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24713	lsl	r11, r4, #8
24714	lsr	r11, r11, #24
24715#else
24716	uxtb	r11, r4, ror #16
24717#endif
24718#else
24719	ubfx	r11, r4, #16, #8
24720#endif
24721	eor	r10, r10, lr, ror #8
24722	lsr	lr, r7, #24
24723	eor	r10, r10, r2, ror #16
24724#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24725#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24726	lsl	r2, r5, #16
24727	lsr	r2, r2, #24
24728#else
24729	uxtb	r2, r5, ror #8
24730#endif
24731#else
24732	ubfx	r2, r5, #8, #8
24733#endif
24734	ldr	r6, [r0, r6, lsl #2]
24735	ldr	lr, [r0, lr, lsl #2]
24736	ldr	r11, [r0, r11, lsl #2]
24737	ldr	r2, [r0, r2, lsl #2]
24738	eor	lr, lr, r6, ror #24
24739	ldm	r3!, {r4, r5, r6, r7}
24740	eor	r11, r11, lr, ror #24
24741	eor	r11, r11, r2, ror #8
24742	#   XOR in Key Schedule
24743	eor	r8, r8, r4
24744	eor	r9, r9, r5
24745	eor	r10, r10, r6
24746	eor	r11, r11, r7
24747#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24748#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24749	lsl	r4, r9, #8
24750	lsr	r4, r4, #24
24751#else
24752	uxtb	r4, r9, ror #16
24753#endif
24754#else
24755	ubfx	r4, r9, #16, #8
24756#endif
24757	lsr	r7, r8, #24
24758#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24759#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24760	lsl	lr, r10, #16
24761	lsr	lr, lr, #24
24762#else
24763	uxtb	lr, r10, ror #8
24764#endif
24765#else
24766	ubfx	lr, r10, #8, #8
24767#endif
24768#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24769#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24770	lsl	r2, r11, #24
24771	lsr	r2, r2, #24
24772#else
24773	uxtb	r2, r11
24774#endif
24775#else
24776	ubfx	r2, r11, #0, #8
24777#endif
24778	ldr	r4, [r0, r4, lsl #2]
24779	ldr	r7, [r0, r7, lsl #2]
24780	ldr	lr, [r0, lr, lsl #2]
24781	ldr	r2, [r0, r2, lsl #2]
24782#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24783#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24784	lsl	r5, r10, #8
24785	lsr	r5, r5, #24
24786#else
24787	uxtb	r5, r10, ror #16
24788#endif
24789#else
24790	ubfx	r5, r10, #16, #8
24791#endif
24792	eor	r4, r4, r7, ror #24
24793	lsr	r7, r9, #24
24794	eor	r4, r4, lr, ror #8
24795#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24796#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24797	lsl	lr, r11, #16
24798	lsr	lr, lr, #24
24799#else
24800	uxtb	lr, r11, ror #8
24801#endif
24802#else
24803	ubfx	lr, r11, #8, #8
24804#endif
24805	eor	r4, r4, r2, ror #16
24806#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24807#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24808	lsl	r2, r8, #24
24809	lsr	r2, r2, #24
24810#else
24811	uxtb	r2, r8
24812#endif
24813#else
24814	ubfx	r2, r8, #0, #8
24815#endif
24816	ldr	r5, [r0, r5, lsl #2]
24817	ldr	r7, [r0, r7, lsl #2]
24818	ldr	lr, [r0, lr, lsl #2]
24819	ldr	r2, [r0, r2, lsl #2]
24820#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24821#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24822	lsl	r6, r11, #8
24823	lsr	r6, r6, #24
24824#else
24825	uxtb	r6, r11, ror #16
24826#endif
24827#else
24828	ubfx	r6, r11, #16, #8
24829#endif
24830	eor	r5, r5, r7, ror #24
24831	lsr	r7, r10, #24
24832	eor	r5, r5, lr, ror #8
24833#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24834#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24835	lsl	lr, r8, #16
24836	lsr	lr, lr, #24
24837#else
24838	uxtb	lr, r8, ror #8
24839#endif
24840#else
24841	ubfx	lr, r8, #8, #8
24842#endif
24843	eor	r5, r5, r2, ror #16
24844#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24845#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24846	lsl	r2, r9, #24
24847	lsr	r2, r2, #24
24848#else
24849	uxtb	r2, r9
24850#endif
24851#else
24852	ubfx	r2, r9, #0, #8
24853#endif
24854	ldr	r6, [r0, r6, lsl #2]
24855	ldr	r7, [r0, r7, lsl #2]
24856	ldr	lr, [r0, lr, lsl #2]
24857	ldr	r2, [r0, r2, lsl #2]
24858#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24859#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24860	lsl	r10, r10, #24
24861	lsr	r10, r10, #24
24862#else
24863	uxtb	r10, r10
24864#endif
24865#else
24866	ubfx	r10, r10, #0, #8
24867#endif
24868	eor	r6, r6, r7, ror #24
24869#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24870#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24871	lsl	r7, r8, #8
24872	lsr	r7, r7, #24
24873#else
24874	uxtb	r7, r8, ror #16
24875#endif
24876#else
24877	ubfx	r7, r8, #16, #8
24878#endif
24879	eor	r6, r6, lr, ror #8
24880	lsr	lr, r11, #24
24881	eor	r6, r6, r2, ror #16
24882#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24883#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24884	lsl	r2, r9, #16
24885	lsr	r2, r2, #24
24886#else
24887	uxtb	r2, r9, ror #8
24888#endif
24889#else
24890	ubfx	r2, r9, #8, #8
24891#endif
24892	ldr	r10, [r0, r10, lsl #2]
24893	ldr	lr, [r0, lr, lsl #2]
24894	ldr	r7, [r0, r7, lsl #2]
24895	ldr	r2, [r0, r2, lsl #2]
24896	eor	lr, lr, r10, ror #24
24897	ldm	r3!, {r8, r9, r10, r11}
24898	eor	r7, r7, lr, ror #24
24899	eor	r7, r7, r2, ror #8
24900	#   XOR in Key Schedule
24901	eor	r4, r4, r8
24902	eor	r5, r5, r9
24903	eor	r6, r6, r10
24904	eor	r7, r7, r11
24905	subs	r1, r1, #1
24906	bne	L_AES_GCM_encrypt_block_nr_192
24907#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24908#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24909	lsl	r8, r5, #8
24910	lsr	r8, r8, #24
24911#else
24912	uxtb	r8, r5, ror #16
24913#endif
24914#else
24915	ubfx	r8, r5, #16, #8
24916#endif
24917	lsr	r11, r4, #24
24918#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24919#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24920	lsl	lr, r6, #16
24921	lsr	lr, lr, #24
24922#else
24923	uxtb	lr, r6, ror #8
24924#endif
24925#else
24926	ubfx	lr, r6, #8, #8
24927#endif
24928#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24929#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24930	lsl	r2, r7, #24
24931	lsr	r2, r2, #24
24932#else
24933	uxtb	r2, r7
24934#endif
24935#else
24936	ubfx	r2, r7, #0, #8
24937#endif
24938	ldr	r8, [r0, r8, lsl #2]
24939	ldr	r11, [r0, r11, lsl #2]
24940	ldr	lr, [r0, lr, lsl #2]
24941	ldr	r2, [r0, r2, lsl #2]
24942#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24943#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24944	lsl	r9, r6, #8
24945	lsr	r9, r9, #24
24946#else
24947	uxtb	r9, r6, ror #16
24948#endif
24949#else
24950	ubfx	r9, r6, #16, #8
24951#endif
24952	eor	r8, r8, r11, ror #24
24953	lsr	r11, r5, #24
24954	eor	r8, r8, lr, ror #8
24955#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24956#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24957	lsl	lr, r7, #16
24958	lsr	lr, lr, #24
24959#else
24960	uxtb	lr, r7, ror #8
24961#endif
24962#else
24963	ubfx	lr, r7, #8, #8
24964#endif
24965	eor	r8, r8, r2, ror #16
24966#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24967#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24968	lsl	r2, r4, #24
24969	lsr	r2, r2, #24
24970#else
24971	uxtb	r2, r4
24972#endif
24973#else
24974	ubfx	r2, r4, #0, #8
24975#endif
24976	ldr	r9, [r0, r9, lsl #2]
24977	ldr	r11, [r0, r11, lsl #2]
24978	ldr	lr, [r0, lr, lsl #2]
24979	ldr	r2, [r0, r2, lsl #2]
24980#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24981#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24982	lsl	r10, r7, #8
24983	lsr	r10, r10, #24
24984#else
24985	uxtb	r10, r7, ror #16
24986#endif
24987#else
24988	ubfx	r10, r7, #16, #8
24989#endif
24990	eor	r9, r9, r11, ror #24
24991	lsr	r11, r6, #24
24992	eor	r9, r9, lr, ror #8
24993#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
24994#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
24995	lsl	lr, r4, #16
24996	lsr	lr, lr, #24
24997#else
24998	uxtb	lr, r4, ror #8
24999#endif
25000#else
25001	ubfx	lr, r4, #8, #8
25002#endif
25003	eor	r9, r9, r2, ror #16
25004#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25005#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25006	lsl	r2, r5, #24
25007	lsr	r2, r2, #24
25008#else
25009	uxtb	r2, r5
25010#endif
25011#else
25012	ubfx	r2, r5, #0, #8
25013#endif
25014	ldr	r10, [r0, r10, lsl #2]
25015	ldr	r11, [r0, r11, lsl #2]
25016	ldr	lr, [r0, lr, lsl #2]
25017	ldr	r2, [r0, r2, lsl #2]
25018#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25019#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25020	lsl	r6, r6, #24
25021	lsr	r6, r6, #24
25022#else
25023	uxtb	r6, r6
25024#endif
25025#else
25026	ubfx	r6, r6, #0, #8
25027#endif
25028	eor	r10, r10, r11, ror #24
25029#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25030#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25031	lsl	r11, r4, #8
25032	lsr	r11, r11, #24
25033#else
25034	uxtb	r11, r4, ror #16
25035#endif
25036#else
25037	ubfx	r11, r4, #16, #8
25038#endif
25039	eor	r10, r10, lr, ror #8
25040	lsr	lr, r7, #24
25041	eor	r10, r10, r2, ror #16
25042#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25043#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25044	lsl	r2, r5, #16
25045	lsr	r2, r2, #24
25046#else
25047	uxtb	r2, r5, ror #8
25048#endif
25049#else
25050	ubfx	r2, r5, #8, #8
25051#endif
25052	ldr	r6, [r0, r6, lsl #2]
25053	ldr	lr, [r0, lr, lsl #2]
25054	ldr	r11, [r0, r11, lsl #2]
25055	ldr	r2, [r0, r2, lsl #2]
25056	eor	lr, lr, r6, ror #24
25057	ldm	r3!, {r4, r5, r6, r7}
25058	eor	r11, r11, lr, ror #24
25059	eor	r11, r11, r2, ror #8
25060	#   XOR in Key Schedule
25061	eor	r8, r8, r4
25062	eor	r9, r9, r5
25063	eor	r10, r10, r6
25064	eor	r11, r11, r7
25065#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25066#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25067	lsl	r4, r11, #24
25068	lsr	r4, r4, #24
25069#else
25070	uxtb	r4, r11
25071#endif
25072#else
25073	ubfx	r4, r11, #0, #8
25074#endif
25075#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25076#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25077	lsl	r7, r10, #16
25078	lsr	r7, r7, #24
25079#else
25080	uxtb	r7, r10, ror #8
25081#endif
25082#else
25083	ubfx	r7, r10, #8, #8
25084#endif
25085#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25086#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25087	lsl	lr, r9, #8
25088	lsr	lr, lr, #24
25089#else
25090	uxtb	lr, r9, ror #16
25091#endif
25092#else
25093	ubfx	lr, r9, #16, #8
25094#endif
25095	lsr	r2, r8, #24
25096	ldrb	r4, [r0, r4, lsl #2]
25097	ldrb	r7, [r0, r7, lsl #2]
25098	ldrb	lr, [r0, lr, lsl #2]
25099	ldrb	r2, [r0, r2, lsl #2]
25100#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25101#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25102	lsl	r5, r8, #24
25103	lsr	r5, r5, #24
25104#else
25105	uxtb	r5, r8
25106#endif
25107#else
25108	ubfx	r5, r8, #0, #8
25109#endif
25110	eor	r4, r4, r7, lsl #8
25111#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25112#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25113	lsl	r7, r11, #16
25114	lsr	r7, r7, #24
25115#else
25116	uxtb	r7, r11, ror #8
25117#endif
25118#else
25119	ubfx	r7, r11, #8, #8
25120#endif
25121	eor	r4, r4, lr, lsl #16
25122#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25123#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25124	lsl	lr, r10, #8
25125	lsr	lr, lr, #24
25126#else
25127	uxtb	lr, r10, ror #16
25128#endif
25129#else
25130	ubfx	lr, r10, #16, #8
25131#endif
25132	eor	r4, r4, r2, lsl #24
25133	lsr	r2, r9, #24
25134	ldrb	r5, [r0, r5, lsl #2]
25135	ldrb	r7, [r0, r7, lsl #2]
25136	ldrb	lr, [r0, lr, lsl #2]
25137	ldrb	r2, [r0, r2, lsl #2]
25138#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25139#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25140	lsl	r6, r9, #24
25141	lsr	r6, r6, #24
25142#else
25143	uxtb	r6, r9
25144#endif
25145#else
25146	ubfx	r6, r9, #0, #8
25147#endif
25148	eor	r5, r5, r7, lsl #8
25149#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25150#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25151	lsl	r7, r8, #16
25152	lsr	r7, r7, #24
25153#else
25154	uxtb	r7, r8, ror #8
25155#endif
25156#else
25157	ubfx	r7, r8, #8, #8
25158#endif
25159	eor	r5, r5, lr, lsl #16
25160#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25161#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25162	lsl	lr, r11, #8
25163	lsr	lr, lr, #24
25164#else
25165	uxtb	lr, r11, ror #16
25166#endif
25167#else
25168	ubfx	lr, r11, #16, #8
25169#endif
25170	eor	r5, r5, r2, lsl #24
25171	lsr	r2, r10, #24
25172	ldrb	r6, [r0, r6, lsl #2]
25173	ldrb	r7, [r0, r7, lsl #2]
25174	ldrb	lr, [r0, lr, lsl #2]
25175	ldrb	r2, [r0, r2, lsl #2]
25176	lsr	r11, r11, #24
25177	eor	r6, r6, r7, lsl #8
25178#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25179#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25180	lsl	r7, r10, #24
25181	lsr	r7, r7, #24
25182#else
25183	uxtb	r7, r10
25184#endif
25185#else
25186	ubfx	r7, r10, #0, #8
25187#endif
25188	eor	r6, r6, lr, lsl #16
25189#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25190#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25191	lsl	lr, r9, #16
25192	lsr	lr, lr, #24
25193#else
25194	uxtb	lr, r9, ror #8
25195#endif
25196#else
25197	ubfx	lr, r9, #8, #8
25198#endif
25199	eor	r6, r6, r2, lsl #24
25200#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25201#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25202	lsl	r2, r8, #8
25203	lsr	r2, r2, #24
25204#else
25205	uxtb	r2, r8, ror #16
25206#endif
25207#else
25208	ubfx	r2, r8, #16, #8
25209#endif
25210	ldrb	r11, [r0, r11, lsl #2]
25211	ldrb	r7, [r0, r7, lsl #2]
25212	ldrb	lr, [r0, lr, lsl #2]
25213	ldrb	r2, [r0, r2, lsl #2]
25214	eor	lr, lr, r11, lsl #16
25215	ldm	r3, {r8, r9, r10, r11}
25216	eor	r7, r7, lr, lsl #8
25217	eor	r7, r7, r2, lsl #16
25218	#   XOR in Key Schedule
25219	eor	r4, r4, r8
25220	eor	r5, r5, r9
25221	eor	r6, r6, r10
25222	eor	r7, r7, r11
25223#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
25224	pop	{r1, r2, lr}
25225	ldr	r3, [sp]
25226#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25227	eor	r8, r4, r4, ror #16
25228	eor	r9, r5, r5, ror #16
25229	eor	r10, r6, r6, ror #16
25230	eor	r11, r7, r7, ror #16
25231	bic	r8, r8, #0xff0000
25232	bic	r9, r9, #0xff0000
25233	bic	r10, r10, #0xff0000
25234	bic	r11, r11, #0xff0000
25235	ror	r4, r4, #8
25236	ror	r5, r5, #8
25237	ror	r6, r6, #8
25238	ror	r7, r7, #8
25239	eor	r4, r4, r8, lsr #8
25240	eor	r5, r5, r9, lsr #8
25241	eor	r6, r6, r10, lsr #8
25242	eor	r7, r7, r11, lsr #8
25243#else
25244	rev	r4, r4
25245	rev	r5, r5
25246	rev	r6, r6
25247	rev	r7, r7
25248#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
25249	ldr	r8, [lr]
25250	ldr	r9, [lr, #4]
25251	ldr	r10, [lr, #8]
25252	ldr	r11, [lr, #12]
25253	eor	r4, r4, r8
25254	eor	r5, r5, r9
25255	eor	r6, r6, r10
25256	eor	r7, r7, r11
25257	ldr	r8, [sp, #4]
25258	str	r4, [r1]
25259	str	r5, [r1, #4]
25260	str	r6, [r1, #8]
25261	str	r7, [r1, #12]
25262	ldm	r8, {r4, r5, r6, r7}
25263	subs	r2, r2, #16
25264	add	lr, lr, #16
25265	add	r1, r1, #16
25266	bne	L_AES_GCM_encrypt_loop_block_192
25267	b	L_AES_GCM_encrypt_end
25268L_AES_GCM_encrypt_start_block_128:
25269L_AES_GCM_encrypt_loop_block_128:
25270	push	{r1, r2, lr}
25271	ldr	lr, [sp, #16]
25272	add	r7, r7, #1
25273	ldm	r3!, {r8, r9, r10, r11}
25274	str	r7, [lr, #12]
25275	# Round: 0 - XOR in key schedule
25276	eor	r4, r4, r8
25277	eor	r5, r5, r9
25278	eor	r6, r6, r10
25279	eor	r7, r7, r11
25280	mov	r1, #4
25281#ifndef WOLFSSL_ARMASM_AES_BLOCK_INLINE
25282	bl	AES_encrypt_block
25283#else
25284L_AES_GCM_encrypt_block_nr_128:
25285#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25286#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25287	lsl	r8, r5, #8
25288	lsr	r8, r8, #24
25289#else
25290	uxtb	r8, r5, ror #16
25291#endif
25292#else
25293	ubfx	r8, r5, #16, #8
25294#endif
25295	lsr	r11, r4, #24
25296#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25297#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25298	lsl	lr, r6, #16
25299	lsr	lr, lr, #24
25300#else
25301	uxtb	lr, r6, ror #8
25302#endif
25303#else
25304	ubfx	lr, r6, #8, #8
25305#endif
25306#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25307#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25308	lsl	r2, r7, #24
25309	lsr	r2, r2, #24
25310#else
25311	uxtb	r2, r7
25312#endif
25313#else
25314	ubfx	r2, r7, #0, #8
25315#endif
25316	ldr	r8, [r0, r8, lsl #2]
25317	ldr	r11, [r0, r11, lsl #2]
25318	ldr	lr, [r0, lr, lsl #2]
25319	ldr	r2, [r0, r2, lsl #2]
25320#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25321#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25322	lsl	r9, r6, #8
25323	lsr	r9, r9, #24
25324#else
25325	uxtb	r9, r6, ror #16
25326#endif
25327#else
25328	ubfx	r9, r6, #16, #8
25329#endif
25330	eor	r8, r8, r11, ror #24
25331	lsr	r11, r5, #24
25332	eor	r8, r8, lr, ror #8
25333#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25334#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25335	lsl	lr, r7, #16
25336	lsr	lr, lr, #24
25337#else
25338	uxtb	lr, r7, ror #8
25339#endif
25340#else
25341	ubfx	lr, r7, #8, #8
25342#endif
25343	eor	r8, r8, r2, ror #16
25344#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25345#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25346	lsl	r2, r4, #24
25347	lsr	r2, r2, #24
25348#else
25349	uxtb	r2, r4
25350#endif
25351#else
25352	ubfx	r2, r4, #0, #8
25353#endif
25354	ldr	r9, [r0, r9, lsl #2]
25355	ldr	r11, [r0, r11, lsl #2]
25356	ldr	lr, [r0, lr, lsl #2]
25357	ldr	r2, [r0, r2, lsl #2]
25358#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25359#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25360	lsl	r10, r7, #8
25361	lsr	r10, r10, #24
25362#else
25363	uxtb	r10, r7, ror #16
25364#endif
25365#else
25366	ubfx	r10, r7, #16, #8
25367#endif
25368	eor	r9, r9, r11, ror #24
25369	lsr	r11, r6, #24
25370	eor	r9, r9, lr, ror #8
25371#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25372#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25373	lsl	lr, r4, #16
25374	lsr	lr, lr, #24
25375#else
25376	uxtb	lr, r4, ror #8
25377#endif
25378#else
25379	ubfx	lr, r4, #8, #8
25380#endif
25381	eor	r9, r9, r2, ror #16
25382#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25383#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25384	lsl	r2, r5, #24
25385	lsr	r2, r2, #24
25386#else
25387	uxtb	r2, r5
25388#endif
25389#else
25390	ubfx	r2, r5, #0, #8
25391#endif
25392	ldr	r10, [r0, r10, lsl #2]
25393	ldr	r11, [r0, r11, lsl #2]
25394	ldr	lr, [r0, lr, lsl #2]
25395	ldr	r2, [r0, r2, lsl #2]
25396#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25397#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25398	lsl	r6, r6, #24
25399	lsr	r6, r6, #24
25400#else
25401	uxtb	r6, r6
25402#endif
25403#else
25404	ubfx	r6, r6, #0, #8
25405#endif
25406	eor	r10, r10, r11, ror #24
25407#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25408#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25409	lsl	r11, r4, #8
25410	lsr	r11, r11, #24
25411#else
25412	uxtb	r11, r4, ror #16
25413#endif
25414#else
25415	ubfx	r11, r4, #16, #8
25416#endif
25417	eor	r10, r10, lr, ror #8
25418	lsr	lr, r7, #24
25419	eor	r10, r10, r2, ror #16
25420#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25421#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25422	lsl	r2, r5, #16
25423	lsr	r2, r2, #24
25424#else
25425	uxtb	r2, r5, ror #8
25426#endif
25427#else
25428	ubfx	r2, r5, #8, #8
25429#endif
25430	ldr	r6, [r0, r6, lsl #2]
25431	ldr	lr, [r0, lr, lsl #2]
25432	ldr	r11, [r0, r11, lsl #2]
25433	ldr	r2, [r0, r2, lsl #2]
25434	eor	lr, lr, r6, ror #24
25435	ldm	r3!, {r4, r5, r6, r7}
25436	eor	r11, r11, lr, ror #24
25437	eor	r11, r11, r2, ror #8
25438	#   XOR in Key Schedule
25439	eor	r8, r8, r4
25440	eor	r9, r9, r5
25441	eor	r10, r10, r6
25442	eor	r11, r11, r7
25443#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25444#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25445	lsl	r4, r9, #8
25446	lsr	r4, r4, #24
25447#else
25448	uxtb	r4, r9, ror #16
25449#endif
25450#else
25451	ubfx	r4, r9, #16, #8
25452#endif
25453	lsr	r7, r8, #24
25454#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25455#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25456	lsl	lr, r10, #16
25457	lsr	lr, lr, #24
25458#else
25459	uxtb	lr, r10, ror #8
25460#endif
25461#else
25462	ubfx	lr, r10, #8, #8
25463#endif
25464#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25465#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25466	lsl	r2, r11, #24
25467	lsr	r2, r2, #24
25468#else
25469	uxtb	r2, r11
25470#endif
25471#else
25472	ubfx	r2, r11, #0, #8
25473#endif
25474	ldr	r4, [r0, r4, lsl #2]
25475	ldr	r7, [r0, r7, lsl #2]
25476	ldr	lr, [r0, lr, lsl #2]
25477	ldr	r2, [r0, r2, lsl #2]
25478#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25479#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25480	lsl	r5, r10, #8
25481	lsr	r5, r5, #24
25482#else
25483	uxtb	r5, r10, ror #16
25484#endif
25485#else
25486	ubfx	r5, r10, #16, #8
25487#endif
25488	eor	r4, r4, r7, ror #24
25489	lsr	r7, r9, #24
25490	eor	r4, r4, lr, ror #8
25491#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25492#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25493	lsl	lr, r11, #16
25494	lsr	lr, lr, #24
25495#else
25496	uxtb	lr, r11, ror #8
25497#endif
25498#else
25499	ubfx	lr, r11, #8, #8
25500#endif
25501	eor	r4, r4, r2, ror #16
25502#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25503#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25504	lsl	r2, r8, #24
25505	lsr	r2, r2, #24
25506#else
25507	uxtb	r2, r8
25508#endif
25509#else
25510	ubfx	r2, r8, #0, #8
25511#endif
25512	ldr	r5, [r0, r5, lsl #2]
25513	ldr	r7, [r0, r7, lsl #2]
25514	ldr	lr, [r0, lr, lsl #2]
25515	ldr	r2, [r0, r2, lsl #2]
25516#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25517#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25518	lsl	r6, r11, #8
25519	lsr	r6, r6, #24
25520#else
25521	uxtb	r6, r11, ror #16
25522#endif
25523#else
25524	ubfx	r6, r11, #16, #8
25525#endif
25526	eor	r5, r5, r7, ror #24
25527	lsr	r7, r10, #24
25528	eor	r5, r5, lr, ror #8
25529#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25530#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25531	lsl	lr, r8, #16
25532	lsr	lr, lr, #24
25533#else
25534	uxtb	lr, r8, ror #8
25535#endif
25536#else
25537	ubfx	lr, r8, #8, #8
25538#endif
25539	eor	r5, r5, r2, ror #16
25540#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25541#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25542	lsl	r2, r9, #24
25543	lsr	r2, r2, #24
25544#else
25545	uxtb	r2, r9
25546#endif
25547#else
25548	ubfx	r2, r9, #0, #8
25549#endif
25550	ldr	r6, [r0, r6, lsl #2]
25551	ldr	r7, [r0, r7, lsl #2]
25552	ldr	lr, [r0, lr, lsl #2]
25553	ldr	r2, [r0, r2, lsl #2]
25554#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25555#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25556	lsl	r10, r10, #24
25557	lsr	r10, r10, #24
25558#else
25559	uxtb	r10, r10
25560#endif
25561#else
25562	ubfx	r10, r10, #0, #8
25563#endif
25564	eor	r6, r6, r7, ror #24
25565#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25566#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25567	lsl	r7, r8, #8
25568	lsr	r7, r7, #24
25569#else
25570	uxtb	r7, r8, ror #16
25571#endif
25572#else
25573	ubfx	r7, r8, #16, #8
25574#endif
25575	eor	r6, r6, lr, ror #8
25576	lsr	lr, r11, #24
25577	eor	r6, r6, r2, ror #16
25578#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25579#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25580	lsl	r2, r9, #16
25581	lsr	r2, r2, #24
25582#else
25583	uxtb	r2, r9, ror #8
25584#endif
25585#else
25586	ubfx	r2, r9, #8, #8
25587#endif
25588	ldr	r10, [r0, r10, lsl #2]
25589	ldr	lr, [r0, lr, lsl #2]
25590	ldr	r7, [r0, r7, lsl #2]
25591	ldr	r2, [r0, r2, lsl #2]
25592	eor	lr, lr, r10, ror #24
25593	ldm	r3!, {r8, r9, r10, r11}
25594	eor	r7, r7, lr, ror #24
25595	eor	r7, r7, r2, ror #8
25596	#   XOR in Key Schedule
25597	eor	r4, r4, r8
25598	eor	r5, r5, r9
25599	eor	r6, r6, r10
25600	eor	r7, r7, r11
25601	subs	r1, r1, #1
25602	bne	L_AES_GCM_encrypt_block_nr_128
25603#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25604#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25605	lsl	r8, r5, #8
25606	lsr	r8, r8, #24
25607#else
25608	uxtb	r8, r5, ror #16
25609#endif
25610#else
25611	ubfx	r8, r5, #16, #8
25612#endif
25613	lsr	r11, r4, #24
25614#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25615#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25616	lsl	lr, r6, #16
25617	lsr	lr, lr, #24
25618#else
25619	uxtb	lr, r6, ror #8
25620#endif
25621#else
25622	ubfx	lr, r6, #8, #8
25623#endif
25624#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25625#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25626	lsl	r2, r7, #24
25627	lsr	r2, r2, #24
25628#else
25629	uxtb	r2, r7
25630#endif
25631#else
25632	ubfx	r2, r7, #0, #8
25633#endif
25634	ldr	r8, [r0, r8, lsl #2]
25635	ldr	r11, [r0, r11, lsl #2]
25636	ldr	lr, [r0, lr, lsl #2]
25637	ldr	r2, [r0, r2, lsl #2]
25638#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25639#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25640	lsl	r9, r6, #8
25641	lsr	r9, r9, #24
25642#else
25643	uxtb	r9, r6, ror #16
25644#endif
25645#else
25646	ubfx	r9, r6, #16, #8
25647#endif
25648	eor	r8, r8, r11, ror #24
25649	lsr	r11, r5, #24
25650	eor	r8, r8, lr, ror #8
25651#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25652#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25653	lsl	lr, r7, #16
25654	lsr	lr, lr, #24
25655#else
25656	uxtb	lr, r7, ror #8
25657#endif
25658#else
25659	ubfx	lr, r7, #8, #8
25660#endif
25661	eor	r8, r8, r2, ror #16
25662#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25663#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25664	lsl	r2, r4, #24
25665	lsr	r2, r2, #24
25666#else
25667	uxtb	r2, r4
25668#endif
25669#else
25670	ubfx	r2, r4, #0, #8
25671#endif
25672	ldr	r9, [r0, r9, lsl #2]
25673	ldr	r11, [r0, r11, lsl #2]
25674	ldr	lr, [r0, lr, lsl #2]
25675	ldr	r2, [r0, r2, lsl #2]
25676#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25677#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25678	lsl	r10, r7, #8
25679	lsr	r10, r10, #24
25680#else
25681	uxtb	r10, r7, ror #16
25682#endif
25683#else
25684	ubfx	r10, r7, #16, #8
25685#endif
25686	eor	r9, r9, r11, ror #24
25687	lsr	r11, r6, #24
25688	eor	r9, r9, lr, ror #8
25689#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25690#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25691	lsl	lr, r4, #16
25692	lsr	lr, lr, #24
25693#else
25694	uxtb	lr, r4, ror #8
25695#endif
25696#else
25697	ubfx	lr, r4, #8, #8
25698#endif
25699	eor	r9, r9, r2, ror #16
25700#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25701#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25702	lsl	r2, r5, #24
25703	lsr	r2, r2, #24
25704#else
25705	uxtb	r2, r5
25706#endif
25707#else
25708	ubfx	r2, r5, #0, #8
25709#endif
25710	ldr	r10, [r0, r10, lsl #2]
25711	ldr	r11, [r0, r11, lsl #2]
25712	ldr	lr, [r0, lr, lsl #2]
25713	ldr	r2, [r0, r2, lsl #2]
25714#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25715#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25716	lsl	r6, r6, #24
25717	lsr	r6, r6, #24
25718#else
25719	uxtb	r6, r6
25720#endif
25721#else
25722	ubfx	r6, r6, #0, #8
25723#endif
25724	eor	r10, r10, r11, ror #24
25725#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25726#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25727	lsl	r11, r4, #8
25728	lsr	r11, r11, #24
25729#else
25730	uxtb	r11, r4, ror #16
25731#endif
25732#else
25733	ubfx	r11, r4, #16, #8
25734#endif
25735	eor	r10, r10, lr, ror #8
25736	lsr	lr, r7, #24
25737	eor	r10, r10, r2, ror #16
25738#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25739#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25740	lsl	r2, r5, #16
25741	lsr	r2, r2, #24
25742#else
25743	uxtb	r2, r5, ror #8
25744#endif
25745#else
25746	ubfx	r2, r5, #8, #8
25747#endif
25748	ldr	r6, [r0, r6, lsl #2]
25749	ldr	lr, [r0, lr, lsl #2]
25750	ldr	r11, [r0, r11, lsl #2]
25751	ldr	r2, [r0, r2, lsl #2]
25752	eor	lr, lr, r6, ror #24
25753	ldm	r3!, {r4, r5, r6, r7}
25754	eor	r11, r11, lr, ror #24
25755	eor	r11, r11, r2, ror #8
25756	#   XOR in Key Schedule
25757	eor	r8, r8, r4
25758	eor	r9, r9, r5
25759	eor	r10, r10, r6
25760	eor	r11, r11, r7
25761#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25762#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25763	lsl	r4, r11, #24
25764	lsr	r4, r4, #24
25765#else
25766	uxtb	r4, r11
25767#endif
25768#else
25769	ubfx	r4, r11, #0, #8
25770#endif
25771#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25772#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25773	lsl	r7, r10, #16
25774	lsr	r7, r7, #24
25775#else
25776	uxtb	r7, r10, ror #8
25777#endif
25778#else
25779	ubfx	r7, r10, #8, #8
25780#endif
25781#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25782#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25783	lsl	lr, r9, #8
25784	lsr	lr, lr, #24
25785#else
25786	uxtb	lr, r9, ror #16
25787#endif
25788#else
25789	ubfx	lr, r9, #16, #8
25790#endif
25791	lsr	r2, r8, #24
25792	ldrb	r4, [r0, r4, lsl #2]
25793	ldrb	r7, [r0, r7, lsl #2]
25794	ldrb	lr, [r0, lr, lsl #2]
25795	ldrb	r2, [r0, r2, lsl #2]
25796#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25797#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25798	lsl	r5, r8, #24
25799	lsr	r5, r5, #24
25800#else
25801	uxtb	r5, r8
25802#endif
25803#else
25804	ubfx	r5, r8, #0, #8
25805#endif
25806	eor	r4, r4, r7, lsl #8
25807#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25808#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25809	lsl	r7, r11, #16
25810	lsr	r7, r7, #24
25811#else
25812	uxtb	r7, r11, ror #8
25813#endif
25814#else
25815	ubfx	r7, r11, #8, #8
25816#endif
25817	eor	r4, r4, lr, lsl #16
25818#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25819#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25820	lsl	lr, r10, #8
25821	lsr	lr, lr, #24
25822#else
25823	uxtb	lr, r10, ror #16
25824#endif
25825#else
25826	ubfx	lr, r10, #16, #8
25827#endif
25828	eor	r4, r4, r2, lsl #24
25829	lsr	r2, r9, #24
25830	ldrb	r5, [r0, r5, lsl #2]
25831	ldrb	r7, [r0, r7, lsl #2]
25832	ldrb	lr, [r0, lr, lsl #2]
25833	ldrb	r2, [r0, r2, lsl #2]
25834#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25835#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25836	lsl	r6, r9, #24
25837	lsr	r6, r6, #24
25838#else
25839	uxtb	r6, r9
25840#endif
25841#else
25842	ubfx	r6, r9, #0, #8
25843#endif
25844	eor	r5, r5, r7, lsl #8
25845#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25846#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25847	lsl	r7, r8, #16
25848	lsr	r7, r7, #24
25849#else
25850	uxtb	r7, r8, ror #8
25851#endif
25852#else
25853	ubfx	r7, r8, #8, #8
25854#endif
25855	eor	r5, r5, lr, lsl #16
25856#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25857#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25858	lsl	lr, r11, #8
25859	lsr	lr, lr, #24
25860#else
25861	uxtb	lr, r11, ror #16
25862#endif
25863#else
25864	ubfx	lr, r11, #16, #8
25865#endif
25866	eor	r5, r5, r2, lsl #24
25867	lsr	r2, r10, #24
25868	ldrb	r6, [r0, r6, lsl #2]
25869	ldrb	r7, [r0, r7, lsl #2]
25870	ldrb	lr, [r0, lr, lsl #2]
25871	ldrb	r2, [r0, r2, lsl #2]
25872	lsr	r11, r11, #24
25873	eor	r6, r6, r7, lsl #8
25874#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25875#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25876	lsl	r7, r10, #24
25877	lsr	r7, r7, #24
25878#else
25879	uxtb	r7, r10
25880#endif
25881#else
25882	ubfx	r7, r10, #0, #8
25883#endif
25884	eor	r6, r6, lr, lsl #16
25885#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25886#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25887	lsl	lr, r9, #16
25888	lsr	lr, lr, #24
25889#else
25890	uxtb	lr, r9, ror #8
25891#endif
25892#else
25893	ubfx	lr, r9, #8, #8
25894#endif
25895	eor	r6, r6, r2, lsl #24
25896#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
25897#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25898	lsl	r2, r8, #8
25899	lsr	r2, r2, #24
25900#else
25901	uxtb	r2, r8, ror #16
25902#endif
25903#else
25904	ubfx	r2, r8, #16, #8
25905#endif
25906	ldrb	r11, [r0, r11, lsl #2]
25907	ldrb	r7, [r0, r7, lsl #2]
25908	ldrb	lr, [r0, lr, lsl #2]
25909	ldrb	r2, [r0, r2, lsl #2]
25910	eor	lr, lr, r11, lsl #16
25911	ldm	r3, {r8, r9, r10, r11}
25912	eor	r7, r7, lr, lsl #8
25913	eor	r7, r7, r2, lsl #16
25914	#   XOR in Key Schedule
25915	eor	r4, r4, r8
25916	eor	r5, r5, r9
25917	eor	r6, r6, r10
25918	eor	r7, r7, r11
25919#endif /* !WOLFSSL_ARMASM_AES_BLOCK_INLINE */
25920	pop	{r1, r2, lr}
25921	ldr	r3, [sp]
25922#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25923	eor	r8, r4, r4, ror #16
25924	eor	r9, r5, r5, ror #16
25925	eor	r10, r6, r6, ror #16
25926	eor	r11, r7, r7, ror #16
25927	bic	r8, r8, #0xff0000
25928	bic	r9, r9, #0xff0000
25929	bic	r10, r10, #0xff0000
25930	bic	r11, r11, #0xff0000
25931	ror	r4, r4, #8
25932	ror	r5, r5, #8
25933	ror	r6, r6, #8
25934	ror	r7, r7, #8
25935	eor	r4, r4, r8, lsr #8
25936	eor	r5, r5, r9, lsr #8
25937	eor	r6, r6, r10, lsr #8
25938	eor	r7, r7, r11, lsr #8
25939#else
25940	rev	r4, r4
25941	rev	r5, r5
25942	rev	r6, r6
25943	rev	r7, r7
25944#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
25945	ldr	r8, [lr]
25946	ldr	r9, [lr, #4]
25947	ldr	r10, [lr, #8]
25948	ldr	r11, [lr, #12]
25949	eor	r4, r4, r8
25950	eor	r5, r5, r9
25951	eor	r6, r6, r10
25952	eor	r7, r7, r11
25953	ldr	r8, [sp, #4]
25954	str	r4, [r1]
25955	str	r5, [r1, #4]
25956	str	r6, [r1, #8]
25957	str	r7, [r1, #12]
25958	ldm	r8, {r4, r5, r6, r7}
25959	subs	r2, r2, #16
25960	add	lr, lr, #16
25961	add	r1, r1, #16
25962	bne	L_AES_GCM_encrypt_loop_block_128
25963L_AES_GCM_encrypt_end:
25964	pop	{r3, r8}
25965#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
25966	eor	r10, r4, r4, ror #16
25967	eor	r11, r5, r5, ror #16
25968	bic	r10, r10, #0xff0000
25969	bic	r11, r11, #0xff0000
25970	ror	r4, r4, #8
25971	ror	r5, r5, #8
25972	eor	r4, r4, r10, lsr #8
25973	eor	r5, r5, r11, lsr #8
25974	eor	r10, r6, r6, ror #16
25975	eor	r11, r7, r7, ror #16
25976	bic	r10, r10, #0xff0000
25977	bic	r11, r11, #0xff0000
25978	ror	r6, r6, #8
25979	ror	r7, r7, #8
25980	eor	r6, r6, r10, lsr #8
25981	eor	r7, r7, r11, lsr #8
25982#else
25983	rev	r4, r4
25984	rev	r5, r5
25985	rev	r6, r6
25986	rev	r7, r7
25987#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
25988	stm	r8, {r4, r5, r6, r7}
25989	pop	{r4, r5, r6, r7, r8, r9, r10, r11, pc}
25990	.size	AES_GCM_encrypt,.-AES_GCM_encrypt
25991#endif /* HAVE_AESGCM */
25992#endif /* !WOLFSSL_ARMASM_NO_HW_CRYPTO */
25993#endif /* !NO_AES */
25994#endif /* !__aarch64__ && !WOLFSSL_ARMASM_THUMB2 */
25995#endif /* WOLFSSL_ARMASM */
25996
25997#if defined(__linux__) && defined(__ELF__)
25998.section	.note.GNU-stack,"",%progbits
25999#endif
26000#endif /* !WOLFSSL_ARMASM_INLINE */