luna - wolfssl/wolfcrypt/src/port/arm/armv8-32-sha256-asm.S

   1/* armv8-32-sha256-asm
   2 *
   3 * Copyright (C) 2006-2026 wolfSSL Inc.
   4 *
   5 * This file is part of wolfSSL.
   6 *
   7 * wolfSSL is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation; either version 3 of the License, or
  10 * (at your option) any later version.
  11 *
  12 * wolfSSL is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
  20 */
  21
  22/* Generated using (from wolfssl):
  23 *   cd ../scripts
  24 *   ruby ./sha2/sha256.rb arm32 \
  25 *       ../wolfssl/wolfcrypt/src/port/arm/armv8-32-sha256-asm.S
  26 */
  27
  28#include <wolfssl/wolfcrypt/libwolfssl_sources_asm.h>
  29
  30#ifdef WOLFSSL_ARMASM
  31#if !defined(__aarch64__) && !defined(WOLFSSL_ARMASM_THUMB2)
  32#ifndef WOLFSSL_ARMASM_INLINE
  33#ifndef NO_SHA256
  34#ifdef WOLFSSL_ARMASM_NO_NEON
  35#ifndef __APPLE__
  36	.text
  37	.type	L_SHA256_transform_len_k, %object
  38	.size	L_SHA256_transform_len_k, 256
  39#else
  40	.section	__DATA,__data
  41#endif /* __APPLE__ */
  42	# 8-byte aligned, 64-bit aligned
  43#ifndef __APPLE__
  44	.align	3
  45#else
  46	.p2align	3
  47#endif /* __APPLE__ */
  48L_SHA256_transform_len_k:
  49	.long	0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5
  50	.long	0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5
  51	.long	0xd807aa98,0x12835b01,0x243185be,0x550c7dc3
  52	.long	0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174
  53	.long	0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc
  54	.long	0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da
  55	.long	0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7
  56	.long	0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967
  57	.long	0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13
  58	.long	0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85
  59	.long	0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3
  60	.long	0xd192e819,0xd6990624,0xf40e3585,0x106aa070
  61	.long	0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5
  62	.long	0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3
  63	.long	0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208
  64	.long	0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2
  65	.text
  66	.align	4
  67	.globl	Transform_Sha256_Len_base
  68	.type	Transform_Sha256_Len_base, %function
  69Transform_Sha256_Len_base:
  70	push	{r4, r5, r6, r7, r8, r9, r10, r11, lr}
  71	sub	sp, sp, #0xc0
  72	adr	r12, L_SHA256_transform_len_k
  73	# Copy digest to add in at end
  74#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  75	ldm	r0, {r4, r5}
  76#else
  77	ldrd	r4, r5, [r0]
  78#endif
  79#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  80	ldr	r6, [r0, #8]
  81	ldr	r7, [r0, #12]
  82#else
  83	ldrd	r6, r7, [r0, #8]
  84#endif
  85#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  86	ldr	r8, [r0, #16]
  87	ldr	r9, [r0, #20]
  88#else
  89	ldrd	r8, r9, [r0, #16]
  90#endif
  91#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  92	ldr	r10, [r0, #24]
  93	ldr	r11, [r0, #28]
  94#else
  95	ldrd	r10, r11, [r0, #24]
  96#endif
  97#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  98	str	r4, [sp, #64]
  99	str	r5, [sp, #68]
 100#else
 101	strd	r4, r5, [sp, #64]
 102#endif
 103#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 104	str	r6, [sp, #72]
 105	str	r7, [sp, #76]
 106#else
 107	strd	r6, r7, [sp, #72]
 108#endif
 109#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 110	str	r8, [sp, #80]
 111	str	r9, [sp, #84]
 112#else
 113	strd	r8, r9, [sp, #80]
 114#endif
 115#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 116	str	r10, [sp, #88]
 117	str	r11, [sp, #92]
 118#else
 119	strd	r10, r11, [sp, #88]
 120#endif
 121	# Start of loop processing a block
 122L_SHA256_transform_len_begin:
 123	# Load, Reverse and Store W - 64 bytes
 124#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 125	ldr	r4, [r1]
 126	ldr	r5, [r1, #4]
 127	ldr	r6, [r1, #8]
 128	ldr	r7, [r1, #12]
 129	eor	r8, r4, r4, ror #16
 130	eor	r9, r5, r5, ror #16
 131	eor	r10, r6, r6, ror #16
 132	eor	r11, r7, r7, ror #16
 133	bic	r8, r8, #0xff0000
 134	bic	r9, r9, #0xff0000
 135	bic	r10, r10, #0xff0000
 136	bic	r11, r11, #0xff0000
 137	ror	r4, r4, #8
 138	ror	r5, r5, #8
 139	ror	r6, r6, #8
 140	ror	r7, r7, #8
 141	eor	r4, r4, r8, lsr #8
 142	eor	r5, r5, r9, lsr #8
 143	eor	r6, r6, r10, lsr #8
 144	eor	r7, r7, r11, lsr #8
 145#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 146	stm	sp, {r4, r5}
 147#else
 148	strd	r4, r5, [sp]
 149#endif
 150#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 151	str	r6, [sp, #8]
 152	str	r7, [sp, #12]
 153#else
 154	strd	r6, r7, [sp, #8]
 155#endif
 156	ldr	r4, [r1, #16]
 157	ldr	r5, [r1, #20]
 158	ldr	r6, [r1, #24]
 159	ldr	r7, [r1, #28]
 160	eor	r8, r4, r4, ror #16
 161	eor	r9, r5, r5, ror #16
 162	eor	r10, r6, r6, ror #16
 163	eor	r11, r7, r7, ror #16
 164	bic	r8, r8, #0xff0000
 165	bic	r9, r9, #0xff0000
 166	bic	r10, r10, #0xff0000
 167	bic	r11, r11, #0xff0000
 168	ror	r4, r4, #8
 169	ror	r5, r5, #8
 170	ror	r6, r6, #8
 171	ror	r7, r7, #8
 172	eor	r4, r4, r8, lsr #8
 173	eor	r5, r5, r9, lsr #8
 174	eor	r6, r6, r10, lsr #8
 175	eor	r7, r7, r11, lsr #8
 176#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 177	str	r4, [sp, #16]
 178	str	r5, [sp, #20]
 179#else
 180	strd	r4, r5, [sp, #16]
 181#endif
 182#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 183	str	r6, [sp, #24]
 184	str	r7, [sp, #28]
 185#else
 186	strd	r6, r7, [sp, #24]
 187#endif
 188	ldr	r4, [r1, #32]
 189	ldr	r5, [r1, #36]
 190	ldr	r6, [r1, #40]
 191	ldr	r7, [r1, #44]
 192	eor	r8, r4, r4, ror #16
 193	eor	r9, r5, r5, ror #16
 194	eor	r10, r6, r6, ror #16
 195	eor	r11, r7, r7, ror #16
 196	bic	r8, r8, #0xff0000
 197	bic	r9, r9, #0xff0000
 198	bic	r10, r10, #0xff0000
 199	bic	r11, r11, #0xff0000
 200	ror	r4, r4, #8
 201	ror	r5, r5, #8
 202	ror	r6, r6, #8
 203	ror	r7, r7, #8
 204	eor	r4, r4, r8, lsr #8
 205	eor	r5, r5, r9, lsr #8
 206	eor	r6, r6, r10, lsr #8
 207	eor	r7, r7, r11, lsr #8
 208#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 209	str	r4, [sp, #32]
 210	str	r5, [sp, #36]
 211#else
 212	strd	r4, r5, [sp, #32]
 213#endif
 214#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 215	str	r6, [sp, #40]
 216	str	r7, [sp, #44]
 217#else
 218	strd	r6, r7, [sp, #40]
 219#endif
 220	ldr	r4, [r1, #48]
 221	ldr	r5, [r1, #52]
 222	ldr	r6, [r1, #56]
 223	ldr	r7, [r1, #60]
 224	eor	r8, r4, r4, ror #16
 225	eor	r9, r5, r5, ror #16
 226	eor	r10, r6, r6, ror #16
 227	eor	r11, r7, r7, ror #16
 228	bic	r8, r8, #0xff0000
 229	bic	r9, r9, #0xff0000
 230	bic	r10, r10, #0xff0000
 231	bic	r11, r11, #0xff0000
 232	ror	r4, r4, #8
 233	ror	r5, r5, #8
 234	ror	r6, r6, #8
 235	ror	r7, r7, #8
 236	eor	r4, r4, r8, lsr #8
 237	eor	r5, r5, r9, lsr #8
 238	eor	r6, r6, r10, lsr #8
 239	eor	r7, r7, r11, lsr #8
 240#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 241	str	r4, [sp, #48]
 242	str	r5, [sp, #52]
 243#else
 244	strd	r4, r5, [sp, #48]
 245#endif
 246#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 247	str	r6, [sp, #56]
 248	str	r7, [sp, #60]
 249#else
 250	strd	r6, r7, [sp, #56]
 251#endif
 252#else
 253	ldr	r4, [r1]
 254	ldr	r5, [r1, #4]
 255	ldr	r6, [r1, #8]
 256	ldr	r7, [r1, #12]
 257	ldr	r8, [r1, #16]
 258	ldr	r9, [r1, #20]
 259	ldr	r10, [r1, #24]
 260	ldr	r11, [r1, #28]
 261	rev	r4, r4
 262	rev	r5, r5
 263	rev	r6, r6
 264	rev	r7, r7
 265	rev	r8, r8
 266	rev	r9, r9
 267	rev	r10, r10
 268	rev	r11, r11
 269#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 270	stm	sp, {r4, r5}
 271#else
 272	strd	r4, r5, [sp]
 273#endif
 274#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 275	str	r6, [sp, #8]
 276	str	r7, [sp, #12]
 277#else
 278	strd	r6, r7, [sp, #8]
 279#endif
 280#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 281	str	r8, [sp, #16]
 282	str	r9, [sp, #20]
 283#else
 284	strd	r8, r9, [sp, #16]
 285#endif
 286#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 287	str	r10, [sp, #24]
 288	str	r11, [sp, #28]
 289#else
 290	strd	r10, r11, [sp, #24]
 291#endif
 292	ldr	r4, [r1, #32]
 293	ldr	r5, [r1, #36]
 294	ldr	r6, [r1, #40]
 295	ldr	r7, [r1, #44]
 296	ldr	r8, [r1, #48]
 297	ldr	r9, [r1, #52]
 298	ldr	r10, [r1, #56]
 299	ldr	r11, [r1, #60]
 300	rev	r4, r4
 301	rev	r5, r5
 302	rev	r6, r6
 303	rev	r7, r7
 304	rev	r8, r8
 305	rev	r9, r9
 306	rev	r10, r10
 307	rev	r11, r11
 308#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 309	str	r4, [sp, #32]
 310	str	r5, [sp, #36]
 311#else
 312	strd	r4, r5, [sp, #32]
 313#endif
 314#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 315	str	r6, [sp, #40]
 316	str	r7, [sp, #44]
 317#else
 318	strd	r6, r7, [sp, #40]
 319#endif
 320#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 321	str	r8, [sp, #48]
 322	str	r9, [sp, #52]
 323#else
 324	strd	r8, r9, [sp, #48]
 325#endif
 326#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 327	str	r10, [sp, #56]
 328	str	r11, [sp, #60]
 329#else
 330	strd	r10, r11, [sp, #56]
 331#endif
 332#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
 333	ldr	r11, [r0, #4]
 334	ldr	r4, [r0, #8]
 335	eor	r11, r11, r4
 336#ifndef WOLFSSL_ARMASM_SHA256_SMALL
 337	mov	r3, #3
 338	# Start of 16 rounds
 339L_SHA256_transform_len_start_fast:
 340	# Round 0
 341	ldr	r5, [r0, #16]
 342	ldr	r6, [r0, #20]
 343	ldr	r7, [r0, #24]
 344	ldr	r9, [r0, #28]
 345	ror	r4, r5, #6
 346	eor	r6, r6, r7
 347	eor	r4, r4, r5, ror #11
 348	and	r6, r6, r5
 349	eor	r4, r4, r5, ror #25
 350	eor	r6, r6, r7
 351	add	r9, r9, r4
 352	add	r9, r9, r6
 353	ldr	r5, [sp]
 354	ldr	r6, [r12]
 355	add	r9, r9, r5
 356	add	r9, r9, r6
 357	ldr	r5, [r0]
 358	ldr	r6, [r0, #4]
 359	ldr	r7, [r0, #8]
 360	ldr	r8, [r0, #12]
 361	ror	r4, r5, #2
 362	eor	r10, r5, r6
 363	eor	r4, r4, r5, ror #13
 364	and	r11, r11, r10
 365	eor	r4, r4, r5, ror #22
 366	eor	r11, r11, r6
 367	add	r8, r8, r9
 368	add	r9, r9, r4
 369	add	r9, r9, r11
 370	str	r8, [r0, #12]
 371	str	r9, [r0, #28]
 372	# Calc new W[0]
 373	ldr	r6, [sp, #56]
 374	ldr	r7, [sp, #36]
 375	ldr	r8, [sp, #4]
 376	ldr	r9, [sp]
 377	ror	r4, r6, #17
 378	ror	r5, r8, #7
 379	eor	r4, r4, r6, ror #19
 380	eor	r5, r5, r8, ror #18
 381	eor	r4, r4, r6, lsr #10
 382	eor	r5, r5, r8, lsr #3
 383	add	r9, r9, r7
 384	add	r4, r4, r5
 385	add	r9, r9, r4
 386	str	r9, [sp]
 387	# Round 1
 388	ldr	r5, [r0, #12]
 389	ldr	r6, [r0, #16]
 390	ldr	r7, [r0, #20]
 391	ldr	r9, [r0, #24]
 392	ror	r4, r5, #6
 393	eor	r6, r6, r7
 394	eor	r4, r4, r5, ror #11
 395	and	r6, r6, r5
 396	eor	r4, r4, r5, ror #25
 397	eor	r6, r6, r7
 398	add	r9, r9, r4
 399	add	r9, r9, r6
 400	ldr	r5, [sp, #4]
 401	ldr	r6, [r12, #4]
 402	add	r9, r9, r5
 403	add	r9, r9, r6
 404	ldr	r5, [r0, #28]
 405	ldr	r6, [r0]
 406	ldr	r7, [r0, #4]
 407	ldr	r8, [r0, #8]
 408	ror	r4, r5, #2
 409	eor	r11, r5, r6
 410	eor	r4, r4, r5, ror #13
 411	and	r10, r10, r11
 412	eor	r4, r4, r5, ror #22
 413	eor	r10, r10, r6
 414	add	r8, r8, r9
 415	add	r9, r9, r4
 416	add	r9, r9, r10
 417	str	r8, [r0, #8]
 418	str	r9, [r0, #24]
 419	# Calc new W[1]
 420	ldr	r6, [sp, #60]
 421	ldr	r7, [sp, #40]
 422	ldr	r8, [sp, #8]
 423	ldr	r9, [sp, #4]
 424	ror	r4, r6, #17
 425	ror	r5, r8, #7
 426	eor	r4, r4, r6, ror #19
 427	eor	r5, r5, r8, ror #18
 428	eor	r4, r4, r6, lsr #10
 429	eor	r5, r5, r8, lsr #3
 430	add	r9, r9, r7
 431	add	r4, r4, r5
 432	add	r9, r9, r4
 433	str	r9, [sp, #4]
 434	# Round 2
 435	ldr	r5, [r0, #8]
 436	ldr	r6, [r0, #12]
 437	ldr	r7, [r0, #16]
 438	ldr	r9, [r0, #20]
 439	ror	r4, r5, #6
 440	eor	r6, r6, r7
 441	eor	r4, r4, r5, ror #11
 442	and	r6, r6, r5
 443	eor	r4, r4, r5, ror #25
 444	eor	r6, r6, r7
 445	add	r9, r9, r4
 446	add	r9, r9, r6
 447	ldr	r5, [sp, #8]
 448	ldr	r6, [r12, #8]
 449	add	r9, r9, r5
 450	add	r9, r9, r6
 451	ldr	r5, [r0, #24]
 452	ldr	r6, [r0, #28]
 453	ldr	r7, [r0]
 454	ldr	r8, [r0, #4]
 455	ror	r4, r5, #2
 456	eor	r10, r5, r6
 457	eor	r4, r4, r5, ror #13
 458	and	r11, r11, r10
 459	eor	r4, r4, r5, ror #22
 460	eor	r11, r11, r6
 461	add	r8, r8, r9
 462	add	r9, r9, r4
 463	add	r9, r9, r11
 464	str	r8, [r0, #4]
 465	str	r9, [r0, #20]
 466	# Calc new W[2]
 467	ldr	r6, [sp]
 468	ldr	r7, [sp, #44]
 469	ldr	r8, [sp, #12]
 470	ldr	r9, [sp, #8]
 471	ror	r4, r6, #17
 472	ror	r5, r8, #7
 473	eor	r4, r4, r6, ror #19
 474	eor	r5, r5, r8, ror #18
 475	eor	r4, r4, r6, lsr #10
 476	eor	r5, r5, r8, lsr #3
 477	add	r9, r9, r7
 478	add	r4, r4, r5
 479	add	r9, r9, r4
 480	str	r9, [sp, #8]
 481	# Round 3
 482	ldr	r5, [r0, #4]
 483	ldr	r6, [r0, #8]
 484	ldr	r7, [r0, #12]
 485	ldr	r9, [r0, #16]
 486	ror	r4, r5, #6
 487	eor	r6, r6, r7
 488	eor	r4, r4, r5, ror #11
 489	and	r6, r6, r5
 490	eor	r4, r4, r5, ror #25
 491	eor	r6, r6, r7
 492	add	r9, r9, r4
 493	add	r9, r9, r6
 494	ldr	r5, [sp, #12]
 495	ldr	r6, [r12, #12]
 496	add	r9, r9, r5
 497	add	r9, r9, r6
 498	ldr	r5, [r0, #20]
 499	ldr	r6, [r0, #24]
 500	ldr	r7, [r0, #28]
 501	ldr	r8, [r0]
 502	ror	r4, r5, #2
 503	eor	r11, r5, r6
 504	eor	r4, r4, r5, ror #13
 505	and	r10, r10, r11
 506	eor	r4, r4, r5, ror #22
 507	eor	r10, r10, r6
 508	add	r8, r8, r9
 509	add	r9, r9, r4
 510	add	r9, r9, r10
 511	str	r8, [r0]
 512	str	r9, [r0, #16]
 513	# Calc new W[3]
 514	ldr	r6, [sp, #4]
 515	ldr	r7, [sp, #48]
 516	ldr	r8, [sp, #16]
 517	ldr	r9, [sp, #12]
 518	ror	r4, r6, #17
 519	ror	r5, r8, #7
 520	eor	r4, r4, r6, ror #19
 521	eor	r5, r5, r8, ror #18
 522	eor	r4, r4, r6, lsr #10
 523	eor	r5, r5, r8, lsr #3
 524	add	r9, r9, r7
 525	add	r4, r4, r5
 526	add	r9, r9, r4
 527	str	r9, [sp, #12]
 528	# Round 4
 529	ldr	r5, [r0]
 530	ldr	r6, [r0, #4]
 531	ldr	r7, [r0, #8]
 532	ldr	r9, [r0, #12]
 533	ror	r4, r5, #6
 534	eor	r6, r6, r7
 535	eor	r4, r4, r5, ror #11
 536	and	r6, r6, r5
 537	eor	r4, r4, r5, ror #25
 538	eor	r6, r6, r7
 539	add	r9, r9, r4
 540	add	r9, r9, r6
 541	ldr	r5, [sp, #16]
 542	ldr	r6, [r12, #16]
 543	add	r9, r9, r5
 544	add	r9, r9, r6
 545	ldr	r5, [r0, #16]
 546	ldr	r6, [r0, #20]
 547	ldr	r7, [r0, #24]
 548	ldr	r8, [r0, #28]
 549	ror	r4, r5, #2
 550	eor	r10, r5, r6
 551	eor	r4, r4, r5, ror #13
 552	and	r11, r11, r10
 553	eor	r4, r4, r5, ror #22
 554	eor	r11, r11, r6
 555	add	r8, r8, r9
 556	add	r9, r9, r4
 557	add	r9, r9, r11
 558	str	r8, [r0, #28]
 559	str	r9, [r0, #12]
 560	# Calc new W[4]
 561	ldr	r6, [sp, #8]
 562	ldr	r7, [sp, #52]
 563	ldr	r8, [sp, #20]
 564	ldr	r9, [sp, #16]
 565	ror	r4, r6, #17
 566	ror	r5, r8, #7
 567	eor	r4, r4, r6, ror #19
 568	eor	r5, r5, r8, ror #18
 569	eor	r4, r4, r6, lsr #10
 570	eor	r5, r5, r8, lsr #3
 571	add	r9, r9, r7
 572	add	r4, r4, r5
 573	add	r9, r9, r4
 574	str	r9, [sp, #16]
 575	# Round 5
 576	ldr	r5, [r0, #28]
 577	ldr	r6, [r0]
 578	ldr	r7, [r0, #4]
 579	ldr	r9, [r0, #8]
 580	ror	r4, r5, #6
 581	eor	r6, r6, r7
 582	eor	r4, r4, r5, ror #11
 583	and	r6, r6, r5
 584	eor	r4, r4, r5, ror #25
 585	eor	r6, r6, r7
 586	add	r9, r9, r4
 587	add	r9, r9, r6
 588	ldr	r5, [sp, #20]
 589	ldr	r6, [r12, #20]
 590	add	r9, r9, r5
 591	add	r9, r9, r6
 592	ldr	r5, [r0, #12]
 593	ldr	r6, [r0, #16]
 594	ldr	r7, [r0, #20]
 595	ldr	r8, [r0, #24]
 596	ror	r4, r5, #2
 597	eor	r11, r5, r6
 598	eor	r4, r4, r5, ror #13
 599	and	r10, r10, r11
 600	eor	r4, r4, r5, ror #22
 601	eor	r10, r10, r6
 602	add	r8, r8, r9
 603	add	r9, r9, r4
 604	add	r9, r9, r10
 605	str	r8, [r0, #24]
 606	str	r9, [r0, #8]
 607	# Calc new W[5]
 608	ldr	r6, [sp, #12]
 609	ldr	r7, [sp, #56]
 610	ldr	r8, [sp, #24]
 611	ldr	r9, [sp, #20]
 612	ror	r4, r6, #17
 613	ror	r5, r8, #7
 614	eor	r4, r4, r6, ror #19
 615	eor	r5, r5, r8, ror #18
 616	eor	r4, r4, r6, lsr #10
 617	eor	r5, r5, r8, lsr #3
 618	add	r9, r9, r7
 619	add	r4, r4, r5
 620	add	r9, r9, r4
 621	str	r9, [sp, #20]
 622	# Round 6
 623	ldr	r5, [r0, #24]
 624	ldr	r6, [r0, #28]
 625	ldr	r7, [r0]
 626	ldr	r9, [r0, #4]
 627	ror	r4, r5, #6
 628	eor	r6, r6, r7
 629	eor	r4, r4, r5, ror #11
 630	and	r6, r6, r5
 631	eor	r4, r4, r5, ror #25
 632	eor	r6, r6, r7
 633	add	r9, r9, r4
 634	add	r9, r9, r6
 635	ldr	r5, [sp, #24]
 636	ldr	r6, [r12, #24]
 637	add	r9, r9, r5
 638	add	r9, r9, r6
 639	ldr	r5, [r0, #8]
 640	ldr	r6, [r0, #12]
 641	ldr	r7, [r0, #16]
 642	ldr	r8, [r0, #20]
 643	ror	r4, r5, #2
 644	eor	r10, r5, r6
 645	eor	r4, r4, r5, ror #13
 646	and	r11, r11, r10
 647	eor	r4, r4, r5, ror #22
 648	eor	r11, r11, r6
 649	add	r8, r8, r9
 650	add	r9, r9, r4
 651	add	r9, r9, r11
 652	str	r8, [r0, #20]
 653	str	r9, [r0, #4]
 654	# Calc new W[6]
 655	ldr	r6, [sp, #16]
 656	ldr	r7, [sp, #60]
 657	ldr	r8, [sp, #28]
 658	ldr	r9, [sp, #24]
 659	ror	r4, r6, #17
 660	ror	r5, r8, #7
 661	eor	r4, r4, r6, ror #19
 662	eor	r5, r5, r8, ror #18
 663	eor	r4, r4, r6, lsr #10
 664	eor	r5, r5, r8, lsr #3
 665	add	r9, r9, r7
 666	add	r4, r4, r5
 667	add	r9, r9, r4
 668	str	r9, [sp, #24]
 669	# Round 7
 670	ldr	r5, [r0, #20]
 671	ldr	r6, [r0, #24]
 672	ldr	r7, [r0, #28]
 673	ldr	r9, [r0]
 674	ror	r4, r5, #6
 675	eor	r6, r6, r7
 676	eor	r4, r4, r5, ror #11
 677	and	r6, r6, r5
 678	eor	r4, r4, r5, ror #25
 679	eor	r6, r6, r7
 680	add	r9, r9, r4
 681	add	r9, r9, r6
 682	ldr	r5, [sp, #28]
 683	ldr	r6, [r12, #28]
 684	add	r9, r9, r5
 685	add	r9, r9, r6
 686	ldr	r5, [r0, #4]
 687	ldr	r6, [r0, #8]
 688	ldr	r7, [r0, #12]
 689	ldr	r8, [r0, #16]
 690	ror	r4, r5, #2
 691	eor	r11, r5, r6
 692	eor	r4, r4, r5, ror #13
 693	and	r10, r10, r11
 694	eor	r4, r4, r5, ror #22
 695	eor	r10, r10, r6
 696	add	r8, r8, r9
 697	add	r9, r9, r4
 698	add	r9, r9, r10
 699	str	r8, [r0, #16]
 700	str	r9, [r0]
 701	# Calc new W[7]
 702	ldr	r6, [sp, #20]
 703	ldr	r7, [sp]
 704	ldr	r8, [sp, #32]
 705	ldr	r9, [sp, #28]
 706	ror	r4, r6, #17
 707	ror	r5, r8, #7
 708	eor	r4, r4, r6, ror #19
 709	eor	r5, r5, r8, ror #18
 710	eor	r4, r4, r6, lsr #10
 711	eor	r5, r5, r8, lsr #3
 712	add	r9, r9, r7
 713	add	r4, r4, r5
 714	add	r9, r9, r4
 715	str	r9, [sp, #28]
 716	# Round 8
 717	ldr	r5, [r0, #16]
 718	ldr	r6, [r0, #20]
 719	ldr	r7, [r0, #24]
 720	ldr	r9, [r0, #28]
 721	ror	r4, r5, #6
 722	eor	r6, r6, r7
 723	eor	r4, r4, r5, ror #11
 724	and	r6, r6, r5
 725	eor	r4, r4, r5, ror #25
 726	eor	r6, r6, r7
 727	add	r9, r9, r4
 728	add	r9, r9, r6
 729	ldr	r5, [sp, #32]
 730	ldr	r6, [r12, #32]
 731	add	r9, r9, r5
 732	add	r9, r9, r6
 733	ldr	r5, [r0]
 734	ldr	r6, [r0, #4]
 735	ldr	r7, [r0, #8]
 736	ldr	r8, [r0, #12]
 737	ror	r4, r5, #2
 738	eor	r10, r5, r6
 739	eor	r4, r4, r5, ror #13
 740	and	r11, r11, r10
 741	eor	r4, r4, r5, ror #22
 742	eor	r11, r11, r6
 743	add	r8, r8, r9
 744	add	r9, r9, r4
 745	add	r9, r9, r11
 746	str	r8, [r0, #12]
 747	str	r9, [r0, #28]
 748	# Calc new W[8]
 749	ldr	r6, [sp, #24]
 750	ldr	r7, [sp, #4]
 751	ldr	r8, [sp, #36]
 752	ldr	r9, [sp, #32]
 753	ror	r4, r6, #17
 754	ror	r5, r8, #7
 755	eor	r4, r4, r6, ror #19
 756	eor	r5, r5, r8, ror #18
 757	eor	r4, r4, r6, lsr #10
 758	eor	r5, r5, r8, lsr #3
 759	add	r9, r9, r7
 760	add	r4, r4, r5
 761	add	r9, r9, r4
 762	str	r9, [sp, #32]
 763	# Round 9
 764	ldr	r5, [r0, #12]
 765	ldr	r6, [r0, #16]
 766	ldr	r7, [r0, #20]
 767	ldr	r9, [r0, #24]
 768	ror	r4, r5, #6
 769	eor	r6, r6, r7
 770	eor	r4, r4, r5, ror #11
 771	and	r6, r6, r5
 772	eor	r4, r4, r5, ror #25
 773	eor	r6, r6, r7
 774	add	r9, r9, r4
 775	add	r9, r9, r6
 776	ldr	r5, [sp, #36]
 777	ldr	r6, [r12, #36]
 778	add	r9, r9, r5
 779	add	r9, r9, r6
 780	ldr	r5, [r0, #28]
 781	ldr	r6, [r0]
 782	ldr	r7, [r0, #4]
 783	ldr	r8, [r0, #8]
 784	ror	r4, r5, #2
 785	eor	r11, r5, r6
 786	eor	r4, r4, r5, ror #13
 787	and	r10, r10, r11
 788	eor	r4, r4, r5, ror #22
 789	eor	r10, r10, r6
 790	add	r8, r8, r9
 791	add	r9, r9, r4
 792	add	r9, r9, r10
 793	str	r8, [r0, #8]
 794	str	r9, [r0, #24]
 795	# Calc new W[9]
 796	ldr	r6, [sp, #28]
 797	ldr	r7, [sp, #8]
 798	ldr	r8, [sp, #40]
 799	ldr	r9, [sp, #36]
 800	ror	r4, r6, #17
 801	ror	r5, r8, #7
 802	eor	r4, r4, r6, ror #19
 803	eor	r5, r5, r8, ror #18
 804	eor	r4, r4, r6, lsr #10
 805	eor	r5, r5, r8, lsr #3
 806	add	r9, r9, r7
 807	add	r4, r4, r5
 808	add	r9, r9, r4
 809	str	r9, [sp, #36]
 810	# Round 10
 811	ldr	r5, [r0, #8]
 812	ldr	r6, [r0, #12]
 813	ldr	r7, [r0, #16]
 814	ldr	r9, [r0, #20]
 815	ror	r4, r5, #6
 816	eor	r6, r6, r7
 817	eor	r4, r4, r5, ror #11
 818	and	r6, r6, r5
 819	eor	r4, r4, r5, ror #25
 820	eor	r6, r6, r7
 821	add	r9, r9, r4
 822	add	r9, r9, r6
 823	ldr	r5, [sp, #40]
 824	ldr	r6, [r12, #40]
 825	add	r9, r9, r5
 826	add	r9, r9, r6
 827	ldr	r5, [r0, #24]
 828	ldr	r6, [r0, #28]
 829	ldr	r7, [r0]
 830	ldr	r8, [r0, #4]
 831	ror	r4, r5, #2
 832	eor	r10, r5, r6
 833	eor	r4, r4, r5, ror #13
 834	and	r11, r11, r10
 835	eor	r4, r4, r5, ror #22
 836	eor	r11, r11, r6
 837	add	r8, r8, r9
 838	add	r9, r9, r4
 839	add	r9, r9, r11
 840	str	r8, [r0, #4]
 841	str	r9, [r0, #20]
 842	# Calc new W[10]
 843	ldr	r6, [sp, #32]
 844	ldr	r7, [sp, #12]
 845	ldr	r8, [sp, #44]
 846	ldr	r9, [sp, #40]
 847	ror	r4, r6, #17
 848	ror	r5, r8, #7
 849	eor	r4, r4, r6, ror #19
 850	eor	r5, r5, r8, ror #18
 851	eor	r4, r4, r6, lsr #10
 852	eor	r5, r5, r8, lsr #3
 853	add	r9, r9, r7
 854	add	r4, r4, r5
 855	add	r9, r9, r4
 856	str	r9, [sp, #40]
 857	# Round 11
 858	ldr	r5, [r0, #4]
 859	ldr	r6, [r0, #8]
 860	ldr	r7, [r0, #12]
 861	ldr	r9, [r0, #16]
 862	ror	r4, r5, #6
 863	eor	r6, r6, r7
 864	eor	r4, r4, r5, ror #11
 865	and	r6, r6, r5
 866	eor	r4, r4, r5, ror #25
 867	eor	r6, r6, r7
 868	add	r9, r9, r4
 869	add	r9, r9, r6
 870	ldr	r5, [sp, #44]
 871	ldr	r6, [r12, #44]
 872	add	r9, r9, r5
 873	add	r9, r9, r6
 874	ldr	r5, [r0, #20]
 875	ldr	r6, [r0, #24]
 876	ldr	r7, [r0, #28]
 877	ldr	r8, [r0]
 878	ror	r4, r5, #2
 879	eor	r11, r5, r6
 880	eor	r4, r4, r5, ror #13
 881	and	r10, r10, r11
 882	eor	r4, r4, r5, ror #22
 883	eor	r10, r10, r6
 884	add	r8, r8, r9
 885	add	r9, r9, r4
 886	add	r9, r9, r10
 887	str	r8, [r0]
 888	str	r9, [r0, #16]
 889	# Calc new W[11]
 890	ldr	r6, [sp, #36]
 891	ldr	r7, [sp, #16]
 892	ldr	r8, [sp, #48]
 893	ldr	r9, [sp, #44]
 894	ror	r4, r6, #17
 895	ror	r5, r8, #7
 896	eor	r4, r4, r6, ror #19
 897	eor	r5, r5, r8, ror #18
 898	eor	r4, r4, r6, lsr #10
 899	eor	r5, r5, r8, lsr #3
 900	add	r9, r9, r7
 901	add	r4, r4, r5
 902	add	r9, r9, r4
 903	str	r9, [sp, #44]
 904	# Round 12
 905	ldr	r5, [r0]
 906	ldr	r6, [r0, #4]
 907	ldr	r7, [r0, #8]
 908	ldr	r9, [r0, #12]
 909	ror	r4, r5, #6
 910	eor	r6, r6, r7
 911	eor	r4, r4, r5, ror #11
 912	and	r6, r6, r5
 913	eor	r4, r4, r5, ror #25
 914	eor	r6, r6, r7
 915	add	r9, r9, r4
 916	add	r9, r9, r6
 917	ldr	r5, [sp, #48]
 918	ldr	r6, [r12, #48]
 919	add	r9, r9, r5
 920	add	r9, r9, r6
 921	ldr	r5, [r0, #16]
 922	ldr	r6, [r0, #20]
 923	ldr	r7, [r0, #24]
 924	ldr	r8, [r0, #28]
 925	ror	r4, r5, #2
 926	eor	r10, r5, r6
 927	eor	r4, r4, r5, ror #13
 928	and	r11, r11, r10
 929	eor	r4, r4, r5, ror #22
 930	eor	r11, r11, r6
 931	add	r8, r8, r9
 932	add	r9, r9, r4
 933	add	r9, r9, r11
 934	str	r8, [r0, #28]
 935	str	r9, [r0, #12]
 936	# Calc new W[12]
 937	ldr	r6, [sp, #40]
 938	ldr	r7, [sp, #20]
 939	ldr	r8, [sp, #52]
 940	ldr	r9, [sp, #48]
 941	ror	r4, r6, #17
 942	ror	r5, r8, #7
 943	eor	r4, r4, r6, ror #19
 944	eor	r5, r5, r8, ror #18
 945	eor	r4, r4, r6, lsr #10
 946	eor	r5, r5, r8, lsr #3
 947	add	r9, r9, r7
 948	add	r4, r4, r5
 949	add	r9, r9, r4
 950	str	r9, [sp, #48]
 951	# Round 13
 952	ldr	r5, [r0, #28]
 953	ldr	r6, [r0]
 954	ldr	r7, [r0, #4]
 955	ldr	r9, [r0, #8]
 956	ror	r4, r5, #6
 957	eor	r6, r6, r7
 958	eor	r4, r4, r5, ror #11
 959	and	r6, r6, r5
 960	eor	r4, r4, r5, ror #25
 961	eor	r6, r6, r7
 962	add	r9, r9, r4
 963	add	r9, r9, r6
 964	ldr	r5, [sp, #52]
 965	ldr	r6, [r12, #52]
 966	add	r9, r9, r5
 967	add	r9, r9, r6
 968	ldr	r5, [r0, #12]
 969	ldr	r6, [r0, #16]
 970	ldr	r7, [r0, #20]
 971	ldr	r8, [r0, #24]
 972	ror	r4, r5, #2
 973	eor	r11, r5, r6
 974	eor	r4, r4, r5, ror #13
 975	and	r10, r10, r11
 976	eor	r4, r4, r5, ror #22
 977	eor	r10, r10, r6
 978	add	r8, r8, r9
 979	add	r9, r9, r4
 980	add	r9, r9, r10
 981	str	r8, [r0, #24]
 982	str	r9, [r0, #8]
 983	# Calc new W[13]
 984	ldr	r6, [sp, #44]
 985	ldr	r7, [sp, #24]
 986	ldr	r8, [sp, #56]
 987	ldr	r9, [sp, #52]
 988	ror	r4, r6, #17
 989	ror	r5, r8, #7
 990	eor	r4, r4, r6, ror #19
 991	eor	r5, r5, r8, ror #18
 992	eor	r4, r4, r6, lsr #10
 993	eor	r5, r5, r8, lsr #3
 994	add	r9, r9, r7
 995	add	r4, r4, r5
 996	add	r9, r9, r4
 997	str	r9, [sp, #52]
 998	# Round 14
 999	ldr	r5, [r0, #24]
1000	ldr	r6, [r0, #28]
1001	ldr	r7, [r0]
1002	ldr	r9, [r0, #4]
1003	ror	r4, r5, #6
1004	eor	r6, r6, r7
1005	eor	r4, r4, r5, ror #11
1006	and	r6, r6, r5
1007	eor	r4, r4, r5, ror #25
1008	eor	r6, r6, r7
1009	add	r9, r9, r4
1010	add	r9, r9, r6
1011	ldr	r5, [sp, #56]
1012	ldr	r6, [r12, #56]
1013	add	r9, r9, r5
1014	add	r9, r9, r6
1015	ldr	r5, [r0, #8]
1016	ldr	r6, [r0, #12]
1017	ldr	r7, [r0, #16]
1018	ldr	r8, [r0, #20]
1019	ror	r4, r5, #2
1020	eor	r10, r5, r6
1021	eor	r4, r4, r5, ror #13
1022	and	r11, r11, r10
1023	eor	r4, r4, r5, ror #22
1024	eor	r11, r11, r6
1025	add	r8, r8, r9
1026	add	r9, r9, r4
1027	add	r9, r9, r11
1028	str	r8, [r0, #20]
1029	str	r9, [r0, #4]
1030	# Calc new W[14]
1031	ldr	r6, [sp, #48]
1032	ldr	r7, [sp, #28]
1033	ldr	r8, [sp, #60]
1034	ldr	r9, [sp, #56]
1035	ror	r4, r6, #17
1036	ror	r5, r8, #7
1037	eor	r4, r4, r6, ror #19
1038	eor	r5, r5, r8, ror #18
1039	eor	r4, r4, r6, lsr #10
1040	eor	r5, r5, r8, lsr #3
1041	add	r9, r9, r7
1042	add	r4, r4, r5
1043	add	r9, r9, r4
1044	str	r9, [sp, #56]
1045	# Round 15
1046	ldr	r5, [r0, #20]
1047	ldr	r6, [r0, #24]
1048	ldr	r7, [r0, #28]
1049	ldr	r9, [r0]
1050	ror	r4, r5, #6
1051	eor	r6, r6, r7
1052	eor	r4, r4, r5, ror #11
1053	and	r6, r6, r5
1054	eor	r4, r4, r5, ror #25
1055	eor	r6, r6, r7
1056	add	r9, r9, r4
1057	add	r9, r9, r6
1058	ldr	r5, [sp, #60]
1059	ldr	r6, [r12, #60]
1060	add	r9, r9, r5
1061	add	r9, r9, r6
1062	ldr	r5, [r0, #4]
1063	ldr	r6, [r0, #8]
1064	ldr	r7, [r0, #12]
1065	ldr	r8, [r0, #16]
1066	ror	r4, r5, #2
1067	eor	r11, r5, r6
1068	eor	r4, r4, r5, ror #13
1069	and	r10, r10, r11
1070	eor	r4, r4, r5, ror #22
1071	eor	r10, r10, r6
1072	add	r8, r8, r9
1073	add	r9, r9, r4
1074	add	r9, r9, r10
1075	str	r8, [r0, #16]
1076	str	r9, [r0]
1077	# Calc new W[15]
1078	ldr	r6, [sp, #52]
1079	ldr	r7, [sp, #32]
1080	ldr	r8, [sp]
1081	ldr	r9, [sp, #60]
1082	ror	r4, r6, #17
1083	ror	r5, r8, #7
1084	eor	r4, r4, r6, ror #19
1085	eor	r5, r5, r8, ror #18
1086	eor	r4, r4, r6, lsr #10
1087	eor	r5, r5, r8, lsr #3
1088	add	r9, r9, r7
1089	add	r4, r4, r5
1090	add	r9, r9, r4
1091	str	r9, [sp, #60]
1092	add	r12, r12, #0x40
1093	subs	r3, r3, #1
1094	bne	L_SHA256_transform_len_start_fast
1095	# Round 0
1096	ldr	r5, [r0, #16]
1097	ldr	r6, [r0, #20]
1098	ldr	r7, [r0, #24]
1099	ldr	r9, [r0, #28]
1100	ror	r4, r5, #6
1101	eor	r6, r6, r7
1102	eor	r4, r4, r5, ror #11
1103	and	r6, r6, r5
1104	eor	r4, r4, r5, ror #25
1105	eor	r6, r6, r7
1106	add	r9, r9, r4
1107	add	r9, r9, r6
1108	ldr	r5, [sp]
1109	ldr	r6, [r12]
1110	add	r9, r9, r5
1111	add	r9, r9, r6
1112	ldr	r5, [r0]
1113	ldr	r6, [r0, #4]
1114	ldr	r7, [r0, #8]
1115	ldr	r8, [r0, #12]
1116	ror	r4, r5, #2
1117	eor	r10, r5, r6
1118	eor	r4, r4, r5, ror #13
1119	and	r11, r11, r10
1120	eor	r4, r4, r5, ror #22
1121	eor	r11, r11, r6
1122	add	r8, r8, r9
1123	add	r9, r9, r4
1124	add	r9, r9, r11
1125	str	r8, [r0, #12]
1126	str	r9, [r0, #28]
1127	# Round 1
1128	ldr	r5, [r0, #12]
1129	ldr	r6, [r0, #16]
1130	ldr	r7, [r0, #20]
1131	ldr	r9, [r0, #24]
1132	ror	r4, r5, #6
1133	eor	r6, r6, r7
1134	eor	r4, r4, r5, ror #11
1135	and	r6, r6, r5
1136	eor	r4, r4, r5, ror #25
1137	eor	r6, r6, r7
1138	add	r9, r9, r4
1139	add	r9, r9, r6
1140	ldr	r5, [sp, #4]
1141	ldr	r6, [r12, #4]
1142	add	r9, r9, r5
1143	add	r9, r9, r6
1144	ldr	r5, [r0, #28]
1145	ldr	r6, [r0]
1146	ldr	r7, [r0, #4]
1147	ldr	r8, [r0, #8]
1148	ror	r4, r5, #2
1149	eor	r11, r5, r6
1150	eor	r4, r4, r5, ror #13
1151	and	r10, r10, r11
1152	eor	r4, r4, r5, ror #22
1153	eor	r10, r10, r6
1154	add	r8, r8, r9
1155	add	r9, r9, r4
1156	add	r9, r9, r10
1157	str	r8, [r0, #8]
1158	str	r9, [r0, #24]
1159	# Round 2
1160	ldr	r5, [r0, #8]
1161	ldr	r6, [r0, #12]
1162	ldr	r7, [r0, #16]
1163	ldr	r9, [r0, #20]
1164	ror	r4, r5, #6
1165	eor	r6, r6, r7
1166	eor	r4, r4, r5, ror #11
1167	and	r6, r6, r5
1168	eor	r4, r4, r5, ror #25
1169	eor	r6, r6, r7
1170	add	r9, r9, r4
1171	add	r9, r9, r6
1172	ldr	r5, [sp, #8]
1173	ldr	r6, [r12, #8]
1174	add	r9, r9, r5
1175	add	r9, r9, r6
1176	ldr	r5, [r0, #24]
1177	ldr	r6, [r0, #28]
1178	ldr	r7, [r0]
1179	ldr	r8, [r0, #4]
1180	ror	r4, r5, #2
1181	eor	r10, r5, r6
1182	eor	r4, r4, r5, ror #13
1183	and	r11, r11, r10
1184	eor	r4, r4, r5, ror #22
1185	eor	r11, r11, r6
1186	add	r8, r8, r9
1187	add	r9, r9, r4
1188	add	r9, r9, r11
1189	str	r8, [r0, #4]
1190	str	r9, [r0, #20]
1191	# Round 3
1192	ldr	r5, [r0, #4]
1193	ldr	r6, [r0, #8]
1194	ldr	r7, [r0, #12]
1195	ldr	r9, [r0, #16]
1196	ror	r4, r5, #6
1197	eor	r6, r6, r7
1198	eor	r4, r4, r5, ror #11
1199	and	r6, r6, r5
1200	eor	r4, r4, r5, ror #25
1201	eor	r6, r6, r7
1202	add	r9, r9, r4
1203	add	r9, r9, r6
1204	ldr	r5, [sp, #12]
1205	ldr	r6, [r12, #12]
1206	add	r9, r9, r5
1207	add	r9, r9, r6
1208	ldr	r5, [r0, #20]
1209	ldr	r6, [r0, #24]
1210	ldr	r7, [r0, #28]
1211	ldr	r8, [r0]
1212	ror	r4, r5, #2
1213	eor	r11, r5, r6
1214	eor	r4, r4, r5, ror #13
1215	and	r10, r10, r11
1216	eor	r4, r4, r5, ror #22
1217	eor	r10, r10, r6
1218	add	r8, r8, r9
1219	add	r9, r9, r4
1220	add	r9, r9, r10
1221	str	r8, [r0]
1222	str	r9, [r0, #16]
1223	# Round 4
1224	ldr	r5, [r0]
1225	ldr	r6, [r0, #4]
1226	ldr	r7, [r0, #8]
1227	ldr	r9, [r0, #12]
1228	ror	r4, r5, #6
1229	eor	r6, r6, r7
1230	eor	r4, r4, r5, ror #11
1231	and	r6, r6, r5
1232	eor	r4, r4, r5, ror #25
1233	eor	r6, r6, r7
1234	add	r9, r9, r4
1235	add	r9, r9, r6
1236	ldr	r5, [sp, #16]
1237	ldr	r6, [r12, #16]
1238	add	r9, r9, r5
1239	add	r9, r9, r6
1240	ldr	r5, [r0, #16]
1241	ldr	r6, [r0, #20]
1242	ldr	r7, [r0, #24]
1243	ldr	r8, [r0, #28]
1244	ror	r4, r5, #2
1245	eor	r10, r5, r6
1246	eor	r4, r4, r5, ror #13
1247	and	r11, r11, r10
1248	eor	r4, r4, r5, ror #22
1249	eor	r11, r11, r6
1250	add	r8, r8, r9
1251	add	r9, r9, r4
1252	add	r9, r9, r11
1253	str	r8, [r0, #28]
1254	str	r9, [r0, #12]
1255	# Round 5
1256	ldr	r5, [r0, #28]
1257	ldr	r6, [r0]
1258	ldr	r7, [r0, #4]
1259	ldr	r9, [r0, #8]
1260	ror	r4, r5, #6
1261	eor	r6, r6, r7
1262	eor	r4, r4, r5, ror #11
1263	and	r6, r6, r5
1264	eor	r4, r4, r5, ror #25
1265	eor	r6, r6, r7
1266	add	r9, r9, r4
1267	add	r9, r9, r6
1268	ldr	r5, [sp, #20]
1269	ldr	r6, [r12, #20]
1270	add	r9, r9, r5
1271	add	r9, r9, r6
1272	ldr	r5, [r0, #12]
1273	ldr	r6, [r0, #16]
1274	ldr	r7, [r0, #20]
1275	ldr	r8, [r0, #24]
1276	ror	r4, r5, #2
1277	eor	r11, r5, r6
1278	eor	r4, r4, r5, ror #13
1279	and	r10, r10, r11
1280	eor	r4, r4, r5, ror #22
1281	eor	r10, r10, r6
1282	add	r8, r8, r9
1283	add	r9, r9, r4
1284	add	r9, r9, r10
1285	str	r8, [r0, #24]
1286	str	r9, [r0, #8]
1287	# Round 6
1288	ldr	r5, [r0, #24]
1289	ldr	r6, [r0, #28]
1290	ldr	r7, [r0]
1291	ldr	r9, [r0, #4]
1292	ror	r4, r5, #6
1293	eor	r6, r6, r7
1294	eor	r4, r4, r5, ror #11
1295	and	r6, r6, r5
1296	eor	r4, r4, r5, ror #25
1297	eor	r6, r6, r7
1298	add	r9, r9, r4
1299	add	r9, r9, r6
1300	ldr	r5, [sp, #24]
1301	ldr	r6, [r12, #24]
1302	add	r9, r9, r5
1303	add	r9, r9, r6
1304	ldr	r5, [r0, #8]
1305	ldr	r6, [r0, #12]
1306	ldr	r7, [r0, #16]
1307	ldr	r8, [r0, #20]
1308	ror	r4, r5, #2
1309	eor	r10, r5, r6
1310	eor	r4, r4, r5, ror #13
1311	and	r11, r11, r10
1312	eor	r4, r4, r5, ror #22
1313	eor	r11, r11, r6
1314	add	r8, r8, r9
1315	add	r9, r9, r4
1316	add	r9, r9, r11
1317	str	r8, [r0, #20]
1318	str	r9, [r0, #4]
1319	# Round 7
1320	ldr	r5, [r0, #20]
1321	ldr	r6, [r0, #24]
1322	ldr	r7, [r0, #28]
1323	ldr	r9, [r0]
1324	ror	r4, r5, #6
1325	eor	r6, r6, r7
1326	eor	r4, r4, r5, ror #11
1327	and	r6, r6, r5
1328	eor	r4, r4, r5, ror #25
1329	eor	r6, r6, r7
1330	add	r9, r9, r4
1331	add	r9, r9, r6
1332	ldr	r5, [sp, #28]
1333	ldr	r6, [r12, #28]
1334	add	r9, r9, r5
1335	add	r9, r9, r6
1336	ldr	r5, [r0, #4]
1337	ldr	r6, [r0, #8]
1338	ldr	r7, [r0, #12]
1339	ldr	r8, [r0, #16]
1340	ror	r4, r5, #2
1341	eor	r11, r5, r6
1342	eor	r4, r4, r5, ror #13
1343	and	r10, r10, r11
1344	eor	r4, r4, r5, ror #22
1345	eor	r10, r10, r6
1346	add	r8, r8, r9
1347	add	r9, r9, r4
1348	add	r9, r9, r10
1349	str	r8, [r0, #16]
1350	str	r9, [r0]
1351	# Round 8
1352	ldr	r5, [r0, #16]
1353	ldr	r6, [r0, #20]
1354	ldr	r7, [r0, #24]
1355	ldr	r9, [r0, #28]
1356	ror	r4, r5, #6
1357	eor	r6, r6, r7
1358	eor	r4, r4, r5, ror #11
1359	and	r6, r6, r5
1360	eor	r4, r4, r5, ror #25
1361	eor	r6, r6, r7
1362	add	r9, r9, r4
1363	add	r9, r9, r6
1364	ldr	r5, [sp, #32]
1365	ldr	r6, [r12, #32]
1366	add	r9, r9, r5
1367	add	r9, r9, r6
1368	ldr	r5, [r0]
1369	ldr	r6, [r0, #4]
1370	ldr	r7, [r0, #8]
1371	ldr	r8, [r0, #12]
1372	ror	r4, r5, #2
1373	eor	r10, r5, r6
1374	eor	r4, r4, r5, ror #13
1375	and	r11, r11, r10
1376	eor	r4, r4, r5, ror #22
1377	eor	r11, r11, r6
1378	add	r8, r8, r9
1379	add	r9, r9, r4
1380	add	r9, r9, r11
1381	str	r8, [r0, #12]
1382	str	r9, [r0, #28]
1383	# Round 9
1384	ldr	r5, [r0, #12]
1385	ldr	r6, [r0, #16]
1386	ldr	r7, [r0, #20]
1387	ldr	r9, [r0, #24]
1388	ror	r4, r5, #6
1389	eor	r6, r6, r7
1390	eor	r4, r4, r5, ror #11
1391	and	r6, r6, r5
1392	eor	r4, r4, r5, ror #25
1393	eor	r6, r6, r7
1394	add	r9, r9, r4
1395	add	r9, r9, r6
1396	ldr	r5, [sp, #36]
1397	ldr	r6, [r12, #36]
1398	add	r9, r9, r5
1399	add	r9, r9, r6
1400	ldr	r5, [r0, #28]
1401	ldr	r6, [r0]
1402	ldr	r7, [r0, #4]
1403	ldr	r8, [r0, #8]
1404	ror	r4, r5, #2
1405	eor	r11, r5, r6
1406	eor	r4, r4, r5, ror #13
1407	and	r10, r10, r11
1408	eor	r4, r4, r5, ror #22
1409	eor	r10, r10, r6
1410	add	r8, r8, r9
1411	add	r9, r9, r4
1412	add	r9, r9, r10
1413	str	r8, [r0, #8]
1414	str	r9, [r0, #24]
1415	# Round 10
1416	ldr	r5, [r0, #8]
1417	ldr	r6, [r0, #12]
1418	ldr	r7, [r0, #16]
1419	ldr	r9, [r0, #20]
1420	ror	r4, r5, #6
1421	eor	r6, r6, r7
1422	eor	r4, r4, r5, ror #11
1423	and	r6, r6, r5
1424	eor	r4, r4, r5, ror #25
1425	eor	r6, r6, r7
1426	add	r9, r9, r4
1427	add	r9, r9, r6
1428	ldr	r5, [sp, #40]
1429	ldr	r6, [r12, #40]
1430	add	r9, r9, r5
1431	add	r9, r9, r6
1432	ldr	r5, [r0, #24]
1433	ldr	r6, [r0, #28]
1434	ldr	r7, [r0]
1435	ldr	r8, [r0, #4]
1436	ror	r4, r5, #2
1437	eor	r10, r5, r6
1438	eor	r4, r4, r5, ror #13
1439	and	r11, r11, r10
1440	eor	r4, r4, r5, ror #22
1441	eor	r11, r11, r6
1442	add	r8, r8, r9
1443	add	r9, r9, r4
1444	add	r9, r9, r11
1445	str	r8, [r0, #4]
1446	str	r9, [r0, #20]
1447	# Round 11
1448	ldr	r5, [r0, #4]
1449	ldr	r6, [r0, #8]
1450	ldr	r7, [r0, #12]
1451	ldr	r9, [r0, #16]
1452	ror	r4, r5, #6
1453	eor	r6, r6, r7
1454	eor	r4, r4, r5, ror #11
1455	and	r6, r6, r5
1456	eor	r4, r4, r5, ror #25
1457	eor	r6, r6, r7
1458	add	r9, r9, r4
1459	add	r9, r9, r6
1460	ldr	r5, [sp, #44]
1461	ldr	r6, [r12, #44]
1462	add	r9, r9, r5
1463	add	r9, r9, r6
1464	ldr	r5, [r0, #20]
1465	ldr	r6, [r0, #24]
1466	ldr	r7, [r0, #28]
1467	ldr	r8, [r0]
1468	ror	r4, r5, #2
1469	eor	r11, r5, r6
1470	eor	r4, r4, r5, ror #13
1471	and	r10, r10, r11
1472	eor	r4, r4, r5, ror #22
1473	eor	r10, r10, r6
1474	add	r8, r8, r9
1475	add	r9, r9, r4
1476	add	r9, r9, r10
1477	str	r8, [r0]
1478	str	r9, [r0, #16]
1479	# Round 12
1480	ldr	r5, [r0]
1481	ldr	r6, [r0, #4]
1482	ldr	r7, [r0, #8]
1483	ldr	r9, [r0, #12]
1484	ror	r4, r5, #6
1485	eor	r6, r6, r7
1486	eor	r4, r4, r5, ror #11
1487	and	r6, r6, r5
1488	eor	r4, r4, r5, ror #25
1489	eor	r6, r6, r7
1490	add	r9, r9, r4
1491	add	r9, r9, r6
1492	ldr	r5, [sp, #48]
1493	ldr	r6, [r12, #48]
1494	add	r9, r9, r5
1495	add	r9, r9, r6
1496	ldr	r5, [r0, #16]
1497	ldr	r6, [r0, #20]
1498	ldr	r7, [r0, #24]
1499	ldr	r8, [r0, #28]
1500	ror	r4, r5, #2
1501	eor	r10, r5, r6
1502	eor	r4, r4, r5, ror #13
1503	and	r11, r11, r10
1504	eor	r4, r4, r5, ror #22
1505	eor	r11, r11, r6
1506	add	r8, r8, r9
1507	add	r9, r9, r4
1508	add	r9, r9, r11
1509	str	r8, [r0, #28]
1510	str	r9, [r0, #12]
1511	# Round 13
1512	ldr	r5, [r0, #28]
1513	ldr	r6, [r0]
1514	ldr	r7, [r0, #4]
1515	ldr	r9, [r0, #8]
1516	ror	r4, r5, #6
1517	eor	r6, r6, r7
1518	eor	r4, r4, r5, ror #11
1519	and	r6, r6, r5
1520	eor	r4, r4, r5, ror #25
1521	eor	r6, r6, r7
1522	add	r9, r9, r4
1523	add	r9, r9, r6
1524	ldr	r5, [sp, #52]
1525	ldr	r6, [r12, #52]
1526	add	r9, r9, r5
1527	add	r9, r9, r6
1528	ldr	r5, [r0, #12]
1529	ldr	r6, [r0, #16]
1530	ldr	r7, [r0, #20]
1531	ldr	r8, [r0, #24]
1532	ror	r4, r5, #2
1533	eor	r11, r5, r6
1534	eor	r4, r4, r5, ror #13
1535	and	r10, r10, r11
1536	eor	r4, r4, r5, ror #22
1537	eor	r10, r10, r6
1538	add	r8, r8, r9
1539	add	r9, r9, r4
1540	add	r9, r9, r10
1541	str	r8, [r0, #24]
1542	str	r9, [r0, #8]
1543	# Round 14
1544	ldr	r5, [r0, #24]
1545	ldr	r6, [r0, #28]
1546	ldr	r7, [r0]
1547	ldr	r9, [r0, #4]
1548	ror	r4, r5, #6
1549	eor	r6, r6, r7
1550	eor	r4, r4, r5, ror #11
1551	and	r6, r6, r5
1552	eor	r4, r4, r5, ror #25
1553	eor	r6, r6, r7
1554	add	r9, r9, r4
1555	add	r9, r9, r6
1556	ldr	r5, [sp, #56]
1557	ldr	r6, [r12, #56]
1558	add	r9, r9, r5
1559	add	r9, r9, r6
1560	ldr	r5, [r0, #8]
1561	ldr	r6, [r0, #12]
1562	ldr	r7, [r0, #16]
1563	ldr	r8, [r0, #20]
1564	ror	r4, r5, #2
1565	eor	r10, r5, r6
1566	eor	r4, r4, r5, ror #13
1567	and	r11, r11, r10
1568	eor	r4, r4, r5, ror #22
1569	eor	r11, r11, r6
1570	add	r8, r8, r9
1571	add	r9, r9, r4
1572	add	r9, r9, r11
1573	str	r8, [r0, #20]
1574	str	r9, [r0, #4]
1575	# Round 15
1576	ldr	r5, [r0, #20]
1577	ldr	r6, [r0, #24]
1578	ldr	r7, [r0, #28]
1579	ldr	r9, [r0]
1580	ror	r4, r5, #6
1581	eor	r6, r6, r7
1582	eor	r4, r4, r5, ror #11
1583	and	r6, r6, r5
1584	eor	r4, r4, r5, ror #25
1585	eor	r6, r6, r7
1586	add	r9, r9, r4
1587	add	r9, r9, r6
1588	ldr	r5, [sp, #60]
1589	ldr	r6, [r12, #60]
1590	add	r9, r9, r5
1591	add	r9, r9, r6
1592	ldr	r5, [r0, #4]
1593	ldr	r6, [r0, #8]
1594	ldr	r7, [r0, #12]
1595	ldr	r8, [r0, #16]
1596	ror	r4, r5, #2
1597	eor	r11, r5, r6
1598	eor	r4, r4, r5, ror #13
1599	and	r10, r10, r11
1600	eor	r4, r4, r5, ror #22
1601	eor	r10, r10, r6
1602	add	r8, r8, r9
1603	add	r9, r9, r4
1604	add	r9, r9, r10
1605	str	r8, [r0, #16]
1606	str	r9, [r0]
1607#else
1608	mov	r3, #4
1609	# Start of 16 rounds
1610L_SHA256_transform_len_start_small:
1611	sub	r3, r3, #1
1612	# Round 0
1613	ldr	r5, [r0, #16]
1614	ldr	r6, [r0, #20]
1615	ldr	r7, [r0, #24]
1616	ldr	r9, [r0, #28]
1617	ror	r4, r5, #6
1618	eor	r6, r6, r7
1619	eor	r4, r4, r5, ror #11
1620	and	r6, r6, r5
1621	eor	r4, r4, r5, ror #25
1622	eor	r6, r6, r7
1623	add	r9, r9, r4
1624	add	r9, r9, r6
1625	ldr	r5, [sp]
1626	ldr	r6, [r12]
1627	add	r9, r9, r5
1628	add	r9, r9, r6
1629	ldr	r5, [r0]
1630	ldr	r6, [r0, #4]
1631	ldr	r7, [r0, #8]
1632	ldr	r8, [r0, #12]
1633	ror	r4, r5, #2
1634	eor	r10, r5, r6
1635	eor	r4, r4, r5, ror #13
1636	and	r11, r11, r10
1637	eor	r4, r4, r5, ror #22
1638	eor	r11, r11, r6
1639	add	r8, r8, r9
1640	add	r9, r9, r4
1641	add	r9, r9, r11
1642	str	r8, [r0, #12]
1643	str	r9, [r0, #28]
1644	cmp	r3, #0
1645	beq	L_SHA256_transform_len_blk_end_0
1646	# Calc new W[0]
1647	ldr	r6, [sp, #56]
1648	ldr	r7, [sp, #36]
1649	ldr	r8, [sp, #4]
1650	ldr	r9, [sp]
1651	ror	r4, r6, #17
1652	ror	r5, r8, #7
1653	eor	r4, r4, r6, ror #19
1654	eor	r5, r5, r8, ror #18
1655	eor	r4, r4, r6, lsr #10
1656	eor	r5, r5, r8, lsr #3
1657	add	r9, r9, r7
1658	add	r4, r4, r5
1659	add	r9, r9, r4
1660	str	r9, [sp]
1661L_SHA256_transform_len_blk_end_0:
1662	# Round 1
1663	ldr	r5, [r0, #12]
1664	ldr	r6, [r0, #16]
1665	ldr	r7, [r0, #20]
1666	ldr	r9, [r0, #24]
1667	ror	r4, r5, #6
1668	eor	r6, r6, r7
1669	eor	r4, r4, r5, ror #11
1670	and	r6, r6, r5
1671	eor	r4, r4, r5, ror #25
1672	eor	r6, r6, r7
1673	add	r9, r9, r4
1674	add	r9, r9, r6
1675	ldr	r5, [sp, #4]
1676	ldr	r6, [r12, #4]
1677	add	r9, r9, r5
1678	add	r9, r9, r6
1679	ldr	r5, [r0, #28]
1680	ldr	r6, [r0]
1681	ldr	r7, [r0, #4]
1682	ldr	r8, [r0, #8]
1683	ror	r4, r5, #2
1684	eor	r11, r5, r6
1685	eor	r4, r4, r5, ror #13
1686	and	r10, r10, r11
1687	eor	r4, r4, r5, ror #22
1688	eor	r10, r10, r6
1689	add	r8, r8, r9
1690	add	r9, r9, r4
1691	add	r9, r9, r10
1692	str	r8, [r0, #8]
1693	str	r9, [r0, #24]
1694	cmp	r3, #0
1695	beq	L_SHA256_transform_len_blk_end_1
1696	# Calc new W[1]
1697	ldr	r6, [sp, #60]
1698	ldr	r7, [sp, #40]
1699	ldr	r8, [sp, #8]
1700	ldr	r9, [sp, #4]
1701	ror	r4, r6, #17
1702	ror	r5, r8, #7
1703	eor	r4, r4, r6, ror #19
1704	eor	r5, r5, r8, ror #18
1705	eor	r4, r4, r6, lsr #10
1706	eor	r5, r5, r8, lsr #3
1707	add	r9, r9, r7
1708	add	r4, r4, r5
1709	add	r9, r9, r4
1710	str	r9, [sp, #4]
1711L_SHA256_transform_len_blk_end_1:
1712	# Round 2
1713	ldr	r5, [r0, #8]
1714	ldr	r6, [r0, #12]
1715	ldr	r7, [r0, #16]
1716	ldr	r9, [r0, #20]
1717	ror	r4, r5, #6
1718	eor	r6, r6, r7
1719	eor	r4, r4, r5, ror #11
1720	and	r6, r6, r5
1721	eor	r4, r4, r5, ror #25
1722	eor	r6, r6, r7
1723	add	r9, r9, r4
1724	add	r9, r9, r6
1725	ldr	r5, [sp, #8]
1726	ldr	r6, [r12, #8]
1727	add	r9, r9, r5
1728	add	r9, r9, r6
1729	ldr	r5, [r0, #24]
1730	ldr	r6, [r0, #28]
1731	ldr	r7, [r0]
1732	ldr	r8, [r0, #4]
1733	ror	r4, r5, #2
1734	eor	r10, r5, r6
1735	eor	r4, r4, r5, ror #13
1736	and	r11, r11, r10
1737	eor	r4, r4, r5, ror #22
1738	eor	r11, r11, r6
1739	add	r8, r8, r9
1740	add	r9, r9, r4
1741	add	r9, r9, r11
1742	str	r8, [r0, #4]
1743	str	r9, [r0, #20]
1744	cmp	r3, #0
1745	beq	L_SHA256_transform_len_blk_end_2
1746	# Calc new W[2]
1747	ldr	r6, [sp]
1748	ldr	r7, [sp, #44]
1749	ldr	r8, [sp, #12]
1750	ldr	r9, [sp, #8]
1751	ror	r4, r6, #17
1752	ror	r5, r8, #7
1753	eor	r4, r4, r6, ror #19
1754	eor	r5, r5, r8, ror #18
1755	eor	r4, r4, r6, lsr #10
1756	eor	r5, r5, r8, lsr #3
1757	add	r9, r9, r7
1758	add	r4, r4, r5
1759	add	r9, r9, r4
1760	str	r9, [sp, #8]
1761L_SHA256_transform_len_blk_end_2:
1762	# Round 3
1763	ldr	r5, [r0, #4]
1764	ldr	r6, [r0, #8]
1765	ldr	r7, [r0, #12]
1766	ldr	r9, [r0, #16]
1767	ror	r4, r5, #6
1768	eor	r6, r6, r7
1769	eor	r4, r4, r5, ror #11
1770	and	r6, r6, r5
1771	eor	r4, r4, r5, ror #25
1772	eor	r6, r6, r7
1773	add	r9, r9, r4
1774	add	r9, r9, r6
1775	ldr	r5, [sp, #12]
1776	ldr	r6, [r12, #12]
1777	add	r9, r9, r5
1778	add	r9, r9, r6
1779	ldr	r5, [r0, #20]
1780	ldr	r6, [r0, #24]
1781	ldr	r7, [r0, #28]
1782	ldr	r8, [r0]
1783	ror	r4, r5, #2
1784	eor	r11, r5, r6
1785	eor	r4, r4, r5, ror #13
1786	and	r10, r10, r11
1787	eor	r4, r4, r5, ror #22
1788	eor	r10, r10, r6
1789	add	r8, r8, r9
1790	add	r9, r9, r4
1791	add	r9, r9, r10
1792	str	r8, [r0]
1793	str	r9, [r0, #16]
1794	cmp	r3, #0
1795	beq	L_SHA256_transform_len_blk_end_3
1796	# Calc new W[3]
1797	ldr	r6, [sp, #4]
1798	ldr	r7, [sp, #48]
1799	ldr	r8, [sp, #16]
1800	ldr	r9, [sp, #12]
1801	ror	r4, r6, #17
1802	ror	r5, r8, #7
1803	eor	r4, r4, r6, ror #19
1804	eor	r5, r5, r8, ror #18
1805	eor	r4, r4, r6, lsr #10
1806	eor	r5, r5, r8, lsr #3
1807	add	r9, r9, r7
1808	add	r4, r4, r5
1809	add	r9, r9, r4
1810	str	r9, [sp, #12]
1811L_SHA256_transform_len_blk_end_3:
1812	# Round 4
1813	ldr	r5, [r0]
1814	ldr	r6, [r0, #4]
1815	ldr	r7, [r0, #8]
1816	ldr	r9, [r0, #12]
1817	ror	r4, r5, #6
1818	eor	r6, r6, r7
1819	eor	r4, r4, r5, ror #11
1820	and	r6, r6, r5
1821	eor	r4, r4, r5, ror #25
1822	eor	r6, r6, r7
1823	add	r9, r9, r4
1824	add	r9, r9, r6
1825	ldr	r5, [sp, #16]
1826	ldr	r6, [r12, #16]
1827	add	r9, r9, r5
1828	add	r9, r9, r6
1829	ldr	r5, [r0, #16]
1830	ldr	r6, [r0, #20]
1831	ldr	r7, [r0, #24]
1832	ldr	r8, [r0, #28]
1833	ror	r4, r5, #2
1834	eor	r10, r5, r6
1835	eor	r4, r4, r5, ror #13
1836	and	r11, r11, r10
1837	eor	r4, r4, r5, ror #22
1838	eor	r11, r11, r6
1839	add	r8, r8, r9
1840	add	r9, r9, r4
1841	add	r9, r9, r11
1842	str	r8, [r0, #28]
1843	str	r9, [r0, #12]
1844	cmp	r3, #0
1845	beq	L_SHA256_transform_len_blk_end_4
1846	# Calc new W[4]
1847	ldr	r6, [sp, #8]
1848	ldr	r7, [sp, #52]
1849	ldr	r8, [sp, #20]
1850	ldr	r9, [sp, #16]
1851	ror	r4, r6, #17
1852	ror	r5, r8, #7
1853	eor	r4, r4, r6, ror #19
1854	eor	r5, r5, r8, ror #18
1855	eor	r4, r4, r6, lsr #10
1856	eor	r5, r5, r8, lsr #3
1857	add	r9, r9, r7
1858	add	r4, r4, r5
1859	add	r9, r9, r4
1860	str	r9, [sp, #16]
1861L_SHA256_transform_len_blk_end_4:
1862	# Round 5
1863	ldr	r5, [r0, #28]
1864	ldr	r6, [r0]
1865	ldr	r7, [r0, #4]
1866	ldr	r9, [r0, #8]
1867	ror	r4, r5, #6
1868	eor	r6, r6, r7
1869	eor	r4, r4, r5, ror #11
1870	and	r6, r6, r5
1871	eor	r4, r4, r5, ror #25
1872	eor	r6, r6, r7
1873	add	r9, r9, r4
1874	add	r9, r9, r6
1875	ldr	r5, [sp, #20]
1876	ldr	r6, [r12, #20]
1877	add	r9, r9, r5
1878	add	r9, r9, r6
1879	ldr	r5, [r0, #12]
1880	ldr	r6, [r0, #16]
1881	ldr	r7, [r0, #20]
1882	ldr	r8, [r0, #24]
1883	ror	r4, r5, #2
1884	eor	r11, r5, r6
1885	eor	r4, r4, r5, ror #13
1886	and	r10, r10, r11
1887	eor	r4, r4, r5, ror #22
1888	eor	r10, r10, r6
1889	add	r8, r8, r9
1890	add	r9, r9, r4
1891	add	r9, r9, r10
1892	str	r8, [r0, #24]
1893	str	r9, [r0, #8]
1894	cmp	r3, #0
1895	beq	L_SHA256_transform_len_blk_end_5
1896	# Calc new W[5]
1897	ldr	r6, [sp, #12]
1898	ldr	r7, [sp, #56]
1899	ldr	r8, [sp, #24]
1900	ldr	r9, [sp, #20]
1901	ror	r4, r6, #17
1902	ror	r5, r8, #7
1903	eor	r4, r4, r6, ror #19
1904	eor	r5, r5, r8, ror #18
1905	eor	r4, r4, r6, lsr #10
1906	eor	r5, r5, r8, lsr #3
1907	add	r9, r9, r7
1908	add	r4, r4, r5
1909	add	r9, r9, r4
1910	str	r9, [sp, #20]
1911L_SHA256_transform_len_blk_end_5:
1912	# Round 6
1913	ldr	r5, [r0, #24]
1914	ldr	r6, [r0, #28]
1915	ldr	r7, [r0]
1916	ldr	r9, [r0, #4]
1917	ror	r4, r5, #6
1918	eor	r6, r6, r7
1919	eor	r4, r4, r5, ror #11
1920	and	r6, r6, r5
1921	eor	r4, r4, r5, ror #25
1922	eor	r6, r6, r7
1923	add	r9, r9, r4
1924	add	r9, r9, r6
1925	ldr	r5, [sp, #24]
1926	ldr	r6, [r12, #24]
1927	add	r9, r9, r5
1928	add	r9, r9, r6
1929	ldr	r5, [r0, #8]
1930	ldr	r6, [r0, #12]
1931	ldr	r7, [r0, #16]
1932	ldr	r8, [r0, #20]
1933	ror	r4, r5, #2
1934	eor	r10, r5, r6
1935	eor	r4, r4, r5, ror #13
1936	and	r11, r11, r10
1937	eor	r4, r4, r5, ror #22
1938	eor	r11, r11, r6
1939	add	r8, r8, r9
1940	add	r9, r9, r4
1941	add	r9, r9, r11
1942	str	r8, [r0, #20]
1943	str	r9, [r0, #4]
1944	cmp	r3, #0
1945	beq	L_SHA256_transform_len_blk_end_6
1946	# Calc new W[6]
1947	ldr	r6, [sp, #16]
1948	ldr	r7, [sp, #60]
1949	ldr	r8, [sp, #28]
1950	ldr	r9, [sp, #24]
1951	ror	r4, r6, #17
1952	ror	r5, r8, #7
1953	eor	r4, r4, r6, ror #19
1954	eor	r5, r5, r8, ror #18
1955	eor	r4, r4, r6, lsr #10
1956	eor	r5, r5, r8, lsr #3
1957	add	r9, r9, r7
1958	add	r4, r4, r5
1959	add	r9, r9, r4
1960	str	r9, [sp, #24]
1961L_SHA256_transform_len_blk_end_6:
1962	# Round 7
1963	ldr	r5, [r0, #20]
1964	ldr	r6, [r0, #24]
1965	ldr	r7, [r0, #28]
1966	ldr	r9, [r0]
1967	ror	r4, r5, #6
1968	eor	r6, r6, r7
1969	eor	r4, r4, r5, ror #11
1970	and	r6, r6, r5
1971	eor	r4, r4, r5, ror #25
1972	eor	r6, r6, r7
1973	add	r9, r9, r4
1974	add	r9, r9, r6
1975	ldr	r5, [sp, #28]
1976	ldr	r6, [r12, #28]
1977	add	r9, r9, r5
1978	add	r9, r9, r6
1979	ldr	r5, [r0, #4]
1980	ldr	r6, [r0, #8]
1981	ldr	r7, [r0, #12]
1982	ldr	r8, [r0, #16]
1983	ror	r4, r5, #2
1984	eor	r11, r5, r6
1985	eor	r4, r4, r5, ror #13
1986	and	r10, r10, r11
1987	eor	r4, r4, r5, ror #22
1988	eor	r10, r10, r6
1989	add	r8, r8, r9
1990	add	r9, r9, r4
1991	add	r9, r9, r10
1992	str	r8, [r0, #16]
1993	str	r9, [r0]
1994	cmp	r3, #0
1995	beq	L_SHA256_transform_len_blk_end_7
1996	# Calc new W[7]
1997	ldr	r6, [sp, #20]
1998	ldr	r7, [sp]
1999	ldr	r8, [sp, #32]
2000	ldr	r9, [sp, #28]
2001	ror	r4, r6, #17
2002	ror	r5, r8, #7
2003	eor	r4, r4, r6, ror #19
2004	eor	r5, r5, r8, ror #18
2005	eor	r4, r4, r6, lsr #10
2006	eor	r5, r5, r8, lsr #3
2007	add	r9, r9, r7
2008	add	r4, r4, r5
2009	add	r9, r9, r4
2010	str	r9, [sp, #28]
2011L_SHA256_transform_len_blk_end_7:
2012	# Round 8
2013	ldr	r5, [r0, #16]
2014	ldr	r6, [r0, #20]
2015	ldr	r7, [r0, #24]
2016	ldr	r9, [r0, #28]
2017	ror	r4, r5, #6
2018	eor	r6, r6, r7
2019	eor	r4, r4, r5, ror #11
2020	and	r6, r6, r5
2021	eor	r4, r4, r5, ror #25
2022	eor	r6, r6, r7
2023	add	r9, r9, r4
2024	add	r9, r9, r6
2025	ldr	r5, [sp, #32]
2026	ldr	r6, [r12, #32]
2027	add	r9, r9, r5
2028	add	r9, r9, r6
2029	ldr	r5, [r0]
2030	ldr	r6, [r0, #4]
2031	ldr	r7, [r0, #8]
2032	ldr	r8, [r0, #12]
2033	ror	r4, r5, #2
2034	eor	r10, r5, r6
2035	eor	r4, r4, r5, ror #13
2036	and	r11, r11, r10
2037	eor	r4, r4, r5, ror #22
2038	eor	r11, r11, r6
2039	add	r8, r8, r9
2040	add	r9, r9, r4
2041	add	r9, r9, r11
2042	str	r8, [r0, #12]
2043	str	r9, [r0, #28]
2044	cmp	r3, #0
2045	beq	L_SHA256_transform_len_blk_end_8
2046	# Calc new W[8]
2047	ldr	r6, [sp, #24]
2048	ldr	r7, [sp, #4]
2049	ldr	r8, [sp, #36]
2050	ldr	r9, [sp, #32]
2051	ror	r4, r6, #17
2052	ror	r5, r8, #7
2053	eor	r4, r4, r6, ror #19
2054	eor	r5, r5, r8, ror #18
2055	eor	r4, r4, r6, lsr #10
2056	eor	r5, r5, r8, lsr #3
2057	add	r9, r9, r7
2058	add	r4, r4, r5
2059	add	r9, r9, r4
2060	str	r9, [sp, #32]
2061L_SHA256_transform_len_blk_end_8:
2062	# Round 9
2063	ldr	r5, [r0, #12]
2064	ldr	r6, [r0, #16]
2065	ldr	r7, [r0, #20]
2066	ldr	r9, [r0, #24]
2067	ror	r4, r5, #6
2068	eor	r6, r6, r7
2069	eor	r4, r4, r5, ror #11
2070	and	r6, r6, r5
2071	eor	r4, r4, r5, ror #25
2072	eor	r6, r6, r7
2073	add	r9, r9, r4
2074	add	r9, r9, r6
2075	ldr	r5, [sp, #36]
2076	ldr	r6, [r12, #36]
2077	add	r9, r9, r5
2078	add	r9, r9, r6
2079	ldr	r5, [r0, #28]
2080	ldr	r6, [r0]
2081	ldr	r7, [r0, #4]
2082	ldr	r8, [r0, #8]
2083	ror	r4, r5, #2
2084	eor	r11, r5, r6
2085	eor	r4, r4, r5, ror #13
2086	and	r10, r10, r11
2087	eor	r4, r4, r5, ror #22
2088	eor	r10, r10, r6
2089	add	r8, r8, r9
2090	add	r9, r9, r4
2091	add	r9, r9, r10
2092	str	r8, [r0, #8]
2093	str	r9, [r0, #24]
2094	cmp	r3, #0
2095	beq	L_SHA256_transform_len_blk_end_9
2096	# Calc new W[9]
2097	ldr	r6, [sp, #28]
2098	ldr	r7, [sp, #8]
2099	ldr	r8, [sp, #40]
2100	ldr	r9, [sp, #36]
2101	ror	r4, r6, #17
2102	ror	r5, r8, #7
2103	eor	r4, r4, r6, ror #19
2104	eor	r5, r5, r8, ror #18
2105	eor	r4, r4, r6, lsr #10
2106	eor	r5, r5, r8, lsr #3
2107	add	r9, r9, r7
2108	add	r4, r4, r5
2109	add	r9, r9, r4
2110	str	r9, [sp, #36]
2111L_SHA256_transform_len_blk_end_9:
2112	# Round 10
2113	ldr	r5, [r0, #8]
2114	ldr	r6, [r0, #12]
2115	ldr	r7, [r0, #16]
2116	ldr	r9, [r0, #20]
2117	ror	r4, r5, #6
2118	eor	r6, r6, r7
2119	eor	r4, r4, r5, ror #11
2120	and	r6, r6, r5
2121	eor	r4, r4, r5, ror #25
2122	eor	r6, r6, r7
2123	add	r9, r9, r4
2124	add	r9, r9, r6
2125	ldr	r5, [sp, #40]
2126	ldr	r6, [r12, #40]
2127	add	r9, r9, r5
2128	add	r9, r9, r6
2129	ldr	r5, [r0, #24]
2130	ldr	r6, [r0, #28]
2131	ldr	r7, [r0]
2132	ldr	r8, [r0, #4]
2133	ror	r4, r5, #2
2134	eor	r10, r5, r6
2135	eor	r4, r4, r5, ror #13
2136	and	r11, r11, r10
2137	eor	r4, r4, r5, ror #22
2138	eor	r11, r11, r6
2139	add	r8, r8, r9
2140	add	r9, r9, r4
2141	add	r9, r9, r11
2142	str	r8, [r0, #4]
2143	str	r9, [r0, #20]
2144	cmp	r3, #0
2145	beq	L_SHA256_transform_len_blk_end_10
2146	# Calc new W[10]
2147	ldr	r6, [sp, #32]
2148	ldr	r7, [sp, #12]
2149	ldr	r8, [sp, #44]
2150	ldr	r9, [sp, #40]
2151	ror	r4, r6, #17
2152	ror	r5, r8, #7
2153	eor	r4, r4, r6, ror #19
2154	eor	r5, r5, r8, ror #18
2155	eor	r4, r4, r6, lsr #10
2156	eor	r5, r5, r8, lsr #3
2157	add	r9, r9, r7
2158	add	r4, r4, r5
2159	add	r9, r9, r4
2160	str	r9, [sp, #40]
2161L_SHA256_transform_len_blk_end_10:
2162	# Round 11
2163	ldr	r5, [r0, #4]
2164	ldr	r6, [r0, #8]
2165	ldr	r7, [r0, #12]
2166	ldr	r9, [r0, #16]
2167	ror	r4, r5, #6
2168	eor	r6, r6, r7
2169	eor	r4, r4, r5, ror #11
2170	and	r6, r6, r5
2171	eor	r4, r4, r5, ror #25
2172	eor	r6, r6, r7
2173	add	r9, r9, r4
2174	add	r9, r9, r6
2175	ldr	r5, [sp, #44]
2176	ldr	r6, [r12, #44]
2177	add	r9, r9, r5
2178	add	r9, r9, r6
2179	ldr	r5, [r0, #20]
2180	ldr	r6, [r0, #24]
2181	ldr	r7, [r0, #28]
2182	ldr	r8, [r0]
2183	ror	r4, r5, #2
2184	eor	r11, r5, r6
2185	eor	r4, r4, r5, ror #13
2186	and	r10, r10, r11
2187	eor	r4, r4, r5, ror #22
2188	eor	r10, r10, r6
2189	add	r8, r8, r9
2190	add	r9, r9, r4
2191	add	r9, r9, r10
2192	str	r8, [r0]
2193	str	r9, [r0, #16]
2194	cmp	r3, #0
2195	beq	L_SHA256_transform_len_blk_end_11
2196	# Calc new W[11]
2197	ldr	r6, [sp, #36]
2198	ldr	r7, [sp, #16]
2199	ldr	r8, [sp, #48]
2200	ldr	r9, [sp, #44]
2201	ror	r4, r6, #17
2202	ror	r5, r8, #7
2203	eor	r4, r4, r6, ror #19
2204	eor	r5, r5, r8, ror #18
2205	eor	r4, r4, r6, lsr #10
2206	eor	r5, r5, r8, lsr #3
2207	add	r9, r9, r7
2208	add	r4, r4, r5
2209	add	r9, r9, r4
2210	str	r9, [sp, #44]
2211L_SHA256_transform_len_blk_end_11:
2212	# Round 12
2213	ldr	r5, [r0]
2214	ldr	r6, [r0, #4]
2215	ldr	r7, [r0, #8]
2216	ldr	r9, [r0, #12]
2217	ror	r4, r5, #6
2218	eor	r6, r6, r7
2219	eor	r4, r4, r5, ror #11
2220	and	r6, r6, r5
2221	eor	r4, r4, r5, ror #25
2222	eor	r6, r6, r7
2223	add	r9, r9, r4
2224	add	r9, r9, r6
2225	ldr	r5, [sp, #48]
2226	ldr	r6, [r12, #48]
2227	add	r9, r9, r5
2228	add	r9, r9, r6
2229	ldr	r5, [r0, #16]
2230	ldr	r6, [r0, #20]
2231	ldr	r7, [r0, #24]
2232	ldr	r8, [r0, #28]
2233	ror	r4, r5, #2
2234	eor	r10, r5, r6
2235	eor	r4, r4, r5, ror #13
2236	and	r11, r11, r10
2237	eor	r4, r4, r5, ror #22
2238	eor	r11, r11, r6
2239	add	r8, r8, r9
2240	add	r9, r9, r4
2241	add	r9, r9, r11
2242	str	r8, [r0, #28]
2243	str	r9, [r0, #12]
2244	cmp	r3, #0
2245	beq	L_SHA256_transform_len_blk_end_12
2246	# Calc new W[12]
2247	ldr	r6, [sp, #40]
2248	ldr	r7, [sp, #20]
2249	ldr	r8, [sp, #52]
2250	ldr	r9, [sp, #48]
2251	ror	r4, r6, #17
2252	ror	r5, r8, #7
2253	eor	r4, r4, r6, ror #19
2254	eor	r5, r5, r8, ror #18
2255	eor	r4, r4, r6, lsr #10
2256	eor	r5, r5, r8, lsr #3
2257	add	r9, r9, r7
2258	add	r4, r4, r5
2259	add	r9, r9, r4
2260	str	r9, [sp, #48]
2261L_SHA256_transform_len_blk_end_12:
2262	# Round 13
2263	ldr	r5, [r0, #28]
2264	ldr	r6, [r0]
2265	ldr	r7, [r0, #4]
2266	ldr	r9, [r0, #8]
2267	ror	r4, r5, #6
2268	eor	r6, r6, r7
2269	eor	r4, r4, r5, ror #11
2270	and	r6, r6, r5
2271	eor	r4, r4, r5, ror #25
2272	eor	r6, r6, r7
2273	add	r9, r9, r4
2274	add	r9, r9, r6
2275	ldr	r5, [sp, #52]
2276	ldr	r6, [r12, #52]
2277	add	r9, r9, r5
2278	add	r9, r9, r6
2279	ldr	r5, [r0, #12]
2280	ldr	r6, [r0, #16]
2281	ldr	r7, [r0, #20]
2282	ldr	r8, [r0, #24]
2283	ror	r4, r5, #2
2284	eor	r11, r5, r6
2285	eor	r4, r4, r5, ror #13
2286	and	r10, r10, r11
2287	eor	r4, r4, r5, ror #22
2288	eor	r10, r10, r6
2289	add	r8, r8, r9
2290	add	r9, r9, r4
2291	add	r9, r9, r10
2292	str	r8, [r0, #24]
2293	str	r9, [r0, #8]
2294	cmp	r3, #0
2295	beq	L_SHA256_transform_len_blk_end_13
2296	# Calc new W[13]
2297	ldr	r6, [sp, #44]
2298	ldr	r7, [sp, #24]
2299	ldr	r8, [sp, #56]
2300	ldr	r9, [sp, #52]
2301	ror	r4, r6, #17
2302	ror	r5, r8, #7
2303	eor	r4, r4, r6, ror #19
2304	eor	r5, r5, r8, ror #18
2305	eor	r4, r4, r6, lsr #10
2306	eor	r5, r5, r8, lsr #3
2307	add	r9, r9, r7
2308	add	r4, r4, r5
2309	add	r9, r9, r4
2310	str	r9, [sp, #52]
2311L_SHA256_transform_len_blk_end_13:
2312	# Round 14
2313	ldr	r5, [r0, #24]
2314	ldr	r6, [r0, #28]
2315	ldr	r7, [r0]
2316	ldr	r9, [r0, #4]
2317	ror	r4, r5, #6
2318	eor	r6, r6, r7
2319	eor	r4, r4, r5, ror #11
2320	and	r6, r6, r5
2321	eor	r4, r4, r5, ror #25
2322	eor	r6, r6, r7
2323	add	r9, r9, r4
2324	add	r9, r9, r6
2325	ldr	r5, [sp, #56]
2326	ldr	r6, [r12, #56]
2327	add	r9, r9, r5
2328	add	r9, r9, r6
2329	ldr	r5, [r0, #8]
2330	ldr	r6, [r0, #12]
2331	ldr	r7, [r0, #16]
2332	ldr	r8, [r0, #20]
2333	ror	r4, r5, #2
2334	eor	r10, r5, r6
2335	eor	r4, r4, r5, ror #13
2336	and	r11, r11, r10
2337	eor	r4, r4, r5, ror #22
2338	eor	r11, r11, r6
2339	add	r8, r8, r9
2340	add	r9, r9, r4
2341	add	r9, r9, r11
2342	str	r8, [r0, #20]
2343	str	r9, [r0, #4]
2344	cmp	r3, #0
2345	beq	L_SHA256_transform_len_blk_end_14
2346	# Calc new W[14]
2347	ldr	r6, [sp, #48]
2348	ldr	r7, [sp, #28]
2349	ldr	r8, [sp, #60]
2350	ldr	r9, [sp, #56]
2351	ror	r4, r6, #17
2352	ror	r5, r8, #7
2353	eor	r4, r4, r6, ror #19
2354	eor	r5, r5, r8, ror #18
2355	eor	r4, r4, r6, lsr #10
2356	eor	r5, r5, r8, lsr #3
2357	add	r9, r9, r7
2358	add	r4, r4, r5
2359	add	r9, r9, r4
2360	str	r9, [sp, #56]
2361L_SHA256_transform_len_blk_end_14:
2362	# Round 15
2363	ldr	r5, [r0, #20]
2364	ldr	r6, [r0, #24]
2365	ldr	r7, [r0, #28]
2366	ldr	r9, [r0]
2367	ror	r4, r5, #6
2368	eor	r6, r6, r7
2369	eor	r4, r4, r5, ror #11
2370	and	r6, r6, r5
2371	eor	r4, r4, r5, ror #25
2372	eor	r6, r6, r7
2373	add	r9, r9, r4
2374	add	r9, r9, r6
2375	ldr	r5, [sp, #60]
2376	ldr	r6, [r12, #60]
2377	add	r9, r9, r5
2378	add	r9, r9, r6
2379	ldr	r5, [r0, #4]
2380	ldr	r6, [r0, #8]
2381	ldr	r7, [r0, #12]
2382	ldr	r8, [r0, #16]
2383	ror	r4, r5, #2
2384	eor	r11, r5, r6
2385	eor	r4, r4, r5, ror #13
2386	and	r10, r10, r11
2387	eor	r4, r4, r5, ror #22
2388	eor	r10, r10, r6
2389	add	r8, r8, r9
2390	add	r9, r9, r4
2391	add	r9, r9, r10
2392	str	r8, [r0, #16]
2393	str	r9, [r0]
2394	cmp	r3, #0
2395	beq	L_SHA256_transform_len_blk_end_15
2396	# Calc new W[15]
2397	ldr	r6, [sp, #52]
2398	ldr	r7, [sp, #32]
2399	ldr	r8, [sp]
2400	ldr	r9, [sp, #60]
2401	ror	r4, r6, #17
2402	ror	r5, r8, #7
2403	eor	r4, r4, r6, ror #19
2404	eor	r5, r5, r8, ror #18
2405	eor	r4, r4, r6, lsr #10
2406	eor	r5, r5, r8, lsr #3
2407	add	r9, r9, r7
2408	add	r4, r4, r5
2409	add	r9, r9, r4
2410	str	r9, [sp, #60]
2411L_SHA256_transform_len_blk_end_15:
2412	cmp	r3, #0
2413	add	r12, r12, #0x40
2414	bne	L_SHA256_transform_len_start_small
2415#endif /* !WOLFSSL_ARMASM_SHA256_SMALL */
2416	# Add in digest from start
2417#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2418	ldm	r0, {r4, r5}
2419#else
2420	ldrd	r4, r5, [r0]
2421#endif
2422#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2423	ldr	r6, [r0, #8]
2424	ldr	r7, [r0, #12]
2425#else
2426	ldrd	r6, r7, [r0, #8]
2427#endif
2428#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2429	ldr	r8, [sp, #64]
2430	ldr	r9, [sp, #68]
2431#else
2432	ldrd	r8, r9, [sp, #64]
2433#endif
2434#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2435	ldr	r10, [sp, #72]
2436	ldr	r11, [sp, #76]
2437#else
2438	ldrd	r10, r11, [sp, #72]
2439#endif
2440	add	r4, r4, r8
2441	add	r5, r5, r9
2442	add	r6, r6, r10
2443	add	r7, r7, r11
2444#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2445	stm	r0, {r4, r5}
2446#else
2447	strd	r4, r5, [r0]
2448#endif
2449#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2450	str	r6, [r0, #8]
2451	str	r7, [r0, #12]
2452#else
2453	strd	r6, r7, [r0, #8]
2454#endif
2455#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2456	str	r4, [sp, #64]
2457	str	r5, [sp, #68]
2458#else
2459	strd	r4, r5, [sp, #64]
2460#endif
2461#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2462	str	r6, [sp, #72]
2463	str	r7, [sp, #76]
2464#else
2465	strd	r6, r7, [sp, #72]
2466#endif
2467#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2468	ldr	r4, [r0, #16]
2469	ldr	r5, [r0, #20]
2470#else
2471	ldrd	r4, r5, [r0, #16]
2472#endif
2473#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2474	ldr	r6, [r0, #24]
2475	ldr	r7, [r0, #28]
2476#else
2477	ldrd	r6, r7, [r0, #24]
2478#endif
2479#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2480	ldr	r8, [sp, #80]
2481	ldr	r9, [sp, #84]
2482#else
2483	ldrd	r8, r9, [sp, #80]
2484#endif
2485#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2486	ldr	r10, [sp, #88]
2487	ldr	r11, [sp, #92]
2488#else
2489	ldrd	r10, r11, [sp, #88]
2490#endif
2491	add	r4, r4, r8
2492	add	r5, r5, r9
2493	add	r6, r6, r10
2494	add	r7, r7, r11
2495#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2496	str	r4, [r0, #16]
2497	str	r5, [r0, #20]
2498#else
2499	strd	r4, r5, [r0, #16]
2500#endif
2501#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2502	str	r6, [r0, #24]
2503	str	r7, [r0, #28]
2504#else
2505	strd	r6, r7, [r0, #24]
2506#endif
2507#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2508	str	r4, [sp, #80]
2509	str	r5, [sp, #84]
2510#else
2511	strd	r4, r5, [sp, #80]
2512#endif
2513#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2514	str	r6, [sp, #88]
2515	str	r7, [sp, #92]
2516#else
2517	strd	r6, r7, [sp, #88]
2518#endif
2519	subs	r2, r2, #0x40
2520#ifndef WOLFSSL_ARMASM_SHA256_SMALL
2521	sub	r12, r12, #0xc0
2522#else
2523	sub	r12, r12, #0x100
2524#endif /* !WOLFSSL_ARMASM_SHA256_SMALL */
2525	add	r1, r1, #0x40
2526	bne	L_SHA256_transform_len_begin
2527	add	sp, sp, #0xc0
2528	pop	{r4, r5, r6, r7, r8, r9, r10, r11, pc}
2529	.size	Transform_Sha256_Len_base,.-Transform_Sha256_Len_base
2530#else
2531#ifdef WOLFSSL_ARMASM_NO_HW_CRYPTO
2532#ifndef __APPLE__
2533	.text
2534	.type	L_SHA256_transform_neon_len_k, %object
2535	.size	L_SHA256_transform_neon_len_k, 256
2536#else
2537	.section	__DATA,__data
2538#endif /* __APPLE__ */
2539	# 8-byte aligned, 64-bit aligned
2540#ifndef __APPLE__
2541	.align	3
2542#else
2543	.p2align	3
2544#endif /* __APPLE__ */
2545L_SHA256_transform_neon_len_k:
2546	.long	0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5
2547	.long	0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5
2548	.long	0xd807aa98,0x12835b01,0x243185be,0x550c7dc3
2549	.long	0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174
2550	.long	0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc
2551	.long	0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da
2552	.long	0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7
2553	.long	0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967
2554	.long	0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13
2555	.long	0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85
2556	.long	0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3
2557	.long	0xd192e819,0xd6990624,0xf40e3585,0x106aa070
2558	.long	0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5
2559	.long	0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3
2560	.long	0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208
2561	.long	0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2
2562	.text
2563	.align	4
2564	.fpu	neon
2565	.globl	Transform_Sha256_Len_neon
2566	.type	Transform_Sha256_Len_neon, %function
2567Transform_Sha256_Len_neon:
2568	push	{r4, r5, r6, r7, r8, r9, r10, lr}
2569	vpush	{d8-d11}
2570	sub	sp, sp, #24
2571#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2572	stm	sp, {r0, r1}
2573#else
2574	strd	r0, r1, [sp]
2575#endif
2576	str	r2, [sp, #8]
2577	adr	r12, L_SHA256_transform_neon_len_k
2578	# Load digest into registers
2579#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2580	ldm	r0, {r2, r3}
2581#else
2582	ldrd	r2, r3, [r0]
2583#endif
2584#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2585	ldr	r4, [r0, #8]
2586	ldr	r5, [r0, #12]
2587#else
2588	ldrd	r4, r5, [r0, #8]
2589#endif
2590#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2591	ldr	r6, [r0, #16]
2592	ldr	r7, [r0, #20]
2593#else
2594	ldrd	r6, r7, [r0, #16]
2595#endif
2596#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2597	ldr	r8, [r0, #24]
2598	ldr	r9, [r0, #28]
2599#else
2600	ldrd	r8, r9, [r0, #24]
2601#endif
2602	# Start of loop processing a block
2603L_SHA256_transform_neon_len_begin:
2604	# Load W
2605	vld1.8	{d0-d3}, [r1]!
2606	vld1.8	{d4-d7}, [r1]!
2607#ifndef WOLFSSL_ARM_ARCH_NEON_64BIT
2608	vrev32.8	q0, q0
2609	vrev32.8	q1, q1
2610	vrev32.8	q2, q2
2611	vrev32.8	q3, q3
2612#else
2613	vrev32.8	d0, d0
2614	vrev32.8	d1, d1
2615	vrev32.8	d2, d2
2616	vrev32.8	d3, d3
2617	vrev32.8	d4, d4
2618	vrev32.8	d5, d5
2619	vrev32.8	d6, d6
2620	vrev32.8	d7, d7
2621#endif /* WOLFSSL_ARM_ARCH_NEON_64BIT */
2622	str	r1, [sp, #4]
2623	mov	lr, #3
2624	# Start of 16 rounds
2625L_SHA256_transform_neon_len_start:
2626	# Round 0
2627	vmov.32	r10, d0[0]
2628	ror	r0, r6, #6
2629	eor	r1, r7, r8
2630	eor	r0, r0, r6, ror #11
2631	and	r1, r1, r6
2632	eor	r0, r0, r6, ror #25
2633	eor	r1, r1, r8
2634	add	r9, r9, r0
2635	add	r9, r9, r1
2636	ldr	r0, [r12]
2637	add	r9, r9, r10
2638	add	r9, r9, r0
2639	add	r5, r5, r9
2640	ror	r0, r2, #2
2641	eor	r1, r2, r3
2642	eor	r0, r0, r2, ror #13
2643	eor	r10, r3, r4
2644	and	r1, r1, r10
2645	eor	r0, r0, r2, ror #22
2646	eor	r1, r1, r3
2647	add	r9, r9, r0
2648	add	r9, r9, r1
2649	# Round 1
2650	vmov.32	r10, d0[1]
2651	# Calc new W[0]-W[1]
2652	vext.8	d10, d0, d1, #4
2653	ror	r0, r5, #6
2654	vshl.u32	d8, d7, #15
2655	eor	r1, r6, r7
2656	vsri.u32	d8, d7, #17
2657	eor	r0, r0, r5, ror #11
2658	vshl.u32	d9, d7, #13
2659	and	r1, r1, r5
2660	vsri.u32	d9, d7, #19
2661	eor	r0, r0, r5, ror #25
2662	veor	d9, d8
2663	eor	r1, r1, r7
2664	vshr.u32	d8, d7, #10
2665	add	r8, r8, r0
2666	veor	d9, d8
2667	add	r8, r8, r1
2668	vadd.i32	d0, d9
2669	ldr	r0, [r12, #4]
2670	vext.8	d11, d4, d5, #4
2671	add	r8, r8, r10
2672	vadd.i32	d0, d11
2673	add	r8, r8, r0
2674	vshl.u32	d8, d10, #25
2675	add	r4, r4, r8
2676	vsri.u32	d8, d10, #7
2677	ror	r0, r9, #2
2678	vshl.u32	d9, d10, #14
2679	eor	r1, r9, r2
2680	vsri.u32	d9, d10, #18
2681	eor	r0, r0, r9, ror #13
2682	veor	d9, d8
2683	eor	r10, r2, r3
2684	vshr.u32	d10, #3
2685	and	r1, r1, r10
2686	veor	d9, d10
2687	eor	r0, r0, r9, ror #22
2688	vadd.i32	d0, d9
2689	eor	r1, r1, r2
2690	add	r8, r8, r0
2691	add	r8, r8, r1
2692	# Round 2
2693	vmov.32	r10, d1[0]
2694	ror	r0, r4, #6
2695	eor	r1, r5, r6
2696	eor	r0, r0, r4, ror #11
2697	and	r1, r1, r4
2698	eor	r0, r0, r4, ror #25
2699	eor	r1, r1, r6
2700	add	r7, r7, r0
2701	add	r7, r7, r1
2702	ldr	r0, [r12, #8]
2703	add	r7, r7, r10
2704	add	r7, r7, r0
2705	add	r3, r3, r7
2706	ror	r0, r8, #2
2707	eor	r1, r8, r9
2708	eor	r0, r0, r8, ror #13
2709	eor	r10, r9, r2
2710	and	r1, r1, r10
2711	eor	r0, r0, r8, ror #22
2712	eor	r1, r1, r9
2713	add	r7, r7, r0
2714	add	r7, r7, r1
2715	# Round 3
2716	vmov.32	r10, d1[1]
2717	# Calc new W[2]-W[3]
2718	vext.8	d10, d1, d2, #4
2719	ror	r0, r3, #6
2720	vshl.u32	d8, d0, #15
2721	eor	r1, r4, r5
2722	vsri.u32	d8, d0, #17
2723	eor	r0, r0, r3, ror #11
2724	vshl.u32	d9, d0, #13
2725	and	r1, r1, r3
2726	vsri.u32	d9, d0, #19
2727	eor	r0, r0, r3, ror #25
2728	veor	d9, d8
2729	eor	r1, r1, r5
2730	vshr.u32	d8, d0, #10
2731	add	r6, r6, r0
2732	veor	d9, d8
2733	add	r6, r6, r1
2734	vadd.i32	d1, d9
2735	ldr	r0, [r12, #12]
2736	vext.8	d11, d5, d6, #4
2737	add	r6, r6, r10
2738	vadd.i32	d1, d11
2739	add	r6, r6, r0
2740	vshl.u32	d8, d10, #25
2741	add	r2, r2, r6
2742	vsri.u32	d8, d10, #7
2743	ror	r0, r7, #2
2744	vshl.u32	d9, d10, #14
2745	eor	r1, r7, r8
2746	vsri.u32	d9, d10, #18
2747	eor	r0, r0, r7, ror #13
2748	veor	d9, d8
2749	eor	r10, r8, r9
2750	vshr.u32	d10, #3
2751	and	r1, r1, r10
2752	veor	d9, d10
2753	eor	r0, r0, r7, ror #22
2754	vadd.i32	d1, d9
2755	eor	r1, r1, r8
2756	add	r6, r6, r0
2757	add	r6, r6, r1
2758	# Round 4
2759	vmov.32	r10, d2[0]
2760	ror	r0, r2, #6
2761	eor	r1, r3, r4
2762	eor	r0, r0, r2, ror #11
2763	and	r1, r1, r2
2764	eor	r0, r0, r2, ror #25
2765	eor	r1, r1, r4
2766	add	r5, r5, r0
2767	add	r5, r5, r1
2768	ldr	r0, [r12, #16]
2769	add	r5, r5, r10
2770	add	r5, r5, r0
2771	add	r9, r9, r5
2772	ror	r0, r6, #2
2773	eor	r1, r6, r7
2774	eor	r0, r0, r6, ror #13
2775	eor	r10, r7, r8
2776	and	r1, r1, r10
2777	eor	r0, r0, r6, ror #22
2778	eor	r1, r1, r7
2779	add	r5, r5, r0
2780	add	r5, r5, r1
2781	# Round 5
2782	vmov.32	r10, d2[1]
2783	# Calc new W[4]-W[5]
2784	vext.8	d10, d2, d3, #4
2785	ror	r0, r9, #6
2786	vshl.u32	d8, d1, #15
2787	eor	r1, r2, r3
2788	vsri.u32	d8, d1, #17
2789	eor	r0, r0, r9, ror #11
2790	vshl.u32	d9, d1, #13
2791	and	r1, r1, r9
2792	vsri.u32	d9, d1, #19
2793	eor	r0, r0, r9, ror #25
2794	veor	d9, d8
2795	eor	r1, r1, r3
2796	vshr.u32	d8, d1, #10
2797	add	r4, r4, r0
2798	veor	d9, d8
2799	add	r4, r4, r1
2800	vadd.i32	d2, d9
2801	ldr	r0, [r12, #20]
2802	vext.8	d11, d6, d7, #4
2803	add	r4, r4, r10
2804	vadd.i32	d2, d11
2805	add	r4, r4, r0
2806	vshl.u32	d8, d10, #25
2807	add	r8, r8, r4
2808	vsri.u32	d8, d10, #7
2809	ror	r0, r5, #2
2810	vshl.u32	d9, d10, #14
2811	eor	r1, r5, r6
2812	vsri.u32	d9, d10, #18
2813	eor	r0, r0, r5, ror #13
2814	veor	d9, d8
2815	eor	r10, r6, r7
2816	vshr.u32	d10, #3
2817	and	r1, r1, r10
2818	veor	d9, d10
2819	eor	r0, r0, r5, ror #22
2820	vadd.i32	d2, d9
2821	eor	r1, r1, r6
2822	add	r4, r4, r0
2823	add	r4, r4, r1
2824	# Round 6
2825	vmov.32	r10, d3[0]
2826	ror	r0, r8, #6
2827	eor	r1, r9, r2
2828	eor	r0, r0, r8, ror #11
2829	and	r1, r1, r8
2830	eor	r0, r0, r8, ror #25
2831	eor	r1, r1, r2
2832	add	r3, r3, r0
2833	add	r3, r3, r1
2834	ldr	r0, [r12, #24]
2835	add	r3, r3, r10
2836	add	r3, r3, r0
2837	add	r7, r7, r3
2838	ror	r0, r4, #2
2839	eor	r1, r4, r5
2840	eor	r0, r0, r4, ror #13
2841	eor	r10, r5, r6
2842	and	r1, r1, r10
2843	eor	r0, r0, r4, ror #22
2844	eor	r1, r1, r5
2845	add	r3, r3, r0
2846	add	r3, r3, r1
2847	# Round 7
2848	vmov.32	r10, d3[1]
2849	# Calc new W[6]-W[7]
2850	vext.8	d10, d3, d4, #4
2851	ror	r0, r7, #6
2852	vshl.u32	d8, d2, #15
2853	eor	r1, r8, r9
2854	vsri.u32	d8, d2, #17
2855	eor	r0, r0, r7, ror #11
2856	vshl.u32	d9, d2, #13
2857	and	r1, r1, r7
2858	vsri.u32	d9, d2, #19
2859	eor	r0, r0, r7, ror #25
2860	veor	d9, d8
2861	eor	r1, r1, r9
2862	vshr.u32	d8, d2, #10
2863	add	r2, r2, r0
2864	veor	d9, d8
2865	add	r2, r2, r1
2866	vadd.i32	d3, d9
2867	ldr	r0, [r12, #28]
2868	vext.8	d11, d7, d0, #4
2869	add	r2, r2, r10
2870	vadd.i32	d3, d11
2871	add	r2, r2, r0
2872	vshl.u32	d8, d10, #25
2873	add	r6, r6, r2
2874	vsri.u32	d8, d10, #7
2875	ror	r0, r3, #2
2876	vshl.u32	d9, d10, #14
2877	eor	r1, r3, r4
2878	vsri.u32	d9, d10, #18
2879	eor	r0, r0, r3, ror #13
2880	veor	d9, d8
2881	eor	r10, r4, r5
2882	vshr.u32	d10, #3
2883	and	r1, r1, r10
2884	veor	d9, d10
2885	eor	r0, r0, r3, ror #22
2886	vadd.i32	d3, d9
2887	eor	r1, r1, r4
2888	add	r2, r2, r0
2889	add	r2, r2, r1
2890	# Round 8
2891	vmov.32	r10, d4[0]
2892	ror	r0, r6, #6
2893	eor	r1, r7, r8
2894	eor	r0, r0, r6, ror #11
2895	and	r1, r1, r6
2896	eor	r0, r0, r6, ror #25
2897	eor	r1, r1, r8
2898	add	r9, r9, r0
2899	add	r9, r9, r1
2900	ldr	r0, [r12, #32]
2901	add	r9, r9, r10
2902	add	r9, r9, r0
2903	add	r5, r5, r9
2904	ror	r0, r2, #2
2905	eor	r1, r2, r3
2906	eor	r0, r0, r2, ror #13
2907	eor	r10, r3, r4
2908	and	r1, r1, r10
2909	eor	r0, r0, r2, ror #22
2910	eor	r1, r1, r3
2911	add	r9, r9, r0
2912	add	r9, r9, r1
2913	# Round 9
2914	vmov.32	r10, d4[1]
2915	# Calc new W[8]-W[9]
2916	vext.8	d10, d4, d5, #4
2917	ror	r0, r5, #6
2918	vshl.u32	d8, d3, #15
2919	eor	r1, r6, r7
2920	vsri.u32	d8, d3, #17
2921	eor	r0, r0, r5, ror #11
2922	vshl.u32	d9, d3, #13
2923	and	r1, r1, r5
2924	vsri.u32	d9, d3, #19
2925	eor	r0, r0, r5, ror #25
2926	veor	d9, d8
2927	eor	r1, r1, r7
2928	vshr.u32	d8, d3, #10
2929	add	r8, r8, r0
2930	veor	d9, d8
2931	add	r8, r8, r1
2932	vadd.i32	d4, d9
2933	ldr	r0, [r12, #36]
2934	vext.8	d11, d0, d1, #4
2935	add	r8, r8, r10
2936	vadd.i32	d4, d11
2937	add	r8, r8, r0
2938	vshl.u32	d8, d10, #25
2939	add	r4, r4, r8
2940	vsri.u32	d8, d10, #7
2941	ror	r0, r9, #2
2942	vshl.u32	d9, d10, #14
2943	eor	r1, r9, r2
2944	vsri.u32	d9, d10, #18
2945	eor	r0, r0, r9, ror #13
2946	veor	d9, d8
2947	eor	r10, r2, r3
2948	vshr.u32	d10, #3
2949	and	r1, r1, r10
2950	veor	d9, d10
2951	eor	r0, r0, r9, ror #22
2952	vadd.i32	d4, d9
2953	eor	r1, r1, r2
2954	add	r8, r8, r0
2955	add	r8, r8, r1
2956	# Round 10
2957	vmov.32	r10, d5[0]
2958	ror	r0, r4, #6
2959	eor	r1, r5, r6
2960	eor	r0, r0, r4, ror #11
2961	and	r1, r1, r4
2962	eor	r0, r0, r4, ror #25
2963	eor	r1, r1, r6
2964	add	r7, r7, r0
2965	add	r7, r7, r1
2966	ldr	r0, [r12, #40]
2967	add	r7, r7, r10
2968	add	r7, r7, r0
2969	add	r3, r3, r7
2970	ror	r0, r8, #2
2971	eor	r1, r8, r9
2972	eor	r0, r0, r8, ror #13
2973	eor	r10, r9, r2
2974	and	r1, r1, r10
2975	eor	r0, r0, r8, ror #22
2976	eor	r1, r1, r9
2977	add	r7, r7, r0
2978	add	r7, r7, r1
2979	# Round 11
2980	vmov.32	r10, d5[1]
2981	# Calc new W[10]-W[11]
2982	vext.8	d10, d5, d6, #4
2983	ror	r0, r3, #6
2984	vshl.u32	d8, d4, #15
2985	eor	r1, r4, r5
2986	vsri.u32	d8, d4, #17
2987	eor	r0, r0, r3, ror #11
2988	vshl.u32	d9, d4, #13
2989	and	r1, r1, r3
2990	vsri.u32	d9, d4, #19
2991	eor	r0, r0, r3, ror #25
2992	veor	d9, d8
2993	eor	r1, r1, r5
2994	vshr.u32	d8, d4, #10
2995	add	r6, r6, r0
2996	veor	d9, d8
2997	add	r6, r6, r1
2998	vadd.i32	d5, d9
2999	ldr	r0, [r12, #44]
3000	vext.8	d11, d1, d2, #4
3001	add	r6, r6, r10
3002	vadd.i32	d5, d11
3003	add	r6, r6, r0
3004	vshl.u32	d8, d10, #25
3005	add	r2, r2, r6
3006	vsri.u32	d8, d10, #7
3007	ror	r0, r7, #2
3008	vshl.u32	d9, d10, #14
3009	eor	r1, r7, r8
3010	vsri.u32	d9, d10, #18
3011	eor	r0, r0, r7, ror #13
3012	veor	d9, d8
3013	eor	r10, r8, r9
3014	vshr.u32	d10, #3
3015	and	r1, r1, r10
3016	veor	d9, d10
3017	eor	r0, r0, r7, ror #22
3018	vadd.i32	d5, d9
3019	eor	r1, r1, r8
3020	add	r6, r6, r0
3021	add	r6, r6, r1
3022	# Round 12
3023	vmov.32	r10, d6[0]
3024	ror	r0, r2, #6
3025	eor	r1, r3, r4
3026	eor	r0, r0, r2, ror #11
3027	and	r1, r1, r2
3028	eor	r0, r0, r2, ror #25
3029	eor	r1, r1, r4
3030	add	r5, r5, r0
3031	add	r5, r5, r1
3032	ldr	r0, [r12, #48]
3033	add	r5, r5, r10
3034	add	r5, r5, r0
3035	add	r9, r9, r5
3036	ror	r0, r6, #2
3037	eor	r1, r6, r7
3038	eor	r0, r0, r6, ror #13
3039	eor	r10, r7, r8
3040	and	r1, r1, r10
3041	eor	r0, r0, r6, ror #22
3042	eor	r1, r1, r7
3043	add	r5, r5, r0
3044	add	r5, r5, r1
3045	# Round 13
3046	vmov.32	r10, d6[1]
3047	# Calc new W[12]-W[13]
3048	vext.8	d10, d6, d7, #4
3049	ror	r0, r9, #6
3050	vshl.u32	d8, d5, #15
3051	eor	r1, r2, r3
3052	vsri.u32	d8, d5, #17
3053	eor	r0, r0, r9, ror #11
3054	vshl.u32	d9, d5, #13
3055	and	r1, r1, r9
3056	vsri.u32	d9, d5, #19
3057	eor	r0, r0, r9, ror #25
3058	veor	d9, d8
3059	eor	r1, r1, r3
3060	vshr.u32	d8, d5, #10
3061	add	r4, r4, r0
3062	veor	d9, d8
3063	add	r4, r4, r1
3064	vadd.i32	d6, d9
3065	ldr	r0, [r12, #52]
3066	vext.8	d11, d2, d3, #4
3067	add	r4, r4, r10
3068	vadd.i32	d6, d11
3069	add	r4, r4, r0
3070	vshl.u32	d8, d10, #25
3071	add	r8, r8, r4
3072	vsri.u32	d8, d10, #7
3073	ror	r0, r5, #2
3074	vshl.u32	d9, d10, #14
3075	eor	r1, r5, r6
3076	vsri.u32	d9, d10, #18
3077	eor	r0, r0, r5, ror #13
3078	veor	d9, d8
3079	eor	r10, r6, r7
3080	vshr.u32	d10, #3
3081	and	r1, r1, r10
3082	veor	d9, d10
3083	eor	r0, r0, r5, ror #22
3084	vadd.i32	d6, d9
3085	eor	r1, r1, r6
3086	add	r4, r4, r0
3087	add	r4, r4, r1
3088	# Round 14
3089	vmov.32	r10, d7[0]
3090	ror	r0, r8, #6
3091	eor	r1, r9, r2
3092	eor	r0, r0, r8, ror #11
3093	and	r1, r1, r8
3094	eor	r0, r0, r8, ror #25
3095	eor	r1, r1, r2
3096	add	r3, r3, r0
3097	add	r3, r3, r1
3098	ldr	r0, [r12, #56]
3099	add	r3, r3, r10
3100	add	r3, r3, r0
3101	add	r7, r7, r3
3102	ror	r0, r4, #2
3103	eor	r1, r4, r5
3104	eor	r0, r0, r4, ror #13
3105	eor	r10, r5, r6
3106	and	r1, r1, r10
3107	eor	r0, r0, r4, ror #22
3108	eor	r1, r1, r5
3109	add	r3, r3, r0
3110	add	r3, r3, r1
3111	# Round 15
3112	vmov.32	r10, d7[1]
3113	# Calc new W[14]-W[15]
3114	vext.8	d10, d7, d0, #4
3115	ror	r0, r7, #6
3116	vshl.u32	d8, d6, #15
3117	eor	r1, r8, r9
3118	vsri.u32	d8, d6, #17
3119	eor	r0, r0, r7, ror #11
3120	vshl.u32	d9, d6, #13
3121	and	r1, r1, r7
3122	vsri.u32	d9, d6, #19
3123	eor	r0, r0, r7, ror #25
3124	veor	d9, d8
3125	eor	r1, r1, r9
3126	vshr.u32	d8, d6, #10
3127	add	r2, r2, r0
3128	veor	d9, d8
3129	add	r2, r2, r1
3130	vadd.i32	d7, d9
3131	ldr	r0, [r12, #60]
3132	vext.8	d11, d3, d4, #4
3133	add	r2, r2, r10
3134	vadd.i32	d7, d11
3135	add	r2, r2, r0
3136	vshl.u32	d8, d10, #25
3137	add	r6, r6, r2
3138	vsri.u32	d8, d10, #7
3139	ror	r0, r3, #2
3140	vshl.u32	d9, d10, #14
3141	eor	r1, r3, r4
3142	vsri.u32	d9, d10, #18
3143	eor	r0, r0, r3, ror #13
3144	veor	d9, d8
3145	eor	r10, r4, r5
3146	vshr.u32	d10, #3
3147	and	r1, r1, r10
3148	veor	d9, d10
3149	eor	r0, r0, r3, ror #22
3150	vadd.i32	d7, d9
3151	eor	r1, r1, r4
3152	add	r2, r2, r0
3153	add	r2, r2, r1
3154	add	r12, r12, #0x40
3155	subs	lr, lr, #1
3156	bne	L_SHA256_transform_neon_len_start
3157	# Round 0
3158	vmov.32	r10, d0[0]
3159	ror	r0, r6, #6
3160	eor	r1, r7, r8
3161	eor	r0, r0, r6, ror #11
3162	and	r1, r1, r6
3163	eor	r0, r0, r6, ror #25
3164	eor	r1, r1, r8
3165	add	r9, r9, r0
3166	add	r9, r9, r1
3167	ldr	r0, [r12]
3168	add	r9, r9, r10
3169	add	r9, r9, r0
3170	add	r5, r5, r9
3171	ror	r0, r2, #2
3172	eor	r1, r2, r3
3173	eor	r0, r0, r2, ror #13
3174	eor	r10, r3, r4
3175	and	r1, r1, r10
3176	eor	r0, r0, r2, ror #22
3177	eor	r1, r1, r3
3178	add	r9, r9, r0
3179	add	r9, r9, r1
3180	# Round 1
3181	vmov.32	r10, d0[1]
3182	ror	r0, r5, #6
3183	eor	r1, r6, r7
3184	eor	r0, r0, r5, ror #11
3185	and	r1, r1, r5
3186	eor	r0, r0, r5, ror #25
3187	eor	r1, r1, r7
3188	add	r8, r8, r0
3189	add	r8, r8, r1
3190	ldr	r0, [r12, #4]
3191	add	r8, r8, r10
3192	add	r8, r8, r0
3193	add	r4, r4, r8
3194	ror	r0, r9, #2
3195	eor	r1, r9, r2
3196	eor	r0, r0, r9, ror #13
3197	eor	r10, r2, r3
3198	and	r1, r1, r10
3199	eor	r0, r0, r9, ror #22
3200	eor	r1, r1, r2
3201	add	r8, r8, r0
3202	add	r8, r8, r1
3203	# Round 2
3204	vmov.32	r10, d1[0]
3205	ror	r0, r4, #6
3206	eor	r1, r5, r6
3207	eor	r0, r0, r4, ror #11
3208	and	r1, r1, r4
3209	eor	r0, r0, r4, ror #25
3210	eor	r1, r1, r6
3211	add	r7, r7, r0
3212	add	r7, r7, r1
3213	ldr	r0, [r12, #8]
3214	add	r7, r7, r10
3215	add	r7, r7, r0
3216	add	r3, r3, r7
3217	ror	r0, r8, #2
3218	eor	r1, r8, r9
3219	eor	r0, r0, r8, ror #13
3220	eor	r10, r9, r2
3221	and	r1, r1, r10
3222	eor	r0, r0, r8, ror #22
3223	eor	r1, r1, r9
3224	add	r7, r7, r0
3225	add	r7, r7, r1
3226	# Round 3
3227	vmov.32	r10, d1[1]
3228	ror	r0, r3, #6
3229	eor	r1, r4, r5
3230	eor	r0, r0, r3, ror #11
3231	and	r1, r1, r3
3232	eor	r0, r0, r3, ror #25
3233	eor	r1, r1, r5
3234	add	r6, r6, r0
3235	add	r6, r6, r1
3236	ldr	r0, [r12, #12]
3237	add	r6, r6, r10
3238	add	r6, r6, r0
3239	add	r2, r2, r6
3240	ror	r0, r7, #2
3241	eor	r1, r7, r8
3242	eor	r0, r0, r7, ror #13
3243	eor	r10, r8, r9
3244	and	r1, r1, r10
3245	eor	r0, r0, r7, ror #22
3246	eor	r1, r1, r8
3247	add	r6, r6, r0
3248	add	r6, r6, r1
3249	# Round 4
3250	vmov.32	r10, d2[0]
3251	ror	r0, r2, #6
3252	eor	r1, r3, r4
3253	eor	r0, r0, r2, ror #11
3254	and	r1, r1, r2
3255	eor	r0, r0, r2, ror #25
3256	eor	r1, r1, r4
3257	add	r5, r5, r0
3258	add	r5, r5, r1
3259	ldr	r0, [r12, #16]
3260	add	r5, r5, r10
3261	add	r5, r5, r0
3262	add	r9, r9, r5
3263	ror	r0, r6, #2
3264	eor	r1, r6, r7
3265	eor	r0, r0, r6, ror #13
3266	eor	r10, r7, r8
3267	and	r1, r1, r10
3268	eor	r0, r0, r6, ror #22
3269	eor	r1, r1, r7
3270	add	r5, r5, r0
3271	add	r5, r5, r1
3272	# Round 5
3273	vmov.32	r10, d2[1]
3274	ror	r0, r9, #6
3275	eor	r1, r2, r3
3276	eor	r0, r0, r9, ror #11
3277	and	r1, r1, r9
3278	eor	r0, r0, r9, ror #25
3279	eor	r1, r1, r3
3280	add	r4, r4, r0
3281	add	r4, r4, r1
3282	ldr	r0, [r12, #20]
3283	add	r4, r4, r10
3284	add	r4, r4, r0
3285	add	r8, r8, r4
3286	ror	r0, r5, #2
3287	eor	r1, r5, r6
3288	eor	r0, r0, r5, ror #13
3289	eor	r10, r6, r7
3290	and	r1, r1, r10
3291	eor	r0, r0, r5, ror #22
3292	eor	r1, r1, r6
3293	add	r4, r4, r0
3294	add	r4, r4, r1
3295	# Round 6
3296	vmov.32	r10, d3[0]
3297	ror	r0, r8, #6
3298	eor	r1, r9, r2
3299	eor	r0, r0, r8, ror #11
3300	and	r1, r1, r8
3301	eor	r0, r0, r8, ror #25
3302	eor	r1, r1, r2
3303	add	r3, r3, r0
3304	add	r3, r3, r1
3305	ldr	r0, [r12, #24]
3306	add	r3, r3, r10
3307	add	r3, r3, r0
3308	add	r7, r7, r3
3309	ror	r0, r4, #2
3310	eor	r1, r4, r5
3311	eor	r0, r0, r4, ror #13
3312	eor	r10, r5, r6
3313	and	r1, r1, r10
3314	eor	r0, r0, r4, ror #22
3315	eor	r1, r1, r5
3316	add	r3, r3, r0
3317	add	r3, r3, r1
3318	# Round 7
3319	vmov.32	r10, d3[1]
3320	ror	r0, r7, #6
3321	eor	r1, r8, r9
3322	eor	r0, r0, r7, ror #11
3323	and	r1, r1, r7
3324	eor	r0, r0, r7, ror #25
3325	eor	r1, r1, r9
3326	add	r2, r2, r0
3327	add	r2, r2, r1
3328	ldr	r0, [r12, #28]
3329	add	r2, r2, r10
3330	add	r2, r2, r0
3331	add	r6, r6, r2
3332	ror	r0, r3, #2
3333	eor	r1, r3, r4
3334	eor	r0, r0, r3, ror #13
3335	eor	r10, r4, r5
3336	and	r1, r1, r10
3337	eor	r0, r0, r3, ror #22
3338	eor	r1, r1, r4
3339	add	r2, r2, r0
3340	add	r2, r2, r1
3341	# Round 8
3342	vmov.32	r10, d4[0]
3343	ror	r0, r6, #6
3344	eor	r1, r7, r8
3345	eor	r0, r0, r6, ror #11
3346	and	r1, r1, r6
3347	eor	r0, r0, r6, ror #25
3348	eor	r1, r1, r8
3349	add	r9, r9, r0
3350	add	r9, r9, r1
3351	ldr	r0, [r12, #32]
3352	add	r9, r9, r10
3353	add	r9, r9, r0
3354	add	r5, r5, r9
3355	ror	r0, r2, #2
3356	eor	r1, r2, r3
3357	eor	r0, r0, r2, ror #13
3358	eor	r10, r3, r4
3359	and	r1, r1, r10
3360	eor	r0, r0, r2, ror #22
3361	eor	r1, r1, r3
3362	add	r9, r9, r0
3363	add	r9, r9, r1
3364	# Round 9
3365	vmov.32	r10, d4[1]
3366	ror	r0, r5, #6
3367	eor	r1, r6, r7
3368	eor	r0, r0, r5, ror #11
3369	and	r1, r1, r5
3370	eor	r0, r0, r5, ror #25
3371	eor	r1, r1, r7
3372	add	r8, r8, r0
3373	add	r8, r8, r1
3374	ldr	r0, [r12, #36]
3375	add	r8, r8, r10
3376	add	r8, r8, r0
3377	add	r4, r4, r8
3378	ror	r0, r9, #2
3379	eor	r1, r9, r2
3380	eor	r0, r0, r9, ror #13
3381	eor	r10, r2, r3
3382	and	r1, r1, r10
3383	eor	r0, r0, r9, ror #22
3384	eor	r1, r1, r2
3385	add	r8, r8, r0
3386	add	r8, r8, r1
3387	# Round 10
3388	vmov.32	r10, d5[0]
3389	ror	r0, r4, #6
3390	eor	r1, r5, r6
3391	eor	r0, r0, r4, ror #11
3392	and	r1, r1, r4
3393	eor	r0, r0, r4, ror #25
3394	eor	r1, r1, r6
3395	add	r7, r7, r0
3396	add	r7, r7, r1
3397	ldr	r0, [r12, #40]
3398	add	r7, r7, r10
3399	add	r7, r7, r0
3400	add	r3, r3, r7
3401	ror	r0, r8, #2
3402	eor	r1, r8, r9
3403	eor	r0, r0, r8, ror #13
3404	eor	r10, r9, r2
3405	and	r1, r1, r10
3406	eor	r0, r0, r8, ror #22
3407	eor	r1, r1, r9
3408	add	r7, r7, r0
3409	add	r7, r7, r1
3410	# Round 11
3411	vmov.32	r10, d5[1]
3412	ror	r0, r3, #6
3413	eor	r1, r4, r5
3414	eor	r0, r0, r3, ror #11
3415	and	r1, r1, r3
3416	eor	r0, r0, r3, ror #25
3417	eor	r1, r1, r5
3418	add	r6, r6, r0
3419	add	r6, r6, r1
3420	ldr	r0, [r12, #44]
3421	add	r6, r6, r10
3422	add	r6, r6, r0
3423	add	r2, r2, r6
3424	ror	r0, r7, #2
3425	eor	r1, r7, r8
3426	eor	r0, r0, r7, ror #13
3427	eor	r10, r8, r9
3428	and	r1, r1, r10
3429	eor	r0, r0, r7, ror #22
3430	eor	r1, r1, r8
3431	add	r6, r6, r0
3432	add	r6, r6, r1
3433	# Round 12
3434	vmov.32	r10, d6[0]
3435	ror	r0, r2, #6
3436	eor	r1, r3, r4
3437	eor	r0, r0, r2, ror #11
3438	and	r1, r1, r2
3439	eor	r0, r0, r2, ror #25
3440	eor	r1, r1, r4
3441	add	r5, r5, r0
3442	add	r5, r5, r1
3443	ldr	r0, [r12, #48]
3444	add	r5, r5, r10
3445	add	r5, r5, r0
3446	add	r9, r9, r5
3447	ror	r0, r6, #2
3448	eor	r1, r6, r7
3449	eor	r0, r0, r6, ror #13
3450	eor	r10, r7, r8
3451	and	r1, r1, r10
3452	eor	r0, r0, r6, ror #22
3453	eor	r1, r1, r7
3454	add	r5, r5, r0
3455	add	r5, r5, r1
3456	# Round 13
3457	vmov.32	r10, d6[1]
3458	ror	r0, r9, #6
3459	eor	r1, r2, r3
3460	eor	r0, r0, r9, ror #11
3461	and	r1, r1, r9
3462	eor	r0, r0, r9, ror #25
3463	eor	r1, r1, r3
3464	add	r4, r4, r0
3465	add	r4, r4, r1
3466	ldr	r0, [r12, #52]
3467	add	r4, r4, r10
3468	add	r4, r4, r0
3469	add	r8, r8, r4
3470	ror	r0, r5, #2
3471	eor	r1, r5, r6
3472	eor	r0, r0, r5, ror #13
3473	eor	r10, r6, r7
3474	and	r1, r1, r10
3475	eor	r0, r0, r5, ror #22
3476	eor	r1, r1, r6
3477	add	r4, r4, r0
3478	add	r4, r4, r1
3479	# Round 14
3480	vmov.32	r10, d7[0]
3481	ror	r0, r8, #6
3482	eor	r1, r9, r2
3483	eor	r0, r0, r8, ror #11
3484	and	r1, r1, r8
3485	eor	r0, r0, r8, ror #25
3486	eor	r1, r1, r2
3487	add	r3, r3, r0
3488	add	r3, r3, r1
3489	ldr	r0, [r12, #56]
3490	add	r3, r3, r10
3491	add	r3, r3, r0
3492	add	r7, r7, r3
3493	ror	r0, r4, #2
3494	eor	r1, r4, r5
3495	eor	r0, r0, r4, ror #13
3496	eor	r10, r5, r6
3497	and	r1, r1, r10
3498	eor	r0, r0, r4, ror #22
3499	eor	r1, r1, r5
3500	add	r3, r3, r0
3501	add	r3, r3, r1
3502	# Round 15
3503	vmov.32	r10, d7[1]
3504	ror	r0, r7, #6
3505	eor	r1, r8, r9
3506	eor	r0, r0, r7, ror #11
3507	and	r1, r1, r7
3508	eor	r0, r0, r7, ror #25
3509	eor	r1, r1, r9
3510	add	r2, r2, r0
3511	add	r2, r2, r1
3512	ldr	r0, [r12, #60]
3513	add	r2, r2, r10
3514	add	r2, r2, r0
3515	add	r6, r6, r2
3516	ror	r0, r3, #2
3517	eor	r1, r3, r4
3518	eor	r0, r0, r3, ror #13
3519	eor	r10, r4, r5
3520	and	r1, r1, r10
3521	eor	r0, r0, r3, ror #22
3522	eor	r1, r1, r4
3523	add	r2, r2, r0
3524	add	r2, r2, r1
3525	ldr	r10, [sp]
3526	# Add in digest from start
3527#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3528	ldm	r10, {r0, r1}
3529#else
3530	ldrd	r0, r1, [r10]
3531#endif
3532	add	r2, r2, r0
3533	add	r3, r3, r1
3534#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3535	stm	r10, {r2, r3}
3536#else
3537	strd	r2, r3, [r10]
3538#endif
3539#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3540	ldr	r0, [r10, #8]
3541	ldr	r1, [r10, #12]
3542#else
3543	ldrd	r0, r1, [r10, #8]
3544#endif
3545	add	r4, r4, r0
3546	add	r5, r5, r1
3547#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3548	str	r4, [r10, #8]
3549	str	r5, [r10, #12]
3550#else
3551	strd	r4, r5, [r10, #8]
3552#endif
3553#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3554	ldr	r0, [r10, #16]
3555	ldr	r1, [r10, #20]
3556#else
3557	ldrd	r0, r1, [r10, #16]
3558#endif
3559	add	r6, r6, r0
3560	add	r7, r7, r1
3561#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3562	str	r6, [r10, #16]
3563	str	r7, [r10, #20]
3564#else
3565	strd	r6, r7, [r10, #16]
3566#endif
3567#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3568	ldr	r0, [r10, #24]
3569	ldr	r1, [r10, #28]
3570#else
3571	ldrd	r0, r1, [r10, #24]
3572#endif
3573	add	r8, r8, r0
3574	add	r9, r9, r1
3575#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3576	str	r8, [r10, #24]
3577	str	r9, [r10, #28]
3578#else
3579	strd	r8, r9, [r10, #24]
3580#endif
3581	ldr	r10, [sp, #8]
3582	ldr	r1, [sp, #4]
3583	subs	r10, r10, #0x40
3584	sub	r12, r12, #0xc0
3585	str	r10, [sp, #8]
3586	bne	L_SHA256_transform_neon_len_begin
3587	add	sp, sp, #24
3588	vpop	{d8-d11}
3589	pop	{r4, r5, r6, r7, r8, r9, r10, pc}
3590	.size	Transform_Sha256_Len_neon,.-Transform_Sha256_Len_neon
3591#else
3592#ifndef __APPLE__
3593	.text
3594	.type	L_SHA256_trans_crypto_len_k, %object
3595	.size	L_SHA256_trans_crypto_len_k, 256
3596#else
3597	.section	__DATA,__data
3598#endif /* __APPLE__ */
3599	# 8-byte aligned, 64-bit aligned
3600#ifndef __APPLE__
3601	.align	3
3602#else
3603	.p2align	3
3604#endif /* __APPLE__ */
3605L_SHA256_trans_crypto_len_k:
3606	.long	0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5
3607	.long	0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5
3608	.long	0xd807aa98,0x12835b01,0x243185be,0x550c7dc3
3609	.long	0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174
3610	.long	0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc
3611	.long	0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da
3612	.long	0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7
3613	.long	0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967
3614	.long	0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13
3615	.long	0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85
3616	.long	0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3
3617	.long	0xd192e819,0xd6990624,0xf40e3585,0x106aa070
3618	.long	0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5
3619	.long	0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3
3620	.long	0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208
3621	.long	0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2
3622	.text
3623	.align	4
3624	.globl	Transform_Sha256_Len_crypto
3625	.type	Transform_Sha256_Len_crypto, %function
3626Transform_Sha256_Len_crypto:
3627	vpush	{d8-d15}
3628	adr	r3, L_SHA256_trans_crypto_len_k
3629	# Load K into vector registers
3630	vldm	r3!, {q8-q11}
3631	vldm	r3!, {q12-q13}
3632	# Load digest into working vars
3633	vldm	r0, {q0-q1}
3634	# Start of loop processing a block
3635L_sha256_len_crypto_begin:
3636	# Load W
3637	vld1.8	{q4-q5}, [r1]!
3638	vld1.8	{q6-q7}, [r1]!
3639	vrev32.8	q4, q4
3640	vrev32.8	q5, q5
3641	vrev32.8	q6, q6
3642	vrev32.8	q7, q7
3643	# Copy digest to add in at end
3644	vmov.32	q2, q0
3645	vmov.32	q3, q1
3646	# Start 16 rounds
3647	# Round 1
3648	vadd.i32	q14, q4, q8
3649	vmov.32	q15, q0
3650	sha256h.32	q0, q1, q14
3651	sha256h2.32	q1, q15, q14
3652	# Round 2
3653	sha256su0.32	q4, q5
3654	vadd.i32	q14, q5, q9
3655	vmov.32	q15, q0
3656	sha256su1.32	q4, q6, q7
3657	sha256h.32	q0, q1, q14
3658	sha256h2.32	q1, q15, q14
3659	# Round 3
3660	sha256su0.32	q5, q6
3661	vadd.i32	q14, q6, q10
3662	vmov.32	q15, q0
3663	sha256su1.32	q5, q7, q4
3664	sha256h.32	q0, q1, q14
3665	sha256h2.32	q1, q15, q14
3666	# Round 4
3667	sha256su0.32	q6, q7
3668	vadd.i32	q14, q7, q11
3669	vmov.32	q15, q0
3670	sha256su1.32	q6, q4, q5
3671	sha256h.32	q0, q1, q14
3672	sha256h2.32	q1, q15, q14
3673	# Round 5
3674	sha256su0.32	q7, q4
3675	vadd.i32	q14, q4, q12
3676	vmov.32	q15, q0
3677	sha256su1.32	q7, q5, q6
3678	sha256h.32	q0, q1, q14
3679	sha256h2.32	q1, q15, q14
3680	# Round 6
3681	sha256su0.32	q4, q5
3682	vadd.i32	q14, q5, q13
3683	vmov.32	q15, q0
3684	sha256su1.32	q4, q6, q7
3685	sha256h.32	q0, q1, q14
3686	sha256h2.32	q1, q15, q14
3687	# Round 7
3688	vld1.32	{q14}, [r3]!
3689	sha256su0.32	q5, q6
3690	vadd.i32	q14, q6, q14
3691	vmov.32	q15, q0
3692	sha256su1.32	q5, q7, q4
3693	sha256h.32	q0, q1, q14
3694	sha256h2.32	q1, q15, q14
3695	# Round 8
3696	vld1.32	{q14}, [r3]!
3697	sha256su0.32	q6, q7
3698	vadd.i32	q14, q7, q14
3699	vmov.32	q15, q0
3700	sha256su1.32	q6, q4, q5
3701	sha256h.32	q0, q1, q14
3702	sha256h2.32	q1, q15, q14
3703	# Round 9
3704	vld1.32	{q14}, [r3]!
3705	sha256su0.32	q7, q4
3706	vadd.i32	q14, q4, q14
3707	vmov.32	q15, q0
3708	sha256su1.32	q7, q5, q6
3709	sha256h.32	q0, q1, q14
3710	sha256h2.32	q1, q15, q14
3711	# Round 10
3712	vld1.32	{q14}, [r3]!
3713	sha256su0.32	q4, q5
3714	vadd.i32	q14, q5, q14
3715	vmov.32	q15, q0
3716	sha256su1.32	q4, q6, q7
3717	sha256h.32	q0, q1, q14
3718	sha256h2.32	q1, q15, q14
3719	# Round 11
3720	vld1.32	{q14}, [r3]!
3721	sha256su0.32	q5, q6
3722	vadd.i32	q14, q6, q14
3723	vmov.32	q15, q0
3724	sha256su1.32	q5, q7, q4
3725	sha256h.32	q0, q1, q14
3726	sha256h2.32	q1, q15, q14
3727	# Round 12
3728	vld1.32	{q14}, [r3]!
3729	sha256su0.32	q6, q7
3730	vadd.i32	q14, q7, q14
3731	vmov.32	q15, q0
3732	sha256su1.32	q6, q4, q5
3733	sha256h.32	q0, q1, q14
3734	sha256h2.32	q1, q15, q14
3735	# Round 13
3736	vld1.32	{q14}, [r3]!
3737	sha256su0.32	q7, q4
3738	vadd.i32	q14, q4, q14
3739	vmov.32	q15, q0
3740	sha256su1.32	q7, q5, q6
3741	sha256h.32	q0, q1, q14
3742	sha256h2.32	q1, q15, q14
3743	# Round 14
3744	vld1.32	{q14}, [r3]!
3745	vadd.i32	q14, q5, q14
3746	vmov.32	q15, q0
3747	sha256h.32	q0, q1, q14
3748	sha256h2.32	q1, q15, q14
3749	# Round 15
3750	vld1.32	{q14}, [r3]!
3751	vadd.i32	q14, q6, q14
3752	vmov.32	q15, q0
3753	sha256h.32	q0, q1, q14
3754	sha256h2.32	q1, q15, q14
3755	# Round 16
3756	vld1.32	{q14}, [r3]!
3757	vadd.i32	q14, q7, q14
3758	vmov.32	q15, q0
3759	sha256h.32	q0, q1, q14
3760	sha256h2.32	q1, q15, q14
3761	# Done 16 rounds
3762	vadd.i32	q0, q0, q2
3763	vadd.i32	q1, q1, q3
3764	subs	r2, r2, #0x40
3765	sub	r3, r3, #0xa0
3766	bne	L_sha256_len_crypto_begin
3767	# Store digest back
3768	vst1.8	{q0-q1}, [r0]
3769	vpop	{d8-d15}
3770	bx	lr
3771	.size	Transform_Sha256_Len_crypto,.-Transform_Sha256_Len_crypto
3772#endif /* WOLFSSL_ARMASM_NO_HW_CRYPTO */
3773#endif /* WOLFSSL_ARMASM_NO_NEON */
3774#endif /* !NO_SHA256 */
3775#endif /* !__aarch64__ && !WOLFSSL_ARMASM_THUMB2 */
3776#endif /* WOLFSSL_ARMASM */
3777
3778#if defined(__linux__) && defined(__ELF__)
3779.section	.note.GNU-stack,"",%progbits
3780#endif
3781#endif /* !WOLFSSL_ARMASM_INLINE */