luna - wolfssl/wolfcrypt/src/port/arm/armv8-32-sha512-asm.S

   1/* armv8-32-sha512-asm
   2 *
   3 * Copyright (C) 2006-2026 wolfSSL Inc.
   4 *
   5 * This file is part of wolfSSL.
   6 *
   7 * wolfSSL is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation; either version 3 of the License, or
  10 * (at your option) any later version.
  11 *
  12 * wolfSSL is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
  20 */
  21
  22/* Generated using (from wolfssl):
  23 *   cd ../scripts
  24 *   ruby ./sha2/sha512.rb arm32 \
  25 *       ../wolfssl/wolfcrypt/src/port/arm/armv8-32-sha512-asm.S
  26 */
  27
  28#include <wolfssl/wolfcrypt/libwolfssl_sources_asm.h>
  29
  30#ifdef WOLFSSL_ARMASM
  31#if !defined(__aarch64__) && !defined(WOLFSSL_ARMASM_THUMB2)
  32#ifndef WOLFSSL_ARMASM_INLINE
  33#if defined(WOLFSSL_SHA512) || defined(WOLFSSL_SHA384)
  34#ifdef WOLFSSL_ARMASM_NO_NEON
  35#ifndef __APPLE__
  36	.text
  37	.type	L_SHA512_transform_len_k, %object
  38	.size	L_SHA512_transform_len_k, 640
  39#else
  40	.section	__DATA,__data
  41#endif /* __APPLE__ */
  42	# 16-byte aligned, 128-bit aligned
  43#ifndef __APPLE__
  44	.align	4
  45#else
  46	.p2align	4
  47#endif /* __APPLE__ */
  48L_SHA512_transform_len_k:
  49	.quad	0x428a2f98d728ae22,0x7137449123ef65cd
  50	.quad	0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc
  51	.quad	0x3956c25bf348b538,0x59f111f1b605d019
  52	.quad	0x923f82a4af194f9b,0xab1c5ed5da6d8118
  53	.quad	0xd807aa98a3030242,0x12835b0145706fbe
  54	.quad	0x243185be4ee4b28c,0x550c7dc3d5ffb4e2
  55	.quad	0x72be5d74f27b896f,0x80deb1fe3b1696b1
  56	.quad	0x9bdc06a725c71235,0xc19bf174cf692694
  57	.quad	0xe49b69c19ef14ad2,0xefbe4786384f25e3
  58	.quad	0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65
  59	.quad	0x2de92c6f592b0275,0x4a7484aa6ea6e483
  60	.quad	0x5cb0a9dcbd41fbd4,0x76f988da831153b5
  61	.quad	0x983e5152ee66dfab,0xa831c66d2db43210
  62	.quad	0xb00327c898fb213f,0xbf597fc7beef0ee4
  63	.quad	0xc6e00bf33da88fc2,0xd5a79147930aa725
  64	.quad	0x06ca6351e003826f,0x142929670a0e6e70
  65	.quad	0x27b70a8546d22ffc,0x2e1b21385c26c926
  66	.quad	0x4d2c6dfc5ac42aed,0x53380d139d95b3df
  67	.quad	0x650a73548baf63de,0x766a0abb3c77b2a8
  68	.quad	0x81c2c92e47edaee6,0x92722c851482353b
  69	.quad	0xa2bfe8a14cf10364,0xa81a664bbc423001
  70	.quad	0xc24b8b70d0f89791,0xc76c51a30654be30
  71	.quad	0xd192e819d6ef5218,0xd69906245565a910
  72	.quad	0xf40e35855771202a,0x106aa07032bbd1b8
  73	.quad	0x19a4c116b8d2d0c8,0x1e376c085141ab53
  74	.quad	0x2748774cdf8eeb99,0x34b0bcb5e19b48a8
  75	.quad	0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb
  76	.quad	0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3
  77	.quad	0x748f82ee5defb2fc,0x78a5636f43172f60
  78	.quad	0x84c87814a1f0ab72,0x8cc702081a6439ec
  79	.quad	0x90befffa23631e28,0xa4506cebde82bde9
  80	.quad	0xbef9a3f7b2c67915,0xc67178f2e372532b
  81	.quad	0xca273eceea26619c,0xd186b8c721c0c207
  82	.quad	0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178
  83	.quad	0x06f067aa72176fba,0x0a637dc5a2c898a6
  84	.quad	0x113f9804bef90dae,0x1b710b35131c471b
  85	.quad	0x28db77f523047d84,0x32caab7b40c72493
  86	.quad	0x3c9ebe0a15c9bebc,0x431d67c49c100d4c
  87	.quad	0x4cc5d4becb3e42b6,0x597f299cfc657e2a
  88	.quad	0x5fcb6fab3ad6faec,0x6c44198c4a475817
  89	.text
  90	.align	4
  91	.globl	Transform_Sha512_Len_base
  92	.type	Transform_Sha512_Len_base, %function
  93Transform_Sha512_Len_base:
  94	push	{r4, r5, r6, r7, r8, r9, r10, r11, lr}
  95	sub	sp, sp, #0xc0
  96	adr	r3, L_SHA512_transform_len_k
  97	# Copy digest to add in at end
  98#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
  99	ldm	r0, {r4, r5}
 100#else
 101	ldrd	r4, r5, [r0]
 102#endif
 103#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 104	ldr	r6, [r0, #8]
 105	ldr	r7, [r0, #12]
 106#else
 107	ldrd	r6, r7, [r0, #8]
 108#endif
 109#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 110	ldr	r8, [r0, #16]
 111	ldr	r9, [r0, #20]
 112#else
 113	ldrd	r8, r9, [r0, #16]
 114#endif
 115#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 116	ldr	r10, [r0, #24]
 117	ldr	r11, [r0, #28]
 118#else
 119	ldrd	r10, r11, [r0, #24]
 120#endif
 121#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 122	str	r4, [sp, #128]
 123	str	r5, [sp, #132]
 124#else
 125	strd	r4, r5, [sp, #128]
 126#endif
 127#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 128	str	r6, [sp, #136]
 129	str	r7, [sp, #140]
 130#else
 131	strd	r6, r7, [sp, #136]
 132#endif
 133#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 134	str	r8, [sp, #144]
 135	str	r9, [sp, #148]
 136#else
 137	strd	r8, r9, [sp, #144]
 138#endif
 139#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 140	str	r10, [sp, #152]
 141	str	r11, [sp, #156]
 142#else
 143	strd	r10, r11, [sp, #152]
 144#endif
 145#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 146	ldr	r4, [r0, #32]
 147	ldr	r5, [r0, #36]
 148#else
 149	ldrd	r4, r5, [r0, #32]
 150#endif
 151#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 152	ldr	r6, [r0, #40]
 153	ldr	r7, [r0, #44]
 154#else
 155	ldrd	r6, r7, [r0, #40]
 156#endif
 157#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 158	ldr	r8, [r0, #48]
 159	ldr	r9, [r0, #52]
 160#else
 161	ldrd	r8, r9, [r0, #48]
 162#endif
 163#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 164	ldr	r10, [r0, #56]
 165	ldr	r11, [r0, #60]
 166#else
 167	ldrd	r10, r11, [r0, #56]
 168#endif
 169#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 170	str	r4, [sp, #160]
 171	str	r5, [sp, #164]
 172#else
 173	strd	r4, r5, [sp, #160]
 174#endif
 175#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 176	str	r6, [sp, #168]
 177	str	r7, [sp, #172]
 178#else
 179	strd	r6, r7, [sp, #168]
 180#endif
 181#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 182	str	r8, [sp, #176]
 183	str	r9, [sp, #180]
 184#else
 185	strd	r8, r9, [sp, #176]
 186#endif
 187#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 188	str	r10, [sp, #184]
 189	str	r11, [sp, #188]
 190#else
 191	strd	r10, r11, [sp, #184]
 192#endif
 193	# Start of loop processing a block
 194L_SHA512_transform_len_begin:
 195	# Load, Reverse and Store W - 64 bytes
 196#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 6)
 197	ldr	r4, [r1]
 198	ldr	r5, [r1, #4]
 199	ldr	r6, [r1, #8]
 200	ldr	r7, [r1, #12]
 201	eor	r8, r4, r4, ror #16
 202	eor	r9, r5, r5, ror #16
 203	eor	r10, r6, r6, ror #16
 204	eor	r11, r7, r7, ror #16
 205	bic	r8, r8, #0xff0000
 206	bic	r9, r9, #0xff0000
 207	bic	r10, r10, #0xff0000
 208	bic	r11, r11, #0xff0000
 209	ror	r4, r4, #8
 210	ror	r5, r5, #8
 211	ror	r6, r6, #8
 212	ror	r7, r7, #8
 213	eor	r4, r4, r8, lsr #8
 214	eor	r5, r5, r9, lsr #8
 215	eor	r6, r6, r10, lsr #8
 216	eor	r7, r7, r11, lsr #8
 217	str	r5, [sp]
 218	str	r4, [sp, #4]
 219	str	r7, [sp, #8]
 220	str	r6, [sp, #12]
 221	ldr	r4, [r1, #16]
 222	ldr	r5, [r1, #20]
 223	ldr	r6, [r1, #24]
 224	ldr	r7, [r1, #28]
 225	eor	r8, r4, r4, ror #16
 226	eor	r9, r5, r5, ror #16
 227	eor	r10, r6, r6, ror #16
 228	eor	r11, r7, r7, ror #16
 229	bic	r8, r8, #0xff0000
 230	bic	r9, r9, #0xff0000
 231	bic	r10, r10, #0xff0000
 232	bic	r11, r11, #0xff0000
 233	ror	r4, r4, #8
 234	ror	r5, r5, #8
 235	ror	r6, r6, #8
 236	ror	r7, r7, #8
 237	eor	r4, r4, r8, lsr #8
 238	eor	r5, r5, r9, lsr #8
 239	eor	r6, r6, r10, lsr #8
 240	eor	r7, r7, r11, lsr #8
 241	str	r5, [sp, #16]
 242	str	r4, [sp, #20]
 243	str	r7, [sp, #24]
 244	str	r6, [sp, #28]
 245	ldr	r4, [r1, #32]
 246	ldr	r5, [r1, #36]
 247	ldr	r6, [r1, #40]
 248	ldr	r7, [r1, #44]
 249	eor	r8, r4, r4, ror #16
 250	eor	r9, r5, r5, ror #16
 251	eor	r10, r6, r6, ror #16
 252	eor	r11, r7, r7, ror #16
 253	bic	r8, r8, #0xff0000
 254	bic	r9, r9, #0xff0000
 255	bic	r10, r10, #0xff0000
 256	bic	r11, r11, #0xff0000
 257	ror	r4, r4, #8
 258	ror	r5, r5, #8
 259	ror	r6, r6, #8
 260	ror	r7, r7, #8
 261	eor	r4, r4, r8, lsr #8
 262	eor	r5, r5, r9, lsr #8
 263	eor	r6, r6, r10, lsr #8
 264	eor	r7, r7, r11, lsr #8
 265	str	r5, [sp, #32]
 266	str	r4, [sp, #36]
 267	str	r7, [sp, #40]
 268	str	r6, [sp, #44]
 269	ldr	r4, [r1, #48]
 270	ldr	r5, [r1, #52]
 271	ldr	r6, [r1, #56]
 272	ldr	r7, [r1, #60]
 273	eor	r8, r4, r4, ror #16
 274	eor	r9, r5, r5, ror #16
 275	eor	r10, r6, r6, ror #16
 276	eor	r11, r7, r7, ror #16
 277	bic	r8, r8, #0xff0000
 278	bic	r9, r9, #0xff0000
 279	bic	r10, r10, #0xff0000
 280	bic	r11, r11, #0xff0000
 281	ror	r4, r4, #8
 282	ror	r5, r5, #8
 283	ror	r6, r6, #8
 284	ror	r7, r7, #8
 285	eor	r4, r4, r8, lsr #8
 286	eor	r5, r5, r9, lsr #8
 287	eor	r6, r6, r10, lsr #8
 288	eor	r7, r7, r11, lsr #8
 289	str	r5, [sp, #48]
 290	str	r4, [sp, #52]
 291	str	r7, [sp, #56]
 292	str	r6, [sp, #60]
 293	ldr	r4, [r1, #64]
 294	ldr	r5, [r1, #68]
 295	ldr	r6, [r1, #72]
 296	ldr	r7, [r1, #76]
 297	eor	r8, r4, r4, ror #16
 298	eor	r9, r5, r5, ror #16
 299	eor	r10, r6, r6, ror #16
 300	eor	r11, r7, r7, ror #16
 301	bic	r8, r8, #0xff0000
 302	bic	r9, r9, #0xff0000
 303	bic	r10, r10, #0xff0000
 304	bic	r11, r11, #0xff0000
 305	ror	r4, r4, #8
 306	ror	r5, r5, #8
 307	ror	r6, r6, #8
 308	ror	r7, r7, #8
 309	eor	r4, r4, r8, lsr #8
 310	eor	r5, r5, r9, lsr #8
 311	eor	r6, r6, r10, lsr #8
 312	eor	r7, r7, r11, lsr #8
 313	str	r5, [sp, #64]
 314	str	r4, [sp, #68]
 315	str	r7, [sp, #72]
 316	str	r6, [sp, #76]
 317	ldr	r4, [r1, #80]
 318	ldr	r5, [r1, #84]
 319	ldr	r6, [r1, #88]
 320	ldr	r7, [r1, #92]
 321	eor	r8, r4, r4, ror #16
 322	eor	r9, r5, r5, ror #16
 323	eor	r10, r6, r6, ror #16
 324	eor	r11, r7, r7, ror #16
 325	bic	r8, r8, #0xff0000
 326	bic	r9, r9, #0xff0000
 327	bic	r10, r10, #0xff0000
 328	bic	r11, r11, #0xff0000
 329	ror	r4, r4, #8
 330	ror	r5, r5, #8
 331	ror	r6, r6, #8
 332	ror	r7, r7, #8
 333	eor	r4, r4, r8, lsr #8
 334	eor	r5, r5, r9, lsr #8
 335	eor	r6, r6, r10, lsr #8
 336	eor	r7, r7, r11, lsr #8
 337	str	r5, [sp, #80]
 338	str	r4, [sp, #84]
 339	str	r7, [sp, #88]
 340	str	r6, [sp, #92]
 341	ldr	r4, [r1, #96]
 342	ldr	r5, [r1, #100]
 343	ldr	r6, [r1, #104]
 344	ldr	r7, [r1, #108]
 345	eor	r8, r4, r4, ror #16
 346	eor	r9, r5, r5, ror #16
 347	eor	r10, r6, r6, ror #16
 348	eor	r11, r7, r7, ror #16
 349	bic	r8, r8, #0xff0000
 350	bic	r9, r9, #0xff0000
 351	bic	r10, r10, #0xff0000
 352	bic	r11, r11, #0xff0000
 353	ror	r4, r4, #8
 354	ror	r5, r5, #8
 355	ror	r6, r6, #8
 356	ror	r7, r7, #8
 357	eor	r4, r4, r8, lsr #8
 358	eor	r5, r5, r9, lsr #8
 359	eor	r6, r6, r10, lsr #8
 360	eor	r7, r7, r11, lsr #8
 361	str	r5, [sp, #96]
 362	str	r4, [sp, #100]
 363	str	r7, [sp, #104]
 364	str	r6, [sp, #108]
 365	ldr	r4, [r1, #112]
 366	ldr	r5, [r1, #116]
 367	ldr	r6, [r1, #120]
 368	ldr	r7, [r1, #124]
 369	eor	r8, r4, r4, ror #16
 370	eor	r9, r5, r5, ror #16
 371	eor	r10, r6, r6, ror #16
 372	eor	r11, r7, r7, ror #16
 373	bic	r8, r8, #0xff0000
 374	bic	r9, r9, #0xff0000
 375	bic	r10, r10, #0xff0000
 376	bic	r11, r11, #0xff0000
 377	ror	r4, r4, #8
 378	ror	r5, r5, #8
 379	ror	r6, r6, #8
 380	ror	r7, r7, #8
 381	eor	r4, r4, r8, lsr #8
 382	eor	r5, r5, r9, lsr #8
 383	eor	r6, r6, r10, lsr #8
 384	eor	r7, r7, r11, lsr #8
 385	str	r5, [sp, #112]
 386	str	r4, [sp, #116]
 387	str	r7, [sp, #120]
 388	str	r6, [sp, #124]
 389#else
 390	ldr	r4, [r1]
 391	ldr	r5, [r1, #4]
 392	ldr	r6, [r1, #8]
 393	ldr	r7, [r1, #12]
 394	ldr	r8, [r1, #16]
 395	ldr	r9, [r1, #20]
 396	ldr	r10, [r1, #24]
 397	ldr	r11, [r1, #28]
 398	rev	r4, r4
 399	rev	r5, r5
 400	rev	r6, r6
 401	rev	r7, r7
 402	rev	r8, r8
 403	rev	r9, r9
 404	rev	r10, r10
 405	rev	r11, r11
 406	str	r5, [sp]
 407	str	r4, [sp, #4]
 408	str	r7, [sp, #8]
 409	str	r6, [sp, #12]
 410	str	r9, [sp, #16]
 411	str	r8, [sp, #20]
 412	str	r11, [sp, #24]
 413	str	r10, [sp, #28]
 414	ldr	r4, [r1, #32]
 415	ldr	r5, [r1, #36]
 416	ldr	r6, [r1, #40]
 417	ldr	r7, [r1, #44]
 418	ldr	r8, [r1, #48]
 419	ldr	r9, [r1, #52]
 420	ldr	r10, [r1, #56]
 421	ldr	r11, [r1, #60]
 422	rev	r4, r4
 423	rev	r5, r5
 424	rev	r6, r6
 425	rev	r7, r7
 426	rev	r8, r8
 427	rev	r9, r9
 428	rev	r10, r10
 429	rev	r11, r11
 430	str	r5, [sp, #32]
 431	str	r4, [sp, #36]
 432	str	r7, [sp, #40]
 433	str	r6, [sp, #44]
 434	str	r9, [sp, #48]
 435	str	r8, [sp, #52]
 436	str	r11, [sp, #56]
 437	str	r10, [sp, #60]
 438	ldr	r4, [r1, #64]
 439	ldr	r5, [r1, #68]
 440	ldr	r6, [r1, #72]
 441	ldr	r7, [r1, #76]
 442	ldr	r8, [r1, #80]
 443	ldr	r9, [r1, #84]
 444	ldr	r10, [r1, #88]
 445	ldr	r11, [r1, #92]
 446	rev	r4, r4
 447	rev	r5, r5
 448	rev	r6, r6
 449	rev	r7, r7
 450	rev	r8, r8
 451	rev	r9, r9
 452	rev	r10, r10
 453	rev	r11, r11
 454	str	r5, [sp, #64]
 455	str	r4, [sp, #68]
 456	str	r7, [sp, #72]
 457	str	r6, [sp, #76]
 458	str	r9, [sp, #80]
 459	str	r8, [sp, #84]
 460	str	r11, [sp, #88]
 461	str	r10, [sp, #92]
 462	ldr	r4, [r1, #96]
 463	ldr	r5, [r1, #100]
 464	ldr	r6, [r1, #104]
 465	ldr	r7, [r1, #108]
 466	ldr	r8, [r1, #112]
 467	ldr	r9, [r1, #116]
 468	ldr	r10, [r1, #120]
 469	ldr	r11, [r1, #124]
 470	rev	r4, r4
 471	rev	r5, r5
 472	rev	r6, r6
 473	rev	r7, r7
 474	rev	r8, r8
 475	rev	r9, r9
 476	rev	r10, r10
 477	rev	r11, r11
 478	str	r5, [sp, #96]
 479	str	r4, [sp, #100]
 480	str	r7, [sp, #104]
 481	str	r6, [sp, #108]
 482	str	r9, [sp, #112]
 483	str	r8, [sp, #116]
 484	str	r11, [sp, #120]
 485	str	r10, [sp, #124]
 486#endif /* WOLFSSL_ARM_ARCH && WOLFSSL_ARM_ARCH < 6 */
 487	# Pre-calc: b ^ c
 488#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 489	ldr	r10, [r0, #8]
 490	ldr	r11, [r0, #12]
 491#else
 492	ldrd	r10, r11, [r0, #8]
 493#endif
 494#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 495	ldr	r4, [r0, #16]
 496	ldr	r5, [r0, #20]
 497#else
 498	ldrd	r4, r5, [r0, #16]
 499#endif
 500	eor	r10, r10, r4
 501	eor	r11, r11, r5
 502	mov	r12, #4
 503	# Start of 16 rounds
 504L_SHA512_transform_len_start:
 505	# Round 0
 506#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 507	ldr	r4, [r0, #32]
 508	ldr	r5, [r0, #36]
 509#else
 510	ldrd	r4, r5, [r0, #32]
 511#endif
 512	lsrs	r6, r4, #14
 513	lsrs	r7, r5, #14
 514	orr	r7, r7, r4, lsl #18
 515	orr	r6, r6, r5, lsl #18
 516	lsrs	r8, r4, #18
 517	lsrs	r9, r5, #18
 518	orr	r9, r9, r4, lsl #14
 519	orr	r8, r8, r5, lsl #14
 520	eor	r6, r6, r8
 521	eor	r7, r7, r9
 522	lsls	r8, r4, #23
 523	lsls	r9, r5, #23
 524	orr	r9, r9, r4, lsr #9
 525	orr	r8, r8, r5, lsr #9
 526#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 527	ldr	r4, [r0, #56]
 528	ldr	r5, [r0, #60]
 529#else
 530	ldrd	r4, r5, [r0, #56]
 531#endif
 532	eor	r6, r6, r8
 533	eor	r7, r7, r9
 534	adds	r4, r4, r6
 535	adc	r5, r5, r7
 536#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 537	str	r4, [r0, #56]
 538	str	r5, [r0, #60]
 539#else
 540	strd	r4, r5, [r0, #56]
 541#endif
 542#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 543	ldr	r4, [r0, #32]
 544	ldr	r5, [r0, #36]
 545#else
 546	ldrd	r4, r5, [r0, #32]
 547#endif
 548#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 549	ldr	r6, [r0, #40]
 550	ldr	r7, [r0, #44]
 551#else
 552	ldrd	r6, r7, [r0, #40]
 553#endif
 554#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 555	ldr	r8, [r0, #48]
 556	ldr	r9, [r0, #52]
 557#else
 558	ldrd	r8, r9, [r0, #48]
 559#endif
 560	eor	r6, r6, r8
 561	eor	r7, r7, r9
 562	and	r6, r6, r4
 563	and	r7, r7, r5
 564	eor	r6, r6, r8
 565	eor	r7, r7, r9
 566#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 567	ldr	r4, [r0, #56]
 568	ldr	r5, [r0, #60]
 569#else
 570	ldrd	r4, r5, [r0, #56]
 571#endif
 572#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 573	ldm	sp, {r8, r9}
 574#else
 575	ldrd	r8, r9, [sp]
 576#endif
 577	adds	r4, r4, r6
 578	adc	r5, r5, r7
 579#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 580	ldm	r3, {r6, r7}
 581#else
 582	ldrd	r6, r7, [r3]
 583#endif
 584	adds	r4, r4, r8
 585	adc	r5, r5, r9
 586#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 587	ldr	r8, [r0, #24]
 588	ldr	r9, [r0, #28]
 589#else
 590	ldrd	r8, r9, [r0, #24]
 591#endif
 592	adds	r4, r4, r6
 593	adc	r5, r5, r7
 594#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 595	str	r4, [r0, #56]
 596	str	r5, [r0, #60]
 597#else
 598	strd	r4, r5, [r0, #56]
 599#endif
 600	adds	r8, r8, r4
 601	adc	r9, r9, r5
 602#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 603	ldm	r0, {r4, r5}
 604#else
 605	ldrd	r4, r5, [r0]
 606#endif
 607#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 608	str	r8, [r0, #24]
 609	str	r9, [r0, #28]
 610#else
 611	strd	r8, r9, [r0, #24]
 612#endif
 613	lsrs	r6, r4, #28
 614	lsrs	r7, r5, #28
 615	orr	r7, r7, r4, lsl #4
 616	orr	r6, r6, r5, lsl #4
 617	lsls	r8, r4, #30
 618	lsls	r9, r5, #30
 619	orr	r9, r9, r4, lsr #2
 620	orr	r8, r8, r5, lsr #2
 621	eor	r6, r6, r8
 622	eor	r7, r7, r9
 623	lsls	r8, r4, #25
 624	lsls	r9, r5, #25
 625	orr	r9, r9, r4, lsr #7
 626	orr	r8, r8, r5, lsr #7
 627#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 628	ldr	r4, [r0, #56]
 629	ldr	r5, [r0, #60]
 630#else
 631	ldrd	r4, r5, [r0, #56]
 632#endif
 633	eor	r6, r6, r8
 634	eor	r7, r7, r9
 635	adds	r4, r4, r6
 636	adc	r5, r5, r7
 637#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 638	ldm	r0, {r8, r9}
 639#else
 640	ldrd	r8, r9, [r0]
 641#endif
 642#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 643	ldr	r6, [r0, #8]
 644	ldr	r7, [r0, #12]
 645#else
 646	ldrd	r6, r7, [r0, #8]
 647#endif
 648#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 649	str	r4, [r0, #56]
 650	str	r5, [r0, #60]
 651#else
 652	strd	r4, r5, [r0, #56]
 653#endif
 654	eor	r8, r8, r6
 655	eor	r9, r9, r7
 656	and	r10, r10, r8
 657	and	r11, r11, r9
 658	eor	r10, r10, r6
 659	eor	r11, r11, r7
 660#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 661	ldr	r6, [r0, #56]
 662	ldr	r7, [r0, #60]
 663#else
 664	ldrd	r6, r7, [r0, #56]
 665#endif
 666	adds	r6, r6, r10
 667	adc	r7, r7, r11
 668#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 669	str	r6, [r0, #56]
 670	str	r7, [r0, #60]
 671#else
 672	strd	r6, r7, [r0, #56]
 673#endif
 674	mov	r10, r8
 675	mov	r11, r9
 676	# Calc new W[0]
 677#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 678	ldr	r4, [sp, #112]
 679	ldr	r5, [sp, #116]
 680#else
 681	ldrd	r4, r5, [sp, #112]
 682#endif
 683	lsrs	r6, r4, #19
 684	lsrs	r7, r5, #19
 685	orr	r7, r7, r4, lsl #13
 686	orr	r6, r6, r5, lsl #13
 687	lsls	r8, r4, #3
 688	lsls	r9, r5, #3
 689	orr	r9, r9, r4, lsr #29
 690	orr	r8, r8, r5, lsr #29
 691	eor	r7, r7, r9
 692	eor	r6, r6, r8
 693	lsrs	r8, r4, #6
 694	lsrs	r9, r5, #6
 695	orr	r8, r8, r5, lsl #26
 696	eor	r7, r7, r9
 697	eor	r6, r6, r8
 698#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 699	ldm	sp, {r4, r5}
 700#else
 701	ldrd	r4, r5, [sp]
 702#endif
 703#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 704	ldr	r8, [sp, #72]
 705	ldr	r9, [sp, #76]
 706#else
 707	ldrd	r8, r9, [sp, #72]
 708#endif
 709	adds	r4, r4, r6
 710	adc	r5, r5, r7
 711	adds	r4, r4, r8
 712	adc	r5, r5, r9
 713#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 714	stm	sp, {r4, r5}
 715#else
 716	strd	r4, r5, [sp]
 717#endif
 718#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 719	ldr	r4, [sp, #8]
 720	ldr	r5, [sp, #12]
 721#else
 722	ldrd	r4, r5, [sp, #8]
 723#endif
 724	lsrs	r6, r4, #1
 725	lsrs	r7, r5, #1
 726	orr	r7, r7, r4, lsl #31
 727	orr	r6, r6, r5, lsl #31
 728	lsrs	r8, r4, #8
 729	lsrs	r9, r5, #8
 730	orr	r9, r9, r4, lsl #24
 731	orr	r8, r8, r5, lsl #24
 732	eor	r7, r7, r9
 733	eor	r6, r6, r8
 734	lsrs	r8, r4, #7
 735	lsrs	r9, r5, #7
 736	orr	r8, r8, r5, lsl #25
 737	eor	r7, r7, r9
 738	eor	r6, r6, r8
 739#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 740	ldm	sp, {r4, r5}
 741#else
 742	ldrd	r4, r5, [sp]
 743#endif
 744	adds	r4, r4, r6
 745	adc	r5, r5, r7
 746#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 747	stm	sp, {r4, r5}
 748#else
 749	strd	r4, r5, [sp]
 750#endif
 751	# Round 1
 752#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 753	ldr	r4, [r0, #24]
 754	ldr	r5, [r0, #28]
 755#else
 756	ldrd	r4, r5, [r0, #24]
 757#endif
 758	lsrs	r6, r4, #14
 759	lsrs	r7, r5, #14
 760	orr	r7, r7, r4, lsl #18
 761	orr	r6, r6, r5, lsl #18
 762	lsrs	r8, r4, #18
 763	lsrs	r9, r5, #18
 764	orr	r9, r9, r4, lsl #14
 765	orr	r8, r8, r5, lsl #14
 766	eor	r6, r6, r8
 767	eor	r7, r7, r9
 768	lsls	r8, r4, #23
 769	lsls	r9, r5, #23
 770	orr	r9, r9, r4, lsr #9
 771	orr	r8, r8, r5, lsr #9
 772#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 773	ldr	r4, [r0, #48]
 774	ldr	r5, [r0, #52]
 775#else
 776	ldrd	r4, r5, [r0, #48]
 777#endif
 778	eor	r6, r6, r8
 779	eor	r7, r7, r9
 780	adds	r4, r4, r6
 781	adc	r5, r5, r7
 782#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 783	str	r4, [r0, #48]
 784	str	r5, [r0, #52]
 785#else
 786	strd	r4, r5, [r0, #48]
 787#endif
 788#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 789	ldr	r4, [r0, #24]
 790	ldr	r5, [r0, #28]
 791#else
 792	ldrd	r4, r5, [r0, #24]
 793#endif
 794#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 795	ldr	r6, [r0, #32]
 796	ldr	r7, [r0, #36]
 797#else
 798	ldrd	r6, r7, [r0, #32]
 799#endif
 800#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 801	ldr	r8, [r0, #40]
 802	ldr	r9, [r0, #44]
 803#else
 804	ldrd	r8, r9, [r0, #40]
 805#endif
 806	eor	r6, r6, r8
 807	eor	r7, r7, r9
 808	and	r6, r6, r4
 809	and	r7, r7, r5
 810	eor	r6, r6, r8
 811	eor	r7, r7, r9
 812#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 813	ldr	r4, [r0, #48]
 814	ldr	r5, [r0, #52]
 815#else
 816	ldrd	r4, r5, [r0, #48]
 817#endif
 818#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 819	ldr	r8, [sp, #8]
 820	ldr	r9, [sp, #12]
 821#else
 822	ldrd	r8, r9, [sp, #8]
 823#endif
 824	adds	r4, r4, r6
 825	adc	r5, r5, r7
 826#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 827	ldr	r6, [r3, #8]
 828	ldr	r7, [r3, #12]
 829#else
 830	ldrd	r6, r7, [r3, #8]
 831#endif
 832	adds	r4, r4, r8
 833	adc	r5, r5, r9
 834#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 835	ldr	r8, [r0, #16]
 836	ldr	r9, [r0, #20]
 837#else
 838	ldrd	r8, r9, [r0, #16]
 839#endif
 840	adds	r4, r4, r6
 841	adc	r5, r5, r7
 842#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 843	str	r4, [r0, #48]
 844	str	r5, [r0, #52]
 845#else
 846	strd	r4, r5, [r0, #48]
 847#endif
 848	adds	r8, r8, r4
 849	adc	r9, r9, r5
 850#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 851	ldr	r4, [r0, #56]
 852	ldr	r5, [r0, #60]
 853#else
 854	ldrd	r4, r5, [r0, #56]
 855#endif
 856#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 857	str	r8, [r0, #16]
 858	str	r9, [r0, #20]
 859#else
 860	strd	r8, r9, [r0, #16]
 861#endif
 862	lsrs	r6, r4, #28
 863	lsrs	r7, r5, #28
 864	orr	r7, r7, r4, lsl #4
 865	orr	r6, r6, r5, lsl #4
 866	lsls	r8, r4, #30
 867	lsls	r9, r5, #30
 868	orr	r9, r9, r4, lsr #2
 869	orr	r8, r8, r5, lsr #2
 870	eor	r6, r6, r8
 871	eor	r7, r7, r9
 872	lsls	r8, r4, #25
 873	lsls	r9, r5, #25
 874	orr	r9, r9, r4, lsr #7
 875	orr	r8, r8, r5, lsr #7
 876#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 877	ldr	r4, [r0, #48]
 878	ldr	r5, [r0, #52]
 879#else
 880	ldrd	r4, r5, [r0, #48]
 881#endif
 882	eor	r6, r6, r8
 883	eor	r7, r7, r9
 884	adds	r4, r4, r6
 885	adc	r5, r5, r7
 886#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 887	ldr	r8, [r0, #56]
 888	ldr	r9, [r0, #60]
 889#else
 890	ldrd	r8, r9, [r0, #56]
 891#endif
 892#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 893	ldm	r0, {r6, r7}
 894#else
 895	ldrd	r6, r7, [r0]
 896#endif
 897#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 898	str	r4, [r0, #48]
 899	str	r5, [r0, #52]
 900#else
 901	strd	r4, r5, [r0, #48]
 902#endif
 903	eor	r8, r8, r6
 904	eor	r9, r9, r7
 905	and	r10, r10, r8
 906	and	r11, r11, r9
 907	eor	r10, r10, r6
 908	eor	r11, r11, r7
 909#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 910	ldr	r6, [r0, #48]
 911	ldr	r7, [r0, #52]
 912#else
 913	ldrd	r6, r7, [r0, #48]
 914#endif
 915	adds	r6, r6, r10
 916	adc	r7, r7, r11
 917#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 918	str	r6, [r0, #48]
 919	str	r7, [r0, #52]
 920#else
 921	strd	r6, r7, [r0, #48]
 922#endif
 923	mov	r10, r8
 924	mov	r11, r9
 925	# Calc new W[1]
 926#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 927	ldr	r4, [sp, #120]
 928	ldr	r5, [sp, #124]
 929#else
 930	ldrd	r4, r5, [sp, #120]
 931#endif
 932	lsrs	r6, r4, #19
 933	lsrs	r7, r5, #19
 934	orr	r7, r7, r4, lsl #13
 935	orr	r6, r6, r5, lsl #13
 936	lsls	r8, r4, #3
 937	lsls	r9, r5, #3
 938	orr	r9, r9, r4, lsr #29
 939	orr	r8, r8, r5, lsr #29
 940	eor	r7, r7, r9
 941	eor	r6, r6, r8
 942	lsrs	r8, r4, #6
 943	lsrs	r9, r5, #6
 944	orr	r8, r8, r5, lsl #26
 945	eor	r7, r7, r9
 946	eor	r6, r6, r8
 947#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 948	ldr	r4, [sp, #8]
 949	ldr	r5, [sp, #12]
 950#else
 951	ldrd	r4, r5, [sp, #8]
 952#endif
 953#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 954	ldr	r8, [sp, #80]
 955	ldr	r9, [sp, #84]
 956#else
 957	ldrd	r8, r9, [sp, #80]
 958#endif
 959	adds	r4, r4, r6
 960	adc	r5, r5, r7
 961	adds	r4, r4, r8
 962	adc	r5, r5, r9
 963#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 964	str	r4, [sp, #8]
 965	str	r5, [sp, #12]
 966#else
 967	strd	r4, r5, [sp, #8]
 968#endif
 969#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 970	ldr	r4, [sp, #16]
 971	ldr	r5, [sp, #20]
 972#else
 973	ldrd	r4, r5, [sp, #16]
 974#endif
 975	lsrs	r6, r4, #1
 976	lsrs	r7, r5, #1
 977	orr	r7, r7, r4, lsl #31
 978	orr	r6, r6, r5, lsl #31
 979	lsrs	r8, r4, #8
 980	lsrs	r9, r5, #8
 981	orr	r9, r9, r4, lsl #24
 982	orr	r8, r8, r5, lsl #24
 983	eor	r7, r7, r9
 984	eor	r6, r6, r8
 985	lsrs	r8, r4, #7
 986	lsrs	r9, r5, #7
 987	orr	r8, r8, r5, lsl #25
 988	eor	r7, r7, r9
 989	eor	r6, r6, r8
 990#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 991	ldr	r4, [sp, #8]
 992	ldr	r5, [sp, #12]
 993#else
 994	ldrd	r4, r5, [sp, #8]
 995#endif
 996	adds	r4, r4, r6
 997	adc	r5, r5, r7
 998#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
 999	str	r4, [sp, #8]
1000	str	r5, [sp, #12]
1001#else
1002	strd	r4, r5, [sp, #8]
1003#endif
1004	# Round 2
1005#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1006	ldr	r4, [r0, #16]
1007	ldr	r5, [r0, #20]
1008#else
1009	ldrd	r4, r5, [r0, #16]
1010#endif
1011	lsrs	r6, r4, #14
1012	lsrs	r7, r5, #14
1013	orr	r7, r7, r4, lsl #18
1014	orr	r6, r6, r5, lsl #18
1015	lsrs	r8, r4, #18
1016	lsrs	r9, r5, #18
1017	orr	r9, r9, r4, lsl #14
1018	orr	r8, r8, r5, lsl #14
1019	eor	r6, r6, r8
1020	eor	r7, r7, r9
1021	lsls	r8, r4, #23
1022	lsls	r9, r5, #23
1023	orr	r9, r9, r4, lsr #9
1024	orr	r8, r8, r5, lsr #9
1025#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1026	ldr	r4, [r0, #40]
1027	ldr	r5, [r0, #44]
1028#else
1029	ldrd	r4, r5, [r0, #40]
1030#endif
1031	eor	r6, r6, r8
1032	eor	r7, r7, r9
1033	adds	r4, r4, r6
1034	adc	r5, r5, r7
1035#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1036	str	r4, [r0, #40]
1037	str	r5, [r0, #44]
1038#else
1039	strd	r4, r5, [r0, #40]
1040#endif
1041#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1042	ldr	r4, [r0, #16]
1043	ldr	r5, [r0, #20]
1044#else
1045	ldrd	r4, r5, [r0, #16]
1046#endif
1047#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1048	ldr	r6, [r0, #24]
1049	ldr	r7, [r0, #28]
1050#else
1051	ldrd	r6, r7, [r0, #24]
1052#endif
1053#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1054	ldr	r8, [r0, #32]
1055	ldr	r9, [r0, #36]
1056#else
1057	ldrd	r8, r9, [r0, #32]
1058#endif
1059	eor	r6, r6, r8
1060	eor	r7, r7, r9
1061	and	r6, r6, r4
1062	and	r7, r7, r5
1063	eor	r6, r6, r8
1064	eor	r7, r7, r9
1065#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1066	ldr	r4, [r0, #40]
1067	ldr	r5, [r0, #44]
1068#else
1069	ldrd	r4, r5, [r0, #40]
1070#endif
1071#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1072	ldr	r8, [sp, #16]
1073	ldr	r9, [sp, #20]
1074#else
1075	ldrd	r8, r9, [sp, #16]
1076#endif
1077	adds	r4, r4, r6
1078	adc	r5, r5, r7
1079#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1080	ldr	r6, [r3, #16]
1081	ldr	r7, [r3, #20]
1082#else
1083	ldrd	r6, r7, [r3, #16]
1084#endif
1085	adds	r4, r4, r8
1086	adc	r5, r5, r9
1087#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1088	ldr	r8, [r0, #8]
1089	ldr	r9, [r0, #12]
1090#else
1091	ldrd	r8, r9, [r0, #8]
1092#endif
1093	adds	r4, r4, r6
1094	adc	r5, r5, r7
1095#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1096	str	r4, [r0, #40]
1097	str	r5, [r0, #44]
1098#else
1099	strd	r4, r5, [r0, #40]
1100#endif
1101	adds	r8, r8, r4
1102	adc	r9, r9, r5
1103#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1104	ldr	r4, [r0, #48]
1105	ldr	r5, [r0, #52]
1106#else
1107	ldrd	r4, r5, [r0, #48]
1108#endif
1109#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1110	str	r8, [r0, #8]
1111	str	r9, [r0, #12]
1112#else
1113	strd	r8, r9, [r0, #8]
1114#endif
1115	lsrs	r6, r4, #28
1116	lsrs	r7, r5, #28
1117	orr	r7, r7, r4, lsl #4
1118	orr	r6, r6, r5, lsl #4
1119	lsls	r8, r4, #30
1120	lsls	r9, r5, #30
1121	orr	r9, r9, r4, lsr #2
1122	orr	r8, r8, r5, lsr #2
1123	eor	r6, r6, r8
1124	eor	r7, r7, r9
1125	lsls	r8, r4, #25
1126	lsls	r9, r5, #25
1127	orr	r9, r9, r4, lsr #7
1128	orr	r8, r8, r5, lsr #7
1129#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1130	ldr	r4, [r0, #40]
1131	ldr	r5, [r0, #44]
1132#else
1133	ldrd	r4, r5, [r0, #40]
1134#endif
1135	eor	r6, r6, r8
1136	eor	r7, r7, r9
1137	adds	r4, r4, r6
1138	adc	r5, r5, r7
1139#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1140	ldr	r8, [r0, #48]
1141	ldr	r9, [r0, #52]
1142#else
1143	ldrd	r8, r9, [r0, #48]
1144#endif
1145#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1146	ldr	r6, [r0, #56]
1147	ldr	r7, [r0, #60]
1148#else
1149	ldrd	r6, r7, [r0, #56]
1150#endif
1151#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1152	str	r4, [r0, #40]
1153	str	r5, [r0, #44]
1154#else
1155	strd	r4, r5, [r0, #40]
1156#endif
1157	eor	r8, r8, r6
1158	eor	r9, r9, r7
1159	and	r10, r10, r8
1160	and	r11, r11, r9
1161	eor	r10, r10, r6
1162	eor	r11, r11, r7
1163#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1164	ldr	r6, [r0, #40]
1165	ldr	r7, [r0, #44]
1166#else
1167	ldrd	r6, r7, [r0, #40]
1168#endif
1169	adds	r6, r6, r10
1170	adc	r7, r7, r11
1171#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1172	str	r6, [r0, #40]
1173	str	r7, [r0, #44]
1174#else
1175	strd	r6, r7, [r0, #40]
1176#endif
1177	mov	r10, r8
1178	mov	r11, r9
1179	# Calc new W[2]
1180#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1181	ldm	sp, {r4, r5}
1182#else
1183	ldrd	r4, r5, [sp]
1184#endif
1185	lsrs	r6, r4, #19
1186	lsrs	r7, r5, #19
1187	orr	r7, r7, r4, lsl #13
1188	orr	r6, r6, r5, lsl #13
1189	lsls	r8, r4, #3
1190	lsls	r9, r5, #3
1191	orr	r9, r9, r4, lsr #29
1192	orr	r8, r8, r5, lsr #29
1193	eor	r7, r7, r9
1194	eor	r6, r6, r8
1195	lsrs	r8, r4, #6
1196	lsrs	r9, r5, #6
1197	orr	r8, r8, r5, lsl #26
1198	eor	r7, r7, r9
1199	eor	r6, r6, r8
1200#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1201	ldr	r4, [sp, #16]
1202	ldr	r5, [sp, #20]
1203#else
1204	ldrd	r4, r5, [sp, #16]
1205#endif
1206#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1207	ldr	r8, [sp, #88]
1208	ldr	r9, [sp, #92]
1209#else
1210	ldrd	r8, r9, [sp, #88]
1211#endif
1212	adds	r4, r4, r6
1213	adc	r5, r5, r7
1214	adds	r4, r4, r8
1215	adc	r5, r5, r9
1216#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1217	str	r4, [sp, #16]
1218	str	r5, [sp, #20]
1219#else
1220	strd	r4, r5, [sp, #16]
1221#endif
1222#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1223	ldr	r4, [sp, #24]
1224	ldr	r5, [sp, #28]
1225#else
1226	ldrd	r4, r5, [sp, #24]
1227#endif
1228	lsrs	r6, r4, #1
1229	lsrs	r7, r5, #1
1230	orr	r7, r7, r4, lsl #31
1231	orr	r6, r6, r5, lsl #31
1232	lsrs	r8, r4, #8
1233	lsrs	r9, r5, #8
1234	orr	r9, r9, r4, lsl #24
1235	orr	r8, r8, r5, lsl #24
1236	eor	r7, r7, r9
1237	eor	r6, r6, r8
1238	lsrs	r8, r4, #7
1239	lsrs	r9, r5, #7
1240	orr	r8, r8, r5, lsl #25
1241	eor	r7, r7, r9
1242	eor	r6, r6, r8
1243#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1244	ldr	r4, [sp, #16]
1245	ldr	r5, [sp, #20]
1246#else
1247	ldrd	r4, r5, [sp, #16]
1248#endif
1249	adds	r4, r4, r6
1250	adc	r5, r5, r7
1251#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1252	str	r4, [sp, #16]
1253	str	r5, [sp, #20]
1254#else
1255	strd	r4, r5, [sp, #16]
1256#endif
1257	# Round 3
1258#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1259	ldr	r4, [r0, #8]
1260	ldr	r5, [r0, #12]
1261#else
1262	ldrd	r4, r5, [r0, #8]
1263#endif
1264	lsrs	r6, r4, #14
1265	lsrs	r7, r5, #14
1266	orr	r7, r7, r4, lsl #18
1267	orr	r6, r6, r5, lsl #18
1268	lsrs	r8, r4, #18
1269	lsrs	r9, r5, #18
1270	orr	r9, r9, r4, lsl #14
1271	orr	r8, r8, r5, lsl #14
1272	eor	r6, r6, r8
1273	eor	r7, r7, r9
1274	lsls	r8, r4, #23
1275	lsls	r9, r5, #23
1276	orr	r9, r9, r4, lsr #9
1277	orr	r8, r8, r5, lsr #9
1278#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1279	ldr	r4, [r0, #32]
1280	ldr	r5, [r0, #36]
1281#else
1282	ldrd	r4, r5, [r0, #32]
1283#endif
1284	eor	r6, r6, r8
1285	eor	r7, r7, r9
1286	adds	r4, r4, r6
1287	adc	r5, r5, r7
1288#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1289	str	r4, [r0, #32]
1290	str	r5, [r0, #36]
1291#else
1292	strd	r4, r5, [r0, #32]
1293#endif
1294#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1295	ldr	r4, [r0, #8]
1296	ldr	r5, [r0, #12]
1297#else
1298	ldrd	r4, r5, [r0, #8]
1299#endif
1300#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1301	ldr	r6, [r0, #16]
1302	ldr	r7, [r0, #20]
1303#else
1304	ldrd	r6, r7, [r0, #16]
1305#endif
1306#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1307	ldr	r8, [r0, #24]
1308	ldr	r9, [r0, #28]
1309#else
1310	ldrd	r8, r9, [r0, #24]
1311#endif
1312	eor	r6, r6, r8
1313	eor	r7, r7, r9
1314	and	r6, r6, r4
1315	and	r7, r7, r5
1316	eor	r6, r6, r8
1317	eor	r7, r7, r9
1318#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1319	ldr	r4, [r0, #32]
1320	ldr	r5, [r0, #36]
1321#else
1322	ldrd	r4, r5, [r0, #32]
1323#endif
1324#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1325	ldr	r8, [sp, #24]
1326	ldr	r9, [sp, #28]
1327#else
1328	ldrd	r8, r9, [sp, #24]
1329#endif
1330	adds	r4, r4, r6
1331	adc	r5, r5, r7
1332#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1333	ldr	r6, [r3, #24]
1334	ldr	r7, [r3, #28]
1335#else
1336	ldrd	r6, r7, [r3, #24]
1337#endif
1338	adds	r4, r4, r8
1339	adc	r5, r5, r9
1340#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1341	ldm	r0, {r8, r9}
1342#else
1343	ldrd	r8, r9, [r0]
1344#endif
1345	adds	r4, r4, r6
1346	adc	r5, r5, r7
1347#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1348	str	r4, [r0, #32]
1349	str	r5, [r0, #36]
1350#else
1351	strd	r4, r5, [r0, #32]
1352#endif
1353	adds	r8, r8, r4
1354	adc	r9, r9, r5
1355#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1356	ldr	r4, [r0, #40]
1357	ldr	r5, [r0, #44]
1358#else
1359	ldrd	r4, r5, [r0, #40]
1360#endif
1361#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1362	stm	r0, {r8, r9}
1363#else
1364	strd	r8, r9, [r0]
1365#endif
1366	lsrs	r6, r4, #28
1367	lsrs	r7, r5, #28
1368	orr	r7, r7, r4, lsl #4
1369	orr	r6, r6, r5, lsl #4
1370	lsls	r8, r4, #30
1371	lsls	r9, r5, #30
1372	orr	r9, r9, r4, lsr #2
1373	orr	r8, r8, r5, lsr #2
1374	eor	r6, r6, r8
1375	eor	r7, r7, r9
1376	lsls	r8, r4, #25
1377	lsls	r9, r5, #25
1378	orr	r9, r9, r4, lsr #7
1379	orr	r8, r8, r5, lsr #7
1380#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1381	ldr	r4, [r0, #32]
1382	ldr	r5, [r0, #36]
1383#else
1384	ldrd	r4, r5, [r0, #32]
1385#endif
1386	eor	r6, r6, r8
1387	eor	r7, r7, r9
1388	adds	r4, r4, r6
1389	adc	r5, r5, r7
1390#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1391	ldr	r8, [r0, #40]
1392	ldr	r9, [r0, #44]
1393#else
1394	ldrd	r8, r9, [r0, #40]
1395#endif
1396#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1397	ldr	r6, [r0, #48]
1398	ldr	r7, [r0, #52]
1399#else
1400	ldrd	r6, r7, [r0, #48]
1401#endif
1402#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1403	str	r4, [r0, #32]
1404	str	r5, [r0, #36]
1405#else
1406	strd	r4, r5, [r0, #32]
1407#endif
1408	eor	r8, r8, r6
1409	eor	r9, r9, r7
1410	and	r10, r10, r8
1411	and	r11, r11, r9
1412	eor	r10, r10, r6
1413	eor	r11, r11, r7
1414#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1415	ldr	r6, [r0, #32]
1416	ldr	r7, [r0, #36]
1417#else
1418	ldrd	r6, r7, [r0, #32]
1419#endif
1420	adds	r6, r6, r10
1421	adc	r7, r7, r11
1422#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1423	str	r6, [r0, #32]
1424	str	r7, [r0, #36]
1425#else
1426	strd	r6, r7, [r0, #32]
1427#endif
1428	mov	r10, r8
1429	mov	r11, r9
1430	# Calc new W[3]
1431#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1432	ldr	r4, [sp, #8]
1433	ldr	r5, [sp, #12]
1434#else
1435	ldrd	r4, r5, [sp, #8]
1436#endif
1437	lsrs	r6, r4, #19
1438	lsrs	r7, r5, #19
1439	orr	r7, r7, r4, lsl #13
1440	orr	r6, r6, r5, lsl #13
1441	lsls	r8, r4, #3
1442	lsls	r9, r5, #3
1443	orr	r9, r9, r4, lsr #29
1444	orr	r8, r8, r5, lsr #29
1445	eor	r7, r7, r9
1446	eor	r6, r6, r8
1447	lsrs	r8, r4, #6
1448	lsrs	r9, r5, #6
1449	orr	r8, r8, r5, lsl #26
1450	eor	r7, r7, r9
1451	eor	r6, r6, r8
1452#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1453	ldr	r4, [sp, #24]
1454	ldr	r5, [sp, #28]
1455#else
1456	ldrd	r4, r5, [sp, #24]
1457#endif
1458#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1459	ldr	r8, [sp, #96]
1460	ldr	r9, [sp, #100]
1461#else
1462	ldrd	r8, r9, [sp, #96]
1463#endif
1464	adds	r4, r4, r6
1465	adc	r5, r5, r7
1466	adds	r4, r4, r8
1467	adc	r5, r5, r9
1468#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1469	str	r4, [sp, #24]
1470	str	r5, [sp, #28]
1471#else
1472	strd	r4, r5, [sp, #24]
1473#endif
1474#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1475	ldr	r4, [sp, #32]
1476	ldr	r5, [sp, #36]
1477#else
1478	ldrd	r4, r5, [sp, #32]
1479#endif
1480	lsrs	r6, r4, #1
1481	lsrs	r7, r5, #1
1482	orr	r7, r7, r4, lsl #31
1483	orr	r6, r6, r5, lsl #31
1484	lsrs	r8, r4, #8
1485	lsrs	r9, r5, #8
1486	orr	r9, r9, r4, lsl #24
1487	orr	r8, r8, r5, lsl #24
1488	eor	r7, r7, r9
1489	eor	r6, r6, r8
1490	lsrs	r8, r4, #7
1491	lsrs	r9, r5, #7
1492	orr	r8, r8, r5, lsl #25
1493	eor	r7, r7, r9
1494	eor	r6, r6, r8
1495#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1496	ldr	r4, [sp, #24]
1497	ldr	r5, [sp, #28]
1498#else
1499	ldrd	r4, r5, [sp, #24]
1500#endif
1501	adds	r4, r4, r6
1502	adc	r5, r5, r7
1503#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1504	str	r4, [sp, #24]
1505	str	r5, [sp, #28]
1506#else
1507	strd	r4, r5, [sp, #24]
1508#endif
1509	# Round 4
1510#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1511	ldm	r0, {r4, r5}
1512#else
1513	ldrd	r4, r5, [r0]
1514#endif
1515	lsrs	r6, r4, #14
1516	lsrs	r7, r5, #14
1517	orr	r7, r7, r4, lsl #18
1518	orr	r6, r6, r5, lsl #18
1519	lsrs	r8, r4, #18
1520	lsrs	r9, r5, #18
1521	orr	r9, r9, r4, lsl #14
1522	orr	r8, r8, r5, lsl #14
1523	eor	r6, r6, r8
1524	eor	r7, r7, r9
1525	lsls	r8, r4, #23
1526	lsls	r9, r5, #23
1527	orr	r9, r9, r4, lsr #9
1528	orr	r8, r8, r5, lsr #9
1529#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1530	ldr	r4, [r0, #24]
1531	ldr	r5, [r0, #28]
1532#else
1533	ldrd	r4, r5, [r0, #24]
1534#endif
1535	eor	r6, r6, r8
1536	eor	r7, r7, r9
1537	adds	r4, r4, r6
1538	adc	r5, r5, r7
1539#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1540	str	r4, [r0, #24]
1541	str	r5, [r0, #28]
1542#else
1543	strd	r4, r5, [r0, #24]
1544#endif
1545#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1546	ldm	r0, {r4, r5}
1547#else
1548	ldrd	r4, r5, [r0]
1549#endif
1550#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1551	ldr	r6, [r0, #8]
1552	ldr	r7, [r0, #12]
1553#else
1554	ldrd	r6, r7, [r0, #8]
1555#endif
1556#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1557	ldr	r8, [r0, #16]
1558	ldr	r9, [r0, #20]
1559#else
1560	ldrd	r8, r9, [r0, #16]
1561#endif
1562	eor	r6, r6, r8
1563	eor	r7, r7, r9
1564	and	r6, r6, r4
1565	and	r7, r7, r5
1566	eor	r6, r6, r8
1567	eor	r7, r7, r9
1568#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1569	ldr	r4, [r0, #24]
1570	ldr	r5, [r0, #28]
1571#else
1572	ldrd	r4, r5, [r0, #24]
1573#endif
1574#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1575	ldr	r8, [sp, #32]
1576	ldr	r9, [sp, #36]
1577#else
1578	ldrd	r8, r9, [sp, #32]
1579#endif
1580	adds	r4, r4, r6
1581	adc	r5, r5, r7
1582#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1583	ldr	r6, [r3, #32]
1584	ldr	r7, [r3, #36]
1585#else
1586	ldrd	r6, r7, [r3, #32]
1587#endif
1588	adds	r4, r4, r8
1589	adc	r5, r5, r9
1590#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1591	ldr	r8, [r0, #56]
1592	ldr	r9, [r0, #60]
1593#else
1594	ldrd	r8, r9, [r0, #56]
1595#endif
1596	adds	r4, r4, r6
1597	adc	r5, r5, r7
1598#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1599	str	r4, [r0, #24]
1600	str	r5, [r0, #28]
1601#else
1602	strd	r4, r5, [r0, #24]
1603#endif
1604	adds	r8, r8, r4
1605	adc	r9, r9, r5
1606#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1607	ldr	r4, [r0, #32]
1608	ldr	r5, [r0, #36]
1609#else
1610	ldrd	r4, r5, [r0, #32]
1611#endif
1612#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1613	str	r8, [r0, #56]
1614	str	r9, [r0, #60]
1615#else
1616	strd	r8, r9, [r0, #56]
1617#endif
1618	lsrs	r6, r4, #28
1619	lsrs	r7, r5, #28
1620	orr	r7, r7, r4, lsl #4
1621	orr	r6, r6, r5, lsl #4
1622	lsls	r8, r4, #30
1623	lsls	r9, r5, #30
1624	orr	r9, r9, r4, lsr #2
1625	orr	r8, r8, r5, lsr #2
1626	eor	r6, r6, r8
1627	eor	r7, r7, r9
1628	lsls	r8, r4, #25
1629	lsls	r9, r5, #25
1630	orr	r9, r9, r4, lsr #7
1631	orr	r8, r8, r5, lsr #7
1632#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1633	ldr	r4, [r0, #24]
1634	ldr	r5, [r0, #28]
1635#else
1636	ldrd	r4, r5, [r0, #24]
1637#endif
1638	eor	r6, r6, r8
1639	eor	r7, r7, r9
1640	adds	r4, r4, r6
1641	adc	r5, r5, r7
1642#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1643	ldr	r8, [r0, #32]
1644	ldr	r9, [r0, #36]
1645#else
1646	ldrd	r8, r9, [r0, #32]
1647#endif
1648#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1649	ldr	r6, [r0, #40]
1650	ldr	r7, [r0, #44]
1651#else
1652	ldrd	r6, r7, [r0, #40]
1653#endif
1654#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1655	str	r4, [r0, #24]
1656	str	r5, [r0, #28]
1657#else
1658	strd	r4, r5, [r0, #24]
1659#endif
1660	eor	r8, r8, r6
1661	eor	r9, r9, r7
1662	and	r10, r10, r8
1663	and	r11, r11, r9
1664	eor	r10, r10, r6
1665	eor	r11, r11, r7
1666#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1667	ldr	r6, [r0, #24]
1668	ldr	r7, [r0, #28]
1669#else
1670	ldrd	r6, r7, [r0, #24]
1671#endif
1672	adds	r6, r6, r10
1673	adc	r7, r7, r11
1674#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1675	str	r6, [r0, #24]
1676	str	r7, [r0, #28]
1677#else
1678	strd	r6, r7, [r0, #24]
1679#endif
1680	mov	r10, r8
1681	mov	r11, r9
1682	# Calc new W[4]
1683#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1684	ldr	r4, [sp, #16]
1685	ldr	r5, [sp, #20]
1686#else
1687	ldrd	r4, r5, [sp, #16]
1688#endif
1689	lsrs	r6, r4, #19
1690	lsrs	r7, r5, #19
1691	orr	r7, r7, r4, lsl #13
1692	orr	r6, r6, r5, lsl #13
1693	lsls	r8, r4, #3
1694	lsls	r9, r5, #3
1695	orr	r9, r9, r4, lsr #29
1696	orr	r8, r8, r5, lsr #29
1697	eor	r7, r7, r9
1698	eor	r6, r6, r8
1699	lsrs	r8, r4, #6
1700	lsrs	r9, r5, #6
1701	orr	r8, r8, r5, lsl #26
1702	eor	r7, r7, r9
1703	eor	r6, r6, r8
1704#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1705	ldr	r4, [sp, #32]
1706	ldr	r5, [sp, #36]
1707#else
1708	ldrd	r4, r5, [sp, #32]
1709#endif
1710#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1711	ldr	r8, [sp, #104]
1712	ldr	r9, [sp, #108]
1713#else
1714	ldrd	r8, r9, [sp, #104]
1715#endif
1716	adds	r4, r4, r6
1717	adc	r5, r5, r7
1718	adds	r4, r4, r8
1719	adc	r5, r5, r9
1720#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1721	str	r4, [sp, #32]
1722	str	r5, [sp, #36]
1723#else
1724	strd	r4, r5, [sp, #32]
1725#endif
1726#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1727	ldr	r4, [sp, #40]
1728	ldr	r5, [sp, #44]
1729#else
1730	ldrd	r4, r5, [sp, #40]
1731#endif
1732	lsrs	r6, r4, #1
1733	lsrs	r7, r5, #1
1734	orr	r7, r7, r4, lsl #31
1735	orr	r6, r6, r5, lsl #31
1736	lsrs	r8, r4, #8
1737	lsrs	r9, r5, #8
1738	orr	r9, r9, r4, lsl #24
1739	orr	r8, r8, r5, lsl #24
1740	eor	r7, r7, r9
1741	eor	r6, r6, r8
1742	lsrs	r8, r4, #7
1743	lsrs	r9, r5, #7
1744	orr	r8, r8, r5, lsl #25
1745	eor	r7, r7, r9
1746	eor	r6, r6, r8
1747#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1748	ldr	r4, [sp, #32]
1749	ldr	r5, [sp, #36]
1750#else
1751	ldrd	r4, r5, [sp, #32]
1752#endif
1753	adds	r4, r4, r6
1754	adc	r5, r5, r7
1755#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1756	str	r4, [sp, #32]
1757	str	r5, [sp, #36]
1758#else
1759	strd	r4, r5, [sp, #32]
1760#endif
1761	# Round 5
1762#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1763	ldr	r4, [r0, #56]
1764	ldr	r5, [r0, #60]
1765#else
1766	ldrd	r4, r5, [r0, #56]
1767#endif
1768	lsrs	r6, r4, #14
1769	lsrs	r7, r5, #14
1770	orr	r7, r7, r4, lsl #18
1771	orr	r6, r6, r5, lsl #18
1772	lsrs	r8, r4, #18
1773	lsrs	r9, r5, #18
1774	orr	r9, r9, r4, lsl #14
1775	orr	r8, r8, r5, lsl #14
1776	eor	r6, r6, r8
1777	eor	r7, r7, r9
1778	lsls	r8, r4, #23
1779	lsls	r9, r5, #23
1780	orr	r9, r9, r4, lsr #9
1781	orr	r8, r8, r5, lsr #9
1782#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1783	ldr	r4, [r0, #16]
1784	ldr	r5, [r0, #20]
1785#else
1786	ldrd	r4, r5, [r0, #16]
1787#endif
1788	eor	r6, r6, r8
1789	eor	r7, r7, r9
1790	adds	r4, r4, r6
1791	adc	r5, r5, r7
1792#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1793	str	r4, [r0, #16]
1794	str	r5, [r0, #20]
1795#else
1796	strd	r4, r5, [r0, #16]
1797#endif
1798#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1799	ldr	r4, [r0, #56]
1800	ldr	r5, [r0, #60]
1801#else
1802	ldrd	r4, r5, [r0, #56]
1803#endif
1804#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1805	ldm	r0, {r6, r7}
1806#else
1807	ldrd	r6, r7, [r0]
1808#endif
1809#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1810	ldr	r8, [r0, #8]
1811	ldr	r9, [r0, #12]
1812#else
1813	ldrd	r8, r9, [r0, #8]
1814#endif
1815	eor	r6, r6, r8
1816	eor	r7, r7, r9
1817	and	r6, r6, r4
1818	and	r7, r7, r5
1819	eor	r6, r6, r8
1820	eor	r7, r7, r9
1821#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1822	ldr	r4, [r0, #16]
1823	ldr	r5, [r0, #20]
1824#else
1825	ldrd	r4, r5, [r0, #16]
1826#endif
1827#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1828	ldr	r8, [sp, #40]
1829	ldr	r9, [sp, #44]
1830#else
1831	ldrd	r8, r9, [sp, #40]
1832#endif
1833	adds	r4, r4, r6
1834	adc	r5, r5, r7
1835#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1836	ldr	r6, [r3, #40]
1837	ldr	r7, [r3, #44]
1838#else
1839	ldrd	r6, r7, [r3, #40]
1840#endif
1841	adds	r4, r4, r8
1842	adc	r5, r5, r9
1843#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1844	ldr	r8, [r0, #48]
1845	ldr	r9, [r0, #52]
1846#else
1847	ldrd	r8, r9, [r0, #48]
1848#endif
1849	adds	r4, r4, r6
1850	adc	r5, r5, r7
1851#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1852	str	r4, [r0, #16]
1853	str	r5, [r0, #20]
1854#else
1855	strd	r4, r5, [r0, #16]
1856#endif
1857	adds	r8, r8, r4
1858	adc	r9, r9, r5
1859#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1860	ldr	r4, [r0, #24]
1861	ldr	r5, [r0, #28]
1862#else
1863	ldrd	r4, r5, [r0, #24]
1864#endif
1865#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1866	str	r8, [r0, #48]
1867	str	r9, [r0, #52]
1868#else
1869	strd	r8, r9, [r0, #48]
1870#endif
1871	lsrs	r6, r4, #28
1872	lsrs	r7, r5, #28
1873	orr	r7, r7, r4, lsl #4
1874	orr	r6, r6, r5, lsl #4
1875	lsls	r8, r4, #30
1876	lsls	r9, r5, #30
1877	orr	r9, r9, r4, lsr #2
1878	orr	r8, r8, r5, lsr #2
1879	eor	r6, r6, r8
1880	eor	r7, r7, r9
1881	lsls	r8, r4, #25
1882	lsls	r9, r5, #25
1883	orr	r9, r9, r4, lsr #7
1884	orr	r8, r8, r5, lsr #7
1885#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1886	ldr	r4, [r0, #16]
1887	ldr	r5, [r0, #20]
1888#else
1889	ldrd	r4, r5, [r0, #16]
1890#endif
1891	eor	r6, r6, r8
1892	eor	r7, r7, r9
1893	adds	r4, r4, r6
1894	adc	r5, r5, r7
1895#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1896	ldr	r8, [r0, #24]
1897	ldr	r9, [r0, #28]
1898#else
1899	ldrd	r8, r9, [r0, #24]
1900#endif
1901#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1902	ldr	r6, [r0, #32]
1903	ldr	r7, [r0, #36]
1904#else
1905	ldrd	r6, r7, [r0, #32]
1906#endif
1907#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1908	str	r4, [r0, #16]
1909	str	r5, [r0, #20]
1910#else
1911	strd	r4, r5, [r0, #16]
1912#endif
1913	eor	r8, r8, r6
1914	eor	r9, r9, r7
1915	and	r10, r10, r8
1916	and	r11, r11, r9
1917	eor	r10, r10, r6
1918	eor	r11, r11, r7
1919#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1920	ldr	r6, [r0, #16]
1921	ldr	r7, [r0, #20]
1922#else
1923	ldrd	r6, r7, [r0, #16]
1924#endif
1925	adds	r6, r6, r10
1926	adc	r7, r7, r11
1927#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1928	str	r6, [r0, #16]
1929	str	r7, [r0, #20]
1930#else
1931	strd	r6, r7, [r0, #16]
1932#endif
1933	mov	r10, r8
1934	mov	r11, r9
1935	# Calc new W[5]
1936#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1937	ldr	r4, [sp, #24]
1938	ldr	r5, [sp, #28]
1939#else
1940	ldrd	r4, r5, [sp, #24]
1941#endif
1942	lsrs	r6, r4, #19
1943	lsrs	r7, r5, #19
1944	orr	r7, r7, r4, lsl #13
1945	orr	r6, r6, r5, lsl #13
1946	lsls	r8, r4, #3
1947	lsls	r9, r5, #3
1948	orr	r9, r9, r4, lsr #29
1949	orr	r8, r8, r5, lsr #29
1950	eor	r7, r7, r9
1951	eor	r6, r6, r8
1952	lsrs	r8, r4, #6
1953	lsrs	r9, r5, #6
1954	orr	r8, r8, r5, lsl #26
1955	eor	r7, r7, r9
1956	eor	r6, r6, r8
1957#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1958	ldr	r4, [sp, #40]
1959	ldr	r5, [sp, #44]
1960#else
1961	ldrd	r4, r5, [sp, #40]
1962#endif
1963#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1964	ldr	r8, [sp, #112]
1965	ldr	r9, [sp, #116]
1966#else
1967	ldrd	r8, r9, [sp, #112]
1968#endif
1969	adds	r4, r4, r6
1970	adc	r5, r5, r7
1971	adds	r4, r4, r8
1972	adc	r5, r5, r9
1973#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1974	str	r4, [sp, #40]
1975	str	r5, [sp, #44]
1976#else
1977	strd	r4, r5, [sp, #40]
1978#endif
1979#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
1980	ldr	r4, [sp, #48]
1981	ldr	r5, [sp, #52]
1982#else
1983	ldrd	r4, r5, [sp, #48]
1984#endif
1985	lsrs	r6, r4, #1
1986	lsrs	r7, r5, #1
1987	orr	r7, r7, r4, lsl #31
1988	orr	r6, r6, r5, lsl #31
1989	lsrs	r8, r4, #8
1990	lsrs	r9, r5, #8
1991	orr	r9, r9, r4, lsl #24
1992	orr	r8, r8, r5, lsl #24
1993	eor	r7, r7, r9
1994	eor	r6, r6, r8
1995	lsrs	r8, r4, #7
1996	lsrs	r9, r5, #7
1997	orr	r8, r8, r5, lsl #25
1998	eor	r7, r7, r9
1999	eor	r6, r6, r8
2000#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2001	ldr	r4, [sp, #40]
2002	ldr	r5, [sp, #44]
2003#else
2004	ldrd	r4, r5, [sp, #40]
2005#endif
2006	adds	r4, r4, r6
2007	adc	r5, r5, r7
2008#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2009	str	r4, [sp, #40]
2010	str	r5, [sp, #44]
2011#else
2012	strd	r4, r5, [sp, #40]
2013#endif
2014	# Round 6
2015#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2016	ldr	r4, [r0, #48]
2017	ldr	r5, [r0, #52]
2018#else
2019	ldrd	r4, r5, [r0, #48]
2020#endif
2021	lsrs	r6, r4, #14
2022	lsrs	r7, r5, #14
2023	orr	r7, r7, r4, lsl #18
2024	orr	r6, r6, r5, lsl #18
2025	lsrs	r8, r4, #18
2026	lsrs	r9, r5, #18
2027	orr	r9, r9, r4, lsl #14
2028	orr	r8, r8, r5, lsl #14
2029	eor	r6, r6, r8
2030	eor	r7, r7, r9
2031	lsls	r8, r4, #23
2032	lsls	r9, r5, #23
2033	orr	r9, r9, r4, lsr #9
2034	orr	r8, r8, r5, lsr #9
2035#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2036	ldr	r4, [r0, #8]
2037	ldr	r5, [r0, #12]
2038#else
2039	ldrd	r4, r5, [r0, #8]
2040#endif
2041	eor	r6, r6, r8
2042	eor	r7, r7, r9
2043	adds	r4, r4, r6
2044	adc	r5, r5, r7
2045#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2046	str	r4, [r0, #8]
2047	str	r5, [r0, #12]
2048#else
2049	strd	r4, r5, [r0, #8]
2050#endif
2051#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2052	ldr	r4, [r0, #48]
2053	ldr	r5, [r0, #52]
2054#else
2055	ldrd	r4, r5, [r0, #48]
2056#endif
2057#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2058	ldr	r6, [r0, #56]
2059	ldr	r7, [r0, #60]
2060#else
2061	ldrd	r6, r7, [r0, #56]
2062#endif
2063#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2064	ldm	r0, {r8, r9}
2065#else
2066	ldrd	r8, r9, [r0]
2067#endif
2068	eor	r6, r6, r8
2069	eor	r7, r7, r9
2070	and	r6, r6, r4
2071	and	r7, r7, r5
2072	eor	r6, r6, r8
2073	eor	r7, r7, r9
2074#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2075	ldr	r4, [r0, #8]
2076	ldr	r5, [r0, #12]
2077#else
2078	ldrd	r4, r5, [r0, #8]
2079#endif
2080#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2081	ldr	r8, [sp, #48]
2082	ldr	r9, [sp, #52]
2083#else
2084	ldrd	r8, r9, [sp, #48]
2085#endif
2086	adds	r4, r4, r6
2087	adc	r5, r5, r7
2088#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2089	ldr	r6, [r3, #48]
2090	ldr	r7, [r3, #52]
2091#else
2092	ldrd	r6, r7, [r3, #48]
2093#endif
2094	adds	r4, r4, r8
2095	adc	r5, r5, r9
2096#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2097	ldr	r8, [r0, #40]
2098	ldr	r9, [r0, #44]
2099#else
2100	ldrd	r8, r9, [r0, #40]
2101#endif
2102	adds	r4, r4, r6
2103	adc	r5, r5, r7
2104#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2105	str	r4, [r0, #8]
2106	str	r5, [r0, #12]
2107#else
2108	strd	r4, r5, [r0, #8]
2109#endif
2110	adds	r8, r8, r4
2111	adc	r9, r9, r5
2112#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2113	ldr	r4, [r0, #16]
2114	ldr	r5, [r0, #20]
2115#else
2116	ldrd	r4, r5, [r0, #16]
2117#endif
2118#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2119	str	r8, [r0, #40]
2120	str	r9, [r0, #44]
2121#else
2122	strd	r8, r9, [r0, #40]
2123#endif
2124	lsrs	r6, r4, #28
2125	lsrs	r7, r5, #28
2126	orr	r7, r7, r4, lsl #4
2127	orr	r6, r6, r5, lsl #4
2128	lsls	r8, r4, #30
2129	lsls	r9, r5, #30
2130	orr	r9, r9, r4, lsr #2
2131	orr	r8, r8, r5, lsr #2
2132	eor	r6, r6, r8
2133	eor	r7, r7, r9
2134	lsls	r8, r4, #25
2135	lsls	r9, r5, #25
2136	orr	r9, r9, r4, lsr #7
2137	orr	r8, r8, r5, lsr #7
2138#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2139	ldr	r4, [r0, #8]
2140	ldr	r5, [r0, #12]
2141#else
2142	ldrd	r4, r5, [r0, #8]
2143#endif
2144	eor	r6, r6, r8
2145	eor	r7, r7, r9
2146	adds	r4, r4, r6
2147	adc	r5, r5, r7
2148#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2149	ldr	r8, [r0, #16]
2150	ldr	r9, [r0, #20]
2151#else
2152	ldrd	r8, r9, [r0, #16]
2153#endif
2154#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2155	ldr	r6, [r0, #24]
2156	ldr	r7, [r0, #28]
2157#else
2158	ldrd	r6, r7, [r0, #24]
2159#endif
2160#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2161	str	r4, [r0, #8]
2162	str	r5, [r0, #12]
2163#else
2164	strd	r4, r5, [r0, #8]
2165#endif
2166	eor	r8, r8, r6
2167	eor	r9, r9, r7
2168	and	r10, r10, r8
2169	and	r11, r11, r9
2170	eor	r10, r10, r6
2171	eor	r11, r11, r7
2172#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2173	ldr	r6, [r0, #8]
2174	ldr	r7, [r0, #12]
2175#else
2176	ldrd	r6, r7, [r0, #8]
2177#endif
2178	adds	r6, r6, r10
2179	adc	r7, r7, r11
2180#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2181	str	r6, [r0, #8]
2182	str	r7, [r0, #12]
2183#else
2184	strd	r6, r7, [r0, #8]
2185#endif
2186	mov	r10, r8
2187	mov	r11, r9
2188	# Calc new W[6]
2189#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2190	ldr	r4, [sp, #32]
2191	ldr	r5, [sp, #36]
2192#else
2193	ldrd	r4, r5, [sp, #32]
2194#endif
2195	lsrs	r6, r4, #19
2196	lsrs	r7, r5, #19
2197	orr	r7, r7, r4, lsl #13
2198	orr	r6, r6, r5, lsl #13
2199	lsls	r8, r4, #3
2200	lsls	r9, r5, #3
2201	orr	r9, r9, r4, lsr #29
2202	orr	r8, r8, r5, lsr #29
2203	eor	r7, r7, r9
2204	eor	r6, r6, r8
2205	lsrs	r8, r4, #6
2206	lsrs	r9, r5, #6
2207	orr	r8, r8, r5, lsl #26
2208	eor	r7, r7, r9
2209	eor	r6, r6, r8
2210#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2211	ldr	r4, [sp, #48]
2212	ldr	r5, [sp, #52]
2213#else
2214	ldrd	r4, r5, [sp, #48]
2215#endif
2216#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2217	ldr	r8, [sp, #120]
2218	ldr	r9, [sp, #124]
2219#else
2220	ldrd	r8, r9, [sp, #120]
2221#endif
2222	adds	r4, r4, r6
2223	adc	r5, r5, r7
2224	adds	r4, r4, r8
2225	adc	r5, r5, r9
2226#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2227	str	r4, [sp, #48]
2228	str	r5, [sp, #52]
2229#else
2230	strd	r4, r5, [sp, #48]
2231#endif
2232#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2233	ldr	r4, [sp, #56]
2234	ldr	r5, [sp, #60]
2235#else
2236	ldrd	r4, r5, [sp, #56]
2237#endif
2238	lsrs	r6, r4, #1
2239	lsrs	r7, r5, #1
2240	orr	r7, r7, r4, lsl #31
2241	orr	r6, r6, r5, lsl #31
2242	lsrs	r8, r4, #8
2243	lsrs	r9, r5, #8
2244	orr	r9, r9, r4, lsl #24
2245	orr	r8, r8, r5, lsl #24
2246	eor	r7, r7, r9
2247	eor	r6, r6, r8
2248	lsrs	r8, r4, #7
2249	lsrs	r9, r5, #7
2250	orr	r8, r8, r5, lsl #25
2251	eor	r7, r7, r9
2252	eor	r6, r6, r8
2253#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2254	ldr	r4, [sp, #48]
2255	ldr	r5, [sp, #52]
2256#else
2257	ldrd	r4, r5, [sp, #48]
2258#endif
2259	adds	r4, r4, r6
2260	adc	r5, r5, r7
2261#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2262	str	r4, [sp, #48]
2263	str	r5, [sp, #52]
2264#else
2265	strd	r4, r5, [sp, #48]
2266#endif
2267	# Round 7
2268#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2269	ldr	r4, [r0, #40]
2270	ldr	r5, [r0, #44]
2271#else
2272	ldrd	r4, r5, [r0, #40]
2273#endif
2274	lsrs	r6, r4, #14
2275	lsrs	r7, r5, #14
2276	orr	r7, r7, r4, lsl #18
2277	orr	r6, r6, r5, lsl #18
2278	lsrs	r8, r4, #18
2279	lsrs	r9, r5, #18
2280	orr	r9, r9, r4, lsl #14
2281	orr	r8, r8, r5, lsl #14
2282	eor	r6, r6, r8
2283	eor	r7, r7, r9
2284	lsls	r8, r4, #23
2285	lsls	r9, r5, #23
2286	orr	r9, r9, r4, lsr #9
2287	orr	r8, r8, r5, lsr #9
2288#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2289	ldm	r0, {r4, r5}
2290#else
2291	ldrd	r4, r5, [r0]
2292#endif
2293	eor	r6, r6, r8
2294	eor	r7, r7, r9
2295	adds	r4, r4, r6
2296	adc	r5, r5, r7
2297#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2298	stm	r0, {r4, r5}
2299#else
2300	strd	r4, r5, [r0]
2301#endif
2302#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2303	ldr	r4, [r0, #40]
2304	ldr	r5, [r0, #44]
2305#else
2306	ldrd	r4, r5, [r0, #40]
2307#endif
2308#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2309	ldr	r6, [r0, #48]
2310	ldr	r7, [r0, #52]
2311#else
2312	ldrd	r6, r7, [r0, #48]
2313#endif
2314#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2315	ldr	r8, [r0, #56]
2316	ldr	r9, [r0, #60]
2317#else
2318	ldrd	r8, r9, [r0, #56]
2319#endif
2320	eor	r6, r6, r8
2321	eor	r7, r7, r9
2322	and	r6, r6, r4
2323	and	r7, r7, r5
2324	eor	r6, r6, r8
2325	eor	r7, r7, r9
2326#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2327	ldm	r0, {r4, r5}
2328#else
2329	ldrd	r4, r5, [r0]
2330#endif
2331#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2332	ldr	r8, [sp, #56]
2333	ldr	r9, [sp, #60]
2334#else
2335	ldrd	r8, r9, [sp, #56]
2336#endif
2337	adds	r4, r4, r6
2338	adc	r5, r5, r7
2339#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2340	ldr	r6, [r3, #56]
2341	ldr	r7, [r3, #60]
2342#else
2343	ldrd	r6, r7, [r3, #56]
2344#endif
2345	adds	r4, r4, r8
2346	adc	r5, r5, r9
2347#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2348	ldr	r8, [r0, #32]
2349	ldr	r9, [r0, #36]
2350#else
2351	ldrd	r8, r9, [r0, #32]
2352#endif
2353	adds	r4, r4, r6
2354	adc	r5, r5, r7
2355#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2356	stm	r0, {r4, r5}
2357#else
2358	strd	r4, r5, [r0]
2359#endif
2360	adds	r8, r8, r4
2361	adc	r9, r9, r5
2362#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2363	ldr	r4, [r0, #8]
2364	ldr	r5, [r0, #12]
2365#else
2366	ldrd	r4, r5, [r0, #8]
2367#endif
2368#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2369	str	r8, [r0, #32]
2370	str	r9, [r0, #36]
2371#else
2372	strd	r8, r9, [r0, #32]
2373#endif
2374	lsrs	r6, r4, #28
2375	lsrs	r7, r5, #28
2376	orr	r7, r7, r4, lsl #4
2377	orr	r6, r6, r5, lsl #4
2378	lsls	r8, r4, #30
2379	lsls	r9, r5, #30
2380	orr	r9, r9, r4, lsr #2
2381	orr	r8, r8, r5, lsr #2
2382	eor	r6, r6, r8
2383	eor	r7, r7, r9
2384	lsls	r8, r4, #25
2385	lsls	r9, r5, #25
2386	orr	r9, r9, r4, lsr #7
2387	orr	r8, r8, r5, lsr #7
2388#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2389	ldm	r0, {r4, r5}
2390#else
2391	ldrd	r4, r5, [r0]
2392#endif
2393	eor	r6, r6, r8
2394	eor	r7, r7, r9
2395	adds	r4, r4, r6
2396	adc	r5, r5, r7
2397#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2398	ldr	r8, [r0, #8]
2399	ldr	r9, [r0, #12]
2400#else
2401	ldrd	r8, r9, [r0, #8]
2402#endif
2403#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2404	ldr	r6, [r0, #16]
2405	ldr	r7, [r0, #20]
2406#else
2407	ldrd	r6, r7, [r0, #16]
2408#endif
2409#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2410	stm	r0, {r4, r5}
2411#else
2412	strd	r4, r5, [r0]
2413#endif
2414	eor	r8, r8, r6
2415	eor	r9, r9, r7
2416	and	r10, r10, r8
2417	and	r11, r11, r9
2418	eor	r10, r10, r6
2419	eor	r11, r11, r7
2420#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2421	ldm	r0, {r6, r7}
2422#else
2423	ldrd	r6, r7, [r0]
2424#endif
2425	adds	r6, r6, r10
2426	adc	r7, r7, r11
2427#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2428	stm	r0, {r6, r7}
2429#else
2430	strd	r6, r7, [r0]
2431#endif
2432	mov	r10, r8
2433	mov	r11, r9
2434	# Calc new W[7]
2435#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2436	ldr	r4, [sp, #40]
2437	ldr	r5, [sp, #44]
2438#else
2439	ldrd	r4, r5, [sp, #40]
2440#endif
2441	lsrs	r6, r4, #19
2442	lsrs	r7, r5, #19
2443	orr	r7, r7, r4, lsl #13
2444	orr	r6, r6, r5, lsl #13
2445	lsls	r8, r4, #3
2446	lsls	r9, r5, #3
2447	orr	r9, r9, r4, lsr #29
2448	orr	r8, r8, r5, lsr #29
2449	eor	r7, r7, r9
2450	eor	r6, r6, r8
2451	lsrs	r8, r4, #6
2452	lsrs	r9, r5, #6
2453	orr	r8, r8, r5, lsl #26
2454	eor	r7, r7, r9
2455	eor	r6, r6, r8
2456#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2457	ldr	r4, [sp, #56]
2458	ldr	r5, [sp, #60]
2459#else
2460	ldrd	r4, r5, [sp, #56]
2461#endif
2462#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2463	ldm	sp, {r8, r9}
2464#else
2465	ldrd	r8, r9, [sp]
2466#endif
2467	adds	r4, r4, r6
2468	adc	r5, r5, r7
2469	adds	r4, r4, r8
2470	adc	r5, r5, r9
2471#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2472	str	r4, [sp, #56]
2473	str	r5, [sp, #60]
2474#else
2475	strd	r4, r5, [sp, #56]
2476#endif
2477#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2478	ldr	r4, [sp, #64]
2479	ldr	r5, [sp, #68]
2480#else
2481	ldrd	r4, r5, [sp, #64]
2482#endif
2483	lsrs	r6, r4, #1
2484	lsrs	r7, r5, #1
2485	orr	r7, r7, r4, lsl #31
2486	orr	r6, r6, r5, lsl #31
2487	lsrs	r8, r4, #8
2488	lsrs	r9, r5, #8
2489	orr	r9, r9, r4, lsl #24
2490	orr	r8, r8, r5, lsl #24
2491	eor	r7, r7, r9
2492	eor	r6, r6, r8
2493	lsrs	r8, r4, #7
2494	lsrs	r9, r5, #7
2495	orr	r8, r8, r5, lsl #25
2496	eor	r7, r7, r9
2497	eor	r6, r6, r8
2498#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2499	ldr	r4, [sp, #56]
2500	ldr	r5, [sp, #60]
2501#else
2502	ldrd	r4, r5, [sp, #56]
2503#endif
2504	adds	r4, r4, r6
2505	adc	r5, r5, r7
2506#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2507	str	r4, [sp, #56]
2508	str	r5, [sp, #60]
2509#else
2510	strd	r4, r5, [sp, #56]
2511#endif
2512	# Round 8
2513#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2514	ldr	r4, [r0, #32]
2515	ldr	r5, [r0, #36]
2516#else
2517	ldrd	r4, r5, [r0, #32]
2518#endif
2519	lsrs	r6, r4, #14
2520	lsrs	r7, r5, #14
2521	orr	r7, r7, r4, lsl #18
2522	orr	r6, r6, r5, lsl #18
2523	lsrs	r8, r4, #18
2524	lsrs	r9, r5, #18
2525	orr	r9, r9, r4, lsl #14
2526	orr	r8, r8, r5, lsl #14
2527	eor	r6, r6, r8
2528	eor	r7, r7, r9
2529	lsls	r8, r4, #23
2530	lsls	r9, r5, #23
2531	orr	r9, r9, r4, lsr #9
2532	orr	r8, r8, r5, lsr #9
2533#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2534	ldr	r4, [r0, #56]
2535	ldr	r5, [r0, #60]
2536#else
2537	ldrd	r4, r5, [r0, #56]
2538#endif
2539	eor	r6, r6, r8
2540	eor	r7, r7, r9
2541	adds	r4, r4, r6
2542	adc	r5, r5, r7
2543#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2544	str	r4, [r0, #56]
2545	str	r5, [r0, #60]
2546#else
2547	strd	r4, r5, [r0, #56]
2548#endif
2549#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2550	ldr	r4, [r0, #32]
2551	ldr	r5, [r0, #36]
2552#else
2553	ldrd	r4, r5, [r0, #32]
2554#endif
2555#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2556	ldr	r6, [r0, #40]
2557	ldr	r7, [r0, #44]
2558#else
2559	ldrd	r6, r7, [r0, #40]
2560#endif
2561#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2562	ldr	r8, [r0, #48]
2563	ldr	r9, [r0, #52]
2564#else
2565	ldrd	r8, r9, [r0, #48]
2566#endif
2567	eor	r6, r6, r8
2568	eor	r7, r7, r9
2569	and	r6, r6, r4
2570	and	r7, r7, r5
2571	eor	r6, r6, r8
2572	eor	r7, r7, r9
2573#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2574	ldr	r4, [r0, #56]
2575	ldr	r5, [r0, #60]
2576#else
2577	ldrd	r4, r5, [r0, #56]
2578#endif
2579#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2580	ldr	r8, [sp, #64]
2581	ldr	r9, [sp, #68]
2582#else
2583	ldrd	r8, r9, [sp, #64]
2584#endif
2585	adds	r4, r4, r6
2586	adc	r5, r5, r7
2587#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2588	ldr	r6, [r3, #64]
2589	ldr	r7, [r3, #68]
2590#else
2591	ldrd	r6, r7, [r3, #64]
2592#endif
2593	adds	r4, r4, r8
2594	adc	r5, r5, r9
2595#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2596	ldr	r8, [r0, #24]
2597	ldr	r9, [r0, #28]
2598#else
2599	ldrd	r8, r9, [r0, #24]
2600#endif
2601	adds	r4, r4, r6
2602	adc	r5, r5, r7
2603#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2604	str	r4, [r0, #56]
2605	str	r5, [r0, #60]
2606#else
2607	strd	r4, r5, [r0, #56]
2608#endif
2609	adds	r8, r8, r4
2610	adc	r9, r9, r5
2611#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2612	ldm	r0, {r4, r5}
2613#else
2614	ldrd	r4, r5, [r0]
2615#endif
2616#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2617	str	r8, [r0, #24]
2618	str	r9, [r0, #28]
2619#else
2620	strd	r8, r9, [r0, #24]
2621#endif
2622	lsrs	r6, r4, #28
2623	lsrs	r7, r5, #28
2624	orr	r7, r7, r4, lsl #4
2625	orr	r6, r6, r5, lsl #4
2626	lsls	r8, r4, #30
2627	lsls	r9, r5, #30
2628	orr	r9, r9, r4, lsr #2
2629	orr	r8, r8, r5, lsr #2
2630	eor	r6, r6, r8
2631	eor	r7, r7, r9
2632	lsls	r8, r4, #25
2633	lsls	r9, r5, #25
2634	orr	r9, r9, r4, lsr #7
2635	orr	r8, r8, r5, lsr #7
2636#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2637	ldr	r4, [r0, #56]
2638	ldr	r5, [r0, #60]
2639#else
2640	ldrd	r4, r5, [r0, #56]
2641#endif
2642	eor	r6, r6, r8
2643	eor	r7, r7, r9
2644	adds	r4, r4, r6
2645	adc	r5, r5, r7
2646#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2647	ldm	r0, {r8, r9}
2648#else
2649	ldrd	r8, r9, [r0]
2650#endif
2651#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2652	ldr	r6, [r0, #8]
2653	ldr	r7, [r0, #12]
2654#else
2655	ldrd	r6, r7, [r0, #8]
2656#endif
2657#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2658	str	r4, [r0, #56]
2659	str	r5, [r0, #60]
2660#else
2661	strd	r4, r5, [r0, #56]
2662#endif
2663	eor	r8, r8, r6
2664	eor	r9, r9, r7
2665	and	r10, r10, r8
2666	and	r11, r11, r9
2667	eor	r10, r10, r6
2668	eor	r11, r11, r7
2669#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2670	ldr	r6, [r0, #56]
2671	ldr	r7, [r0, #60]
2672#else
2673	ldrd	r6, r7, [r0, #56]
2674#endif
2675	adds	r6, r6, r10
2676	adc	r7, r7, r11
2677#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2678	str	r6, [r0, #56]
2679	str	r7, [r0, #60]
2680#else
2681	strd	r6, r7, [r0, #56]
2682#endif
2683	mov	r10, r8
2684	mov	r11, r9
2685	# Calc new W[8]
2686#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2687	ldr	r4, [sp, #48]
2688	ldr	r5, [sp, #52]
2689#else
2690	ldrd	r4, r5, [sp, #48]
2691#endif
2692	lsrs	r6, r4, #19
2693	lsrs	r7, r5, #19
2694	orr	r7, r7, r4, lsl #13
2695	orr	r6, r6, r5, lsl #13
2696	lsls	r8, r4, #3
2697	lsls	r9, r5, #3
2698	orr	r9, r9, r4, lsr #29
2699	orr	r8, r8, r5, lsr #29
2700	eor	r7, r7, r9
2701	eor	r6, r6, r8
2702	lsrs	r8, r4, #6
2703	lsrs	r9, r5, #6
2704	orr	r8, r8, r5, lsl #26
2705	eor	r7, r7, r9
2706	eor	r6, r6, r8
2707#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2708	ldr	r4, [sp, #64]
2709	ldr	r5, [sp, #68]
2710#else
2711	ldrd	r4, r5, [sp, #64]
2712#endif
2713#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2714	ldr	r8, [sp, #8]
2715	ldr	r9, [sp, #12]
2716#else
2717	ldrd	r8, r9, [sp, #8]
2718#endif
2719	adds	r4, r4, r6
2720	adc	r5, r5, r7
2721	adds	r4, r4, r8
2722	adc	r5, r5, r9
2723#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2724	str	r4, [sp, #64]
2725	str	r5, [sp, #68]
2726#else
2727	strd	r4, r5, [sp, #64]
2728#endif
2729#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2730	ldr	r4, [sp, #72]
2731	ldr	r5, [sp, #76]
2732#else
2733	ldrd	r4, r5, [sp, #72]
2734#endif
2735	lsrs	r6, r4, #1
2736	lsrs	r7, r5, #1
2737	orr	r7, r7, r4, lsl #31
2738	orr	r6, r6, r5, lsl #31
2739	lsrs	r8, r4, #8
2740	lsrs	r9, r5, #8
2741	orr	r9, r9, r4, lsl #24
2742	orr	r8, r8, r5, lsl #24
2743	eor	r7, r7, r9
2744	eor	r6, r6, r8
2745	lsrs	r8, r4, #7
2746	lsrs	r9, r5, #7
2747	orr	r8, r8, r5, lsl #25
2748	eor	r7, r7, r9
2749	eor	r6, r6, r8
2750#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2751	ldr	r4, [sp, #64]
2752	ldr	r5, [sp, #68]
2753#else
2754	ldrd	r4, r5, [sp, #64]
2755#endif
2756	adds	r4, r4, r6
2757	adc	r5, r5, r7
2758#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2759	str	r4, [sp, #64]
2760	str	r5, [sp, #68]
2761#else
2762	strd	r4, r5, [sp, #64]
2763#endif
2764	# Round 9
2765#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2766	ldr	r4, [r0, #24]
2767	ldr	r5, [r0, #28]
2768#else
2769	ldrd	r4, r5, [r0, #24]
2770#endif
2771	lsrs	r6, r4, #14
2772	lsrs	r7, r5, #14
2773	orr	r7, r7, r4, lsl #18
2774	orr	r6, r6, r5, lsl #18
2775	lsrs	r8, r4, #18
2776	lsrs	r9, r5, #18
2777	orr	r9, r9, r4, lsl #14
2778	orr	r8, r8, r5, lsl #14
2779	eor	r6, r6, r8
2780	eor	r7, r7, r9
2781	lsls	r8, r4, #23
2782	lsls	r9, r5, #23
2783	orr	r9, r9, r4, lsr #9
2784	orr	r8, r8, r5, lsr #9
2785#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2786	ldr	r4, [r0, #48]
2787	ldr	r5, [r0, #52]
2788#else
2789	ldrd	r4, r5, [r0, #48]
2790#endif
2791	eor	r6, r6, r8
2792	eor	r7, r7, r9
2793	adds	r4, r4, r6
2794	adc	r5, r5, r7
2795#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2796	str	r4, [r0, #48]
2797	str	r5, [r0, #52]
2798#else
2799	strd	r4, r5, [r0, #48]
2800#endif
2801#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2802	ldr	r4, [r0, #24]
2803	ldr	r5, [r0, #28]
2804#else
2805	ldrd	r4, r5, [r0, #24]
2806#endif
2807#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2808	ldr	r6, [r0, #32]
2809	ldr	r7, [r0, #36]
2810#else
2811	ldrd	r6, r7, [r0, #32]
2812#endif
2813#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2814	ldr	r8, [r0, #40]
2815	ldr	r9, [r0, #44]
2816#else
2817	ldrd	r8, r9, [r0, #40]
2818#endif
2819	eor	r6, r6, r8
2820	eor	r7, r7, r9
2821	and	r6, r6, r4
2822	and	r7, r7, r5
2823	eor	r6, r6, r8
2824	eor	r7, r7, r9
2825#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2826	ldr	r4, [r0, #48]
2827	ldr	r5, [r0, #52]
2828#else
2829	ldrd	r4, r5, [r0, #48]
2830#endif
2831#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2832	ldr	r8, [sp, #72]
2833	ldr	r9, [sp, #76]
2834#else
2835	ldrd	r8, r9, [sp, #72]
2836#endif
2837	adds	r4, r4, r6
2838	adc	r5, r5, r7
2839#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2840	ldr	r6, [r3, #72]
2841	ldr	r7, [r3, #76]
2842#else
2843	ldrd	r6, r7, [r3, #72]
2844#endif
2845	adds	r4, r4, r8
2846	adc	r5, r5, r9
2847#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2848	ldr	r8, [r0, #16]
2849	ldr	r9, [r0, #20]
2850#else
2851	ldrd	r8, r9, [r0, #16]
2852#endif
2853	adds	r4, r4, r6
2854	adc	r5, r5, r7
2855#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2856	str	r4, [r0, #48]
2857	str	r5, [r0, #52]
2858#else
2859	strd	r4, r5, [r0, #48]
2860#endif
2861	adds	r8, r8, r4
2862	adc	r9, r9, r5
2863#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2864	ldr	r4, [r0, #56]
2865	ldr	r5, [r0, #60]
2866#else
2867	ldrd	r4, r5, [r0, #56]
2868#endif
2869#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2870	str	r8, [r0, #16]
2871	str	r9, [r0, #20]
2872#else
2873	strd	r8, r9, [r0, #16]
2874#endif
2875	lsrs	r6, r4, #28
2876	lsrs	r7, r5, #28
2877	orr	r7, r7, r4, lsl #4
2878	orr	r6, r6, r5, lsl #4
2879	lsls	r8, r4, #30
2880	lsls	r9, r5, #30
2881	orr	r9, r9, r4, lsr #2
2882	orr	r8, r8, r5, lsr #2
2883	eor	r6, r6, r8
2884	eor	r7, r7, r9
2885	lsls	r8, r4, #25
2886	lsls	r9, r5, #25
2887	orr	r9, r9, r4, lsr #7
2888	orr	r8, r8, r5, lsr #7
2889#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2890	ldr	r4, [r0, #48]
2891	ldr	r5, [r0, #52]
2892#else
2893	ldrd	r4, r5, [r0, #48]
2894#endif
2895	eor	r6, r6, r8
2896	eor	r7, r7, r9
2897	adds	r4, r4, r6
2898	adc	r5, r5, r7
2899#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2900	ldr	r8, [r0, #56]
2901	ldr	r9, [r0, #60]
2902#else
2903	ldrd	r8, r9, [r0, #56]
2904#endif
2905#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2906	ldm	r0, {r6, r7}
2907#else
2908	ldrd	r6, r7, [r0]
2909#endif
2910#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2911	str	r4, [r0, #48]
2912	str	r5, [r0, #52]
2913#else
2914	strd	r4, r5, [r0, #48]
2915#endif
2916	eor	r8, r8, r6
2917	eor	r9, r9, r7
2918	and	r10, r10, r8
2919	and	r11, r11, r9
2920	eor	r10, r10, r6
2921	eor	r11, r11, r7
2922#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2923	ldr	r6, [r0, #48]
2924	ldr	r7, [r0, #52]
2925#else
2926	ldrd	r6, r7, [r0, #48]
2927#endif
2928	adds	r6, r6, r10
2929	adc	r7, r7, r11
2930#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2931	str	r6, [r0, #48]
2932	str	r7, [r0, #52]
2933#else
2934	strd	r6, r7, [r0, #48]
2935#endif
2936	mov	r10, r8
2937	mov	r11, r9
2938	# Calc new W[9]
2939#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2940	ldr	r4, [sp, #56]
2941	ldr	r5, [sp, #60]
2942#else
2943	ldrd	r4, r5, [sp, #56]
2944#endif
2945	lsrs	r6, r4, #19
2946	lsrs	r7, r5, #19
2947	orr	r7, r7, r4, lsl #13
2948	orr	r6, r6, r5, lsl #13
2949	lsls	r8, r4, #3
2950	lsls	r9, r5, #3
2951	orr	r9, r9, r4, lsr #29
2952	orr	r8, r8, r5, lsr #29
2953	eor	r7, r7, r9
2954	eor	r6, r6, r8
2955	lsrs	r8, r4, #6
2956	lsrs	r9, r5, #6
2957	orr	r8, r8, r5, lsl #26
2958	eor	r7, r7, r9
2959	eor	r6, r6, r8
2960#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2961	ldr	r4, [sp, #72]
2962	ldr	r5, [sp, #76]
2963#else
2964	ldrd	r4, r5, [sp, #72]
2965#endif
2966#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2967	ldr	r8, [sp, #16]
2968	ldr	r9, [sp, #20]
2969#else
2970	ldrd	r8, r9, [sp, #16]
2971#endif
2972	adds	r4, r4, r6
2973	adc	r5, r5, r7
2974	adds	r4, r4, r8
2975	adc	r5, r5, r9
2976#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2977	str	r4, [sp, #72]
2978	str	r5, [sp, #76]
2979#else
2980	strd	r4, r5, [sp, #72]
2981#endif
2982#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
2983	ldr	r4, [sp, #80]
2984	ldr	r5, [sp, #84]
2985#else
2986	ldrd	r4, r5, [sp, #80]
2987#endif
2988	lsrs	r6, r4, #1
2989	lsrs	r7, r5, #1
2990	orr	r7, r7, r4, lsl #31
2991	orr	r6, r6, r5, lsl #31
2992	lsrs	r8, r4, #8
2993	lsrs	r9, r5, #8
2994	orr	r9, r9, r4, lsl #24
2995	orr	r8, r8, r5, lsl #24
2996	eor	r7, r7, r9
2997	eor	r6, r6, r8
2998	lsrs	r8, r4, #7
2999	lsrs	r9, r5, #7
3000	orr	r8, r8, r5, lsl #25
3001	eor	r7, r7, r9
3002	eor	r6, r6, r8
3003#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3004	ldr	r4, [sp, #72]
3005	ldr	r5, [sp, #76]
3006#else
3007	ldrd	r4, r5, [sp, #72]
3008#endif
3009	adds	r4, r4, r6
3010	adc	r5, r5, r7
3011#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3012	str	r4, [sp, #72]
3013	str	r5, [sp, #76]
3014#else
3015	strd	r4, r5, [sp, #72]
3016#endif
3017	# Round 10
3018#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3019	ldr	r4, [r0, #16]
3020	ldr	r5, [r0, #20]
3021#else
3022	ldrd	r4, r5, [r0, #16]
3023#endif
3024	lsrs	r6, r4, #14
3025	lsrs	r7, r5, #14
3026	orr	r7, r7, r4, lsl #18
3027	orr	r6, r6, r5, lsl #18
3028	lsrs	r8, r4, #18
3029	lsrs	r9, r5, #18
3030	orr	r9, r9, r4, lsl #14
3031	orr	r8, r8, r5, lsl #14
3032	eor	r6, r6, r8
3033	eor	r7, r7, r9
3034	lsls	r8, r4, #23
3035	lsls	r9, r5, #23
3036	orr	r9, r9, r4, lsr #9
3037	orr	r8, r8, r5, lsr #9
3038#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3039	ldr	r4, [r0, #40]
3040	ldr	r5, [r0, #44]
3041#else
3042	ldrd	r4, r5, [r0, #40]
3043#endif
3044	eor	r6, r6, r8
3045	eor	r7, r7, r9
3046	adds	r4, r4, r6
3047	adc	r5, r5, r7
3048#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3049	str	r4, [r0, #40]
3050	str	r5, [r0, #44]
3051#else
3052	strd	r4, r5, [r0, #40]
3053#endif
3054#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3055	ldr	r4, [r0, #16]
3056	ldr	r5, [r0, #20]
3057#else
3058	ldrd	r4, r5, [r0, #16]
3059#endif
3060#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3061	ldr	r6, [r0, #24]
3062	ldr	r7, [r0, #28]
3063#else
3064	ldrd	r6, r7, [r0, #24]
3065#endif
3066#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3067	ldr	r8, [r0, #32]
3068	ldr	r9, [r0, #36]
3069#else
3070	ldrd	r8, r9, [r0, #32]
3071#endif
3072	eor	r6, r6, r8
3073	eor	r7, r7, r9
3074	and	r6, r6, r4
3075	and	r7, r7, r5
3076	eor	r6, r6, r8
3077	eor	r7, r7, r9
3078#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3079	ldr	r4, [r0, #40]
3080	ldr	r5, [r0, #44]
3081#else
3082	ldrd	r4, r5, [r0, #40]
3083#endif
3084#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3085	ldr	r8, [sp, #80]
3086	ldr	r9, [sp, #84]
3087#else
3088	ldrd	r8, r9, [sp, #80]
3089#endif
3090	adds	r4, r4, r6
3091	adc	r5, r5, r7
3092#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3093	ldr	r6, [r3, #80]
3094	ldr	r7, [r3, #84]
3095#else
3096	ldrd	r6, r7, [r3, #80]
3097#endif
3098	adds	r4, r4, r8
3099	adc	r5, r5, r9
3100#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3101	ldr	r8, [r0, #8]
3102	ldr	r9, [r0, #12]
3103#else
3104	ldrd	r8, r9, [r0, #8]
3105#endif
3106	adds	r4, r4, r6
3107	adc	r5, r5, r7
3108#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3109	str	r4, [r0, #40]
3110	str	r5, [r0, #44]
3111#else
3112	strd	r4, r5, [r0, #40]
3113#endif
3114	adds	r8, r8, r4
3115	adc	r9, r9, r5
3116#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3117	ldr	r4, [r0, #48]
3118	ldr	r5, [r0, #52]
3119#else
3120	ldrd	r4, r5, [r0, #48]
3121#endif
3122#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3123	str	r8, [r0, #8]
3124	str	r9, [r0, #12]
3125#else
3126	strd	r8, r9, [r0, #8]
3127#endif
3128	lsrs	r6, r4, #28
3129	lsrs	r7, r5, #28
3130	orr	r7, r7, r4, lsl #4
3131	orr	r6, r6, r5, lsl #4
3132	lsls	r8, r4, #30
3133	lsls	r9, r5, #30
3134	orr	r9, r9, r4, lsr #2
3135	orr	r8, r8, r5, lsr #2
3136	eor	r6, r6, r8
3137	eor	r7, r7, r9
3138	lsls	r8, r4, #25
3139	lsls	r9, r5, #25
3140	orr	r9, r9, r4, lsr #7
3141	orr	r8, r8, r5, lsr #7
3142#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3143	ldr	r4, [r0, #40]
3144	ldr	r5, [r0, #44]
3145#else
3146	ldrd	r4, r5, [r0, #40]
3147#endif
3148	eor	r6, r6, r8
3149	eor	r7, r7, r9
3150	adds	r4, r4, r6
3151	adc	r5, r5, r7
3152#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3153	ldr	r8, [r0, #48]
3154	ldr	r9, [r0, #52]
3155#else
3156	ldrd	r8, r9, [r0, #48]
3157#endif
3158#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3159	ldr	r6, [r0, #56]
3160	ldr	r7, [r0, #60]
3161#else
3162	ldrd	r6, r7, [r0, #56]
3163#endif
3164#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3165	str	r4, [r0, #40]
3166	str	r5, [r0, #44]
3167#else
3168	strd	r4, r5, [r0, #40]
3169#endif
3170	eor	r8, r8, r6
3171	eor	r9, r9, r7
3172	and	r10, r10, r8
3173	and	r11, r11, r9
3174	eor	r10, r10, r6
3175	eor	r11, r11, r7
3176#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3177	ldr	r6, [r0, #40]
3178	ldr	r7, [r0, #44]
3179#else
3180	ldrd	r6, r7, [r0, #40]
3181#endif
3182	adds	r6, r6, r10
3183	adc	r7, r7, r11
3184#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3185	str	r6, [r0, #40]
3186	str	r7, [r0, #44]
3187#else
3188	strd	r6, r7, [r0, #40]
3189#endif
3190	mov	r10, r8
3191	mov	r11, r9
3192	# Calc new W[10]
3193#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3194	ldr	r4, [sp, #64]
3195	ldr	r5, [sp, #68]
3196#else
3197	ldrd	r4, r5, [sp, #64]
3198#endif
3199	lsrs	r6, r4, #19
3200	lsrs	r7, r5, #19
3201	orr	r7, r7, r4, lsl #13
3202	orr	r6, r6, r5, lsl #13
3203	lsls	r8, r4, #3
3204	lsls	r9, r5, #3
3205	orr	r9, r9, r4, lsr #29
3206	orr	r8, r8, r5, lsr #29
3207	eor	r7, r7, r9
3208	eor	r6, r6, r8
3209	lsrs	r8, r4, #6
3210	lsrs	r9, r5, #6
3211	orr	r8, r8, r5, lsl #26
3212	eor	r7, r7, r9
3213	eor	r6, r6, r8
3214#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3215	ldr	r4, [sp, #80]
3216	ldr	r5, [sp, #84]
3217#else
3218	ldrd	r4, r5, [sp, #80]
3219#endif
3220#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3221	ldr	r8, [sp, #24]
3222	ldr	r9, [sp, #28]
3223#else
3224	ldrd	r8, r9, [sp, #24]
3225#endif
3226	adds	r4, r4, r6
3227	adc	r5, r5, r7
3228	adds	r4, r4, r8
3229	adc	r5, r5, r9
3230#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3231	str	r4, [sp, #80]
3232	str	r5, [sp, #84]
3233#else
3234	strd	r4, r5, [sp, #80]
3235#endif
3236#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3237	ldr	r4, [sp, #88]
3238	ldr	r5, [sp, #92]
3239#else
3240	ldrd	r4, r5, [sp, #88]
3241#endif
3242	lsrs	r6, r4, #1
3243	lsrs	r7, r5, #1
3244	orr	r7, r7, r4, lsl #31
3245	orr	r6, r6, r5, lsl #31
3246	lsrs	r8, r4, #8
3247	lsrs	r9, r5, #8
3248	orr	r9, r9, r4, lsl #24
3249	orr	r8, r8, r5, lsl #24
3250	eor	r7, r7, r9
3251	eor	r6, r6, r8
3252	lsrs	r8, r4, #7
3253	lsrs	r9, r5, #7
3254	orr	r8, r8, r5, lsl #25
3255	eor	r7, r7, r9
3256	eor	r6, r6, r8
3257#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3258	ldr	r4, [sp, #80]
3259	ldr	r5, [sp, #84]
3260#else
3261	ldrd	r4, r5, [sp, #80]
3262#endif
3263	adds	r4, r4, r6
3264	adc	r5, r5, r7
3265#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3266	str	r4, [sp, #80]
3267	str	r5, [sp, #84]
3268#else
3269	strd	r4, r5, [sp, #80]
3270#endif
3271	# Round 11
3272#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3273	ldr	r4, [r0, #8]
3274	ldr	r5, [r0, #12]
3275#else
3276	ldrd	r4, r5, [r0, #8]
3277#endif
3278	lsrs	r6, r4, #14
3279	lsrs	r7, r5, #14
3280	orr	r7, r7, r4, lsl #18
3281	orr	r6, r6, r5, lsl #18
3282	lsrs	r8, r4, #18
3283	lsrs	r9, r5, #18
3284	orr	r9, r9, r4, lsl #14
3285	orr	r8, r8, r5, lsl #14
3286	eor	r6, r6, r8
3287	eor	r7, r7, r9
3288	lsls	r8, r4, #23
3289	lsls	r9, r5, #23
3290	orr	r9, r9, r4, lsr #9
3291	orr	r8, r8, r5, lsr #9
3292#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3293	ldr	r4, [r0, #32]
3294	ldr	r5, [r0, #36]
3295#else
3296	ldrd	r4, r5, [r0, #32]
3297#endif
3298	eor	r6, r6, r8
3299	eor	r7, r7, r9
3300	adds	r4, r4, r6
3301	adc	r5, r5, r7
3302#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3303	str	r4, [r0, #32]
3304	str	r5, [r0, #36]
3305#else
3306	strd	r4, r5, [r0, #32]
3307#endif
3308#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3309	ldr	r4, [r0, #8]
3310	ldr	r5, [r0, #12]
3311#else
3312	ldrd	r4, r5, [r0, #8]
3313#endif
3314#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3315	ldr	r6, [r0, #16]
3316	ldr	r7, [r0, #20]
3317#else
3318	ldrd	r6, r7, [r0, #16]
3319#endif
3320#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3321	ldr	r8, [r0, #24]
3322	ldr	r9, [r0, #28]
3323#else
3324	ldrd	r8, r9, [r0, #24]
3325#endif
3326	eor	r6, r6, r8
3327	eor	r7, r7, r9
3328	and	r6, r6, r4
3329	and	r7, r7, r5
3330	eor	r6, r6, r8
3331	eor	r7, r7, r9
3332#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3333	ldr	r4, [r0, #32]
3334	ldr	r5, [r0, #36]
3335#else
3336	ldrd	r4, r5, [r0, #32]
3337#endif
3338#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3339	ldr	r8, [sp, #88]
3340	ldr	r9, [sp, #92]
3341#else
3342	ldrd	r8, r9, [sp, #88]
3343#endif
3344	adds	r4, r4, r6
3345	adc	r5, r5, r7
3346#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3347	ldr	r6, [r3, #88]
3348	ldr	r7, [r3, #92]
3349#else
3350	ldrd	r6, r7, [r3, #88]
3351#endif
3352	adds	r4, r4, r8
3353	adc	r5, r5, r9
3354#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3355	ldm	r0, {r8, r9}
3356#else
3357	ldrd	r8, r9, [r0]
3358#endif
3359	adds	r4, r4, r6
3360	adc	r5, r5, r7
3361#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3362	str	r4, [r0, #32]
3363	str	r5, [r0, #36]
3364#else
3365	strd	r4, r5, [r0, #32]
3366#endif
3367	adds	r8, r8, r4
3368	adc	r9, r9, r5
3369#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3370	ldr	r4, [r0, #40]
3371	ldr	r5, [r0, #44]
3372#else
3373	ldrd	r4, r5, [r0, #40]
3374#endif
3375#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3376	stm	r0, {r8, r9}
3377#else
3378	strd	r8, r9, [r0]
3379#endif
3380	lsrs	r6, r4, #28
3381	lsrs	r7, r5, #28
3382	orr	r7, r7, r4, lsl #4
3383	orr	r6, r6, r5, lsl #4
3384	lsls	r8, r4, #30
3385	lsls	r9, r5, #30
3386	orr	r9, r9, r4, lsr #2
3387	orr	r8, r8, r5, lsr #2
3388	eor	r6, r6, r8
3389	eor	r7, r7, r9
3390	lsls	r8, r4, #25
3391	lsls	r9, r5, #25
3392	orr	r9, r9, r4, lsr #7
3393	orr	r8, r8, r5, lsr #7
3394#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3395	ldr	r4, [r0, #32]
3396	ldr	r5, [r0, #36]
3397#else
3398	ldrd	r4, r5, [r0, #32]
3399#endif
3400	eor	r6, r6, r8
3401	eor	r7, r7, r9
3402	adds	r4, r4, r6
3403	adc	r5, r5, r7
3404#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3405	ldr	r8, [r0, #40]
3406	ldr	r9, [r0, #44]
3407#else
3408	ldrd	r8, r9, [r0, #40]
3409#endif
3410#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3411	ldr	r6, [r0, #48]
3412	ldr	r7, [r0, #52]
3413#else
3414	ldrd	r6, r7, [r0, #48]
3415#endif
3416#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3417	str	r4, [r0, #32]
3418	str	r5, [r0, #36]
3419#else
3420	strd	r4, r5, [r0, #32]
3421#endif
3422	eor	r8, r8, r6
3423	eor	r9, r9, r7
3424	and	r10, r10, r8
3425	and	r11, r11, r9
3426	eor	r10, r10, r6
3427	eor	r11, r11, r7
3428#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3429	ldr	r6, [r0, #32]
3430	ldr	r7, [r0, #36]
3431#else
3432	ldrd	r6, r7, [r0, #32]
3433#endif
3434	adds	r6, r6, r10
3435	adc	r7, r7, r11
3436#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3437	str	r6, [r0, #32]
3438	str	r7, [r0, #36]
3439#else
3440	strd	r6, r7, [r0, #32]
3441#endif
3442	mov	r10, r8
3443	mov	r11, r9
3444	# Calc new W[11]
3445#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3446	ldr	r4, [sp, #72]
3447	ldr	r5, [sp, #76]
3448#else
3449	ldrd	r4, r5, [sp, #72]
3450#endif
3451	lsrs	r6, r4, #19
3452	lsrs	r7, r5, #19
3453	orr	r7, r7, r4, lsl #13
3454	orr	r6, r6, r5, lsl #13
3455	lsls	r8, r4, #3
3456	lsls	r9, r5, #3
3457	orr	r9, r9, r4, lsr #29
3458	orr	r8, r8, r5, lsr #29
3459	eor	r7, r7, r9
3460	eor	r6, r6, r8
3461	lsrs	r8, r4, #6
3462	lsrs	r9, r5, #6
3463	orr	r8, r8, r5, lsl #26
3464	eor	r7, r7, r9
3465	eor	r6, r6, r8
3466#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3467	ldr	r4, [sp, #88]
3468	ldr	r5, [sp, #92]
3469#else
3470	ldrd	r4, r5, [sp, #88]
3471#endif
3472#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3473	ldr	r8, [sp, #32]
3474	ldr	r9, [sp, #36]
3475#else
3476	ldrd	r8, r9, [sp, #32]
3477#endif
3478	adds	r4, r4, r6
3479	adc	r5, r5, r7
3480	adds	r4, r4, r8
3481	adc	r5, r5, r9
3482#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3483	str	r4, [sp, #88]
3484	str	r5, [sp, #92]
3485#else
3486	strd	r4, r5, [sp, #88]
3487#endif
3488#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3489	ldr	r4, [sp, #96]
3490	ldr	r5, [sp, #100]
3491#else
3492	ldrd	r4, r5, [sp, #96]
3493#endif
3494	lsrs	r6, r4, #1
3495	lsrs	r7, r5, #1
3496	orr	r7, r7, r4, lsl #31
3497	orr	r6, r6, r5, lsl #31
3498	lsrs	r8, r4, #8
3499	lsrs	r9, r5, #8
3500	orr	r9, r9, r4, lsl #24
3501	orr	r8, r8, r5, lsl #24
3502	eor	r7, r7, r9
3503	eor	r6, r6, r8
3504	lsrs	r8, r4, #7
3505	lsrs	r9, r5, #7
3506	orr	r8, r8, r5, lsl #25
3507	eor	r7, r7, r9
3508	eor	r6, r6, r8
3509#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3510	ldr	r4, [sp, #88]
3511	ldr	r5, [sp, #92]
3512#else
3513	ldrd	r4, r5, [sp, #88]
3514#endif
3515	adds	r4, r4, r6
3516	adc	r5, r5, r7
3517#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3518	str	r4, [sp, #88]
3519	str	r5, [sp, #92]
3520#else
3521	strd	r4, r5, [sp, #88]
3522#endif
3523	# Round 12
3524#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3525	ldm	r0, {r4, r5}
3526#else
3527	ldrd	r4, r5, [r0]
3528#endif
3529	lsrs	r6, r4, #14
3530	lsrs	r7, r5, #14
3531	orr	r7, r7, r4, lsl #18
3532	orr	r6, r6, r5, lsl #18
3533	lsrs	r8, r4, #18
3534	lsrs	r9, r5, #18
3535	orr	r9, r9, r4, lsl #14
3536	orr	r8, r8, r5, lsl #14
3537	eor	r6, r6, r8
3538	eor	r7, r7, r9
3539	lsls	r8, r4, #23
3540	lsls	r9, r5, #23
3541	orr	r9, r9, r4, lsr #9
3542	orr	r8, r8, r5, lsr #9
3543#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3544	ldr	r4, [r0, #24]
3545	ldr	r5, [r0, #28]
3546#else
3547	ldrd	r4, r5, [r0, #24]
3548#endif
3549	eor	r6, r6, r8
3550	eor	r7, r7, r9
3551	adds	r4, r4, r6
3552	adc	r5, r5, r7
3553#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3554	str	r4, [r0, #24]
3555	str	r5, [r0, #28]
3556#else
3557	strd	r4, r5, [r0, #24]
3558#endif
3559#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3560	ldm	r0, {r4, r5}
3561#else
3562	ldrd	r4, r5, [r0]
3563#endif
3564#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3565	ldr	r6, [r0, #8]
3566	ldr	r7, [r0, #12]
3567#else
3568	ldrd	r6, r7, [r0, #8]
3569#endif
3570#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3571	ldr	r8, [r0, #16]
3572	ldr	r9, [r0, #20]
3573#else
3574	ldrd	r8, r9, [r0, #16]
3575#endif
3576	eor	r6, r6, r8
3577	eor	r7, r7, r9
3578	and	r6, r6, r4
3579	and	r7, r7, r5
3580	eor	r6, r6, r8
3581	eor	r7, r7, r9
3582#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3583	ldr	r4, [r0, #24]
3584	ldr	r5, [r0, #28]
3585#else
3586	ldrd	r4, r5, [r0, #24]
3587#endif
3588#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3589	ldr	r8, [sp, #96]
3590	ldr	r9, [sp, #100]
3591#else
3592	ldrd	r8, r9, [sp, #96]
3593#endif
3594	adds	r4, r4, r6
3595	adc	r5, r5, r7
3596#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3597	ldr	r6, [r3, #96]
3598	ldr	r7, [r3, #100]
3599#else
3600	ldrd	r6, r7, [r3, #96]
3601#endif
3602	adds	r4, r4, r8
3603	adc	r5, r5, r9
3604#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3605	ldr	r8, [r0, #56]
3606	ldr	r9, [r0, #60]
3607#else
3608	ldrd	r8, r9, [r0, #56]
3609#endif
3610	adds	r4, r4, r6
3611	adc	r5, r5, r7
3612#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3613	str	r4, [r0, #24]
3614	str	r5, [r0, #28]
3615#else
3616	strd	r4, r5, [r0, #24]
3617#endif
3618	adds	r8, r8, r4
3619	adc	r9, r9, r5
3620#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3621	ldr	r4, [r0, #32]
3622	ldr	r5, [r0, #36]
3623#else
3624	ldrd	r4, r5, [r0, #32]
3625#endif
3626#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3627	str	r8, [r0, #56]
3628	str	r9, [r0, #60]
3629#else
3630	strd	r8, r9, [r0, #56]
3631#endif
3632	lsrs	r6, r4, #28
3633	lsrs	r7, r5, #28
3634	orr	r7, r7, r4, lsl #4
3635	orr	r6, r6, r5, lsl #4
3636	lsls	r8, r4, #30
3637	lsls	r9, r5, #30
3638	orr	r9, r9, r4, lsr #2
3639	orr	r8, r8, r5, lsr #2
3640	eor	r6, r6, r8
3641	eor	r7, r7, r9
3642	lsls	r8, r4, #25
3643	lsls	r9, r5, #25
3644	orr	r9, r9, r4, lsr #7
3645	orr	r8, r8, r5, lsr #7
3646#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3647	ldr	r4, [r0, #24]
3648	ldr	r5, [r0, #28]
3649#else
3650	ldrd	r4, r5, [r0, #24]
3651#endif
3652	eor	r6, r6, r8
3653	eor	r7, r7, r9
3654	adds	r4, r4, r6
3655	adc	r5, r5, r7
3656#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3657	ldr	r8, [r0, #32]
3658	ldr	r9, [r0, #36]
3659#else
3660	ldrd	r8, r9, [r0, #32]
3661#endif
3662#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3663	ldr	r6, [r0, #40]
3664	ldr	r7, [r0, #44]
3665#else
3666	ldrd	r6, r7, [r0, #40]
3667#endif
3668#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3669	str	r4, [r0, #24]
3670	str	r5, [r0, #28]
3671#else
3672	strd	r4, r5, [r0, #24]
3673#endif
3674	eor	r8, r8, r6
3675	eor	r9, r9, r7
3676	and	r10, r10, r8
3677	and	r11, r11, r9
3678	eor	r10, r10, r6
3679	eor	r11, r11, r7
3680#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3681	ldr	r6, [r0, #24]
3682	ldr	r7, [r0, #28]
3683#else
3684	ldrd	r6, r7, [r0, #24]
3685#endif
3686	adds	r6, r6, r10
3687	adc	r7, r7, r11
3688#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3689	str	r6, [r0, #24]
3690	str	r7, [r0, #28]
3691#else
3692	strd	r6, r7, [r0, #24]
3693#endif
3694	mov	r10, r8
3695	mov	r11, r9
3696	# Calc new W[12]
3697#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3698	ldr	r4, [sp, #80]
3699	ldr	r5, [sp, #84]
3700#else
3701	ldrd	r4, r5, [sp, #80]
3702#endif
3703	lsrs	r6, r4, #19
3704	lsrs	r7, r5, #19
3705	orr	r7, r7, r4, lsl #13
3706	orr	r6, r6, r5, lsl #13
3707	lsls	r8, r4, #3
3708	lsls	r9, r5, #3
3709	orr	r9, r9, r4, lsr #29
3710	orr	r8, r8, r5, lsr #29
3711	eor	r7, r7, r9
3712	eor	r6, r6, r8
3713	lsrs	r8, r4, #6
3714	lsrs	r9, r5, #6
3715	orr	r8, r8, r5, lsl #26
3716	eor	r7, r7, r9
3717	eor	r6, r6, r8
3718#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3719	ldr	r4, [sp, #96]
3720	ldr	r5, [sp, #100]
3721#else
3722	ldrd	r4, r5, [sp, #96]
3723#endif
3724#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3725	ldr	r8, [sp, #40]
3726	ldr	r9, [sp, #44]
3727#else
3728	ldrd	r8, r9, [sp, #40]
3729#endif
3730	adds	r4, r4, r6
3731	adc	r5, r5, r7
3732	adds	r4, r4, r8
3733	adc	r5, r5, r9
3734#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3735	str	r4, [sp, #96]
3736	str	r5, [sp, #100]
3737#else
3738	strd	r4, r5, [sp, #96]
3739#endif
3740#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3741	ldr	r4, [sp, #104]
3742	ldr	r5, [sp, #108]
3743#else
3744	ldrd	r4, r5, [sp, #104]
3745#endif
3746	lsrs	r6, r4, #1
3747	lsrs	r7, r5, #1
3748	orr	r7, r7, r4, lsl #31
3749	orr	r6, r6, r5, lsl #31
3750	lsrs	r8, r4, #8
3751	lsrs	r9, r5, #8
3752	orr	r9, r9, r4, lsl #24
3753	orr	r8, r8, r5, lsl #24
3754	eor	r7, r7, r9
3755	eor	r6, r6, r8
3756	lsrs	r8, r4, #7
3757	lsrs	r9, r5, #7
3758	orr	r8, r8, r5, lsl #25
3759	eor	r7, r7, r9
3760	eor	r6, r6, r8
3761#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3762	ldr	r4, [sp, #96]
3763	ldr	r5, [sp, #100]
3764#else
3765	ldrd	r4, r5, [sp, #96]
3766#endif
3767	adds	r4, r4, r6
3768	adc	r5, r5, r7
3769#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3770	str	r4, [sp, #96]
3771	str	r5, [sp, #100]
3772#else
3773	strd	r4, r5, [sp, #96]
3774#endif
3775	# Round 13
3776#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3777	ldr	r4, [r0, #56]
3778	ldr	r5, [r0, #60]
3779#else
3780	ldrd	r4, r5, [r0, #56]
3781#endif
3782	lsrs	r6, r4, #14
3783	lsrs	r7, r5, #14
3784	orr	r7, r7, r4, lsl #18
3785	orr	r6, r6, r5, lsl #18
3786	lsrs	r8, r4, #18
3787	lsrs	r9, r5, #18
3788	orr	r9, r9, r4, lsl #14
3789	orr	r8, r8, r5, lsl #14
3790	eor	r6, r6, r8
3791	eor	r7, r7, r9
3792	lsls	r8, r4, #23
3793	lsls	r9, r5, #23
3794	orr	r9, r9, r4, lsr #9
3795	orr	r8, r8, r5, lsr #9
3796#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3797	ldr	r4, [r0, #16]
3798	ldr	r5, [r0, #20]
3799#else
3800	ldrd	r4, r5, [r0, #16]
3801#endif
3802	eor	r6, r6, r8
3803	eor	r7, r7, r9
3804	adds	r4, r4, r6
3805	adc	r5, r5, r7
3806#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3807	str	r4, [r0, #16]
3808	str	r5, [r0, #20]
3809#else
3810	strd	r4, r5, [r0, #16]
3811#endif
3812#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3813	ldr	r4, [r0, #56]
3814	ldr	r5, [r0, #60]
3815#else
3816	ldrd	r4, r5, [r0, #56]
3817#endif
3818#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3819	ldm	r0, {r6, r7}
3820#else
3821	ldrd	r6, r7, [r0]
3822#endif
3823#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3824	ldr	r8, [r0, #8]
3825	ldr	r9, [r0, #12]
3826#else
3827	ldrd	r8, r9, [r0, #8]
3828#endif
3829	eor	r6, r6, r8
3830	eor	r7, r7, r9
3831	and	r6, r6, r4
3832	and	r7, r7, r5
3833	eor	r6, r6, r8
3834	eor	r7, r7, r9
3835#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3836	ldr	r4, [r0, #16]
3837	ldr	r5, [r0, #20]
3838#else
3839	ldrd	r4, r5, [r0, #16]
3840#endif
3841#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3842	ldr	r8, [sp, #104]
3843	ldr	r9, [sp, #108]
3844#else
3845	ldrd	r8, r9, [sp, #104]
3846#endif
3847	adds	r4, r4, r6
3848	adc	r5, r5, r7
3849#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3850	ldr	r6, [r3, #104]
3851	ldr	r7, [r3, #108]
3852#else
3853	ldrd	r6, r7, [r3, #104]
3854#endif
3855	adds	r4, r4, r8
3856	adc	r5, r5, r9
3857#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3858	ldr	r8, [r0, #48]
3859	ldr	r9, [r0, #52]
3860#else
3861	ldrd	r8, r9, [r0, #48]
3862#endif
3863	adds	r4, r4, r6
3864	adc	r5, r5, r7
3865#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3866	str	r4, [r0, #16]
3867	str	r5, [r0, #20]
3868#else
3869	strd	r4, r5, [r0, #16]
3870#endif
3871	adds	r8, r8, r4
3872	adc	r9, r9, r5
3873#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3874	ldr	r4, [r0, #24]
3875	ldr	r5, [r0, #28]
3876#else
3877	ldrd	r4, r5, [r0, #24]
3878#endif
3879#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3880	str	r8, [r0, #48]
3881	str	r9, [r0, #52]
3882#else
3883	strd	r8, r9, [r0, #48]
3884#endif
3885	lsrs	r6, r4, #28
3886	lsrs	r7, r5, #28
3887	orr	r7, r7, r4, lsl #4
3888	orr	r6, r6, r5, lsl #4
3889	lsls	r8, r4, #30
3890	lsls	r9, r5, #30
3891	orr	r9, r9, r4, lsr #2
3892	orr	r8, r8, r5, lsr #2
3893	eor	r6, r6, r8
3894	eor	r7, r7, r9
3895	lsls	r8, r4, #25
3896	lsls	r9, r5, #25
3897	orr	r9, r9, r4, lsr #7
3898	orr	r8, r8, r5, lsr #7
3899#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3900	ldr	r4, [r0, #16]
3901	ldr	r5, [r0, #20]
3902#else
3903	ldrd	r4, r5, [r0, #16]
3904#endif
3905	eor	r6, r6, r8
3906	eor	r7, r7, r9
3907	adds	r4, r4, r6
3908	adc	r5, r5, r7
3909#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3910	ldr	r8, [r0, #24]
3911	ldr	r9, [r0, #28]
3912#else
3913	ldrd	r8, r9, [r0, #24]
3914#endif
3915#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3916	ldr	r6, [r0, #32]
3917	ldr	r7, [r0, #36]
3918#else
3919	ldrd	r6, r7, [r0, #32]
3920#endif
3921#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3922	str	r4, [r0, #16]
3923	str	r5, [r0, #20]
3924#else
3925	strd	r4, r5, [r0, #16]
3926#endif
3927	eor	r8, r8, r6
3928	eor	r9, r9, r7
3929	and	r10, r10, r8
3930	and	r11, r11, r9
3931	eor	r10, r10, r6
3932	eor	r11, r11, r7
3933#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3934	ldr	r6, [r0, #16]
3935	ldr	r7, [r0, #20]
3936#else
3937	ldrd	r6, r7, [r0, #16]
3938#endif
3939	adds	r6, r6, r10
3940	adc	r7, r7, r11
3941#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3942	str	r6, [r0, #16]
3943	str	r7, [r0, #20]
3944#else
3945	strd	r6, r7, [r0, #16]
3946#endif
3947	mov	r10, r8
3948	mov	r11, r9
3949	# Calc new W[13]
3950#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3951	ldr	r4, [sp, #88]
3952	ldr	r5, [sp, #92]
3953#else
3954	ldrd	r4, r5, [sp, #88]
3955#endif
3956	lsrs	r6, r4, #19
3957	lsrs	r7, r5, #19
3958	orr	r7, r7, r4, lsl #13
3959	orr	r6, r6, r5, lsl #13
3960	lsls	r8, r4, #3
3961	lsls	r9, r5, #3
3962	orr	r9, r9, r4, lsr #29
3963	orr	r8, r8, r5, lsr #29
3964	eor	r7, r7, r9
3965	eor	r6, r6, r8
3966	lsrs	r8, r4, #6
3967	lsrs	r9, r5, #6
3968	orr	r8, r8, r5, lsl #26
3969	eor	r7, r7, r9
3970	eor	r6, r6, r8
3971#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3972	ldr	r4, [sp, #104]
3973	ldr	r5, [sp, #108]
3974#else
3975	ldrd	r4, r5, [sp, #104]
3976#endif
3977#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3978	ldr	r8, [sp, #48]
3979	ldr	r9, [sp, #52]
3980#else
3981	ldrd	r8, r9, [sp, #48]
3982#endif
3983	adds	r4, r4, r6
3984	adc	r5, r5, r7
3985	adds	r4, r4, r8
3986	adc	r5, r5, r9
3987#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3988	str	r4, [sp, #104]
3989	str	r5, [sp, #108]
3990#else
3991	strd	r4, r5, [sp, #104]
3992#endif
3993#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
3994	ldr	r4, [sp, #112]
3995	ldr	r5, [sp, #116]
3996#else
3997	ldrd	r4, r5, [sp, #112]
3998#endif
3999	lsrs	r6, r4, #1
4000	lsrs	r7, r5, #1
4001	orr	r7, r7, r4, lsl #31
4002	orr	r6, r6, r5, lsl #31
4003	lsrs	r8, r4, #8
4004	lsrs	r9, r5, #8
4005	orr	r9, r9, r4, lsl #24
4006	orr	r8, r8, r5, lsl #24
4007	eor	r7, r7, r9
4008	eor	r6, r6, r8
4009	lsrs	r8, r4, #7
4010	lsrs	r9, r5, #7
4011	orr	r8, r8, r5, lsl #25
4012	eor	r7, r7, r9
4013	eor	r6, r6, r8
4014#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4015	ldr	r4, [sp, #104]
4016	ldr	r5, [sp, #108]
4017#else
4018	ldrd	r4, r5, [sp, #104]
4019#endif
4020	adds	r4, r4, r6
4021	adc	r5, r5, r7
4022#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4023	str	r4, [sp, #104]
4024	str	r5, [sp, #108]
4025#else
4026	strd	r4, r5, [sp, #104]
4027#endif
4028	# Round 14
4029#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4030	ldr	r4, [r0, #48]
4031	ldr	r5, [r0, #52]
4032#else
4033	ldrd	r4, r5, [r0, #48]
4034#endif
4035	lsrs	r6, r4, #14
4036	lsrs	r7, r5, #14
4037	orr	r7, r7, r4, lsl #18
4038	orr	r6, r6, r5, lsl #18
4039	lsrs	r8, r4, #18
4040	lsrs	r9, r5, #18
4041	orr	r9, r9, r4, lsl #14
4042	orr	r8, r8, r5, lsl #14
4043	eor	r6, r6, r8
4044	eor	r7, r7, r9
4045	lsls	r8, r4, #23
4046	lsls	r9, r5, #23
4047	orr	r9, r9, r4, lsr #9
4048	orr	r8, r8, r5, lsr #9
4049#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4050	ldr	r4, [r0, #8]
4051	ldr	r5, [r0, #12]
4052#else
4053	ldrd	r4, r5, [r0, #8]
4054#endif
4055	eor	r6, r6, r8
4056	eor	r7, r7, r9
4057	adds	r4, r4, r6
4058	adc	r5, r5, r7
4059#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4060	str	r4, [r0, #8]
4061	str	r5, [r0, #12]
4062#else
4063	strd	r4, r5, [r0, #8]
4064#endif
4065#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4066	ldr	r4, [r0, #48]
4067	ldr	r5, [r0, #52]
4068#else
4069	ldrd	r4, r5, [r0, #48]
4070#endif
4071#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4072	ldr	r6, [r0, #56]
4073	ldr	r7, [r0, #60]
4074#else
4075	ldrd	r6, r7, [r0, #56]
4076#endif
4077#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4078	ldm	r0, {r8, r9}
4079#else
4080	ldrd	r8, r9, [r0]
4081#endif
4082	eor	r6, r6, r8
4083	eor	r7, r7, r9
4084	and	r6, r6, r4
4085	and	r7, r7, r5
4086	eor	r6, r6, r8
4087	eor	r7, r7, r9
4088#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4089	ldr	r4, [r0, #8]
4090	ldr	r5, [r0, #12]
4091#else
4092	ldrd	r4, r5, [r0, #8]
4093#endif
4094#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4095	ldr	r8, [sp, #112]
4096	ldr	r9, [sp, #116]
4097#else
4098	ldrd	r8, r9, [sp, #112]
4099#endif
4100	adds	r4, r4, r6
4101	adc	r5, r5, r7
4102#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4103	ldr	r6, [r3, #112]
4104	ldr	r7, [r3, #116]
4105#else
4106	ldrd	r6, r7, [r3, #112]
4107#endif
4108	adds	r4, r4, r8
4109	adc	r5, r5, r9
4110#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4111	ldr	r8, [r0, #40]
4112	ldr	r9, [r0, #44]
4113#else
4114	ldrd	r8, r9, [r0, #40]
4115#endif
4116	adds	r4, r4, r6
4117	adc	r5, r5, r7
4118#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4119	str	r4, [r0, #8]
4120	str	r5, [r0, #12]
4121#else
4122	strd	r4, r5, [r0, #8]
4123#endif
4124	adds	r8, r8, r4
4125	adc	r9, r9, r5
4126#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4127	ldr	r4, [r0, #16]
4128	ldr	r5, [r0, #20]
4129#else
4130	ldrd	r4, r5, [r0, #16]
4131#endif
4132#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4133	str	r8, [r0, #40]
4134	str	r9, [r0, #44]
4135#else
4136	strd	r8, r9, [r0, #40]
4137#endif
4138	lsrs	r6, r4, #28
4139	lsrs	r7, r5, #28
4140	orr	r7, r7, r4, lsl #4
4141	orr	r6, r6, r5, lsl #4
4142	lsls	r8, r4, #30
4143	lsls	r9, r5, #30
4144	orr	r9, r9, r4, lsr #2
4145	orr	r8, r8, r5, lsr #2
4146	eor	r6, r6, r8
4147	eor	r7, r7, r9
4148	lsls	r8, r4, #25
4149	lsls	r9, r5, #25
4150	orr	r9, r9, r4, lsr #7
4151	orr	r8, r8, r5, lsr #7
4152#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4153	ldr	r4, [r0, #8]
4154	ldr	r5, [r0, #12]
4155#else
4156	ldrd	r4, r5, [r0, #8]
4157#endif
4158	eor	r6, r6, r8
4159	eor	r7, r7, r9
4160	adds	r4, r4, r6
4161	adc	r5, r5, r7
4162#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4163	ldr	r8, [r0, #16]
4164	ldr	r9, [r0, #20]
4165#else
4166	ldrd	r8, r9, [r0, #16]
4167#endif
4168#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4169	ldr	r6, [r0, #24]
4170	ldr	r7, [r0, #28]
4171#else
4172	ldrd	r6, r7, [r0, #24]
4173#endif
4174#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4175	str	r4, [r0, #8]
4176	str	r5, [r0, #12]
4177#else
4178	strd	r4, r5, [r0, #8]
4179#endif
4180	eor	r8, r8, r6
4181	eor	r9, r9, r7
4182	and	r10, r10, r8
4183	and	r11, r11, r9
4184	eor	r10, r10, r6
4185	eor	r11, r11, r7
4186#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4187	ldr	r6, [r0, #8]
4188	ldr	r7, [r0, #12]
4189#else
4190	ldrd	r6, r7, [r0, #8]
4191#endif
4192	adds	r6, r6, r10
4193	adc	r7, r7, r11
4194#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4195	str	r6, [r0, #8]
4196	str	r7, [r0, #12]
4197#else
4198	strd	r6, r7, [r0, #8]
4199#endif
4200	mov	r10, r8
4201	mov	r11, r9
4202	# Calc new W[14]
4203#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4204	ldr	r4, [sp, #96]
4205	ldr	r5, [sp, #100]
4206#else
4207	ldrd	r4, r5, [sp, #96]
4208#endif
4209	lsrs	r6, r4, #19
4210	lsrs	r7, r5, #19
4211	orr	r7, r7, r4, lsl #13
4212	orr	r6, r6, r5, lsl #13
4213	lsls	r8, r4, #3
4214	lsls	r9, r5, #3
4215	orr	r9, r9, r4, lsr #29
4216	orr	r8, r8, r5, lsr #29
4217	eor	r7, r7, r9
4218	eor	r6, r6, r8
4219	lsrs	r8, r4, #6
4220	lsrs	r9, r5, #6
4221	orr	r8, r8, r5, lsl #26
4222	eor	r7, r7, r9
4223	eor	r6, r6, r8
4224#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4225	ldr	r4, [sp, #112]
4226	ldr	r5, [sp, #116]
4227#else
4228	ldrd	r4, r5, [sp, #112]
4229#endif
4230#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4231	ldr	r8, [sp, #56]
4232	ldr	r9, [sp, #60]
4233#else
4234	ldrd	r8, r9, [sp, #56]
4235#endif
4236	adds	r4, r4, r6
4237	adc	r5, r5, r7
4238	adds	r4, r4, r8
4239	adc	r5, r5, r9
4240#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4241	str	r4, [sp, #112]
4242	str	r5, [sp, #116]
4243#else
4244	strd	r4, r5, [sp, #112]
4245#endif
4246#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4247	ldr	r4, [sp, #120]
4248	ldr	r5, [sp, #124]
4249#else
4250	ldrd	r4, r5, [sp, #120]
4251#endif
4252	lsrs	r6, r4, #1
4253	lsrs	r7, r5, #1
4254	orr	r7, r7, r4, lsl #31
4255	orr	r6, r6, r5, lsl #31
4256	lsrs	r8, r4, #8
4257	lsrs	r9, r5, #8
4258	orr	r9, r9, r4, lsl #24
4259	orr	r8, r8, r5, lsl #24
4260	eor	r7, r7, r9
4261	eor	r6, r6, r8
4262	lsrs	r8, r4, #7
4263	lsrs	r9, r5, #7
4264	orr	r8, r8, r5, lsl #25
4265	eor	r7, r7, r9
4266	eor	r6, r6, r8
4267#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4268	ldr	r4, [sp, #112]
4269	ldr	r5, [sp, #116]
4270#else
4271	ldrd	r4, r5, [sp, #112]
4272#endif
4273	adds	r4, r4, r6
4274	adc	r5, r5, r7
4275#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4276	str	r4, [sp, #112]
4277	str	r5, [sp, #116]
4278#else
4279	strd	r4, r5, [sp, #112]
4280#endif
4281	# Round 15
4282#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4283	ldr	r4, [r0, #40]
4284	ldr	r5, [r0, #44]
4285#else
4286	ldrd	r4, r5, [r0, #40]
4287#endif
4288	lsrs	r6, r4, #14
4289	lsrs	r7, r5, #14
4290	orr	r7, r7, r4, lsl #18
4291	orr	r6, r6, r5, lsl #18
4292	lsrs	r8, r4, #18
4293	lsrs	r9, r5, #18
4294	orr	r9, r9, r4, lsl #14
4295	orr	r8, r8, r5, lsl #14
4296	eor	r6, r6, r8
4297	eor	r7, r7, r9
4298	lsls	r8, r4, #23
4299	lsls	r9, r5, #23
4300	orr	r9, r9, r4, lsr #9
4301	orr	r8, r8, r5, lsr #9
4302#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4303	ldm	r0, {r4, r5}
4304#else
4305	ldrd	r4, r5, [r0]
4306#endif
4307	eor	r6, r6, r8
4308	eor	r7, r7, r9
4309	adds	r4, r4, r6
4310	adc	r5, r5, r7
4311#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4312	stm	r0, {r4, r5}
4313#else
4314	strd	r4, r5, [r0]
4315#endif
4316#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4317	ldr	r4, [r0, #40]
4318	ldr	r5, [r0, #44]
4319#else
4320	ldrd	r4, r5, [r0, #40]
4321#endif
4322#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4323	ldr	r6, [r0, #48]
4324	ldr	r7, [r0, #52]
4325#else
4326	ldrd	r6, r7, [r0, #48]
4327#endif
4328#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4329	ldr	r8, [r0, #56]
4330	ldr	r9, [r0, #60]
4331#else
4332	ldrd	r8, r9, [r0, #56]
4333#endif
4334	eor	r6, r6, r8
4335	eor	r7, r7, r9
4336	and	r6, r6, r4
4337	and	r7, r7, r5
4338	eor	r6, r6, r8
4339	eor	r7, r7, r9
4340#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4341	ldm	r0, {r4, r5}
4342#else
4343	ldrd	r4, r5, [r0]
4344#endif
4345#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4346	ldr	r8, [sp, #120]
4347	ldr	r9, [sp, #124]
4348#else
4349	ldrd	r8, r9, [sp, #120]
4350#endif
4351	adds	r4, r4, r6
4352	adc	r5, r5, r7
4353#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4354	ldr	r6, [r3, #120]
4355	ldr	r7, [r3, #124]
4356#else
4357	ldrd	r6, r7, [r3, #120]
4358#endif
4359	adds	r4, r4, r8
4360	adc	r5, r5, r9
4361#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4362	ldr	r8, [r0, #32]
4363	ldr	r9, [r0, #36]
4364#else
4365	ldrd	r8, r9, [r0, #32]
4366#endif
4367	adds	r4, r4, r6
4368	adc	r5, r5, r7
4369#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4370	stm	r0, {r4, r5}
4371#else
4372	strd	r4, r5, [r0]
4373#endif
4374	adds	r8, r8, r4
4375	adc	r9, r9, r5
4376#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4377	ldr	r4, [r0, #8]
4378	ldr	r5, [r0, #12]
4379#else
4380	ldrd	r4, r5, [r0, #8]
4381#endif
4382#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4383	str	r8, [r0, #32]
4384	str	r9, [r0, #36]
4385#else
4386	strd	r8, r9, [r0, #32]
4387#endif
4388	lsrs	r6, r4, #28
4389	lsrs	r7, r5, #28
4390	orr	r7, r7, r4, lsl #4
4391	orr	r6, r6, r5, lsl #4
4392	lsls	r8, r4, #30
4393	lsls	r9, r5, #30
4394	orr	r9, r9, r4, lsr #2
4395	orr	r8, r8, r5, lsr #2
4396	eor	r6, r6, r8
4397	eor	r7, r7, r9
4398	lsls	r8, r4, #25
4399	lsls	r9, r5, #25
4400	orr	r9, r9, r4, lsr #7
4401	orr	r8, r8, r5, lsr #7
4402#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4403	ldm	r0, {r4, r5}
4404#else
4405	ldrd	r4, r5, [r0]
4406#endif
4407	eor	r6, r6, r8
4408	eor	r7, r7, r9
4409	adds	r4, r4, r6
4410	adc	r5, r5, r7
4411#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4412	ldr	r8, [r0, #8]
4413	ldr	r9, [r0, #12]
4414#else
4415	ldrd	r8, r9, [r0, #8]
4416#endif
4417#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4418	ldr	r6, [r0, #16]
4419	ldr	r7, [r0, #20]
4420#else
4421	ldrd	r6, r7, [r0, #16]
4422#endif
4423#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4424	stm	r0, {r4, r5}
4425#else
4426	strd	r4, r5, [r0]
4427#endif
4428	eor	r8, r8, r6
4429	eor	r9, r9, r7
4430	and	r10, r10, r8
4431	and	r11, r11, r9
4432	eor	r10, r10, r6
4433	eor	r11, r11, r7
4434#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4435	ldm	r0, {r6, r7}
4436#else
4437	ldrd	r6, r7, [r0]
4438#endif
4439	adds	r6, r6, r10
4440	adc	r7, r7, r11
4441#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4442	stm	r0, {r6, r7}
4443#else
4444	strd	r6, r7, [r0]
4445#endif
4446	mov	r10, r8
4447	mov	r11, r9
4448	# Calc new W[15]
4449#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4450	ldr	r4, [sp, #104]
4451	ldr	r5, [sp, #108]
4452#else
4453	ldrd	r4, r5, [sp, #104]
4454#endif
4455	lsrs	r6, r4, #19
4456	lsrs	r7, r5, #19
4457	orr	r7, r7, r4, lsl #13
4458	orr	r6, r6, r5, lsl #13
4459	lsls	r8, r4, #3
4460	lsls	r9, r5, #3
4461	orr	r9, r9, r4, lsr #29
4462	orr	r8, r8, r5, lsr #29
4463	eor	r7, r7, r9
4464	eor	r6, r6, r8
4465	lsrs	r8, r4, #6
4466	lsrs	r9, r5, #6
4467	orr	r8, r8, r5, lsl #26
4468	eor	r7, r7, r9
4469	eor	r6, r6, r8
4470#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4471	ldr	r4, [sp, #120]
4472	ldr	r5, [sp, #124]
4473#else
4474	ldrd	r4, r5, [sp, #120]
4475#endif
4476#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4477	ldr	r8, [sp, #64]
4478	ldr	r9, [sp, #68]
4479#else
4480	ldrd	r8, r9, [sp, #64]
4481#endif
4482	adds	r4, r4, r6
4483	adc	r5, r5, r7
4484	adds	r4, r4, r8
4485	adc	r5, r5, r9
4486#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4487	str	r4, [sp, #120]
4488	str	r5, [sp, #124]
4489#else
4490	strd	r4, r5, [sp, #120]
4491#endif
4492#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4493	ldm	sp, {r4, r5}
4494#else
4495	ldrd	r4, r5, [sp]
4496#endif
4497	lsrs	r6, r4, #1
4498	lsrs	r7, r5, #1
4499	orr	r7, r7, r4, lsl #31
4500	orr	r6, r6, r5, lsl #31
4501	lsrs	r8, r4, #8
4502	lsrs	r9, r5, #8
4503	orr	r9, r9, r4, lsl #24
4504	orr	r8, r8, r5, lsl #24
4505	eor	r7, r7, r9
4506	eor	r6, r6, r8
4507	lsrs	r8, r4, #7
4508	lsrs	r9, r5, #7
4509	orr	r8, r8, r5, lsl #25
4510	eor	r7, r7, r9
4511	eor	r6, r6, r8
4512#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4513	ldr	r4, [sp, #120]
4514	ldr	r5, [sp, #124]
4515#else
4516	ldrd	r4, r5, [sp, #120]
4517#endif
4518	adds	r4, r4, r6
4519	adc	r5, r5, r7
4520#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4521	str	r4, [sp, #120]
4522	str	r5, [sp, #124]
4523#else
4524	strd	r4, r5, [sp, #120]
4525#endif
4526	add	r3, r3, #0x80
4527	subs	r12, r12, #1
4528	bne	L_SHA512_transform_len_start
4529	# Round 0
4530#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4531	ldr	r4, [r0, #32]
4532	ldr	r5, [r0, #36]
4533#else
4534	ldrd	r4, r5, [r0, #32]
4535#endif
4536	lsrs	r6, r4, #14
4537	lsrs	r7, r5, #14
4538	orr	r7, r7, r4, lsl #18
4539	orr	r6, r6, r5, lsl #18
4540	lsrs	r8, r4, #18
4541	lsrs	r9, r5, #18
4542	orr	r9, r9, r4, lsl #14
4543	orr	r8, r8, r5, lsl #14
4544	eor	r6, r6, r8
4545	eor	r7, r7, r9
4546	lsls	r8, r4, #23
4547	lsls	r9, r5, #23
4548	orr	r9, r9, r4, lsr #9
4549	orr	r8, r8, r5, lsr #9
4550#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4551	ldr	r4, [r0, #56]
4552	ldr	r5, [r0, #60]
4553#else
4554	ldrd	r4, r5, [r0, #56]
4555#endif
4556	eor	r6, r6, r8
4557	eor	r7, r7, r9
4558	adds	r4, r4, r6
4559	adc	r5, r5, r7
4560#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4561	str	r4, [r0, #56]
4562	str	r5, [r0, #60]
4563#else
4564	strd	r4, r5, [r0, #56]
4565#endif
4566#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4567	ldr	r4, [r0, #32]
4568	ldr	r5, [r0, #36]
4569#else
4570	ldrd	r4, r5, [r0, #32]
4571#endif
4572#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4573	ldr	r6, [r0, #40]
4574	ldr	r7, [r0, #44]
4575#else
4576	ldrd	r6, r7, [r0, #40]
4577#endif
4578#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4579	ldr	r8, [r0, #48]
4580	ldr	r9, [r0, #52]
4581#else
4582	ldrd	r8, r9, [r0, #48]
4583#endif
4584	eor	r6, r6, r8
4585	eor	r7, r7, r9
4586	and	r6, r6, r4
4587	and	r7, r7, r5
4588	eor	r6, r6, r8
4589	eor	r7, r7, r9
4590#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4591	ldr	r4, [r0, #56]
4592	ldr	r5, [r0, #60]
4593#else
4594	ldrd	r4, r5, [r0, #56]
4595#endif
4596#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4597	ldm	sp, {r8, r9}
4598#else
4599	ldrd	r8, r9, [sp]
4600#endif
4601	adds	r4, r4, r6
4602	adc	r5, r5, r7
4603#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4604	ldm	r3, {r6, r7}
4605#else
4606	ldrd	r6, r7, [r3]
4607#endif
4608	adds	r4, r4, r8
4609	adc	r5, r5, r9
4610#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4611	ldr	r8, [r0, #24]
4612	ldr	r9, [r0, #28]
4613#else
4614	ldrd	r8, r9, [r0, #24]
4615#endif
4616	adds	r4, r4, r6
4617	adc	r5, r5, r7
4618#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4619	str	r4, [r0, #56]
4620	str	r5, [r0, #60]
4621#else
4622	strd	r4, r5, [r0, #56]
4623#endif
4624	adds	r8, r8, r4
4625	adc	r9, r9, r5
4626#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4627	ldm	r0, {r4, r5}
4628#else
4629	ldrd	r4, r5, [r0]
4630#endif
4631#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4632	str	r8, [r0, #24]
4633	str	r9, [r0, #28]
4634#else
4635	strd	r8, r9, [r0, #24]
4636#endif
4637	lsrs	r6, r4, #28
4638	lsrs	r7, r5, #28
4639	orr	r7, r7, r4, lsl #4
4640	orr	r6, r6, r5, lsl #4
4641	lsls	r8, r4, #30
4642	lsls	r9, r5, #30
4643	orr	r9, r9, r4, lsr #2
4644	orr	r8, r8, r5, lsr #2
4645	eor	r6, r6, r8
4646	eor	r7, r7, r9
4647	lsls	r8, r4, #25
4648	lsls	r9, r5, #25
4649	orr	r9, r9, r4, lsr #7
4650	orr	r8, r8, r5, lsr #7
4651#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4652	ldr	r4, [r0, #56]
4653	ldr	r5, [r0, #60]
4654#else
4655	ldrd	r4, r5, [r0, #56]
4656#endif
4657	eor	r6, r6, r8
4658	eor	r7, r7, r9
4659	adds	r4, r4, r6
4660	adc	r5, r5, r7
4661#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4662	ldm	r0, {r8, r9}
4663#else
4664	ldrd	r8, r9, [r0]
4665#endif
4666#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4667	ldr	r6, [r0, #8]
4668	ldr	r7, [r0, #12]
4669#else
4670	ldrd	r6, r7, [r0, #8]
4671#endif
4672#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4673	str	r4, [r0, #56]
4674	str	r5, [r0, #60]
4675#else
4676	strd	r4, r5, [r0, #56]
4677#endif
4678	eor	r8, r8, r6
4679	eor	r9, r9, r7
4680	and	r10, r10, r8
4681	and	r11, r11, r9
4682	eor	r10, r10, r6
4683	eor	r11, r11, r7
4684#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4685	ldr	r6, [r0, #56]
4686	ldr	r7, [r0, #60]
4687#else
4688	ldrd	r6, r7, [r0, #56]
4689#endif
4690	adds	r6, r6, r10
4691	adc	r7, r7, r11
4692#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4693	str	r6, [r0, #56]
4694	str	r7, [r0, #60]
4695#else
4696	strd	r6, r7, [r0, #56]
4697#endif
4698	mov	r10, r8
4699	mov	r11, r9
4700	# Round 1
4701#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4702	ldr	r4, [r0, #24]
4703	ldr	r5, [r0, #28]
4704#else
4705	ldrd	r4, r5, [r0, #24]
4706#endif
4707	lsrs	r6, r4, #14
4708	lsrs	r7, r5, #14
4709	orr	r7, r7, r4, lsl #18
4710	orr	r6, r6, r5, lsl #18
4711	lsrs	r8, r4, #18
4712	lsrs	r9, r5, #18
4713	orr	r9, r9, r4, lsl #14
4714	orr	r8, r8, r5, lsl #14
4715	eor	r6, r6, r8
4716	eor	r7, r7, r9
4717	lsls	r8, r4, #23
4718	lsls	r9, r5, #23
4719	orr	r9, r9, r4, lsr #9
4720	orr	r8, r8, r5, lsr #9
4721#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4722	ldr	r4, [r0, #48]
4723	ldr	r5, [r0, #52]
4724#else
4725	ldrd	r4, r5, [r0, #48]
4726#endif
4727	eor	r6, r6, r8
4728	eor	r7, r7, r9
4729	adds	r4, r4, r6
4730	adc	r5, r5, r7
4731#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4732	str	r4, [r0, #48]
4733	str	r5, [r0, #52]
4734#else
4735	strd	r4, r5, [r0, #48]
4736#endif
4737#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4738	ldr	r4, [r0, #24]
4739	ldr	r5, [r0, #28]
4740#else
4741	ldrd	r4, r5, [r0, #24]
4742#endif
4743#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4744	ldr	r6, [r0, #32]
4745	ldr	r7, [r0, #36]
4746#else
4747	ldrd	r6, r7, [r0, #32]
4748#endif
4749#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4750	ldr	r8, [r0, #40]
4751	ldr	r9, [r0, #44]
4752#else
4753	ldrd	r8, r9, [r0, #40]
4754#endif
4755	eor	r6, r6, r8
4756	eor	r7, r7, r9
4757	and	r6, r6, r4
4758	and	r7, r7, r5
4759	eor	r6, r6, r8
4760	eor	r7, r7, r9
4761#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4762	ldr	r4, [r0, #48]
4763	ldr	r5, [r0, #52]
4764#else
4765	ldrd	r4, r5, [r0, #48]
4766#endif
4767#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4768	ldr	r8, [sp, #8]
4769	ldr	r9, [sp, #12]
4770#else
4771	ldrd	r8, r9, [sp, #8]
4772#endif
4773	adds	r4, r4, r6
4774	adc	r5, r5, r7
4775#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4776	ldr	r6, [r3, #8]
4777	ldr	r7, [r3, #12]
4778#else
4779	ldrd	r6, r7, [r3, #8]
4780#endif
4781	adds	r4, r4, r8
4782	adc	r5, r5, r9
4783#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4784	ldr	r8, [r0, #16]
4785	ldr	r9, [r0, #20]
4786#else
4787	ldrd	r8, r9, [r0, #16]
4788#endif
4789	adds	r4, r4, r6
4790	adc	r5, r5, r7
4791#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4792	str	r4, [r0, #48]
4793	str	r5, [r0, #52]
4794#else
4795	strd	r4, r5, [r0, #48]
4796#endif
4797	adds	r8, r8, r4
4798	adc	r9, r9, r5
4799#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4800	ldr	r4, [r0, #56]
4801	ldr	r5, [r0, #60]
4802#else
4803	ldrd	r4, r5, [r0, #56]
4804#endif
4805#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4806	str	r8, [r0, #16]
4807	str	r9, [r0, #20]
4808#else
4809	strd	r8, r9, [r0, #16]
4810#endif
4811	lsrs	r6, r4, #28
4812	lsrs	r7, r5, #28
4813	orr	r7, r7, r4, lsl #4
4814	orr	r6, r6, r5, lsl #4
4815	lsls	r8, r4, #30
4816	lsls	r9, r5, #30
4817	orr	r9, r9, r4, lsr #2
4818	orr	r8, r8, r5, lsr #2
4819	eor	r6, r6, r8
4820	eor	r7, r7, r9
4821	lsls	r8, r4, #25
4822	lsls	r9, r5, #25
4823	orr	r9, r9, r4, lsr #7
4824	orr	r8, r8, r5, lsr #7
4825#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4826	ldr	r4, [r0, #48]
4827	ldr	r5, [r0, #52]
4828#else
4829	ldrd	r4, r5, [r0, #48]
4830#endif
4831	eor	r6, r6, r8
4832	eor	r7, r7, r9
4833	adds	r4, r4, r6
4834	adc	r5, r5, r7
4835#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4836	ldr	r8, [r0, #56]
4837	ldr	r9, [r0, #60]
4838#else
4839	ldrd	r8, r9, [r0, #56]
4840#endif
4841#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4842	ldm	r0, {r6, r7}
4843#else
4844	ldrd	r6, r7, [r0]
4845#endif
4846#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4847	str	r4, [r0, #48]
4848	str	r5, [r0, #52]
4849#else
4850	strd	r4, r5, [r0, #48]
4851#endif
4852	eor	r8, r8, r6
4853	eor	r9, r9, r7
4854	and	r10, r10, r8
4855	and	r11, r11, r9
4856	eor	r10, r10, r6
4857	eor	r11, r11, r7
4858#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4859	ldr	r6, [r0, #48]
4860	ldr	r7, [r0, #52]
4861#else
4862	ldrd	r6, r7, [r0, #48]
4863#endif
4864	adds	r6, r6, r10
4865	adc	r7, r7, r11
4866#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4867	str	r6, [r0, #48]
4868	str	r7, [r0, #52]
4869#else
4870	strd	r6, r7, [r0, #48]
4871#endif
4872	mov	r10, r8
4873	mov	r11, r9
4874	# Round 2
4875#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4876	ldr	r4, [r0, #16]
4877	ldr	r5, [r0, #20]
4878#else
4879	ldrd	r4, r5, [r0, #16]
4880#endif
4881	lsrs	r6, r4, #14
4882	lsrs	r7, r5, #14
4883	orr	r7, r7, r4, lsl #18
4884	orr	r6, r6, r5, lsl #18
4885	lsrs	r8, r4, #18
4886	lsrs	r9, r5, #18
4887	orr	r9, r9, r4, lsl #14
4888	orr	r8, r8, r5, lsl #14
4889	eor	r6, r6, r8
4890	eor	r7, r7, r9
4891	lsls	r8, r4, #23
4892	lsls	r9, r5, #23
4893	orr	r9, r9, r4, lsr #9
4894	orr	r8, r8, r5, lsr #9
4895#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4896	ldr	r4, [r0, #40]
4897	ldr	r5, [r0, #44]
4898#else
4899	ldrd	r4, r5, [r0, #40]
4900#endif
4901	eor	r6, r6, r8
4902	eor	r7, r7, r9
4903	adds	r4, r4, r6
4904	adc	r5, r5, r7
4905#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4906	str	r4, [r0, #40]
4907	str	r5, [r0, #44]
4908#else
4909	strd	r4, r5, [r0, #40]
4910#endif
4911#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4912	ldr	r4, [r0, #16]
4913	ldr	r5, [r0, #20]
4914#else
4915	ldrd	r4, r5, [r0, #16]
4916#endif
4917#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4918	ldr	r6, [r0, #24]
4919	ldr	r7, [r0, #28]
4920#else
4921	ldrd	r6, r7, [r0, #24]
4922#endif
4923#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4924	ldr	r8, [r0, #32]
4925	ldr	r9, [r0, #36]
4926#else
4927	ldrd	r8, r9, [r0, #32]
4928#endif
4929	eor	r6, r6, r8
4930	eor	r7, r7, r9
4931	and	r6, r6, r4
4932	and	r7, r7, r5
4933	eor	r6, r6, r8
4934	eor	r7, r7, r9
4935#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4936	ldr	r4, [r0, #40]
4937	ldr	r5, [r0, #44]
4938#else
4939	ldrd	r4, r5, [r0, #40]
4940#endif
4941#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4942	ldr	r8, [sp, #16]
4943	ldr	r9, [sp, #20]
4944#else
4945	ldrd	r8, r9, [sp, #16]
4946#endif
4947	adds	r4, r4, r6
4948	adc	r5, r5, r7
4949#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4950	ldr	r6, [r3, #16]
4951	ldr	r7, [r3, #20]
4952#else
4953	ldrd	r6, r7, [r3, #16]
4954#endif
4955	adds	r4, r4, r8
4956	adc	r5, r5, r9
4957#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4958	ldr	r8, [r0, #8]
4959	ldr	r9, [r0, #12]
4960#else
4961	ldrd	r8, r9, [r0, #8]
4962#endif
4963	adds	r4, r4, r6
4964	adc	r5, r5, r7
4965#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4966	str	r4, [r0, #40]
4967	str	r5, [r0, #44]
4968#else
4969	strd	r4, r5, [r0, #40]
4970#endif
4971	adds	r8, r8, r4
4972	adc	r9, r9, r5
4973#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4974	ldr	r4, [r0, #48]
4975	ldr	r5, [r0, #52]
4976#else
4977	ldrd	r4, r5, [r0, #48]
4978#endif
4979#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
4980	str	r8, [r0, #8]
4981	str	r9, [r0, #12]
4982#else
4983	strd	r8, r9, [r0, #8]
4984#endif
4985	lsrs	r6, r4, #28
4986	lsrs	r7, r5, #28
4987	orr	r7, r7, r4, lsl #4
4988	orr	r6, r6, r5, lsl #4
4989	lsls	r8, r4, #30
4990	lsls	r9, r5, #30
4991	orr	r9, r9, r4, lsr #2
4992	orr	r8, r8, r5, lsr #2
4993	eor	r6, r6, r8
4994	eor	r7, r7, r9
4995	lsls	r8, r4, #25
4996	lsls	r9, r5, #25
4997	orr	r9, r9, r4, lsr #7
4998	orr	r8, r8, r5, lsr #7
4999#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5000	ldr	r4, [r0, #40]
5001	ldr	r5, [r0, #44]
5002#else
5003	ldrd	r4, r5, [r0, #40]
5004#endif
5005	eor	r6, r6, r8
5006	eor	r7, r7, r9
5007	adds	r4, r4, r6
5008	adc	r5, r5, r7
5009#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5010	ldr	r8, [r0, #48]
5011	ldr	r9, [r0, #52]
5012#else
5013	ldrd	r8, r9, [r0, #48]
5014#endif
5015#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5016	ldr	r6, [r0, #56]
5017	ldr	r7, [r0, #60]
5018#else
5019	ldrd	r6, r7, [r0, #56]
5020#endif
5021#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5022	str	r4, [r0, #40]
5023	str	r5, [r0, #44]
5024#else
5025	strd	r4, r5, [r0, #40]
5026#endif
5027	eor	r8, r8, r6
5028	eor	r9, r9, r7
5029	and	r10, r10, r8
5030	and	r11, r11, r9
5031	eor	r10, r10, r6
5032	eor	r11, r11, r7
5033#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5034	ldr	r6, [r0, #40]
5035	ldr	r7, [r0, #44]
5036#else
5037	ldrd	r6, r7, [r0, #40]
5038#endif
5039	adds	r6, r6, r10
5040	adc	r7, r7, r11
5041#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5042	str	r6, [r0, #40]
5043	str	r7, [r0, #44]
5044#else
5045	strd	r6, r7, [r0, #40]
5046#endif
5047	mov	r10, r8
5048	mov	r11, r9
5049	# Round 3
5050#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5051	ldr	r4, [r0, #8]
5052	ldr	r5, [r0, #12]
5053#else
5054	ldrd	r4, r5, [r0, #8]
5055#endif
5056	lsrs	r6, r4, #14
5057	lsrs	r7, r5, #14
5058	orr	r7, r7, r4, lsl #18
5059	orr	r6, r6, r5, lsl #18
5060	lsrs	r8, r4, #18
5061	lsrs	r9, r5, #18
5062	orr	r9, r9, r4, lsl #14
5063	orr	r8, r8, r5, lsl #14
5064	eor	r6, r6, r8
5065	eor	r7, r7, r9
5066	lsls	r8, r4, #23
5067	lsls	r9, r5, #23
5068	orr	r9, r9, r4, lsr #9
5069	orr	r8, r8, r5, lsr #9
5070#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5071	ldr	r4, [r0, #32]
5072	ldr	r5, [r0, #36]
5073#else
5074	ldrd	r4, r5, [r0, #32]
5075#endif
5076	eor	r6, r6, r8
5077	eor	r7, r7, r9
5078	adds	r4, r4, r6
5079	adc	r5, r5, r7
5080#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5081	str	r4, [r0, #32]
5082	str	r5, [r0, #36]
5083#else
5084	strd	r4, r5, [r0, #32]
5085#endif
5086#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5087	ldr	r4, [r0, #8]
5088	ldr	r5, [r0, #12]
5089#else
5090	ldrd	r4, r5, [r0, #8]
5091#endif
5092#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5093	ldr	r6, [r0, #16]
5094	ldr	r7, [r0, #20]
5095#else
5096	ldrd	r6, r7, [r0, #16]
5097#endif
5098#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5099	ldr	r8, [r0, #24]
5100	ldr	r9, [r0, #28]
5101#else
5102	ldrd	r8, r9, [r0, #24]
5103#endif
5104	eor	r6, r6, r8
5105	eor	r7, r7, r9
5106	and	r6, r6, r4
5107	and	r7, r7, r5
5108	eor	r6, r6, r8
5109	eor	r7, r7, r9
5110#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5111	ldr	r4, [r0, #32]
5112	ldr	r5, [r0, #36]
5113#else
5114	ldrd	r4, r5, [r0, #32]
5115#endif
5116#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5117	ldr	r8, [sp, #24]
5118	ldr	r9, [sp, #28]
5119#else
5120	ldrd	r8, r9, [sp, #24]
5121#endif
5122	adds	r4, r4, r6
5123	adc	r5, r5, r7
5124#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5125	ldr	r6, [r3, #24]
5126	ldr	r7, [r3, #28]
5127#else
5128	ldrd	r6, r7, [r3, #24]
5129#endif
5130	adds	r4, r4, r8
5131	adc	r5, r5, r9
5132#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5133	ldm	r0, {r8, r9}
5134#else
5135	ldrd	r8, r9, [r0]
5136#endif
5137	adds	r4, r4, r6
5138	adc	r5, r5, r7
5139#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5140	str	r4, [r0, #32]
5141	str	r5, [r0, #36]
5142#else
5143	strd	r4, r5, [r0, #32]
5144#endif
5145	adds	r8, r8, r4
5146	adc	r9, r9, r5
5147#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5148	ldr	r4, [r0, #40]
5149	ldr	r5, [r0, #44]
5150#else
5151	ldrd	r4, r5, [r0, #40]
5152#endif
5153#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5154	stm	r0, {r8, r9}
5155#else
5156	strd	r8, r9, [r0]
5157#endif
5158	lsrs	r6, r4, #28
5159	lsrs	r7, r5, #28
5160	orr	r7, r7, r4, lsl #4
5161	orr	r6, r6, r5, lsl #4
5162	lsls	r8, r4, #30
5163	lsls	r9, r5, #30
5164	orr	r9, r9, r4, lsr #2
5165	orr	r8, r8, r5, lsr #2
5166	eor	r6, r6, r8
5167	eor	r7, r7, r9
5168	lsls	r8, r4, #25
5169	lsls	r9, r5, #25
5170	orr	r9, r9, r4, lsr #7
5171	orr	r8, r8, r5, lsr #7
5172#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5173	ldr	r4, [r0, #32]
5174	ldr	r5, [r0, #36]
5175#else
5176	ldrd	r4, r5, [r0, #32]
5177#endif
5178	eor	r6, r6, r8
5179	eor	r7, r7, r9
5180	adds	r4, r4, r6
5181	adc	r5, r5, r7
5182#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5183	ldr	r8, [r0, #40]
5184	ldr	r9, [r0, #44]
5185#else
5186	ldrd	r8, r9, [r0, #40]
5187#endif
5188#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5189	ldr	r6, [r0, #48]
5190	ldr	r7, [r0, #52]
5191#else
5192	ldrd	r6, r7, [r0, #48]
5193#endif
5194#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5195	str	r4, [r0, #32]
5196	str	r5, [r0, #36]
5197#else
5198	strd	r4, r5, [r0, #32]
5199#endif
5200	eor	r8, r8, r6
5201	eor	r9, r9, r7
5202	and	r10, r10, r8
5203	and	r11, r11, r9
5204	eor	r10, r10, r6
5205	eor	r11, r11, r7
5206#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5207	ldr	r6, [r0, #32]
5208	ldr	r7, [r0, #36]
5209#else
5210	ldrd	r6, r7, [r0, #32]
5211#endif
5212	adds	r6, r6, r10
5213	adc	r7, r7, r11
5214#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5215	str	r6, [r0, #32]
5216	str	r7, [r0, #36]
5217#else
5218	strd	r6, r7, [r0, #32]
5219#endif
5220	mov	r10, r8
5221	mov	r11, r9
5222	# Round 4
5223#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5224	ldm	r0, {r4, r5}
5225#else
5226	ldrd	r4, r5, [r0]
5227#endif
5228	lsrs	r6, r4, #14
5229	lsrs	r7, r5, #14
5230	orr	r7, r7, r4, lsl #18
5231	orr	r6, r6, r5, lsl #18
5232	lsrs	r8, r4, #18
5233	lsrs	r9, r5, #18
5234	orr	r9, r9, r4, lsl #14
5235	orr	r8, r8, r5, lsl #14
5236	eor	r6, r6, r8
5237	eor	r7, r7, r9
5238	lsls	r8, r4, #23
5239	lsls	r9, r5, #23
5240	orr	r9, r9, r4, lsr #9
5241	orr	r8, r8, r5, lsr #9
5242#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5243	ldr	r4, [r0, #24]
5244	ldr	r5, [r0, #28]
5245#else
5246	ldrd	r4, r5, [r0, #24]
5247#endif
5248	eor	r6, r6, r8
5249	eor	r7, r7, r9
5250	adds	r4, r4, r6
5251	adc	r5, r5, r7
5252#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5253	str	r4, [r0, #24]
5254	str	r5, [r0, #28]
5255#else
5256	strd	r4, r5, [r0, #24]
5257#endif
5258#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5259	ldm	r0, {r4, r5}
5260#else
5261	ldrd	r4, r5, [r0]
5262#endif
5263#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5264	ldr	r6, [r0, #8]
5265	ldr	r7, [r0, #12]
5266#else
5267	ldrd	r6, r7, [r0, #8]
5268#endif
5269#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5270	ldr	r8, [r0, #16]
5271	ldr	r9, [r0, #20]
5272#else
5273	ldrd	r8, r9, [r0, #16]
5274#endif
5275	eor	r6, r6, r8
5276	eor	r7, r7, r9
5277	and	r6, r6, r4
5278	and	r7, r7, r5
5279	eor	r6, r6, r8
5280	eor	r7, r7, r9
5281#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5282	ldr	r4, [r0, #24]
5283	ldr	r5, [r0, #28]
5284#else
5285	ldrd	r4, r5, [r0, #24]
5286#endif
5287#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5288	ldr	r8, [sp, #32]
5289	ldr	r9, [sp, #36]
5290#else
5291	ldrd	r8, r9, [sp, #32]
5292#endif
5293	adds	r4, r4, r6
5294	adc	r5, r5, r7
5295#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5296	ldr	r6, [r3, #32]
5297	ldr	r7, [r3, #36]
5298#else
5299	ldrd	r6, r7, [r3, #32]
5300#endif
5301	adds	r4, r4, r8
5302	adc	r5, r5, r9
5303#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5304	ldr	r8, [r0, #56]
5305	ldr	r9, [r0, #60]
5306#else
5307	ldrd	r8, r9, [r0, #56]
5308#endif
5309	adds	r4, r4, r6
5310	adc	r5, r5, r7
5311#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5312	str	r4, [r0, #24]
5313	str	r5, [r0, #28]
5314#else
5315	strd	r4, r5, [r0, #24]
5316#endif
5317	adds	r8, r8, r4
5318	adc	r9, r9, r5
5319#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5320	ldr	r4, [r0, #32]
5321	ldr	r5, [r0, #36]
5322#else
5323	ldrd	r4, r5, [r0, #32]
5324#endif
5325#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5326	str	r8, [r0, #56]
5327	str	r9, [r0, #60]
5328#else
5329	strd	r8, r9, [r0, #56]
5330#endif
5331	lsrs	r6, r4, #28
5332	lsrs	r7, r5, #28
5333	orr	r7, r7, r4, lsl #4
5334	orr	r6, r6, r5, lsl #4
5335	lsls	r8, r4, #30
5336	lsls	r9, r5, #30
5337	orr	r9, r9, r4, lsr #2
5338	orr	r8, r8, r5, lsr #2
5339	eor	r6, r6, r8
5340	eor	r7, r7, r9
5341	lsls	r8, r4, #25
5342	lsls	r9, r5, #25
5343	orr	r9, r9, r4, lsr #7
5344	orr	r8, r8, r5, lsr #7
5345#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5346	ldr	r4, [r0, #24]
5347	ldr	r5, [r0, #28]
5348#else
5349	ldrd	r4, r5, [r0, #24]
5350#endif
5351	eor	r6, r6, r8
5352	eor	r7, r7, r9
5353	adds	r4, r4, r6
5354	adc	r5, r5, r7
5355#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5356	ldr	r8, [r0, #32]
5357	ldr	r9, [r0, #36]
5358#else
5359	ldrd	r8, r9, [r0, #32]
5360#endif
5361#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5362	ldr	r6, [r0, #40]
5363	ldr	r7, [r0, #44]
5364#else
5365	ldrd	r6, r7, [r0, #40]
5366#endif
5367#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5368	str	r4, [r0, #24]
5369	str	r5, [r0, #28]
5370#else
5371	strd	r4, r5, [r0, #24]
5372#endif
5373	eor	r8, r8, r6
5374	eor	r9, r9, r7
5375	and	r10, r10, r8
5376	and	r11, r11, r9
5377	eor	r10, r10, r6
5378	eor	r11, r11, r7
5379#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5380	ldr	r6, [r0, #24]
5381	ldr	r7, [r0, #28]
5382#else
5383	ldrd	r6, r7, [r0, #24]
5384#endif
5385	adds	r6, r6, r10
5386	adc	r7, r7, r11
5387#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5388	str	r6, [r0, #24]
5389	str	r7, [r0, #28]
5390#else
5391	strd	r6, r7, [r0, #24]
5392#endif
5393	mov	r10, r8
5394	mov	r11, r9
5395	# Round 5
5396#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5397	ldr	r4, [r0, #56]
5398	ldr	r5, [r0, #60]
5399#else
5400	ldrd	r4, r5, [r0, #56]
5401#endif
5402	lsrs	r6, r4, #14
5403	lsrs	r7, r5, #14
5404	orr	r7, r7, r4, lsl #18
5405	orr	r6, r6, r5, lsl #18
5406	lsrs	r8, r4, #18
5407	lsrs	r9, r5, #18
5408	orr	r9, r9, r4, lsl #14
5409	orr	r8, r8, r5, lsl #14
5410	eor	r6, r6, r8
5411	eor	r7, r7, r9
5412	lsls	r8, r4, #23
5413	lsls	r9, r5, #23
5414	orr	r9, r9, r4, lsr #9
5415	orr	r8, r8, r5, lsr #9
5416#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5417	ldr	r4, [r0, #16]
5418	ldr	r5, [r0, #20]
5419#else
5420	ldrd	r4, r5, [r0, #16]
5421#endif
5422	eor	r6, r6, r8
5423	eor	r7, r7, r9
5424	adds	r4, r4, r6
5425	adc	r5, r5, r7
5426#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5427	str	r4, [r0, #16]
5428	str	r5, [r0, #20]
5429#else
5430	strd	r4, r5, [r0, #16]
5431#endif
5432#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5433	ldr	r4, [r0, #56]
5434	ldr	r5, [r0, #60]
5435#else
5436	ldrd	r4, r5, [r0, #56]
5437#endif
5438#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5439	ldm	r0, {r6, r7}
5440#else
5441	ldrd	r6, r7, [r0]
5442#endif
5443#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5444	ldr	r8, [r0, #8]
5445	ldr	r9, [r0, #12]
5446#else
5447	ldrd	r8, r9, [r0, #8]
5448#endif
5449	eor	r6, r6, r8
5450	eor	r7, r7, r9
5451	and	r6, r6, r4
5452	and	r7, r7, r5
5453	eor	r6, r6, r8
5454	eor	r7, r7, r9
5455#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5456	ldr	r4, [r0, #16]
5457	ldr	r5, [r0, #20]
5458#else
5459	ldrd	r4, r5, [r0, #16]
5460#endif
5461#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5462	ldr	r8, [sp, #40]
5463	ldr	r9, [sp, #44]
5464#else
5465	ldrd	r8, r9, [sp, #40]
5466#endif
5467	adds	r4, r4, r6
5468	adc	r5, r5, r7
5469#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5470	ldr	r6, [r3, #40]
5471	ldr	r7, [r3, #44]
5472#else
5473	ldrd	r6, r7, [r3, #40]
5474#endif
5475	adds	r4, r4, r8
5476	adc	r5, r5, r9
5477#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5478	ldr	r8, [r0, #48]
5479	ldr	r9, [r0, #52]
5480#else
5481	ldrd	r8, r9, [r0, #48]
5482#endif
5483	adds	r4, r4, r6
5484	adc	r5, r5, r7
5485#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5486	str	r4, [r0, #16]
5487	str	r5, [r0, #20]
5488#else
5489	strd	r4, r5, [r0, #16]
5490#endif
5491	adds	r8, r8, r4
5492	adc	r9, r9, r5
5493#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5494	ldr	r4, [r0, #24]
5495	ldr	r5, [r0, #28]
5496#else
5497	ldrd	r4, r5, [r0, #24]
5498#endif
5499#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5500	str	r8, [r0, #48]
5501	str	r9, [r0, #52]
5502#else
5503	strd	r8, r9, [r0, #48]
5504#endif
5505	lsrs	r6, r4, #28
5506	lsrs	r7, r5, #28
5507	orr	r7, r7, r4, lsl #4
5508	orr	r6, r6, r5, lsl #4
5509	lsls	r8, r4, #30
5510	lsls	r9, r5, #30
5511	orr	r9, r9, r4, lsr #2
5512	orr	r8, r8, r5, lsr #2
5513	eor	r6, r6, r8
5514	eor	r7, r7, r9
5515	lsls	r8, r4, #25
5516	lsls	r9, r5, #25
5517	orr	r9, r9, r4, lsr #7
5518	orr	r8, r8, r5, lsr #7
5519#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5520	ldr	r4, [r0, #16]
5521	ldr	r5, [r0, #20]
5522#else
5523	ldrd	r4, r5, [r0, #16]
5524#endif
5525	eor	r6, r6, r8
5526	eor	r7, r7, r9
5527	adds	r4, r4, r6
5528	adc	r5, r5, r7
5529#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5530	ldr	r8, [r0, #24]
5531	ldr	r9, [r0, #28]
5532#else
5533	ldrd	r8, r9, [r0, #24]
5534#endif
5535#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5536	ldr	r6, [r0, #32]
5537	ldr	r7, [r0, #36]
5538#else
5539	ldrd	r6, r7, [r0, #32]
5540#endif
5541#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5542	str	r4, [r0, #16]
5543	str	r5, [r0, #20]
5544#else
5545	strd	r4, r5, [r0, #16]
5546#endif
5547	eor	r8, r8, r6
5548	eor	r9, r9, r7
5549	and	r10, r10, r8
5550	and	r11, r11, r9
5551	eor	r10, r10, r6
5552	eor	r11, r11, r7
5553#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5554	ldr	r6, [r0, #16]
5555	ldr	r7, [r0, #20]
5556#else
5557	ldrd	r6, r7, [r0, #16]
5558#endif
5559	adds	r6, r6, r10
5560	adc	r7, r7, r11
5561#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5562	str	r6, [r0, #16]
5563	str	r7, [r0, #20]
5564#else
5565	strd	r6, r7, [r0, #16]
5566#endif
5567	mov	r10, r8
5568	mov	r11, r9
5569	# Round 6
5570#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5571	ldr	r4, [r0, #48]
5572	ldr	r5, [r0, #52]
5573#else
5574	ldrd	r4, r5, [r0, #48]
5575#endif
5576	lsrs	r6, r4, #14
5577	lsrs	r7, r5, #14
5578	orr	r7, r7, r4, lsl #18
5579	orr	r6, r6, r5, lsl #18
5580	lsrs	r8, r4, #18
5581	lsrs	r9, r5, #18
5582	orr	r9, r9, r4, lsl #14
5583	orr	r8, r8, r5, lsl #14
5584	eor	r6, r6, r8
5585	eor	r7, r7, r9
5586	lsls	r8, r4, #23
5587	lsls	r9, r5, #23
5588	orr	r9, r9, r4, lsr #9
5589	orr	r8, r8, r5, lsr #9
5590#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5591	ldr	r4, [r0, #8]
5592	ldr	r5, [r0, #12]
5593#else
5594	ldrd	r4, r5, [r0, #8]
5595#endif
5596	eor	r6, r6, r8
5597	eor	r7, r7, r9
5598	adds	r4, r4, r6
5599	adc	r5, r5, r7
5600#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5601	str	r4, [r0, #8]
5602	str	r5, [r0, #12]
5603#else
5604	strd	r4, r5, [r0, #8]
5605#endif
5606#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5607	ldr	r4, [r0, #48]
5608	ldr	r5, [r0, #52]
5609#else
5610	ldrd	r4, r5, [r0, #48]
5611#endif
5612#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5613	ldr	r6, [r0, #56]
5614	ldr	r7, [r0, #60]
5615#else
5616	ldrd	r6, r7, [r0, #56]
5617#endif
5618#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5619	ldm	r0, {r8, r9}
5620#else
5621	ldrd	r8, r9, [r0]
5622#endif
5623	eor	r6, r6, r8
5624	eor	r7, r7, r9
5625	and	r6, r6, r4
5626	and	r7, r7, r5
5627	eor	r6, r6, r8
5628	eor	r7, r7, r9
5629#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5630	ldr	r4, [r0, #8]
5631	ldr	r5, [r0, #12]
5632#else
5633	ldrd	r4, r5, [r0, #8]
5634#endif
5635#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5636	ldr	r8, [sp, #48]
5637	ldr	r9, [sp, #52]
5638#else
5639	ldrd	r8, r9, [sp, #48]
5640#endif
5641	adds	r4, r4, r6
5642	adc	r5, r5, r7
5643#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5644	ldr	r6, [r3, #48]
5645	ldr	r7, [r3, #52]
5646#else
5647	ldrd	r6, r7, [r3, #48]
5648#endif
5649	adds	r4, r4, r8
5650	adc	r5, r5, r9
5651#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5652	ldr	r8, [r0, #40]
5653	ldr	r9, [r0, #44]
5654#else
5655	ldrd	r8, r9, [r0, #40]
5656#endif
5657	adds	r4, r4, r6
5658	adc	r5, r5, r7
5659#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5660	str	r4, [r0, #8]
5661	str	r5, [r0, #12]
5662#else
5663	strd	r4, r5, [r0, #8]
5664#endif
5665	adds	r8, r8, r4
5666	adc	r9, r9, r5
5667#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5668	ldr	r4, [r0, #16]
5669	ldr	r5, [r0, #20]
5670#else
5671	ldrd	r4, r5, [r0, #16]
5672#endif
5673#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5674	str	r8, [r0, #40]
5675	str	r9, [r0, #44]
5676#else
5677	strd	r8, r9, [r0, #40]
5678#endif
5679	lsrs	r6, r4, #28
5680	lsrs	r7, r5, #28
5681	orr	r7, r7, r4, lsl #4
5682	orr	r6, r6, r5, lsl #4
5683	lsls	r8, r4, #30
5684	lsls	r9, r5, #30
5685	orr	r9, r9, r4, lsr #2
5686	orr	r8, r8, r5, lsr #2
5687	eor	r6, r6, r8
5688	eor	r7, r7, r9
5689	lsls	r8, r4, #25
5690	lsls	r9, r5, #25
5691	orr	r9, r9, r4, lsr #7
5692	orr	r8, r8, r5, lsr #7
5693#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5694	ldr	r4, [r0, #8]
5695	ldr	r5, [r0, #12]
5696#else
5697	ldrd	r4, r5, [r0, #8]
5698#endif
5699	eor	r6, r6, r8
5700	eor	r7, r7, r9
5701	adds	r4, r4, r6
5702	adc	r5, r5, r7
5703#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5704	ldr	r8, [r0, #16]
5705	ldr	r9, [r0, #20]
5706#else
5707	ldrd	r8, r9, [r0, #16]
5708#endif
5709#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5710	ldr	r6, [r0, #24]
5711	ldr	r7, [r0, #28]
5712#else
5713	ldrd	r6, r7, [r0, #24]
5714#endif
5715#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5716	str	r4, [r0, #8]
5717	str	r5, [r0, #12]
5718#else
5719	strd	r4, r5, [r0, #8]
5720#endif
5721	eor	r8, r8, r6
5722	eor	r9, r9, r7
5723	and	r10, r10, r8
5724	and	r11, r11, r9
5725	eor	r10, r10, r6
5726	eor	r11, r11, r7
5727#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5728	ldr	r6, [r0, #8]
5729	ldr	r7, [r0, #12]
5730#else
5731	ldrd	r6, r7, [r0, #8]
5732#endif
5733	adds	r6, r6, r10
5734	adc	r7, r7, r11
5735#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5736	str	r6, [r0, #8]
5737	str	r7, [r0, #12]
5738#else
5739	strd	r6, r7, [r0, #8]
5740#endif
5741	mov	r10, r8
5742	mov	r11, r9
5743	# Round 7
5744#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5745	ldr	r4, [r0, #40]
5746	ldr	r5, [r0, #44]
5747#else
5748	ldrd	r4, r5, [r0, #40]
5749#endif
5750	lsrs	r6, r4, #14
5751	lsrs	r7, r5, #14
5752	orr	r7, r7, r4, lsl #18
5753	orr	r6, r6, r5, lsl #18
5754	lsrs	r8, r4, #18
5755	lsrs	r9, r5, #18
5756	orr	r9, r9, r4, lsl #14
5757	orr	r8, r8, r5, lsl #14
5758	eor	r6, r6, r8
5759	eor	r7, r7, r9
5760	lsls	r8, r4, #23
5761	lsls	r9, r5, #23
5762	orr	r9, r9, r4, lsr #9
5763	orr	r8, r8, r5, lsr #9
5764#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5765	ldm	r0, {r4, r5}
5766#else
5767	ldrd	r4, r5, [r0]
5768#endif
5769	eor	r6, r6, r8
5770	eor	r7, r7, r9
5771	adds	r4, r4, r6
5772	adc	r5, r5, r7
5773#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5774	stm	r0, {r4, r5}
5775#else
5776	strd	r4, r5, [r0]
5777#endif
5778#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5779	ldr	r4, [r0, #40]
5780	ldr	r5, [r0, #44]
5781#else
5782	ldrd	r4, r5, [r0, #40]
5783#endif
5784#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5785	ldr	r6, [r0, #48]
5786	ldr	r7, [r0, #52]
5787#else
5788	ldrd	r6, r7, [r0, #48]
5789#endif
5790#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5791	ldr	r8, [r0, #56]
5792	ldr	r9, [r0, #60]
5793#else
5794	ldrd	r8, r9, [r0, #56]
5795#endif
5796	eor	r6, r6, r8
5797	eor	r7, r7, r9
5798	and	r6, r6, r4
5799	and	r7, r7, r5
5800	eor	r6, r6, r8
5801	eor	r7, r7, r9
5802#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5803	ldm	r0, {r4, r5}
5804#else
5805	ldrd	r4, r5, [r0]
5806#endif
5807#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5808	ldr	r8, [sp, #56]
5809	ldr	r9, [sp, #60]
5810#else
5811	ldrd	r8, r9, [sp, #56]
5812#endif
5813	adds	r4, r4, r6
5814	adc	r5, r5, r7
5815#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5816	ldr	r6, [r3, #56]
5817	ldr	r7, [r3, #60]
5818#else
5819	ldrd	r6, r7, [r3, #56]
5820#endif
5821	adds	r4, r4, r8
5822	adc	r5, r5, r9
5823#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5824	ldr	r8, [r0, #32]
5825	ldr	r9, [r0, #36]
5826#else
5827	ldrd	r8, r9, [r0, #32]
5828#endif
5829	adds	r4, r4, r6
5830	adc	r5, r5, r7
5831#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5832	stm	r0, {r4, r5}
5833#else
5834	strd	r4, r5, [r0]
5835#endif
5836	adds	r8, r8, r4
5837	adc	r9, r9, r5
5838#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5839	ldr	r4, [r0, #8]
5840	ldr	r5, [r0, #12]
5841#else
5842	ldrd	r4, r5, [r0, #8]
5843#endif
5844#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5845	str	r8, [r0, #32]
5846	str	r9, [r0, #36]
5847#else
5848	strd	r8, r9, [r0, #32]
5849#endif
5850	lsrs	r6, r4, #28
5851	lsrs	r7, r5, #28
5852	orr	r7, r7, r4, lsl #4
5853	orr	r6, r6, r5, lsl #4
5854	lsls	r8, r4, #30
5855	lsls	r9, r5, #30
5856	orr	r9, r9, r4, lsr #2
5857	orr	r8, r8, r5, lsr #2
5858	eor	r6, r6, r8
5859	eor	r7, r7, r9
5860	lsls	r8, r4, #25
5861	lsls	r9, r5, #25
5862	orr	r9, r9, r4, lsr #7
5863	orr	r8, r8, r5, lsr #7
5864#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5865	ldm	r0, {r4, r5}
5866#else
5867	ldrd	r4, r5, [r0]
5868#endif
5869	eor	r6, r6, r8
5870	eor	r7, r7, r9
5871	adds	r4, r4, r6
5872	adc	r5, r5, r7
5873#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5874	ldr	r8, [r0, #8]
5875	ldr	r9, [r0, #12]
5876#else
5877	ldrd	r8, r9, [r0, #8]
5878#endif
5879#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5880	ldr	r6, [r0, #16]
5881	ldr	r7, [r0, #20]
5882#else
5883	ldrd	r6, r7, [r0, #16]
5884#endif
5885#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5886	stm	r0, {r4, r5}
5887#else
5888	strd	r4, r5, [r0]
5889#endif
5890	eor	r8, r8, r6
5891	eor	r9, r9, r7
5892	and	r10, r10, r8
5893	and	r11, r11, r9
5894	eor	r10, r10, r6
5895	eor	r11, r11, r7
5896#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5897	ldm	r0, {r6, r7}
5898#else
5899	ldrd	r6, r7, [r0]
5900#endif
5901	adds	r6, r6, r10
5902	adc	r7, r7, r11
5903#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5904	stm	r0, {r6, r7}
5905#else
5906	strd	r6, r7, [r0]
5907#endif
5908	mov	r10, r8
5909	mov	r11, r9
5910	# Round 8
5911#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5912	ldr	r4, [r0, #32]
5913	ldr	r5, [r0, #36]
5914#else
5915	ldrd	r4, r5, [r0, #32]
5916#endif
5917	lsrs	r6, r4, #14
5918	lsrs	r7, r5, #14
5919	orr	r7, r7, r4, lsl #18
5920	orr	r6, r6, r5, lsl #18
5921	lsrs	r8, r4, #18
5922	lsrs	r9, r5, #18
5923	orr	r9, r9, r4, lsl #14
5924	orr	r8, r8, r5, lsl #14
5925	eor	r6, r6, r8
5926	eor	r7, r7, r9
5927	lsls	r8, r4, #23
5928	lsls	r9, r5, #23
5929	orr	r9, r9, r4, lsr #9
5930	orr	r8, r8, r5, lsr #9
5931#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5932	ldr	r4, [r0, #56]
5933	ldr	r5, [r0, #60]
5934#else
5935	ldrd	r4, r5, [r0, #56]
5936#endif
5937	eor	r6, r6, r8
5938	eor	r7, r7, r9
5939	adds	r4, r4, r6
5940	adc	r5, r5, r7
5941#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5942	str	r4, [r0, #56]
5943	str	r5, [r0, #60]
5944#else
5945	strd	r4, r5, [r0, #56]
5946#endif
5947#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5948	ldr	r4, [r0, #32]
5949	ldr	r5, [r0, #36]
5950#else
5951	ldrd	r4, r5, [r0, #32]
5952#endif
5953#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5954	ldr	r6, [r0, #40]
5955	ldr	r7, [r0, #44]
5956#else
5957	ldrd	r6, r7, [r0, #40]
5958#endif
5959#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5960	ldr	r8, [r0, #48]
5961	ldr	r9, [r0, #52]
5962#else
5963	ldrd	r8, r9, [r0, #48]
5964#endif
5965	eor	r6, r6, r8
5966	eor	r7, r7, r9
5967	and	r6, r6, r4
5968	and	r7, r7, r5
5969	eor	r6, r6, r8
5970	eor	r7, r7, r9
5971#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5972	ldr	r4, [r0, #56]
5973	ldr	r5, [r0, #60]
5974#else
5975	ldrd	r4, r5, [r0, #56]
5976#endif
5977#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5978	ldr	r8, [sp, #64]
5979	ldr	r9, [sp, #68]
5980#else
5981	ldrd	r8, r9, [sp, #64]
5982#endif
5983	adds	r4, r4, r6
5984	adc	r5, r5, r7
5985#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5986	ldr	r6, [r3, #64]
5987	ldr	r7, [r3, #68]
5988#else
5989	ldrd	r6, r7, [r3, #64]
5990#endif
5991	adds	r4, r4, r8
5992	adc	r5, r5, r9
5993#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
5994	ldr	r8, [r0, #24]
5995	ldr	r9, [r0, #28]
5996#else
5997	ldrd	r8, r9, [r0, #24]
5998#endif
5999	adds	r4, r4, r6
6000	adc	r5, r5, r7
6001#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6002	str	r4, [r0, #56]
6003	str	r5, [r0, #60]
6004#else
6005	strd	r4, r5, [r0, #56]
6006#endif
6007	adds	r8, r8, r4
6008	adc	r9, r9, r5
6009#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6010	ldm	r0, {r4, r5}
6011#else
6012	ldrd	r4, r5, [r0]
6013#endif
6014#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6015	str	r8, [r0, #24]
6016	str	r9, [r0, #28]
6017#else
6018	strd	r8, r9, [r0, #24]
6019#endif
6020	lsrs	r6, r4, #28
6021	lsrs	r7, r5, #28
6022	orr	r7, r7, r4, lsl #4
6023	orr	r6, r6, r5, lsl #4
6024	lsls	r8, r4, #30
6025	lsls	r9, r5, #30
6026	orr	r9, r9, r4, lsr #2
6027	orr	r8, r8, r5, lsr #2
6028	eor	r6, r6, r8
6029	eor	r7, r7, r9
6030	lsls	r8, r4, #25
6031	lsls	r9, r5, #25
6032	orr	r9, r9, r4, lsr #7
6033	orr	r8, r8, r5, lsr #7
6034#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6035	ldr	r4, [r0, #56]
6036	ldr	r5, [r0, #60]
6037#else
6038	ldrd	r4, r5, [r0, #56]
6039#endif
6040	eor	r6, r6, r8
6041	eor	r7, r7, r9
6042	adds	r4, r4, r6
6043	adc	r5, r5, r7
6044#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6045	ldm	r0, {r8, r9}
6046#else
6047	ldrd	r8, r9, [r0]
6048#endif
6049#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6050	ldr	r6, [r0, #8]
6051	ldr	r7, [r0, #12]
6052#else
6053	ldrd	r6, r7, [r0, #8]
6054#endif
6055#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6056	str	r4, [r0, #56]
6057	str	r5, [r0, #60]
6058#else
6059	strd	r4, r5, [r0, #56]
6060#endif
6061	eor	r8, r8, r6
6062	eor	r9, r9, r7
6063	and	r10, r10, r8
6064	and	r11, r11, r9
6065	eor	r10, r10, r6
6066	eor	r11, r11, r7
6067#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6068	ldr	r6, [r0, #56]
6069	ldr	r7, [r0, #60]
6070#else
6071	ldrd	r6, r7, [r0, #56]
6072#endif
6073	adds	r6, r6, r10
6074	adc	r7, r7, r11
6075#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6076	str	r6, [r0, #56]
6077	str	r7, [r0, #60]
6078#else
6079	strd	r6, r7, [r0, #56]
6080#endif
6081	mov	r10, r8
6082	mov	r11, r9
6083	# Round 9
6084#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6085	ldr	r4, [r0, #24]
6086	ldr	r5, [r0, #28]
6087#else
6088	ldrd	r4, r5, [r0, #24]
6089#endif
6090	lsrs	r6, r4, #14
6091	lsrs	r7, r5, #14
6092	orr	r7, r7, r4, lsl #18
6093	orr	r6, r6, r5, lsl #18
6094	lsrs	r8, r4, #18
6095	lsrs	r9, r5, #18
6096	orr	r9, r9, r4, lsl #14
6097	orr	r8, r8, r5, lsl #14
6098	eor	r6, r6, r8
6099	eor	r7, r7, r9
6100	lsls	r8, r4, #23
6101	lsls	r9, r5, #23
6102	orr	r9, r9, r4, lsr #9
6103	orr	r8, r8, r5, lsr #9
6104#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6105	ldr	r4, [r0, #48]
6106	ldr	r5, [r0, #52]
6107#else
6108	ldrd	r4, r5, [r0, #48]
6109#endif
6110	eor	r6, r6, r8
6111	eor	r7, r7, r9
6112	adds	r4, r4, r6
6113	adc	r5, r5, r7
6114#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6115	str	r4, [r0, #48]
6116	str	r5, [r0, #52]
6117#else
6118	strd	r4, r5, [r0, #48]
6119#endif
6120#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6121	ldr	r4, [r0, #24]
6122	ldr	r5, [r0, #28]
6123#else
6124	ldrd	r4, r5, [r0, #24]
6125#endif
6126#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6127	ldr	r6, [r0, #32]
6128	ldr	r7, [r0, #36]
6129#else
6130	ldrd	r6, r7, [r0, #32]
6131#endif
6132#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6133	ldr	r8, [r0, #40]
6134	ldr	r9, [r0, #44]
6135#else
6136	ldrd	r8, r9, [r0, #40]
6137#endif
6138	eor	r6, r6, r8
6139	eor	r7, r7, r9
6140	and	r6, r6, r4
6141	and	r7, r7, r5
6142	eor	r6, r6, r8
6143	eor	r7, r7, r9
6144#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6145	ldr	r4, [r0, #48]
6146	ldr	r5, [r0, #52]
6147#else
6148	ldrd	r4, r5, [r0, #48]
6149#endif
6150#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6151	ldr	r8, [sp, #72]
6152	ldr	r9, [sp, #76]
6153#else
6154	ldrd	r8, r9, [sp, #72]
6155#endif
6156	adds	r4, r4, r6
6157	adc	r5, r5, r7
6158#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6159	ldr	r6, [r3, #72]
6160	ldr	r7, [r3, #76]
6161#else
6162	ldrd	r6, r7, [r3, #72]
6163#endif
6164	adds	r4, r4, r8
6165	adc	r5, r5, r9
6166#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6167	ldr	r8, [r0, #16]
6168	ldr	r9, [r0, #20]
6169#else
6170	ldrd	r8, r9, [r0, #16]
6171#endif
6172	adds	r4, r4, r6
6173	adc	r5, r5, r7
6174#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6175	str	r4, [r0, #48]
6176	str	r5, [r0, #52]
6177#else
6178	strd	r4, r5, [r0, #48]
6179#endif
6180	adds	r8, r8, r4
6181	adc	r9, r9, r5
6182#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6183	ldr	r4, [r0, #56]
6184	ldr	r5, [r0, #60]
6185#else
6186	ldrd	r4, r5, [r0, #56]
6187#endif
6188#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6189	str	r8, [r0, #16]
6190	str	r9, [r0, #20]
6191#else
6192	strd	r8, r9, [r0, #16]
6193#endif
6194	lsrs	r6, r4, #28
6195	lsrs	r7, r5, #28
6196	orr	r7, r7, r4, lsl #4
6197	orr	r6, r6, r5, lsl #4
6198	lsls	r8, r4, #30
6199	lsls	r9, r5, #30
6200	orr	r9, r9, r4, lsr #2
6201	orr	r8, r8, r5, lsr #2
6202	eor	r6, r6, r8
6203	eor	r7, r7, r9
6204	lsls	r8, r4, #25
6205	lsls	r9, r5, #25
6206	orr	r9, r9, r4, lsr #7
6207	orr	r8, r8, r5, lsr #7
6208#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6209	ldr	r4, [r0, #48]
6210	ldr	r5, [r0, #52]
6211#else
6212	ldrd	r4, r5, [r0, #48]
6213#endif
6214	eor	r6, r6, r8
6215	eor	r7, r7, r9
6216	adds	r4, r4, r6
6217	adc	r5, r5, r7
6218#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6219	ldr	r8, [r0, #56]
6220	ldr	r9, [r0, #60]
6221#else
6222	ldrd	r8, r9, [r0, #56]
6223#endif
6224#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6225	ldm	r0, {r6, r7}
6226#else
6227	ldrd	r6, r7, [r0]
6228#endif
6229#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6230	str	r4, [r0, #48]
6231	str	r5, [r0, #52]
6232#else
6233	strd	r4, r5, [r0, #48]
6234#endif
6235	eor	r8, r8, r6
6236	eor	r9, r9, r7
6237	and	r10, r10, r8
6238	and	r11, r11, r9
6239	eor	r10, r10, r6
6240	eor	r11, r11, r7
6241#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6242	ldr	r6, [r0, #48]
6243	ldr	r7, [r0, #52]
6244#else
6245	ldrd	r6, r7, [r0, #48]
6246#endif
6247	adds	r6, r6, r10
6248	adc	r7, r7, r11
6249#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6250	str	r6, [r0, #48]
6251	str	r7, [r0, #52]
6252#else
6253	strd	r6, r7, [r0, #48]
6254#endif
6255	mov	r10, r8
6256	mov	r11, r9
6257	# Round 10
6258#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6259	ldr	r4, [r0, #16]
6260	ldr	r5, [r0, #20]
6261#else
6262	ldrd	r4, r5, [r0, #16]
6263#endif
6264	lsrs	r6, r4, #14
6265	lsrs	r7, r5, #14
6266	orr	r7, r7, r4, lsl #18
6267	orr	r6, r6, r5, lsl #18
6268	lsrs	r8, r4, #18
6269	lsrs	r9, r5, #18
6270	orr	r9, r9, r4, lsl #14
6271	orr	r8, r8, r5, lsl #14
6272	eor	r6, r6, r8
6273	eor	r7, r7, r9
6274	lsls	r8, r4, #23
6275	lsls	r9, r5, #23
6276	orr	r9, r9, r4, lsr #9
6277	orr	r8, r8, r5, lsr #9
6278#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6279	ldr	r4, [r0, #40]
6280	ldr	r5, [r0, #44]
6281#else
6282	ldrd	r4, r5, [r0, #40]
6283#endif
6284	eor	r6, r6, r8
6285	eor	r7, r7, r9
6286	adds	r4, r4, r6
6287	adc	r5, r5, r7
6288#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6289	str	r4, [r0, #40]
6290	str	r5, [r0, #44]
6291#else
6292	strd	r4, r5, [r0, #40]
6293#endif
6294#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6295	ldr	r4, [r0, #16]
6296	ldr	r5, [r0, #20]
6297#else
6298	ldrd	r4, r5, [r0, #16]
6299#endif
6300#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6301	ldr	r6, [r0, #24]
6302	ldr	r7, [r0, #28]
6303#else
6304	ldrd	r6, r7, [r0, #24]
6305#endif
6306#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6307	ldr	r8, [r0, #32]
6308	ldr	r9, [r0, #36]
6309#else
6310	ldrd	r8, r9, [r0, #32]
6311#endif
6312	eor	r6, r6, r8
6313	eor	r7, r7, r9
6314	and	r6, r6, r4
6315	and	r7, r7, r5
6316	eor	r6, r6, r8
6317	eor	r7, r7, r9
6318#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6319	ldr	r4, [r0, #40]
6320	ldr	r5, [r0, #44]
6321#else
6322	ldrd	r4, r5, [r0, #40]
6323#endif
6324#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6325	ldr	r8, [sp, #80]
6326	ldr	r9, [sp, #84]
6327#else
6328	ldrd	r8, r9, [sp, #80]
6329#endif
6330	adds	r4, r4, r6
6331	adc	r5, r5, r7
6332#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6333	ldr	r6, [r3, #80]
6334	ldr	r7, [r3, #84]
6335#else
6336	ldrd	r6, r7, [r3, #80]
6337#endif
6338	adds	r4, r4, r8
6339	adc	r5, r5, r9
6340#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6341	ldr	r8, [r0, #8]
6342	ldr	r9, [r0, #12]
6343#else
6344	ldrd	r8, r9, [r0, #8]
6345#endif
6346	adds	r4, r4, r6
6347	adc	r5, r5, r7
6348#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6349	str	r4, [r0, #40]
6350	str	r5, [r0, #44]
6351#else
6352	strd	r4, r5, [r0, #40]
6353#endif
6354	adds	r8, r8, r4
6355	adc	r9, r9, r5
6356#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6357	ldr	r4, [r0, #48]
6358	ldr	r5, [r0, #52]
6359#else
6360	ldrd	r4, r5, [r0, #48]
6361#endif
6362#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6363	str	r8, [r0, #8]
6364	str	r9, [r0, #12]
6365#else
6366	strd	r8, r9, [r0, #8]
6367#endif
6368	lsrs	r6, r4, #28
6369	lsrs	r7, r5, #28
6370	orr	r7, r7, r4, lsl #4
6371	orr	r6, r6, r5, lsl #4
6372	lsls	r8, r4, #30
6373	lsls	r9, r5, #30
6374	orr	r9, r9, r4, lsr #2
6375	orr	r8, r8, r5, lsr #2
6376	eor	r6, r6, r8
6377	eor	r7, r7, r9
6378	lsls	r8, r4, #25
6379	lsls	r9, r5, #25
6380	orr	r9, r9, r4, lsr #7
6381	orr	r8, r8, r5, lsr #7
6382#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6383	ldr	r4, [r0, #40]
6384	ldr	r5, [r0, #44]
6385#else
6386	ldrd	r4, r5, [r0, #40]
6387#endif
6388	eor	r6, r6, r8
6389	eor	r7, r7, r9
6390	adds	r4, r4, r6
6391	adc	r5, r5, r7
6392#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6393	ldr	r8, [r0, #48]
6394	ldr	r9, [r0, #52]
6395#else
6396	ldrd	r8, r9, [r0, #48]
6397#endif
6398#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6399	ldr	r6, [r0, #56]
6400	ldr	r7, [r0, #60]
6401#else
6402	ldrd	r6, r7, [r0, #56]
6403#endif
6404#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6405	str	r4, [r0, #40]
6406	str	r5, [r0, #44]
6407#else
6408	strd	r4, r5, [r0, #40]
6409#endif
6410	eor	r8, r8, r6
6411	eor	r9, r9, r7
6412	and	r10, r10, r8
6413	and	r11, r11, r9
6414	eor	r10, r10, r6
6415	eor	r11, r11, r7
6416#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6417	ldr	r6, [r0, #40]
6418	ldr	r7, [r0, #44]
6419#else
6420	ldrd	r6, r7, [r0, #40]
6421#endif
6422	adds	r6, r6, r10
6423	adc	r7, r7, r11
6424#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6425	str	r6, [r0, #40]
6426	str	r7, [r0, #44]
6427#else
6428	strd	r6, r7, [r0, #40]
6429#endif
6430	mov	r10, r8
6431	mov	r11, r9
6432	# Round 11
6433#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6434	ldr	r4, [r0, #8]
6435	ldr	r5, [r0, #12]
6436#else
6437	ldrd	r4, r5, [r0, #8]
6438#endif
6439	lsrs	r6, r4, #14
6440	lsrs	r7, r5, #14
6441	orr	r7, r7, r4, lsl #18
6442	orr	r6, r6, r5, lsl #18
6443	lsrs	r8, r4, #18
6444	lsrs	r9, r5, #18
6445	orr	r9, r9, r4, lsl #14
6446	orr	r8, r8, r5, lsl #14
6447	eor	r6, r6, r8
6448	eor	r7, r7, r9
6449	lsls	r8, r4, #23
6450	lsls	r9, r5, #23
6451	orr	r9, r9, r4, lsr #9
6452	orr	r8, r8, r5, lsr #9
6453#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6454	ldr	r4, [r0, #32]
6455	ldr	r5, [r0, #36]
6456#else
6457	ldrd	r4, r5, [r0, #32]
6458#endif
6459	eor	r6, r6, r8
6460	eor	r7, r7, r9
6461	adds	r4, r4, r6
6462	adc	r5, r5, r7
6463#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6464	str	r4, [r0, #32]
6465	str	r5, [r0, #36]
6466#else
6467	strd	r4, r5, [r0, #32]
6468#endif
6469#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6470	ldr	r4, [r0, #8]
6471	ldr	r5, [r0, #12]
6472#else
6473	ldrd	r4, r5, [r0, #8]
6474#endif
6475#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6476	ldr	r6, [r0, #16]
6477	ldr	r7, [r0, #20]
6478#else
6479	ldrd	r6, r7, [r0, #16]
6480#endif
6481#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6482	ldr	r8, [r0, #24]
6483	ldr	r9, [r0, #28]
6484#else
6485	ldrd	r8, r9, [r0, #24]
6486#endif
6487	eor	r6, r6, r8
6488	eor	r7, r7, r9
6489	and	r6, r6, r4
6490	and	r7, r7, r5
6491	eor	r6, r6, r8
6492	eor	r7, r7, r9
6493#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6494	ldr	r4, [r0, #32]
6495	ldr	r5, [r0, #36]
6496#else
6497	ldrd	r4, r5, [r0, #32]
6498#endif
6499#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6500	ldr	r8, [sp, #88]
6501	ldr	r9, [sp, #92]
6502#else
6503	ldrd	r8, r9, [sp, #88]
6504#endif
6505	adds	r4, r4, r6
6506	adc	r5, r5, r7
6507#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6508	ldr	r6, [r3, #88]
6509	ldr	r7, [r3, #92]
6510#else
6511	ldrd	r6, r7, [r3, #88]
6512#endif
6513	adds	r4, r4, r8
6514	adc	r5, r5, r9
6515#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6516	ldm	r0, {r8, r9}
6517#else
6518	ldrd	r8, r9, [r0]
6519#endif
6520	adds	r4, r4, r6
6521	adc	r5, r5, r7
6522#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6523	str	r4, [r0, #32]
6524	str	r5, [r0, #36]
6525#else
6526	strd	r4, r5, [r0, #32]
6527#endif
6528	adds	r8, r8, r4
6529	adc	r9, r9, r5
6530#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6531	ldr	r4, [r0, #40]
6532	ldr	r5, [r0, #44]
6533#else
6534	ldrd	r4, r5, [r0, #40]
6535#endif
6536#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6537	stm	r0, {r8, r9}
6538#else
6539	strd	r8, r9, [r0]
6540#endif
6541	lsrs	r6, r4, #28
6542	lsrs	r7, r5, #28
6543	orr	r7, r7, r4, lsl #4
6544	orr	r6, r6, r5, lsl #4
6545	lsls	r8, r4, #30
6546	lsls	r9, r5, #30
6547	orr	r9, r9, r4, lsr #2
6548	orr	r8, r8, r5, lsr #2
6549	eor	r6, r6, r8
6550	eor	r7, r7, r9
6551	lsls	r8, r4, #25
6552	lsls	r9, r5, #25
6553	orr	r9, r9, r4, lsr #7
6554	orr	r8, r8, r5, lsr #7
6555#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6556	ldr	r4, [r0, #32]
6557	ldr	r5, [r0, #36]
6558#else
6559	ldrd	r4, r5, [r0, #32]
6560#endif
6561	eor	r6, r6, r8
6562	eor	r7, r7, r9
6563	adds	r4, r4, r6
6564	adc	r5, r5, r7
6565#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6566	ldr	r8, [r0, #40]
6567	ldr	r9, [r0, #44]
6568#else
6569	ldrd	r8, r9, [r0, #40]
6570#endif
6571#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6572	ldr	r6, [r0, #48]
6573	ldr	r7, [r0, #52]
6574#else
6575	ldrd	r6, r7, [r0, #48]
6576#endif
6577#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6578	str	r4, [r0, #32]
6579	str	r5, [r0, #36]
6580#else
6581	strd	r4, r5, [r0, #32]
6582#endif
6583	eor	r8, r8, r6
6584	eor	r9, r9, r7
6585	and	r10, r10, r8
6586	and	r11, r11, r9
6587	eor	r10, r10, r6
6588	eor	r11, r11, r7
6589#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6590	ldr	r6, [r0, #32]
6591	ldr	r7, [r0, #36]
6592#else
6593	ldrd	r6, r7, [r0, #32]
6594#endif
6595	adds	r6, r6, r10
6596	adc	r7, r7, r11
6597#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6598	str	r6, [r0, #32]
6599	str	r7, [r0, #36]
6600#else
6601	strd	r6, r7, [r0, #32]
6602#endif
6603	mov	r10, r8
6604	mov	r11, r9
6605	# Round 12
6606#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6607	ldm	r0, {r4, r5}
6608#else
6609	ldrd	r4, r5, [r0]
6610#endif
6611	lsrs	r6, r4, #14
6612	lsrs	r7, r5, #14
6613	orr	r7, r7, r4, lsl #18
6614	orr	r6, r6, r5, lsl #18
6615	lsrs	r8, r4, #18
6616	lsrs	r9, r5, #18
6617	orr	r9, r9, r4, lsl #14
6618	orr	r8, r8, r5, lsl #14
6619	eor	r6, r6, r8
6620	eor	r7, r7, r9
6621	lsls	r8, r4, #23
6622	lsls	r9, r5, #23
6623	orr	r9, r9, r4, lsr #9
6624	orr	r8, r8, r5, lsr #9
6625#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6626	ldr	r4, [r0, #24]
6627	ldr	r5, [r0, #28]
6628#else
6629	ldrd	r4, r5, [r0, #24]
6630#endif
6631	eor	r6, r6, r8
6632	eor	r7, r7, r9
6633	adds	r4, r4, r6
6634	adc	r5, r5, r7
6635#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6636	str	r4, [r0, #24]
6637	str	r5, [r0, #28]
6638#else
6639	strd	r4, r5, [r0, #24]
6640#endif
6641#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6642	ldm	r0, {r4, r5}
6643#else
6644	ldrd	r4, r5, [r0]
6645#endif
6646#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6647	ldr	r6, [r0, #8]
6648	ldr	r7, [r0, #12]
6649#else
6650	ldrd	r6, r7, [r0, #8]
6651#endif
6652#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6653	ldr	r8, [r0, #16]
6654	ldr	r9, [r0, #20]
6655#else
6656	ldrd	r8, r9, [r0, #16]
6657#endif
6658	eor	r6, r6, r8
6659	eor	r7, r7, r9
6660	and	r6, r6, r4
6661	and	r7, r7, r5
6662	eor	r6, r6, r8
6663	eor	r7, r7, r9
6664#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6665	ldr	r4, [r0, #24]
6666	ldr	r5, [r0, #28]
6667#else
6668	ldrd	r4, r5, [r0, #24]
6669#endif
6670#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6671	ldr	r8, [sp, #96]
6672	ldr	r9, [sp, #100]
6673#else
6674	ldrd	r8, r9, [sp, #96]
6675#endif
6676	adds	r4, r4, r6
6677	adc	r5, r5, r7
6678#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6679	ldr	r6, [r3, #96]
6680	ldr	r7, [r3, #100]
6681#else
6682	ldrd	r6, r7, [r3, #96]
6683#endif
6684	adds	r4, r4, r8
6685	adc	r5, r5, r9
6686#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6687	ldr	r8, [r0, #56]
6688	ldr	r9, [r0, #60]
6689#else
6690	ldrd	r8, r9, [r0, #56]
6691#endif
6692	adds	r4, r4, r6
6693	adc	r5, r5, r7
6694#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6695	str	r4, [r0, #24]
6696	str	r5, [r0, #28]
6697#else
6698	strd	r4, r5, [r0, #24]
6699#endif
6700	adds	r8, r8, r4
6701	adc	r9, r9, r5
6702#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6703	ldr	r4, [r0, #32]
6704	ldr	r5, [r0, #36]
6705#else
6706	ldrd	r4, r5, [r0, #32]
6707#endif
6708#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6709	str	r8, [r0, #56]
6710	str	r9, [r0, #60]
6711#else
6712	strd	r8, r9, [r0, #56]
6713#endif
6714	lsrs	r6, r4, #28
6715	lsrs	r7, r5, #28
6716	orr	r7, r7, r4, lsl #4
6717	orr	r6, r6, r5, lsl #4
6718	lsls	r8, r4, #30
6719	lsls	r9, r5, #30
6720	orr	r9, r9, r4, lsr #2
6721	orr	r8, r8, r5, lsr #2
6722	eor	r6, r6, r8
6723	eor	r7, r7, r9
6724	lsls	r8, r4, #25
6725	lsls	r9, r5, #25
6726	orr	r9, r9, r4, lsr #7
6727	orr	r8, r8, r5, lsr #7
6728#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6729	ldr	r4, [r0, #24]
6730	ldr	r5, [r0, #28]
6731#else
6732	ldrd	r4, r5, [r0, #24]
6733#endif
6734	eor	r6, r6, r8
6735	eor	r7, r7, r9
6736	adds	r4, r4, r6
6737	adc	r5, r5, r7
6738#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6739	ldr	r8, [r0, #32]
6740	ldr	r9, [r0, #36]
6741#else
6742	ldrd	r8, r9, [r0, #32]
6743#endif
6744#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6745	ldr	r6, [r0, #40]
6746	ldr	r7, [r0, #44]
6747#else
6748	ldrd	r6, r7, [r0, #40]
6749#endif
6750#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6751	str	r4, [r0, #24]
6752	str	r5, [r0, #28]
6753#else
6754	strd	r4, r5, [r0, #24]
6755#endif
6756	eor	r8, r8, r6
6757	eor	r9, r9, r7
6758	and	r10, r10, r8
6759	and	r11, r11, r9
6760	eor	r10, r10, r6
6761	eor	r11, r11, r7
6762#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6763	ldr	r6, [r0, #24]
6764	ldr	r7, [r0, #28]
6765#else
6766	ldrd	r6, r7, [r0, #24]
6767#endif
6768	adds	r6, r6, r10
6769	adc	r7, r7, r11
6770#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6771	str	r6, [r0, #24]
6772	str	r7, [r0, #28]
6773#else
6774	strd	r6, r7, [r0, #24]
6775#endif
6776	mov	r10, r8
6777	mov	r11, r9
6778	# Round 13
6779#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6780	ldr	r4, [r0, #56]
6781	ldr	r5, [r0, #60]
6782#else
6783	ldrd	r4, r5, [r0, #56]
6784#endif
6785	lsrs	r6, r4, #14
6786	lsrs	r7, r5, #14
6787	orr	r7, r7, r4, lsl #18
6788	orr	r6, r6, r5, lsl #18
6789	lsrs	r8, r4, #18
6790	lsrs	r9, r5, #18
6791	orr	r9, r9, r4, lsl #14
6792	orr	r8, r8, r5, lsl #14
6793	eor	r6, r6, r8
6794	eor	r7, r7, r9
6795	lsls	r8, r4, #23
6796	lsls	r9, r5, #23
6797	orr	r9, r9, r4, lsr #9
6798	orr	r8, r8, r5, lsr #9
6799#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6800	ldr	r4, [r0, #16]
6801	ldr	r5, [r0, #20]
6802#else
6803	ldrd	r4, r5, [r0, #16]
6804#endif
6805	eor	r6, r6, r8
6806	eor	r7, r7, r9
6807	adds	r4, r4, r6
6808	adc	r5, r5, r7
6809#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6810	str	r4, [r0, #16]
6811	str	r5, [r0, #20]
6812#else
6813	strd	r4, r5, [r0, #16]
6814#endif
6815#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6816	ldr	r4, [r0, #56]
6817	ldr	r5, [r0, #60]
6818#else
6819	ldrd	r4, r5, [r0, #56]
6820#endif
6821#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6822	ldm	r0, {r6, r7}
6823#else
6824	ldrd	r6, r7, [r0]
6825#endif
6826#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6827	ldr	r8, [r0, #8]
6828	ldr	r9, [r0, #12]
6829#else
6830	ldrd	r8, r9, [r0, #8]
6831#endif
6832	eor	r6, r6, r8
6833	eor	r7, r7, r9
6834	and	r6, r6, r4
6835	and	r7, r7, r5
6836	eor	r6, r6, r8
6837	eor	r7, r7, r9
6838#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6839	ldr	r4, [r0, #16]
6840	ldr	r5, [r0, #20]
6841#else
6842	ldrd	r4, r5, [r0, #16]
6843#endif
6844#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6845	ldr	r8, [sp, #104]
6846	ldr	r9, [sp, #108]
6847#else
6848	ldrd	r8, r9, [sp, #104]
6849#endif
6850	adds	r4, r4, r6
6851	adc	r5, r5, r7
6852#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6853	ldr	r6, [r3, #104]
6854	ldr	r7, [r3, #108]
6855#else
6856	ldrd	r6, r7, [r3, #104]
6857#endif
6858	adds	r4, r4, r8
6859	adc	r5, r5, r9
6860#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6861	ldr	r8, [r0, #48]
6862	ldr	r9, [r0, #52]
6863#else
6864	ldrd	r8, r9, [r0, #48]
6865#endif
6866	adds	r4, r4, r6
6867	adc	r5, r5, r7
6868#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6869	str	r4, [r0, #16]
6870	str	r5, [r0, #20]
6871#else
6872	strd	r4, r5, [r0, #16]
6873#endif
6874	adds	r8, r8, r4
6875	adc	r9, r9, r5
6876#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6877	ldr	r4, [r0, #24]
6878	ldr	r5, [r0, #28]
6879#else
6880	ldrd	r4, r5, [r0, #24]
6881#endif
6882#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6883	str	r8, [r0, #48]
6884	str	r9, [r0, #52]
6885#else
6886	strd	r8, r9, [r0, #48]
6887#endif
6888	lsrs	r6, r4, #28
6889	lsrs	r7, r5, #28
6890	orr	r7, r7, r4, lsl #4
6891	orr	r6, r6, r5, lsl #4
6892	lsls	r8, r4, #30
6893	lsls	r9, r5, #30
6894	orr	r9, r9, r4, lsr #2
6895	orr	r8, r8, r5, lsr #2
6896	eor	r6, r6, r8
6897	eor	r7, r7, r9
6898	lsls	r8, r4, #25
6899	lsls	r9, r5, #25
6900	orr	r9, r9, r4, lsr #7
6901	orr	r8, r8, r5, lsr #7
6902#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6903	ldr	r4, [r0, #16]
6904	ldr	r5, [r0, #20]
6905#else
6906	ldrd	r4, r5, [r0, #16]
6907#endif
6908	eor	r6, r6, r8
6909	eor	r7, r7, r9
6910	adds	r4, r4, r6
6911	adc	r5, r5, r7
6912#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6913	ldr	r8, [r0, #24]
6914	ldr	r9, [r0, #28]
6915#else
6916	ldrd	r8, r9, [r0, #24]
6917#endif
6918#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6919	ldr	r6, [r0, #32]
6920	ldr	r7, [r0, #36]
6921#else
6922	ldrd	r6, r7, [r0, #32]
6923#endif
6924#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6925	str	r4, [r0, #16]
6926	str	r5, [r0, #20]
6927#else
6928	strd	r4, r5, [r0, #16]
6929#endif
6930	eor	r8, r8, r6
6931	eor	r9, r9, r7
6932	and	r10, r10, r8
6933	and	r11, r11, r9
6934	eor	r10, r10, r6
6935	eor	r11, r11, r7
6936#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6937	ldr	r6, [r0, #16]
6938	ldr	r7, [r0, #20]
6939#else
6940	ldrd	r6, r7, [r0, #16]
6941#endif
6942	adds	r6, r6, r10
6943	adc	r7, r7, r11
6944#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6945	str	r6, [r0, #16]
6946	str	r7, [r0, #20]
6947#else
6948	strd	r6, r7, [r0, #16]
6949#endif
6950	mov	r10, r8
6951	mov	r11, r9
6952	# Round 14
6953#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6954	ldr	r4, [r0, #48]
6955	ldr	r5, [r0, #52]
6956#else
6957	ldrd	r4, r5, [r0, #48]
6958#endif
6959	lsrs	r6, r4, #14
6960	lsrs	r7, r5, #14
6961	orr	r7, r7, r4, lsl #18
6962	orr	r6, r6, r5, lsl #18
6963	lsrs	r8, r4, #18
6964	lsrs	r9, r5, #18
6965	orr	r9, r9, r4, lsl #14
6966	orr	r8, r8, r5, lsl #14
6967	eor	r6, r6, r8
6968	eor	r7, r7, r9
6969	lsls	r8, r4, #23
6970	lsls	r9, r5, #23
6971	orr	r9, r9, r4, lsr #9
6972	orr	r8, r8, r5, lsr #9
6973#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6974	ldr	r4, [r0, #8]
6975	ldr	r5, [r0, #12]
6976#else
6977	ldrd	r4, r5, [r0, #8]
6978#endif
6979	eor	r6, r6, r8
6980	eor	r7, r7, r9
6981	adds	r4, r4, r6
6982	adc	r5, r5, r7
6983#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6984	str	r4, [r0, #8]
6985	str	r5, [r0, #12]
6986#else
6987	strd	r4, r5, [r0, #8]
6988#endif
6989#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6990	ldr	r4, [r0, #48]
6991	ldr	r5, [r0, #52]
6992#else
6993	ldrd	r4, r5, [r0, #48]
6994#endif
6995#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
6996	ldr	r6, [r0, #56]
6997	ldr	r7, [r0, #60]
6998#else
6999	ldrd	r6, r7, [r0, #56]
7000#endif
7001#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7002	ldm	r0, {r8, r9}
7003#else
7004	ldrd	r8, r9, [r0]
7005#endif
7006	eor	r6, r6, r8
7007	eor	r7, r7, r9
7008	and	r6, r6, r4
7009	and	r7, r7, r5
7010	eor	r6, r6, r8
7011	eor	r7, r7, r9
7012#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7013	ldr	r4, [r0, #8]
7014	ldr	r5, [r0, #12]
7015#else
7016	ldrd	r4, r5, [r0, #8]
7017#endif
7018#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7019	ldr	r8, [sp, #112]
7020	ldr	r9, [sp, #116]
7021#else
7022	ldrd	r8, r9, [sp, #112]
7023#endif
7024	adds	r4, r4, r6
7025	adc	r5, r5, r7
7026#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7027	ldr	r6, [r3, #112]
7028	ldr	r7, [r3, #116]
7029#else
7030	ldrd	r6, r7, [r3, #112]
7031#endif
7032	adds	r4, r4, r8
7033	adc	r5, r5, r9
7034#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7035	ldr	r8, [r0, #40]
7036	ldr	r9, [r0, #44]
7037#else
7038	ldrd	r8, r9, [r0, #40]
7039#endif
7040	adds	r4, r4, r6
7041	adc	r5, r5, r7
7042#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7043	str	r4, [r0, #8]
7044	str	r5, [r0, #12]
7045#else
7046	strd	r4, r5, [r0, #8]
7047#endif
7048	adds	r8, r8, r4
7049	adc	r9, r9, r5
7050#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7051	ldr	r4, [r0, #16]
7052	ldr	r5, [r0, #20]
7053#else
7054	ldrd	r4, r5, [r0, #16]
7055#endif
7056#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7057	str	r8, [r0, #40]
7058	str	r9, [r0, #44]
7059#else
7060	strd	r8, r9, [r0, #40]
7061#endif
7062	lsrs	r6, r4, #28
7063	lsrs	r7, r5, #28
7064	orr	r7, r7, r4, lsl #4
7065	orr	r6, r6, r5, lsl #4
7066	lsls	r8, r4, #30
7067	lsls	r9, r5, #30
7068	orr	r9, r9, r4, lsr #2
7069	orr	r8, r8, r5, lsr #2
7070	eor	r6, r6, r8
7071	eor	r7, r7, r9
7072	lsls	r8, r4, #25
7073	lsls	r9, r5, #25
7074	orr	r9, r9, r4, lsr #7
7075	orr	r8, r8, r5, lsr #7
7076#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7077	ldr	r4, [r0, #8]
7078	ldr	r5, [r0, #12]
7079#else
7080	ldrd	r4, r5, [r0, #8]
7081#endif
7082	eor	r6, r6, r8
7083	eor	r7, r7, r9
7084	adds	r4, r4, r6
7085	adc	r5, r5, r7
7086#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7087	ldr	r8, [r0, #16]
7088	ldr	r9, [r0, #20]
7089#else
7090	ldrd	r8, r9, [r0, #16]
7091#endif
7092#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7093	ldr	r6, [r0, #24]
7094	ldr	r7, [r0, #28]
7095#else
7096	ldrd	r6, r7, [r0, #24]
7097#endif
7098#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7099	str	r4, [r0, #8]
7100	str	r5, [r0, #12]
7101#else
7102	strd	r4, r5, [r0, #8]
7103#endif
7104	eor	r8, r8, r6
7105	eor	r9, r9, r7
7106	and	r10, r10, r8
7107	and	r11, r11, r9
7108	eor	r10, r10, r6
7109	eor	r11, r11, r7
7110#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7111	ldr	r6, [r0, #8]
7112	ldr	r7, [r0, #12]
7113#else
7114	ldrd	r6, r7, [r0, #8]
7115#endif
7116	adds	r6, r6, r10
7117	adc	r7, r7, r11
7118#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7119	str	r6, [r0, #8]
7120	str	r7, [r0, #12]
7121#else
7122	strd	r6, r7, [r0, #8]
7123#endif
7124	mov	r10, r8
7125	mov	r11, r9
7126	# Round 15
7127#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7128	ldr	r4, [r0, #40]
7129	ldr	r5, [r0, #44]
7130#else
7131	ldrd	r4, r5, [r0, #40]
7132#endif
7133	lsrs	r6, r4, #14
7134	lsrs	r7, r5, #14
7135	orr	r7, r7, r4, lsl #18
7136	orr	r6, r6, r5, lsl #18
7137	lsrs	r8, r4, #18
7138	lsrs	r9, r5, #18
7139	orr	r9, r9, r4, lsl #14
7140	orr	r8, r8, r5, lsl #14
7141	eor	r6, r6, r8
7142	eor	r7, r7, r9
7143	lsls	r8, r4, #23
7144	lsls	r9, r5, #23
7145	orr	r9, r9, r4, lsr #9
7146	orr	r8, r8, r5, lsr #9
7147#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7148	ldm	r0, {r4, r5}
7149#else
7150	ldrd	r4, r5, [r0]
7151#endif
7152	eor	r6, r6, r8
7153	eor	r7, r7, r9
7154	adds	r4, r4, r6
7155	adc	r5, r5, r7
7156#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7157	stm	r0, {r4, r5}
7158#else
7159	strd	r4, r5, [r0]
7160#endif
7161#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7162	ldr	r4, [r0, #40]
7163	ldr	r5, [r0, #44]
7164#else
7165	ldrd	r4, r5, [r0, #40]
7166#endif
7167#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7168	ldr	r6, [r0, #48]
7169	ldr	r7, [r0, #52]
7170#else
7171	ldrd	r6, r7, [r0, #48]
7172#endif
7173#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7174	ldr	r8, [r0, #56]
7175	ldr	r9, [r0, #60]
7176#else
7177	ldrd	r8, r9, [r0, #56]
7178#endif
7179	eor	r6, r6, r8
7180	eor	r7, r7, r9
7181	and	r6, r6, r4
7182	and	r7, r7, r5
7183	eor	r6, r6, r8
7184	eor	r7, r7, r9
7185#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7186	ldm	r0, {r4, r5}
7187#else
7188	ldrd	r4, r5, [r0]
7189#endif
7190#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7191	ldr	r8, [sp, #120]
7192	ldr	r9, [sp, #124]
7193#else
7194	ldrd	r8, r9, [sp, #120]
7195#endif
7196	adds	r4, r4, r6
7197	adc	r5, r5, r7
7198#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7199	ldr	r6, [r3, #120]
7200	ldr	r7, [r3, #124]
7201#else
7202	ldrd	r6, r7, [r3, #120]
7203#endif
7204	adds	r4, r4, r8
7205	adc	r5, r5, r9
7206#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7207	ldr	r8, [r0, #32]
7208	ldr	r9, [r0, #36]
7209#else
7210	ldrd	r8, r9, [r0, #32]
7211#endif
7212	adds	r4, r4, r6
7213	adc	r5, r5, r7
7214#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7215	stm	r0, {r4, r5}
7216#else
7217	strd	r4, r5, [r0]
7218#endif
7219	adds	r8, r8, r4
7220	adc	r9, r9, r5
7221#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7222	ldr	r4, [r0, #8]
7223	ldr	r5, [r0, #12]
7224#else
7225	ldrd	r4, r5, [r0, #8]
7226#endif
7227#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7228	str	r8, [r0, #32]
7229	str	r9, [r0, #36]
7230#else
7231	strd	r8, r9, [r0, #32]
7232#endif
7233	lsrs	r6, r4, #28
7234	lsrs	r7, r5, #28
7235	orr	r7, r7, r4, lsl #4
7236	orr	r6, r6, r5, lsl #4
7237	lsls	r8, r4, #30
7238	lsls	r9, r5, #30
7239	orr	r9, r9, r4, lsr #2
7240	orr	r8, r8, r5, lsr #2
7241	eor	r6, r6, r8
7242	eor	r7, r7, r9
7243	lsls	r8, r4, #25
7244	lsls	r9, r5, #25
7245	orr	r9, r9, r4, lsr #7
7246	orr	r8, r8, r5, lsr #7
7247#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7248	ldm	r0, {r4, r5}
7249#else
7250	ldrd	r4, r5, [r0]
7251#endif
7252	eor	r6, r6, r8
7253	eor	r7, r7, r9
7254	adds	r4, r4, r6
7255	adc	r5, r5, r7
7256#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7257	ldr	r8, [r0, #8]
7258	ldr	r9, [r0, #12]
7259#else
7260	ldrd	r8, r9, [r0, #8]
7261#endif
7262#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7263	ldr	r6, [r0, #16]
7264	ldr	r7, [r0, #20]
7265#else
7266	ldrd	r6, r7, [r0, #16]
7267#endif
7268#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7269	stm	r0, {r4, r5}
7270#else
7271	strd	r4, r5, [r0]
7272#endif
7273	eor	r8, r8, r6
7274	eor	r9, r9, r7
7275	and	r10, r10, r8
7276	and	r11, r11, r9
7277	eor	r10, r10, r6
7278	eor	r11, r11, r7
7279#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7280	ldm	r0, {r6, r7}
7281#else
7282	ldrd	r6, r7, [r0]
7283#endif
7284	adds	r6, r6, r10
7285	adc	r7, r7, r11
7286#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7287	stm	r0, {r6, r7}
7288#else
7289	strd	r6, r7, [r0]
7290#endif
7291	mov	r10, r8
7292	mov	r11, r9
7293	# Add in digest from start
7294#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7295	ldm	r0, {r4, r5}
7296#else
7297	ldrd	r4, r5, [r0]
7298#endif
7299#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7300	ldr	r6, [r0, #8]
7301	ldr	r7, [r0, #12]
7302#else
7303	ldrd	r6, r7, [r0, #8]
7304#endif
7305#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7306	ldr	r8, [sp, #128]
7307	ldr	r9, [sp, #132]
7308#else
7309	ldrd	r8, r9, [sp, #128]
7310#endif
7311#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7312	ldr	r10, [sp, #136]
7313	ldr	r11, [sp, #140]
7314#else
7315	ldrd	r10, r11, [sp, #136]
7316#endif
7317	adds	r4, r4, r8
7318	adc	r5, r5, r9
7319	adds	r6, r6, r10
7320	adc	r7, r7, r11
7321#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7322	stm	r0, {r4, r5}
7323#else
7324	strd	r4, r5, [r0]
7325#endif
7326#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7327	str	r6, [r0, #8]
7328	str	r7, [r0, #12]
7329#else
7330	strd	r6, r7, [r0, #8]
7331#endif
7332#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7333	str	r4, [sp, #128]
7334	str	r5, [sp, #132]
7335#else
7336	strd	r4, r5, [sp, #128]
7337#endif
7338#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7339	str	r6, [sp, #136]
7340	str	r7, [sp, #140]
7341#else
7342	strd	r6, r7, [sp, #136]
7343#endif
7344#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7345	ldr	r4, [r0, #16]
7346	ldr	r5, [r0, #20]
7347#else
7348	ldrd	r4, r5, [r0, #16]
7349#endif
7350#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7351	ldr	r6, [r0, #24]
7352	ldr	r7, [r0, #28]
7353#else
7354	ldrd	r6, r7, [r0, #24]
7355#endif
7356#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7357	ldr	r8, [sp, #144]
7358	ldr	r9, [sp, #148]
7359#else
7360	ldrd	r8, r9, [sp, #144]
7361#endif
7362#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7363	ldr	r10, [sp, #152]
7364	ldr	r11, [sp, #156]
7365#else
7366	ldrd	r10, r11, [sp, #152]
7367#endif
7368	adds	r4, r4, r8
7369	adc	r5, r5, r9
7370	adds	r6, r6, r10
7371	adc	r7, r7, r11
7372#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7373	str	r4, [r0, #16]
7374	str	r5, [r0, #20]
7375#else
7376	strd	r4, r5, [r0, #16]
7377#endif
7378#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7379	str	r6, [r0, #24]
7380	str	r7, [r0, #28]
7381#else
7382	strd	r6, r7, [r0, #24]
7383#endif
7384#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7385	str	r4, [sp, #144]
7386	str	r5, [sp, #148]
7387#else
7388	strd	r4, r5, [sp, #144]
7389#endif
7390#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7391	str	r6, [sp, #152]
7392	str	r7, [sp, #156]
7393#else
7394	strd	r6, r7, [sp, #152]
7395#endif
7396#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7397	ldr	r4, [r0, #32]
7398	ldr	r5, [r0, #36]
7399#else
7400	ldrd	r4, r5, [r0, #32]
7401#endif
7402#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7403	ldr	r6, [r0, #40]
7404	ldr	r7, [r0, #44]
7405#else
7406	ldrd	r6, r7, [r0, #40]
7407#endif
7408#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7409	ldr	r8, [sp, #160]
7410	ldr	r9, [sp, #164]
7411#else
7412	ldrd	r8, r9, [sp, #160]
7413#endif
7414#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7415	ldr	r10, [sp, #168]
7416	ldr	r11, [sp, #172]
7417#else
7418	ldrd	r10, r11, [sp, #168]
7419#endif
7420	adds	r4, r4, r8
7421	adc	r5, r5, r9
7422	adds	r6, r6, r10
7423	adc	r7, r7, r11
7424#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7425	str	r4, [r0, #32]
7426	str	r5, [r0, #36]
7427#else
7428	strd	r4, r5, [r0, #32]
7429#endif
7430#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7431	str	r6, [r0, #40]
7432	str	r7, [r0, #44]
7433#else
7434	strd	r6, r7, [r0, #40]
7435#endif
7436#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7437	str	r4, [sp, #160]
7438	str	r5, [sp, #164]
7439#else
7440	strd	r4, r5, [sp, #160]
7441#endif
7442#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7443	str	r6, [sp, #168]
7444	str	r7, [sp, #172]
7445#else
7446	strd	r6, r7, [sp, #168]
7447#endif
7448#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7449	ldr	r4, [r0, #48]
7450	ldr	r5, [r0, #52]
7451#else
7452	ldrd	r4, r5, [r0, #48]
7453#endif
7454#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7455	ldr	r6, [r0, #56]
7456	ldr	r7, [r0, #60]
7457#else
7458	ldrd	r6, r7, [r0, #56]
7459#endif
7460#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7461	ldr	r8, [sp, #176]
7462	ldr	r9, [sp, #180]
7463#else
7464	ldrd	r8, r9, [sp, #176]
7465#endif
7466#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7467	ldr	r10, [sp, #184]
7468	ldr	r11, [sp, #188]
7469#else
7470	ldrd	r10, r11, [sp, #184]
7471#endif
7472	adds	r4, r4, r8
7473	adc	r5, r5, r9
7474	adds	r6, r6, r10
7475	adc	r7, r7, r11
7476#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7477	str	r4, [r0, #48]
7478	str	r5, [r0, #52]
7479#else
7480	strd	r4, r5, [r0, #48]
7481#endif
7482#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7483	str	r6, [r0, #56]
7484	str	r7, [r0, #60]
7485#else
7486	strd	r6, r7, [r0, #56]
7487#endif
7488#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7489	str	r4, [sp, #176]
7490	str	r5, [sp, #180]
7491#else
7492	strd	r4, r5, [sp, #176]
7493#endif
7494#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
7495	str	r6, [sp, #184]
7496	str	r7, [sp, #188]
7497#else
7498	strd	r6, r7, [sp, #184]
7499#endif
7500	subs	r2, r2, #0x80
7501	sub	r3, r3, #0x200
7502	add	r1, r1, #0x80
7503	bne	L_SHA512_transform_len_begin
7504	eor	r0, r0, r0
7505	add	sp, sp, #0xc0
7506	pop	{r4, r5, r6, r7, r8, r9, r10, r11, pc}
7507	.size	Transform_Sha512_Len_base,.-Transform_Sha512_Len_base
7508#endif /* WOLFSSL_ARMASM_NO_NEON */
7509#ifndef WOLFSSL_ARMASM_NO_NEON
7510#ifndef __APPLE__
7511	.text
7512	.type	L_SHA512_transform_neon_len_k, %object
7513	.size	L_SHA512_transform_neon_len_k, 640
7514#else
7515	.section	__DATA,__data
7516#endif /* __APPLE__ */
7517	# 16-byte aligned, 128-bit aligned
7518#ifndef __APPLE__
7519	.align	4
7520#else
7521	.p2align	4
7522#endif /* __APPLE__ */
7523L_SHA512_transform_neon_len_k:
7524	.quad	0x428a2f98d728ae22,0x7137449123ef65cd
7525	.quad	0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc
7526	.quad	0x3956c25bf348b538,0x59f111f1b605d019
7527	.quad	0x923f82a4af194f9b,0xab1c5ed5da6d8118
7528	.quad	0xd807aa98a3030242,0x12835b0145706fbe
7529	.quad	0x243185be4ee4b28c,0x550c7dc3d5ffb4e2
7530	.quad	0x72be5d74f27b896f,0x80deb1fe3b1696b1
7531	.quad	0x9bdc06a725c71235,0xc19bf174cf692694
7532	.quad	0xe49b69c19ef14ad2,0xefbe4786384f25e3
7533	.quad	0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65
7534	.quad	0x2de92c6f592b0275,0x4a7484aa6ea6e483
7535	.quad	0x5cb0a9dcbd41fbd4,0x76f988da831153b5
7536	.quad	0x983e5152ee66dfab,0xa831c66d2db43210
7537	.quad	0xb00327c898fb213f,0xbf597fc7beef0ee4
7538	.quad	0xc6e00bf33da88fc2,0xd5a79147930aa725
7539	.quad	0x06ca6351e003826f,0x142929670a0e6e70
7540	.quad	0x27b70a8546d22ffc,0x2e1b21385c26c926
7541	.quad	0x4d2c6dfc5ac42aed,0x53380d139d95b3df
7542	.quad	0x650a73548baf63de,0x766a0abb3c77b2a8
7543	.quad	0x81c2c92e47edaee6,0x92722c851482353b
7544	.quad	0xa2bfe8a14cf10364,0xa81a664bbc423001
7545	.quad	0xc24b8b70d0f89791,0xc76c51a30654be30
7546	.quad	0xd192e819d6ef5218,0xd69906245565a910
7547	.quad	0xf40e35855771202a,0x106aa07032bbd1b8
7548	.quad	0x19a4c116b8d2d0c8,0x1e376c085141ab53
7549	.quad	0x2748774cdf8eeb99,0x34b0bcb5e19b48a8
7550	.quad	0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb
7551	.quad	0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3
7552	.quad	0x748f82ee5defb2fc,0x78a5636f43172f60
7553	.quad	0x84c87814a1f0ab72,0x8cc702081a6439ec
7554	.quad	0x90befffa23631e28,0xa4506cebde82bde9
7555	.quad	0xbef9a3f7b2c67915,0xc67178f2e372532b
7556	.quad	0xca273eceea26619c,0xd186b8c721c0c207
7557	.quad	0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178
7558	.quad	0x06f067aa72176fba,0x0a637dc5a2c898a6
7559	.quad	0x113f9804bef90dae,0x1b710b35131c471b
7560	.quad	0x28db77f523047d84,0x32caab7b40c72493
7561	.quad	0x3c9ebe0a15c9bebc,0x431d67c49c100d4c
7562	.quad	0x4cc5d4becb3e42b6,0x597f299cfc657e2a
7563	.quad	0x5fcb6fab3ad6faec,0x6c44198c4a475817
7564	.text
7565	.align	4
7566	.fpu	neon
7567	.globl	Transform_Sha512_Len_neon
7568	.type	Transform_Sha512_Len_neon, %function
7569Transform_Sha512_Len_neon:
7570	vpush	{d8-d15}
7571	adr	r3, L_SHA512_transform_neon_len_k
7572	# Load digest into working vars
7573	vldm.64	r0, {d0-d7}
7574	# Start of loop processing a block
7575L_SHA512_transform_neon_len_begin:
7576	# Load W
7577	vld1.8	{q8-q9}, [r1]!
7578	vld1.8	{q10-q11}, [r1]!
7579	vld1.8	{q12-q13}, [r1]!
7580	vld1.8	{q14-q15}, [r1]!
7581#ifndef WOLFSSL_ARM_ARCH_NEON_64BIT
7582	vrev64.8	q8, q8
7583	vrev64.8	q9, q9
7584	vrev64.8	q10, q10
7585	vrev64.8	q11, q11
7586	vrev64.8	q12, q12
7587	vrev64.8	q13, q13
7588	vrev64.8	q14, q14
7589	vrev64.8	q15, q15
7590#else
7591	vrev64.8	d16, d16
7592	vrev64.8	d17, d17
7593	vrev64.8	d18, d18
7594	vrev64.8	d19, d19
7595	vrev64.8	d20, d20
7596	vrev64.8	d21, d21
7597	vrev64.8	d22, d22
7598	vrev64.8	d23, d23
7599	vrev64.8	d24, d24
7600	vrev64.8	d25, d25
7601	vrev64.8	d26, d26
7602	vrev64.8	d27, d27
7603	vrev64.8	d28, d28
7604	vrev64.8	d29, d29
7605	vrev64.8	d30, d30
7606	vrev64.8	d31, d31
7607#endif /* WOLFSSL_ARM_ARCH_NEON_64BIT */
7608	mov	r12, #4
7609	# Start of 16 rounds
7610L_SHA512_transform_neon_len_start:
7611	# Round 0
7612	vld1.64	{d12}, [r3:64]!
7613	vshl.u64	d8, d4, #50
7614	vsri.u64	d8, d4, #14
7615	vshl.u64	d9, d0, #36
7616	vsri.u64	d9, d0, #28
7617	vshl.u64	d10, d4, #46
7618	vsri.u64	d10, d4, #18
7619	vshl.u64	d11, d0, #30
7620	vsri.u64	d11, d0, #34
7621	veor	d8, d10
7622	veor	d9, d11
7623	vshl.u64	d10, d4, #23
7624	vsri.u64	d10, d4, #41
7625	vshl.u64	d11, d0, #25
7626	vsri.u64	d11, d0, #39
7627	veor	d8, d10
7628	veor	d9, d11
7629	vadd.i64	d7, d8
7630	vadd.i64	d12, d16
7631	vmov	d8, d4
7632	veor	d10, d1, d2
7633	vadd.i64	d7, d12
7634	vbsl	d8, d5, d6
7635	vbsl	d10, d0, d2
7636	vadd.i64	d7, d8
7637	vadd.i64	d10, d9
7638	vadd.i64	d3, d7
7639	vadd.i64	d7, d10
7640	# Round 1
7641	vld1.64	{d12}, [r3:64]!
7642	vshl.u64	d8, d3, #50
7643	vsri.u64	d8, d3, #14
7644	vshl.u64	d9, d7, #36
7645	vsri.u64	d9, d7, #28
7646	vshl.u64	d10, d3, #46
7647	vsri.u64	d10, d3, #18
7648	vshl.u64	d11, d7, #30
7649	vsri.u64	d11, d7, #34
7650	veor	d8, d10
7651	veor	d9, d11
7652	vshl.u64	d10, d3, #23
7653	vsri.u64	d10, d3, #41
7654	vshl.u64	d11, d7, #25
7655	vsri.u64	d11, d7, #39
7656	veor	d8, d10
7657	veor	d9, d11
7658	vadd.i64	d6, d8
7659	vadd.i64	d12, d17
7660	vmov	d8, d3
7661	veor	d10, d0, d1
7662	vadd.i64	d6, d12
7663	vbsl	d8, d4, d5
7664	vbsl	d10, d7, d1
7665	vadd.i64	d6, d8
7666	vadd.i64	d10, d9
7667	vadd.i64	d2, d6
7668	vadd.i64	d6, d10
7669#ifndef WOLFSSL_ARM_ARCH_NEON_64BIT
7670	# Calc new W[0]-W[1]
7671	vext.8	q6, q8, q9, #8
7672	vshl.u64	q4, q15, #45
7673	vsri.u64	q4, q15, #19
7674	vshl.u64	q5, q15, #3
7675	vsri.u64	q5, q15, #61
7676	veor	q5, q4
7677	vshr.u64	q4, q15, #6
7678	veor	q5, q4
7679	vadd.i64	q8, q5
7680	vext.8	q7, q12, q13, #8
7681	vadd.i64	q8, q7
7682	vshl.u64	q4, q6, #63
7683	vsri.u64	q4, q6, #1
7684	vshl.u64	q5, q6, #56
7685	vsri.u64	q5, q6, #8
7686	veor	q5, q4
7687	vshr.u64	q6, #7
7688	veor	q5, q6
7689	vadd.i64	q8, q5
7690#else
7691	# Calc new W[0]-W[1]
7692	vmov	d12, d17
7693	vmov	d13, d18
7694	vshl.u64	d8, d30, #45
7695	vshl.u64	d9, d31, #45
7696	vsri.u64	d8, d30, #19
7697	vsri.u64	d9, d31, #19
7698	vshl.u64	d10, d30, #3
7699	vshl.u64	d11, d31, #3
7700	vsri.u64	d10, d30, #61
7701	vsri.u64	d11, d31, #61
7702	veor	d10, d8
7703	veor	d11, d9
7704	vshr.u64	d8, d30, #6
7705	vshr.u64	d9, d31, #6
7706	veor	d10, d8
7707	veor	d11, d9
7708	vadd.i64	d16, d10
7709	vadd.i64	d17, d11
7710	vmov	d14, d25
7711	vmov	d15, d26
7712	vadd.i64	d16, d14
7713	vadd.i64	d17, d15
7714	vshl.u64	d8, d12, #63
7715	vshl.u64	d9, d13, #63
7716	vsri.u64	d8, d12, #1
7717	vsri.u64	d9, d13, #1
7718	vshl.u64	d10, d12, #56
7719	vshl.u64	d11, d13, #56
7720	vsri.u64	d10, d12, #8
7721	vsri.u64	d11, d13, #8
7722	veor	d10, d8
7723	veor	d11, d9
7724	vshr.u64	d12, #7
7725	vshr.u64	d13, #7
7726	veor	d10, d12
7727	veor	d11, d13
7728	vadd.i64	d16, d10
7729	vadd.i64	d17, d11
7730#endif /* WOLFSSL_ARM_ARCH_NEON_64BIT */
7731	# Round 2
7732	vld1.64	{d12}, [r3:64]!
7733	vshl.u64	d8, d2, #50
7734	vsri.u64	d8, d2, #14
7735	vshl.u64	d9, d6, #36
7736	vsri.u64	d9, d6, #28
7737	vshl.u64	d10, d2, #46
7738	vsri.u64	d10, d2, #18
7739	vshl.u64	d11, d6, #30
7740	vsri.u64	d11, d6, #34
7741	veor	d8, d10
7742	veor	d9, d11
7743	vshl.u64	d10, d2, #23
7744	vsri.u64	d10, d2, #41
7745	vshl.u64	d11, d6, #25
7746	vsri.u64	d11, d6, #39
7747	veor	d8, d10
7748	veor	d9, d11
7749	vadd.i64	d5, d8
7750	vadd.i64	d12, d18
7751	vmov	d8, d2
7752	veor	d10, d7, d0
7753	vadd.i64	d5, d12
7754	vbsl	d8, d3, d4
7755	vbsl	d10, d6, d0
7756	vadd.i64	d5, d8
7757	vadd.i64	d10, d9
7758	vadd.i64	d1, d5
7759	vadd.i64	d5, d10
7760	# Round 3
7761	vld1.64	{d12}, [r3:64]!
7762	vshl.u64	d8, d1, #50
7763	vsri.u64	d8, d1, #14
7764	vshl.u64	d9, d5, #36
7765	vsri.u64	d9, d5, #28
7766	vshl.u64	d10, d1, #46
7767	vsri.u64	d10, d1, #18
7768	vshl.u64	d11, d5, #30
7769	vsri.u64	d11, d5, #34
7770	veor	d8, d10
7771	veor	d9, d11
7772	vshl.u64	d10, d1, #23
7773	vsri.u64	d10, d1, #41
7774	vshl.u64	d11, d5, #25
7775	vsri.u64	d11, d5, #39
7776	veor	d8, d10
7777	veor	d9, d11
7778	vadd.i64	d4, d8
7779	vadd.i64	d12, d19
7780	vmov	d8, d1
7781	veor	d10, d6, d7
7782	vadd.i64	d4, d12
7783	vbsl	d8, d2, d3
7784	vbsl	d10, d5, d7
7785	vadd.i64	d4, d8
7786	vadd.i64	d10, d9
7787	vadd.i64	d0, d4
7788	vadd.i64	d4, d10
7789#ifndef WOLFSSL_ARM_ARCH_NEON_64BIT
7790	# Calc new W[2]-W[3]
7791	vext.8	q6, q9, q10, #8
7792	vshl.u64	q4, q8, #45
7793	vsri.u64	q4, q8, #19
7794	vshl.u64	q5, q8, #3
7795	vsri.u64	q5, q8, #61
7796	veor	q5, q4
7797	vshr.u64	q4, q8, #6
7798	veor	q5, q4
7799	vadd.i64	q9, q5
7800	vext.8	q7, q13, q14, #8
7801	vadd.i64	q9, q7
7802	vshl.u64	q4, q6, #63
7803	vsri.u64	q4, q6, #1
7804	vshl.u64	q5, q6, #56
7805	vsri.u64	q5, q6, #8
7806	veor	q5, q4
7807	vshr.u64	q6, #7
7808	veor	q5, q6
7809	vadd.i64	q9, q5
7810#else
7811	# Calc new W[2]-W[3]
7812	vmov	d12, d19
7813	vmov	d13, d20
7814	vshl.u64	d8, d16, #45
7815	vshl.u64	d9, d17, #45
7816	vsri.u64	d8, d16, #19
7817	vsri.u64	d9, d17, #19
7818	vshl.u64	d10, d16, #3
7819	vshl.u64	d11, d17, #3
7820	vsri.u64	d10, d16, #61
7821	vsri.u64	d11, d17, #61
7822	veor	d10, d8
7823	veor	d11, d9
7824	vshr.u64	d8, d16, #6
7825	vshr.u64	d9, d17, #6
7826	veor	d10, d8
7827	veor	d11, d9
7828	vadd.i64	d18, d10
7829	vadd.i64	d19, d11
7830	vmov	d14, d27
7831	vmov	d15, d28
7832	vadd.i64	d18, d14
7833	vadd.i64	d19, d15
7834	vshl.u64	d8, d12, #63
7835	vshl.u64	d9, d13, #63
7836	vsri.u64	d8, d12, #1
7837	vsri.u64	d9, d13, #1
7838	vshl.u64	d10, d12, #56
7839	vshl.u64	d11, d13, #56
7840	vsri.u64	d10, d12, #8
7841	vsri.u64	d11, d13, #8
7842	veor	d10, d8
7843	veor	d11, d9
7844	vshr.u64	d12, #7
7845	vshr.u64	d13, #7
7846	veor	d10, d12
7847	veor	d11, d13
7848	vadd.i64	d18, d10
7849	vadd.i64	d19, d11
7850#endif /* WOLFSSL_ARM_ARCH_NEON_64BIT */
7851	# Round 4
7852	vld1.64	{d12}, [r3:64]!
7853	vshl.u64	d8, d0, #50
7854	vsri.u64	d8, d0, #14
7855	vshl.u64	d9, d4, #36
7856	vsri.u64	d9, d4, #28
7857	vshl.u64	d10, d0, #46
7858	vsri.u64	d10, d0, #18
7859	vshl.u64	d11, d4, #30
7860	vsri.u64	d11, d4, #34
7861	veor	d8, d10
7862	veor	d9, d11
7863	vshl.u64	d10, d0, #23
7864	vsri.u64	d10, d0, #41
7865	vshl.u64	d11, d4, #25
7866	vsri.u64	d11, d4, #39
7867	veor	d8, d10
7868	veor	d9, d11
7869	vadd.i64	d3, d8
7870	vadd.i64	d12, d20
7871	vmov	d8, d0
7872	veor	d10, d5, d6
7873	vadd.i64	d3, d12
7874	vbsl	d8, d1, d2
7875	vbsl	d10, d4, d6
7876	vadd.i64	d3, d8
7877	vadd.i64	d10, d9
7878	vadd.i64	d7, d3
7879	vadd.i64	d3, d10
7880	# Round 5
7881	vld1.64	{d12}, [r3:64]!
7882	vshl.u64	d8, d7, #50
7883	vsri.u64	d8, d7, #14
7884	vshl.u64	d9, d3, #36
7885	vsri.u64	d9, d3, #28
7886	vshl.u64	d10, d7, #46
7887	vsri.u64	d10, d7, #18
7888	vshl.u64	d11, d3, #30
7889	vsri.u64	d11, d3, #34
7890	veor	d8, d10
7891	veor	d9, d11
7892	vshl.u64	d10, d7, #23
7893	vsri.u64	d10, d7, #41
7894	vshl.u64	d11, d3, #25
7895	vsri.u64	d11, d3, #39
7896	veor	d8, d10
7897	veor	d9, d11
7898	vadd.i64	d2, d8
7899	vadd.i64	d12, d21
7900	vmov	d8, d7
7901	veor	d10, d4, d5
7902	vadd.i64	d2, d12
7903	vbsl	d8, d0, d1
7904	vbsl	d10, d3, d5
7905	vadd.i64	d2, d8
7906	vadd.i64	d10, d9
7907	vadd.i64	d6, d2
7908	vadd.i64	d2, d10
7909#ifndef WOLFSSL_ARM_ARCH_NEON_64BIT
7910	# Calc new W[4]-W[5]
7911	vext.8	q6, q10, q11, #8
7912	vshl.u64	q4, q9, #45
7913	vsri.u64	q4, q9, #19
7914	vshl.u64	q5, q9, #3
7915	vsri.u64	q5, q9, #61
7916	veor	q5, q4
7917	vshr.u64	q4, q9, #6
7918	veor	q5, q4
7919	vadd.i64	q10, q5
7920	vext.8	q7, q14, q15, #8
7921	vadd.i64	q10, q7
7922	vshl.u64	q4, q6, #63
7923	vsri.u64	q4, q6, #1
7924	vshl.u64	q5, q6, #56
7925	vsri.u64	q5, q6, #8
7926	veor	q5, q4
7927	vshr.u64	q6, #7
7928	veor	q5, q6
7929	vadd.i64	q10, q5
7930#else
7931	# Calc new W[4]-W[5]
7932	vmov	d12, d21
7933	vmov	d13, d22
7934	vshl.u64	d8, d18, #45
7935	vshl.u64	d9, d19, #45
7936	vsri.u64	d8, d18, #19
7937	vsri.u64	d9, d19, #19
7938	vshl.u64	d10, d18, #3
7939	vshl.u64	d11, d19, #3
7940	vsri.u64	d10, d18, #61
7941	vsri.u64	d11, d19, #61
7942	veor	d10, d8
7943	veor	d11, d9
7944	vshr.u64	d8, d18, #6
7945	vshr.u64	d9, d19, #6
7946	veor	d10, d8
7947	veor	d11, d9
7948	vadd.i64	d20, d10
7949	vadd.i64	d21, d11
7950	vmov	d14, d29
7951	vmov	d15, d30
7952	vadd.i64	d20, d14
7953	vadd.i64	d21, d15
7954	vshl.u64	d8, d12, #63
7955	vshl.u64	d9, d13, #63
7956	vsri.u64	d8, d12, #1
7957	vsri.u64	d9, d13, #1
7958	vshl.u64	d10, d12, #56
7959	vshl.u64	d11, d13, #56
7960	vsri.u64	d10, d12, #8
7961	vsri.u64	d11, d13, #8
7962	veor	d10, d8
7963	veor	d11, d9
7964	vshr.u64	d12, #7
7965	vshr.u64	d13, #7
7966	veor	d10, d12
7967	veor	d11, d13
7968	vadd.i64	d20, d10
7969	vadd.i64	d21, d11
7970#endif /* WOLFSSL_ARM_ARCH_NEON_64BIT */
7971	# Round 6
7972	vld1.64	{d12}, [r3:64]!
7973	vshl.u64	d8, d6, #50
7974	vsri.u64	d8, d6, #14
7975	vshl.u64	d9, d2, #36
7976	vsri.u64	d9, d2, #28
7977	vshl.u64	d10, d6, #46
7978	vsri.u64	d10, d6, #18
7979	vshl.u64	d11, d2, #30
7980	vsri.u64	d11, d2, #34
7981	veor	d8, d10
7982	veor	d9, d11
7983	vshl.u64	d10, d6, #23
7984	vsri.u64	d10, d6, #41
7985	vshl.u64	d11, d2, #25
7986	vsri.u64	d11, d2, #39
7987	veor	d8, d10
7988	veor	d9, d11
7989	vadd.i64	d1, d8
7990	vadd.i64	d12, d22
7991	vmov	d8, d6
7992	veor	d10, d3, d4
7993	vadd.i64	d1, d12
7994	vbsl	d8, d7, d0
7995	vbsl	d10, d2, d4
7996	vadd.i64	d1, d8
7997	vadd.i64	d10, d9
7998	vadd.i64	d5, d1
7999	vadd.i64	d1, d10
8000	# Round 7
8001	vld1.64	{d12}, [r3:64]!
8002	vshl.u64	d8, d5, #50
8003	vsri.u64	d8, d5, #14
8004	vshl.u64	d9, d1, #36
8005	vsri.u64	d9, d1, #28
8006	vshl.u64	d10, d5, #46
8007	vsri.u64	d10, d5, #18
8008	vshl.u64	d11, d1, #30
8009	vsri.u64	d11, d1, #34
8010	veor	d8, d10
8011	veor	d9, d11
8012	vshl.u64	d10, d5, #23
8013	vsri.u64	d10, d5, #41
8014	vshl.u64	d11, d1, #25
8015	vsri.u64	d11, d1, #39
8016	veor	d8, d10
8017	veor	d9, d11
8018	vadd.i64	d0, d8
8019	vadd.i64	d12, d23
8020	vmov	d8, d5
8021	veor	d10, d2, d3
8022	vadd.i64	d0, d12
8023	vbsl	d8, d6, d7
8024	vbsl	d10, d1, d3
8025	vadd.i64	d0, d8
8026	vadd.i64	d10, d9
8027	vadd.i64	d4, d0
8028	vadd.i64	d0, d10
8029#ifndef WOLFSSL_ARM_ARCH_NEON_64BIT
8030	# Calc new W[6]-W[7]
8031	vext.8	q6, q11, q12, #8
8032	vshl.u64	q4, q10, #45
8033	vsri.u64	q4, q10, #19
8034	vshl.u64	q5, q10, #3
8035	vsri.u64	q5, q10, #61
8036	veor	q5, q4
8037	vshr.u64	q4, q10, #6
8038	veor	q5, q4
8039	vadd.i64	q11, q5
8040	vext.8	q7, q15, q8, #8
8041	vadd.i64	q11, q7
8042	vshl.u64	q4, q6, #63
8043	vsri.u64	q4, q6, #1
8044	vshl.u64	q5, q6, #56
8045	vsri.u64	q5, q6, #8
8046	veor	q5, q4
8047	vshr.u64	q6, #7
8048	veor	q5, q6
8049	vadd.i64	q11, q5
8050#else
8051	# Calc new W[6]-W[7]
8052	vmov	d12, d23
8053	vmov	d13, d24
8054	vshl.u64	d8, d20, #45
8055	vshl.u64	d9, d21, #45
8056	vsri.u64	d8, d20, #19
8057	vsri.u64	d9, d21, #19
8058	vshl.u64	d10, d20, #3
8059	vshl.u64	d11, d21, #3
8060	vsri.u64	d10, d20, #61
8061	vsri.u64	d11, d21, #61
8062	veor	d10, d8
8063	veor	d11, d9
8064	vshr.u64	d8, d20, #6
8065	vshr.u64	d9, d21, #6
8066	veor	d10, d8
8067	veor	d11, d9
8068	vadd.i64	d22, d10
8069	vadd.i64	d23, d11
8070	vmov	d14, d31
8071	vmov	d15, d16
8072	vadd.i64	d22, d14
8073	vadd.i64	d23, d15
8074	vshl.u64	d8, d12, #63
8075	vshl.u64	d9, d13, #63
8076	vsri.u64	d8, d12, #1
8077	vsri.u64	d9, d13, #1
8078	vshl.u64	d10, d12, #56
8079	vshl.u64	d11, d13, #56
8080	vsri.u64	d10, d12, #8
8081	vsri.u64	d11, d13, #8
8082	veor	d10, d8
8083	veor	d11, d9
8084	vshr.u64	d12, #7
8085	vshr.u64	d13, #7
8086	veor	d10, d12
8087	veor	d11, d13
8088	vadd.i64	d22, d10
8089	vadd.i64	d23, d11
8090#endif /* WOLFSSL_ARM_ARCH_NEON_64BIT */
8091	# Round 8
8092	vld1.64	{d12}, [r3:64]!
8093	vshl.u64	d8, d4, #50
8094	vsri.u64	d8, d4, #14
8095	vshl.u64	d9, d0, #36
8096	vsri.u64	d9, d0, #28
8097	vshl.u64	d10, d4, #46
8098	vsri.u64	d10, d4, #18
8099	vshl.u64	d11, d0, #30
8100	vsri.u64	d11, d0, #34
8101	veor	d8, d10
8102	veor	d9, d11
8103	vshl.u64	d10, d4, #23
8104	vsri.u64	d10, d4, #41
8105	vshl.u64	d11, d0, #25
8106	vsri.u64	d11, d0, #39
8107	veor	d8, d10
8108	veor	d9, d11
8109	vadd.i64	d7, d8
8110	vadd.i64	d12, d24
8111	vmov	d8, d4
8112	veor	d10, d1, d2
8113	vadd.i64	d7, d12
8114	vbsl	d8, d5, d6
8115	vbsl	d10, d0, d2
8116	vadd.i64	d7, d8
8117	vadd.i64	d10, d9
8118	vadd.i64	d3, d7
8119	vadd.i64	d7, d10
8120	# Round 9
8121	vld1.64	{d12}, [r3:64]!
8122	vshl.u64	d8, d3, #50
8123	vsri.u64	d8, d3, #14
8124	vshl.u64	d9, d7, #36
8125	vsri.u64	d9, d7, #28
8126	vshl.u64	d10, d3, #46
8127	vsri.u64	d10, d3, #18
8128	vshl.u64	d11, d7, #30
8129	vsri.u64	d11, d7, #34
8130	veor	d8, d10
8131	veor	d9, d11
8132	vshl.u64	d10, d3, #23
8133	vsri.u64	d10, d3, #41
8134	vshl.u64	d11, d7, #25
8135	vsri.u64	d11, d7, #39
8136	veor	d8, d10
8137	veor	d9, d11
8138	vadd.i64	d6, d8
8139	vadd.i64	d12, d25
8140	vmov	d8, d3
8141	veor	d10, d0, d1
8142	vadd.i64	d6, d12
8143	vbsl	d8, d4, d5
8144	vbsl	d10, d7, d1
8145	vadd.i64	d6, d8
8146	vadd.i64	d10, d9
8147	vadd.i64	d2, d6
8148	vadd.i64	d6, d10
8149#ifndef WOLFSSL_ARM_ARCH_NEON_64BIT
8150	# Calc new W[8]-W[9]
8151	vext.8	q6, q12, q13, #8
8152	vshl.u64	q4, q11, #45
8153	vsri.u64	q4, q11, #19
8154	vshl.u64	q5, q11, #3
8155	vsri.u64	q5, q11, #61
8156	veor	q5, q4
8157	vshr.u64	q4, q11, #6
8158	veor	q5, q4
8159	vadd.i64	q12, q5
8160	vext.8	q7, q8, q9, #8
8161	vadd.i64	q12, q7
8162	vshl.u64	q4, q6, #63
8163	vsri.u64	q4, q6, #1
8164	vshl.u64	q5, q6, #56
8165	vsri.u64	q5, q6, #8
8166	veor	q5, q4
8167	vshr.u64	q6, #7
8168	veor	q5, q6
8169	vadd.i64	q12, q5
8170#else
8171	# Calc new W[8]-W[9]
8172	vmov	d12, d25
8173	vmov	d13, d26
8174	vshl.u64	d8, d22, #45
8175	vshl.u64	d9, d23, #45
8176	vsri.u64	d8, d22, #19
8177	vsri.u64	d9, d23, #19
8178	vshl.u64	d10, d22, #3
8179	vshl.u64	d11, d23, #3
8180	vsri.u64	d10, d22, #61
8181	vsri.u64	d11, d23, #61
8182	veor	d10, d8
8183	veor	d11, d9
8184	vshr.u64	d8, d22, #6
8185	vshr.u64	d9, d23, #6
8186	veor	d10, d8
8187	veor	d11, d9
8188	vadd.i64	d24, d10
8189	vadd.i64	d25, d11
8190	vmov	d14, d17
8191	vmov	d15, d18
8192	vadd.i64	d24, d14
8193	vadd.i64	d25, d15
8194	vshl.u64	d8, d12, #63
8195	vshl.u64	d9, d13, #63
8196	vsri.u64	d8, d12, #1
8197	vsri.u64	d9, d13, #1
8198	vshl.u64	d10, d12, #56
8199	vshl.u64	d11, d13, #56
8200	vsri.u64	d10, d12, #8
8201	vsri.u64	d11, d13, #8
8202	veor	d10, d8
8203	veor	d11, d9
8204	vshr.u64	d12, #7
8205	vshr.u64	d13, #7
8206	veor	d10, d12
8207	veor	d11, d13
8208	vadd.i64	d24, d10
8209	vadd.i64	d25, d11
8210#endif /* WOLFSSL_ARM_ARCH_NEON_64BIT */
8211	# Round 10
8212	vld1.64	{d12}, [r3:64]!
8213	vshl.u64	d8, d2, #50
8214	vsri.u64	d8, d2, #14
8215	vshl.u64	d9, d6, #36
8216	vsri.u64	d9, d6, #28
8217	vshl.u64	d10, d2, #46
8218	vsri.u64	d10, d2, #18
8219	vshl.u64	d11, d6, #30
8220	vsri.u64	d11, d6, #34
8221	veor	d8, d10
8222	veor	d9, d11
8223	vshl.u64	d10, d2, #23
8224	vsri.u64	d10, d2, #41
8225	vshl.u64	d11, d6, #25
8226	vsri.u64	d11, d6, #39
8227	veor	d8, d10
8228	veor	d9, d11
8229	vadd.i64	d5, d8
8230	vadd.i64	d12, d26
8231	vmov	d8, d2
8232	veor	d10, d7, d0
8233	vadd.i64	d5, d12
8234	vbsl	d8, d3, d4
8235	vbsl	d10, d6, d0
8236	vadd.i64	d5, d8
8237	vadd.i64	d10, d9
8238	vadd.i64	d1, d5
8239	vadd.i64	d5, d10
8240	# Round 11
8241	vld1.64	{d12}, [r3:64]!
8242	vshl.u64	d8, d1, #50
8243	vsri.u64	d8, d1, #14
8244	vshl.u64	d9, d5, #36
8245	vsri.u64	d9, d5, #28
8246	vshl.u64	d10, d1, #46
8247	vsri.u64	d10, d1, #18
8248	vshl.u64	d11, d5, #30
8249	vsri.u64	d11, d5, #34
8250	veor	d8, d10
8251	veor	d9, d11
8252	vshl.u64	d10, d1, #23
8253	vsri.u64	d10, d1, #41
8254	vshl.u64	d11, d5, #25
8255	vsri.u64	d11, d5, #39
8256	veor	d8, d10
8257	veor	d9, d11
8258	vadd.i64	d4, d8
8259	vadd.i64	d12, d27
8260	vmov	d8, d1
8261	veor	d10, d6, d7
8262	vadd.i64	d4, d12
8263	vbsl	d8, d2, d3
8264	vbsl	d10, d5, d7
8265	vadd.i64	d4, d8
8266	vadd.i64	d10, d9
8267	vadd.i64	d0, d4
8268	vadd.i64	d4, d10
8269#ifndef WOLFSSL_ARM_ARCH_NEON_64BIT
8270	# Calc new W[10]-W[11]
8271	vext.8	q6, q13, q14, #8
8272	vshl.u64	q4, q12, #45
8273	vsri.u64	q4, q12, #19
8274	vshl.u64	q5, q12, #3
8275	vsri.u64	q5, q12, #61
8276	veor	q5, q4
8277	vshr.u64	q4, q12, #6
8278	veor	q5, q4
8279	vadd.i64	q13, q5
8280	vext.8	q7, q9, q10, #8
8281	vadd.i64	q13, q7
8282	vshl.u64	q4, q6, #63
8283	vsri.u64	q4, q6, #1
8284	vshl.u64	q5, q6, #56
8285	vsri.u64	q5, q6, #8
8286	veor	q5, q4
8287	vshr.u64	q6, #7
8288	veor	q5, q6
8289	vadd.i64	q13, q5
8290#else
8291	# Calc new W[10]-W[11]
8292	vmov	d12, d27
8293	vmov	d13, d28
8294	vshl.u64	d8, d24, #45
8295	vshl.u64	d9, d25, #45
8296	vsri.u64	d8, d24, #19
8297	vsri.u64	d9, d25, #19
8298	vshl.u64	d10, d24, #3
8299	vshl.u64	d11, d25, #3
8300	vsri.u64	d10, d24, #61
8301	vsri.u64	d11, d25, #61
8302	veor	d10, d8
8303	veor	d11, d9
8304	vshr.u64	d8, d24, #6
8305	vshr.u64	d9, d25, #6
8306	veor	d10, d8
8307	veor	d11, d9
8308	vadd.i64	d26, d10
8309	vadd.i64	d27, d11
8310	vmov	d14, d19
8311	vmov	d15, d20
8312	vadd.i64	d26, d14
8313	vadd.i64	d27, d15
8314	vshl.u64	d8, d12, #63
8315	vshl.u64	d9, d13, #63
8316	vsri.u64	d8, d12, #1
8317	vsri.u64	d9, d13, #1
8318	vshl.u64	d10, d12, #56
8319	vshl.u64	d11, d13, #56
8320	vsri.u64	d10, d12, #8
8321	vsri.u64	d11, d13, #8
8322	veor	d10, d8
8323	veor	d11, d9
8324	vshr.u64	d12, #7
8325	vshr.u64	d13, #7
8326	veor	d10, d12
8327	veor	d11, d13
8328	vadd.i64	d26, d10
8329	vadd.i64	d27, d11
8330#endif /* WOLFSSL_ARM_ARCH_NEON_64BIT */
8331	# Round 12
8332	vld1.64	{d12}, [r3:64]!
8333	vshl.u64	d8, d0, #50
8334	vsri.u64	d8, d0, #14
8335	vshl.u64	d9, d4, #36
8336	vsri.u64	d9, d4, #28
8337	vshl.u64	d10, d0, #46
8338	vsri.u64	d10, d0, #18
8339	vshl.u64	d11, d4, #30
8340	vsri.u64	d11, d4, #34
8341	veor	d8, d10
8342	veor	d9, d11
8343	vshl.u64	d10, d0, #23
8344	vsri.u64	d10, d0, #41
8345	vshl.u64	d11, d4, #25
8346	vsri.u64	d11, d4, #39
8347	veor	d8, d10
8348	veor	d9, d11
8349	vadd.i64	d3, d8
8350	vadd.i64	d12, d28
8351	vmov	d8, d0
8352	veor	d10, d5, d6
8353	vadd.i64	d3, d12
8354	vbsl	d8, d1, d2
8355	vbsl	d10, d4, d6
8356	vadd.i64	d3, d8
8357	vadd.i64	d10, d9
8358	vadd.i64	d7, d3
8359	vadd.i64	d3, d10
8360	# Round 13
8361	vld1.64	{d12}, [r3:64]!
8362	vshl.u64	d8, d7, #50
8363	vsri.u64	d8, d7, #14
8364	vshl.u64	d9, d3, #36
8365	vsri.u64	d9, d3, #28
8366	vshl.u64	d10, d7, #46
8367	vsri.u64	d10, d7, #18
8368	vshl.u64	d11, d3, #30
8369	vsri.u64	d11, d3, #34
8370	veor	d8, d10
8371	veor	d9, d11
8372	vshl.u64	d10, d7, #23
8373	vsri.u64	d10, d7, #41
8374	vshl.u64	d11, d3, #25
8375	vsri.u64	d11, d3, #39
8376	veor	d8, d10
8377	veor	d9, d11
8378	vadd.i64	d2, d8
8379	vadd.i64	d12, d29
8380	vmov	d8, d7
8381	veor	d10, d4, d5
8382	vadd.i64	d2, d12
8383	vbsl	d8, d0, d1
8384	vbsl	d10, d3, d5
8385	vadd.i64	d2, d8
8386	vadd.i64	d10, d9
8387	vadd.i64	d6, d2
8388	vadd.i64	d2, d10
8389#ifndef WOLFSSL_ARM_ARCH_NEON_64BIT
8390	# Calc new W[12]-W[13]
8391	vext.8	q6, q14, q15, #8
8392	vshl.u64	q4, q13, #45
8393	vsri.u64	q4, q13, #19
8394	vshl.u64	q5, q13, #3
8395	vsri.u64	q5, q13, #61
8396	veor	q5, q4
8397	vshr.u64	q4, q13, #6
8398	veor	q5, q4
8399	vadd.i64	q14, q5
8400	vext.8	q7, q10, q11, #8
8401	vadd.i64	q14, q7
8402	vshl.u64	q4, q6, #63
8403	vsri.u64	q4, q6, #1
8404	vshl.u64	q5, q6, #56
8405	vsri.u64	q5, q6, #8
8406	veor	q5, q4
8407	vshr.u64	q6, #7
8408	veor	q5, q6
8409	vadd.i64	q14, q5
8410#else
8411	# Calc new W[12]-W[13]
8412	vmov	d12, d29
8413	vmov	d13, d30
8414	vshl.u64	d8, d26, #45
8415	vshl.u64	d9, d27, #45
8416	vsri.u64	d8, d26, #19
8417	vsri.u64	d9, d27, #19
8418	vshl.u64	d10, d26, #3
8419	vshl.u64	d11, d27, #3
8420	vsri.u64	d10, d26, #61
8421	vsri.u64	d11, d27, #61
8422	veor	d10, d8
8423	veor	d11, d9
8424	vshr.u64	d8, d26, #6
8425	vshr.u64	d9, d27, #6
8426	veor	d10, d8
8427	veor	d11, d9
8428	vadd.i64	d28, d10
8429	vadd.i64	d29, d11
8430	vmov	d14, d21
8431	vmov	d15, d22
8432	vadd.i64	d28, d14
8433	vadd.i64	d29, d15
8434	vshl.u64	d8, d12, #63
8435	vshl.u64	d9, d13, #63
8436	vsri.u64	d8, d12, #1
8437	vsri.u64	d9, d13, #1
8438	vshl.u64	d10, d12, #56
8439	vshl.u64	d11, d13, #56
8440	vsri.u64	d10, d12, #8
8441	vsri.u64	d11, d13, #8
8442	veor	d10, d8
8443	veor	d11, d9
8444	vshr.u64	d12, #7
8445	vshr.u64	d13, #7
8446	veor	d10, d12
8447	veor	d11, d13
8448	vadd.i64	d28, d10
8449	vadd.i64	d29, d11
8450#endif /* WOLFSSL_ARM_ARCH_NEON_64BIT */
8451	# Round 14
8452	vld1.64	{d12}, [r3:64]!
8453	vshl.u64	d8, d6, #50
8454	vsri.u64	d8, d6, #14
8455	vshl.u64	d9, d2, #36
8456	vsri.u64	d9, d2, #28
8457	vshl.u64	d10, d6, #46
8458	vsri.u64	d10, d6, #18
8459	vshl.u64	d11, d2, #30
8460	vsri.u64	d11, d2, #34
8461	veor	d8, d10
8462	veor	d9, d11
8463	vshl.u64	d10, d6, #23
8464	vsri.u64	d10, d6, #41
8465	vshl.u64	d11, d2, #25
8466	vsri.u64	d11, d2, #39
8467	veor	d8, d10
8468	veor	d9, d11
8469	vadd.i64	d1, d8
8470	vadd.i64	d12, d30
8471	vmov	d8, d6
8472	veor	d10, d3, d4
8473	vadd.i64	d1, d12
8474	vbsl	d8, d7, d0
8475	vbsl	d10, d2, d4
8476	vadd.i64	d1, d8
8477	vadd.i64	d10, d9
8478	vadd.i64	d5, d1
8479	vadd.i64	d1, d10
8480	# Round 15
8481	vld1.64	{d12}, [r3:64]!
8482	vshl.u64	d8, d5, #50
8483	vsri.u64	d8, d5, #14
8484	vshl.u64	d9, d1, #36
8485	vsri.u64	d9, d1, #28
8486	vshl.u64	d10, d5, #46
8487	vsri.u64	d10, d5, #18
8488	vshl.u64	d11, d1, #30
8489	vsri.u64	d11, d1, #34
8490	veor	d8, d10
8491	veor	d9, d11
8492	vshl.u64	d10, d5, #23
8493	vsri.u64	d10, d5, #41
8494	vshl.u64	d11, d1, #25
8495	vsri.u64	d11, d1, #39
8496	veor	d8, d10
8497	veor	d9, d11
8498	vadd.i64	d0, d8
8499	vadd.i64	d12, d31
8500	vmov	d8, d5
8501	veor	d10, d2, d3
8502	vadd.i64	d0, d12
8503	vbsl	d8, d6, d7
8504	vbsl	d10, d1, d3
8505	vadd.i64	d0, d8
8506	vadd.i64	d10, d9
8507	vadd.i64	d4, d0
8508	vadd.i64	d0, d10
8509#ifndef WOLFSSL_ARM_ARCH_NEON_64BIT
8510	# Calc new W[14]-W[15]
8511	vext.8	q6, q15, q8, #8
8512	vshl.u64	q4, q14, #45
8513	vsri.u64	q4, q14, #19
8514	vshl.u64	q5, q14, #3
8515	vsri.u64	q5, q14, #61
8516	veor	q5, q4
8517	vshr.u64	q4, q14, #6
8518	veor	q5, q4
8519	vadd.i64	q15, q5
8520	vext.8	q7, q11, q12, #8
8521	vadd.i64	q15, q7
8522	vshl.u64	q4, q6, #63
8523	vsri.u64	q4, q6, #1
8524	vshl.u64	q5, q6, #56
8525	vsri.u64	q5, q6, #8
8526	veor	q5, q4
8527	vshr.u64	q6, #7
8528	veor	q5, q6
8529	vadd.i64	q15, q5
8530#else
8531	# Calc new W[14]-W[15]
8532	vmov	d12, d31
8533	vmov	d13, d16
8534	vshl.u64	d8, d28, #45
8535	vshl.u64	d9, d29, #45
8536	vsri.u64	d8, d28, #19
8537	vsri.u64	d9, d29, #19
8538	vshl.u64	d10, d28, #3
8539	vshl.u64	d11, d29, #3
8540	vsri.u64	d10, d28, #61
8541	vsri.u64	d11, d29, #61
8542	veor	d10, d8
8543	veor	d11, d9
8544	vshr.u64	d8, d28, #6
8545	vshr.u64	d9, d29, #6
8546	veor	d10, d8
8547	veor	d11, d9
8548	vadd.i64	d30, d10
8549	vadd.i64	d31, d11
8550	vmov	d14, d23
8551	vmov	d15, d24
8552	vadd.i64	d30, d14
8553	vadd.i64	d31, d15
8554	vshl.u64	d8, d12, #63
8555	vshl.u64	d9, d13, #63
8556	vsri.u64	d8, d12, #1
8557	vsri.u64	d9, d13, #1
8558	vshl.u64	d10, d12, #56
8559	vshl.u64	d11, d13, #56
8560	vsri.u64	d10, d12, #8
8561	vsri.u64	d11, d13, #8
8562	veor	d10, d8
8563	veor	d11, d9
8564	vshr.u64	d12, #7
8565	vshr.u64	d13, #7
8566	veor	d10, d12
8567	veor	d11, d13
8568	vadd.i64	d30, d10
8569	vadd.i64	d31, d11
8570#endif /* WOLFSSL_ARM_ARCH_NEON_64BIT */
8571	subs	r12, r12, #1
8572	bne	L_SHA512_transform_neon_len_start
8573	# Round 0
8574	vld1.64	{d12}, [r3:64]!
8575	vshl.u64	d8, d4, #50
8576	vsri.u64	d8, d4, #14
8577	vshl.u64	d9, d0, #36
8578	vsri.u64	d9, d0, #28
8579	vshl.u64	d10, d4, #46
8580	vsri.u64	d10, d4, #18
8581	vshl.u64	d11, d0, #30
8582	vsri.u64	d11, d0, #34
8583	veor	d8, d10
8584	veor	d9, d11
8585	vshl.u64	d10, d4, #23
8586	vsri.u64	d10, d4, #41
8587	vshl.u64	d11, d0, #25
8588	vsri.u64	d11, d0, #39
8589	veor	d8, d10
8590	veor	d9, d11
8591	vadd.i64	d7, d8
8592	vadd.i64	d12, d16
8593	vmov	d8, d4
8594	veor	d10, d1, d2
8595	vadd.i64	d7, d12
8596	vbsl	d8, d5, d6
8597	vbsl	d10, d0, d2
8598	vadd.i64	d7, d8
8599	vadd.i64	d10, d9
8600	vadd.i64	d3, d7
8601	vadd.i64	d7, d10
8602	# Round 1
8603	vld1.64	{d12}, [r3:64]!
8604	vshl.u64	d8, d3, #50
8605	vsri.u64	d8, d3, #14
8606	vshl.u64	d9, d7, #36
8607	vsri.u64	d9, d7, #28
8608	vshl.u64	d10, d3, #46
8609	vsri.u64	d10, d3, #18
8610	vshl.u64	d11, d7, #30
8611	vsri.u64	d11, d7, #34
8612	veor	d8, d10
8613	veor	d9, d11
8614	vshl.u64	d10, d3, #23
8615	vsri.u64	d10, d3, #41
8616	vshl.u64	d11, d7, #25
8617	vsri.u64	d11, d7, #39
8618	veor	d8, d10
8619	veor	d9, d11
8620	vadd.i64	d6, d8
8621	vadd.i64	d12, d17
8622	vmov	d8, d3
8623	veor	d10, d0, d1
8624	vadd.i64	d6, d12
8625	vbsl	d8, d4, d5
8626	vbsl	d10, d7, d1
8627	vadd.i64	d6, d8
8628	vadd.i64	d10, d9
8629	vadd.i64	d2, d6
8630	vadd.i64	d6, d10
8631	# Round 2
8632	vld1.64	{d12}, [r3:64]!
8633	vshl.u64	d8, d2, #50
8634	vsri.u64	d8, d2, #14
8635	vshl.u64	d9, d6, #36
8636	vsri.u64	d9, d6, #28
8637	vshl.u64	d10, d2, #46
8638	vsri.u64	d10, d2, #18
8639	vshl.u64	d11, d6, #30
8640	vsri.u64	d11, d6, #34
8641	veor	d8, d10
8642	veor	d9, d11
8643	vshl.u64	d10, d2, #23
8644	vsri.u64	d10, d2, #41
8645	vshl.u64	d11, d6, #25
8646	vsri.u64	d11, d6, #39
8647	veor	d8, d10
8648	veor	d9, d11
8649	vadd.i64	d5, d8
8650	vadd.i64	d12, d18
8651	vmov	d8, d2
8652	veor	d10, d7, d0
8653	vadd.i64	d5, d12
8654	vbsl	d8, d3, d4
8655	vbsl	d10, d6, d0
8656	vadd.i64	d5, d8
8657	vadd.i64	d10, d9
8658	vadd.i64	d1, d5
8659	vadd.i64	d5, d10
8660	# Round 3
8661	vld1.64	{d12}, [r3:64]!
8662	vshl.u64	d8, d1, #50
8663	vsri.u64	d8, d1, #14
8664	vshl.u64	d9, d5, #36
8665	vsri.u64	d9, d5, #28
8666	vshl.u64	d10, d1, #46
8667	vsri.u64	d10, d1, #18
8668	vshl.u64	d11, d5, #30
8669	vsri.u64	d11, d5, #34
8670	veor	d8, d10
8671	veor	d9, d11
8672	vshl.u64	d10, d1, #23
8673	vsri.u64	d10, d1, #41
8674	vshl.u64	d11, d5, #25
8675	vsri.u64	d11, d5, #39
8676	veor	d8, d10
8677	veor	d9, d11
8678	vadd.i64	d4, d8
8679	vadd.i64	d12, d19
8680	vmov	d8, d1
8681	veor	d10, d6, d7
8682	vadd.i64	d4, d12
8683	vbsl	d8, d2, d3
8684	vbsl	d10, d5, d7
8685	vadd.i64	d4, d8
8686	vadd.i64	d10, d9
8687	vadd.i64	d0, d4
8688	vadd.i64	d4, d10
8689	# Round 4
8690	vld1.64	{d12}, [r3:64]!
8691	vshl.u64	d8, d0, #50
8692	vsri.u64	d8, d0, #14
8693	vshl.u64	d9, d4, #36
8694	vsri.u64	d9, d4, #28
8695	vshl.u64	d10, d0, #46
8696	vsri.u64	d10, d0, #18
8697	vshl.u64	d11, d4, #30
8698	vsri.u64	d11, d4, #34
8699	veor	d8, d10
8700	veor	d9, d11
8701	vshl.u64	d10, d0, #23
8702	vsri.u64	d10, d0, #41
8703	vshl.u64	d11, d4, #25
8704	vsri.u64	d11, d4, #39
8705	veor	d8, d10
8706	veor	d9, d11
8707	vadd.i64	d3, d8
8708	vadd.i64	d12, d20
8709	vmov	d8, d0
8710	veor	d10, d5, d6
8711	vadd.i64	d3, d12
8712	vbsl	d8, d1, d2
8713	vbsl	d10, d4, d6
8714	vadd.i64	d3, d8
8715	vadd.i64	d10, d9
8716	vadd.i64	d7, d3
8717	vadd.i64	d3, d10
8718	# Round 5
8719	vld1.64	{d12}, [r3:64]!
8720	vshl.u64	d8, d7, #50
8721	vsri.u64	d8, d7, #14
8722	vshl.u64	d9, d3, #36
8723	vsri.u64	d9, d3, #28
8724	vshl.u64	d10, d7, #46
8725	vsri.u64	d10, d7, #18
8726	vshl.u64	d11, d3, #30
8727	vsri.u64	d11, d3, #34
8728	veor	d8, d10
8729	veor	d9, d11
8730	vshl.u64	d10, d7, #23
8731	vsri.u64	d10, d7, #41
8732	vshl.u64	d11, d3, #25
8733	vsri.u64	d11, d3, #39
8734	veor	d8, d10
8735	veor	d9, d11
8736	vadd.i64	d2, d8
8737	vadd.i64	d12, d21
8738	vmov	d8, d7
8739	veor	d10, d4, d5
8740	vadd.i64	d2, d12
8741	vbsl	d8, d0, d1
8742	vbsl	d10, d3, d5
8743	vadd.i64	d2, d8
8744	vadd.i64	d10, d9
8745	vadd.i64	d6, d2
8746	vadd.i64	d2, d10
8747	# Round 6
8748	vld1.64	{d12}, [r3:64]!
8749	vshl.u64	d8, d6, #50
8750	vsri.u64	d8, d6, #14
8751	vshl.u64	d9, d2, #36
8752	vsri.u64	d9, d2, #28
8753	vshl.u64	d10, d6, #46
8754	vsri.u64	d10, d6, #18
8755	vshl.u64	d11, d2, #30
8756	vsri.u64	d11, d2, #34
8757	veor	d8, d10
8758	veor	d9, d11
8759	vshl.u64	d10, d6, #23
8760	vsri.u64	d10, d6, #41
8761	vshl.u64	d11, d2, #25
8762	vsri.u64	d11, d2, #39
8763	veor	d8, d10
8764	veor	d9, d11
8765	vadd.i64	d1, d8
8766	vadd.i64	d12, d22
8767	vmov	d8, d6
8768	veor	d10, d3, d4
8769	vadd.i64	d1, d12
8770	vbsl	d8, d7, d0
8771	vbsl	d10, d2, d4
8772	vadd.i64	d1, d8
8773	vadd.i64	d10, d9
8774	vadd.i64	d5, d1
8775	vadd.i64	d1, d10
8776	# Round 7
8777	vld1.64	{d12}, [r3:64]!
8778	vshl.u64	d8, d5, #50
8779	vsri.u64	d8, d5, #14
8780	vshl.u64	d9, d1, #36
8781	vsri.u64	d9, d1, #28
8782	vshl.u64	d10, d5, #46
8783	vsri.u64	d10, d5, #18
8784	vshl.u64	d11, d1, #30
8785	vsri.u64	d11, d1, #34
8786	veor	d8, d10
8787	veor	d9, d11
8788	vshl.u64	d10, d5, #23
8789	vsri.u64	d10, d5, #41
8790	vshl.u64	d11, d1, #25
8791	vsri.u64	d11, d1, #39
8792	veor	d8, d10
8793	veor	d9, d11
8794	vadd.i64	d0, d8
8795	vadd.i64	d12, d23
8796	vmov	d8, d5
8797	veor	d10, d2, d3
8798	vadd.i64	d0, d12
8799	vbsl	d8, d6, d7
8800	vbsl	d10, d1, d3
8801	vadd.i64	d0, d8
8802	vadd.i64	d10, d9
8803	vadd.i64	d4, d0
8804	vadd.i64	d0, d10
8805	# Round 8
8806	vld1.64	{d12}, [r3:64]!
8807	vshl.u64	d8, d4, #50
8808	vsri.u64	d8, d4, #14
8809	vshl.u64	d9, d0, #36
8810	vsri.u64	d9, d0, #28
8811	vshl.u64	d10, d4, #46
8812	vsri.u64	d10, d4, #18
8813	vshl.u64	d11, d0, #30
8814	vsri.u64	d11, d0, #34
8815	veor	d8, d10
8816	veor	d9, d11
8817	vshl.u64	d10, d4, #23
8818	vsri.u64	d10, d4, #41
8819	vshl.u64	d11, d0, #25
8820	vsri.u64	d11, d0, #39
8821	veor	d8, d10
8822	veor	d9, d11
8823	vadd.i64	d7, d8
8824	vadd.i64	d12, d24
8825	vmov	d8, d4
8826	veor	d10, d1, d2
8827	vadd.i64	d7, d12
8828	vbsl	d8, d5, d6
8829	vbsl	d10, d0, d2
8830	vadd.i64	d7, d8
8831	vadd.i64	d10, d9
8832	vadd.i64	d3, d7
8833	vadd.i64	d7, d10
8834	# Round 9
8835	vld1.64	{d12}, [r3:64]!
8836	vshl.u64	d8, d3, #50
8837	vsri.u64	d8, d3, #14
8838	vshl.u64	d9, d7, #36
8839	vsri.u64	d9, d7, #28
8840	vshl.u64	d10, d3, #46
8841	vsri.u64	d10, d3, #18
8842	vshl.u64	d11, d7, #30
8843	vsri.u64	d11, d7, #34
8844	veor	d8, d10
8845	veor	d9, d11
8846	vshl.u64	d10, d3, #23
8847	vsri.u64	d10, d3, #41
8848	vshl.u64	d11, d7, #25
8849	vsri.u64	d11, d7, #39
8850	veor	d8, d10
8851	veor	d9, d11
8852	vadd.i64	d6, d8
8853	vadd.i64	d12, d25
8854	vmov	d8, d3
8855	veor	d10, d0, d1
8856	vadd.i64	d6, d12
8857	vbsl	d8, d4, d5
8858	vbsl	d10, d7, d1
8859	vadd.i64	d6, d8
8860	vadd.i64	d10, d9
8861	vadd.i64	d2, d6
8862	vadd.i64	d6, d10
8863	# Round 10
8864	vld1.64	{d12}, [r3:64]!
8865	vshl.u64	d8, d2, #50
8866	vsri.u64	d8, d2, #14
8867	vshl.u64	d9, d6, #36
8868	vsri.u64	d9, d6, #28
8869	vshl.u64	d10, d2, #46
8870	vsri.u64	d10, d2, #18
8871	vshl.u64	d11, d6, #30
8872	vsri.u64	d11, d6, #34
8873	veor	d8, d10
8874	veor	d9, d11
8875	vshl.u64	d10, d2, #23
8876	vsri.u64	d10, d2, #41
8877	vshl.u64	d11, d6, #25
8878	vsri.u64	d11, d6, #39
8879	veor	d8, d10
8880	veor	d9, d11
8881	vadd.i64	d5, d8
8882	vadd.i64	d12, d26
8883	vmov	d8, d2
8884	veor	d10, d7, d0
8885	vadd.i64	d5, d12
8886	vbsl	d8, d3, d4
8887	vbsl	d10, d6, d0
8888	vadd.i64	d5, d8
8889	vadd.i64	d10, d9
8890	vadd.i64	d1, d5
8891	vadd.i64	d5, d10
8892	# Round 11
8893	vld1.64	{d12}, [r3:64]!
8894	vshl.u64	d8, d1, #50
8895	vsri.u64	d8, d1, #14
8896	vshl.u64	d9, d5, #36
8897	vsri.u64	d9, d5, #28
8898	vshl.u64	d10, d1, #46
8899	vsri.u64	d10, d1, #18
8900	vshl.u64	d11, d5, #30
8901	vsri.u64	d11, d5, #34
8902	veor	d8, d10
8903	veor	d9, d11
8904	vshl.u64	d10, d1, #23
8905	vsri.u64	d10, d1, #41
8906	vshl.u64	d11, d5, #25
8907	vsri.u64	d11, d5, #39
8908	veor	d8, d10
8909	veor	d9, d11
8910	vadd.i64	d4, d8
8911	vadd.i64	d12, d27
8912	vmov	d8, d1
8913	veor	d10, d6, d7
8914	vadd.i64	d4, d12
8915	vbsl	d8, d2, d3
8916	vbsl	d10, d5, d7
8917	vadd.i64	d4, d8
8918	vadd.i64	d10, d9
8919	vadd.i64	d0, d4
8920	vadd.i64	d4, d10
8921	# Round 12
8922	vld1.64	{d12}, [r3:64]!
8923	vshl.u64	d8, d0, #50
8924	vsri.u64	d8, d0, #14
8925	vshl.u64	d9, d4, #36
8926	vsri.u64	d9, d4, #28
8927	vshl.u64	d10, d0, #46
8928	vsri.u64	d10, d0, #18
8929	vshl.u64	d11, d4, #30
8930	vsri.u64	d11, d4, #34
8931	veor	d8, d10
8932	veor	d9, d11
8933	vshl.u64	d10, d0, #23
8934	vsri.u64	d10, d0, #41
8935	vshl.u64	d11, d4, #25
8936	vsri.u64	d11, d4, #39
8937	veor	d8, d10
8938	veor	d9, d11
8939	vadd.i64	d3, d8
8940	vadd.i64	d12, d28
8941	vmov	d8, d0
8942	veor	d10, d5, d6
8943	vadd.i64	d3, d12
8944	vbsl	d8, d1, d2
8945	vbsl	d10, d4, d6
8946	vadd.i64	d3, d8
8947	vadd.i64	d10, d9
8948	vadd.i64	d7, d3
8949	vadd.i64	d3, d10
8950	# Round 13
8951	vld1.64	{d12}, [r3:64]!
8952	vshl.u64	d8, d7, #50
8953	vsri.u64	d8, d7, #14
8954	vshl.u64	d9, d3, #36
8955	vsri.u64	d9, d3, #28
8956	vshl.u64	d10, d7, #46
8957	vsri.u64	d10, d7, #18
8958	vshl.u64	d11, d3, #30
8959	vsri.u64	d11, d3, #34
8960	veor	d8, d10
8961	veor	d9, d11
8962	vshl.u64	d10, d7, #23
8963	vsri.u64	d10, d7, #41
8964	vshl.u64	d11, d3, #25
8965	vsri.u64	d11, d3, #39
8966	veor	d8, d10
8967	veor	d9, d11
8968	vadd.i64	d2, d8
8969	vadd.i64	d12, d29
8970	vmov	d8, d7
8971	veor	d10, d4, d5
8972	vadd.i64	d2, d12
8973	vbsl	d8, d0, d1
8974	vbsl	d10, d3, d5
8975	vadd.i64	d2, d8
8976	vadd.i64	d10, d9
8977	vadd.i64	d6, d2
8978	vadd.i64	d2, d10
8979	# Round 14
8980	vld1.64	{d12}, [r3:64]!
8981	vshl.u64	d8, d6, #50
8982	vsri.u64	d8, d6, #14
8983	vshl.u64	d9, d2, #36
8984	vsri.u64	d9, d2, #28
8985	vshl.u64	d10, d6, #46
8986	vsri.u64	d10, d6, #18
8987	vshl.u64	d11, d2, #30
8988	vsri.u64	d11, d2, #34
8989	veor	d8, d10
8990	veor	d9, d11
8991	vshl.u64	d10, d6, #23
8992	vsri.u64	d10, d6, #41
8993	vshl.u64	d11, d2, #25
8994	vsri.u64	d11, d2, #39
8995	veor	d8, d10
8996	veor	d9, d11
8997	vadd.i64	d1, d8
8998	vadd.i64	d12, d30
8999	vmov	d8, d6
9000	veor	d10, d3, d4
9001	vadd.i64	d1, d12
9002	vbsl	d8, d7, d0
9003	vbsl	d10, d2, d4
9004	vadd.i64	d1, d8
9005	vadd.i64	d10, d9
9006	vadd.i64	d5, d1
9007	vadd.i64	d1, d10
9008	# Round 15
9009	vld1.64	{d12}, [r3:64]!
9010	vshl.u64	d8, d5, #50
9011	vsri.u64	d8, d5, #14
9012	vshl.u64	d9, d1, #36
9013	vsri.u64	d9, d1, #28
9014	vshl.u64	d10, d5, #46
9015	vsri.u64	d10, d5, #18
9016	vshl.u64	d11, d1, #30
9017	vsri.u64	d11, d1, #34
9018	veor	d8, d10
9019	veor	d9, d11
9020	vshl.u64	d10, d5, #23
9021	vsri.u64	d10, d5, #41
9022	vshl.u64	d11, d1, #25
9023	vsri.u64	d11, d1, #39
9024	veor	d8, d10
9025	veor	d9, d11
9026	vadd.i64	d0, d8
9027	vadd.i64	d12, d31
9028	vmov	d8, d5
9029	veor	d10, d2, d3
9030	vadd.i64	d0, d12
9031	vbsl	d8, d6, d7
9032	vbsl	d10, d1, d3
9033	vadd.i64	d0, d8
9034	vadd.i64	d10, d9
9035	vadd.i64	d4, d0
9036	vadd.i64	d0, d10
9037	# Add in digest from start
9038	vldm.64	r0, {d8-d15}
9039#ifndef WOLFSSL_ARM_ARCH_NEON_64BIT
9040	vadd.i64	q0, q0, q4
9041	vadd.i64	q1, q1, q5
9042	vadd.i64	q2, q2, q6
9043	vadd.i64	q3, q3, q7
9044#else
9045	vadd.i64	d0, d0, d8
9046	vadd.i64	d1, d1, d9
9047	vadd.i64	d2, d2, d10
9048	vadd.i64	d3, d3, d11
9049	vadd.i64	d4, d4, d12
9050	vadd.i64	d5, d5, d13
9051	vadd.i64	d6, d6, d14
9052	vadd.i64	d7, d7, d15
9053#endif /* WOLFSSL_ARM_ARCH_NEON_64BIT */
9054	vstm.64	r0, {d0-d7}
9055	subs	r2, r2, #0x80
9056	sub	r3, r3, #0x280
9057	bne	L_SHA512_transform_neon_len_begin
9058	vpop	{d8-d15}
9059	bx	lr
9060	.size	Transform_Sha512_Len_neon,.-Transform_Sha512_Len_neon
9061#endif /* !WOLFSSL_ARMASM_NO_NEON */
9062#endif /* WOLFSSL_SHA512 || WOLFSSL_SHA384 */
9063#endif /* !__aarch64__ && !WOLFSSL_ARMASM_THUMB2 */
9064#endif /* WOLFSSL_ARMASM */
9065
9066#if defined(__linux__) && defined(__ELF__)
9067.section	.note.GNU-stack,"",%progbits
9068#endif
9069#endif /* !WOLFSSL_ARMASM_INLINE */