cjson
fuzzing
inputs
test1 test10 test11 test2 test3 test3.bu test3.uf test3.uu test4 test5 test6 test7 test8 test9library_config
cJSONConfig.cmake.in cJSONConfigVersion.cmake.in libcjson.pc.in libcjson_utils.pc.in uninstall.cmaketests
inputs
test1 test1.expected test10 test10.expected test11 test11.expected test2 test2.expected test3 test3.expected test4 test4.expected test5 test5.expected test6 test7 test7.expected test8 test8.expected test9 test9.expectedjson-patch-tests
.editorconfig .gitignore .npmignore README.md cjson-utils-tests.json package.json spec_tests.json tests.jsonunity
auto
colour_prompt.rb colour_reporter.rb generate_config.yml generate_module.rb generate_test_runner.rb parse_output.rb stylize_as_junit.rb test_file_filter.rb type_sanitizer.rb unity_test_summary.py unity_test_summary.rb unity_to_junit.pydocs
ThrowTheSwitchCodingStandard.md UnityAssertionsCheatSheetSuitableforPrintingandPossiblyFraming.pdf UnityAssertionsReference.md UnityConfigurationGuide.md UnityGettingStartedGuide.md UnityHelperScriptsGuide.md license.txtexamples
unity_config.hcurl
.github
scripts
cleancmd.pl cmp-config.pl cmp-pkg-config.sh codespell-ignore.words codespell.sh distfiles.sh pyspelling.words pyspelling.yaml randcurl.pl requirements-docs.txt requirements-proselint.txt requirements.txt shellcheck-ci.sh shellcheck.sh spellcheck.curl trimmarkdownheader.pl typos.sh typos.toml verify-examples.pl verify-synopsis.pl yamlcheck.sh yamlcheck.yamlworkflows
appveyor-status.yml checkdocs.yml checksrc.yml checkurls.yml codeql.yml configure-vs-cmake.yml curl-for-win.yml distcheck.yml fuzz.yml http3-linux.yml label.yml linux-old.yml linux.yml macos.yml non-native.yml windows.ymlCMake
CurlSymbolHiding.cmake CurlTests.c FindBrotli.cmake FindCares.cmake FindGSS.cmake FindGnuTLS.cmake FindLDAP.cmake FindLibbacktrace.cmake FindLibgsasl.cmake FindLibidn2.cmake FindLibpsl.cmake FindLibssh.cmake FindLibssh2.cmake FindLibuv.cmake FindMbedTLS.cmake FindNGHTTP2.cmake FindNGHTTP3.cmake FindNGTCP2.cmake FindNettle.cmake FindQuiche.cmake FindRustls.cmake FindWolfSSL.cmake FindZstd.cmake Macros.cmake OtherTests.cmake PickyWarnings.cmake Utilities.cmake cmake_uninstall.in.cmake curl-config.in.cmake unix-cache.cmake win32-cache.cmakedocs
cmdline-opts
.gitignore CMakeLists.txt MANPAGE.md Makefile.am Makefile.inc _AUTHORS.md _BUGS.md _DESCRIPTION.md _ENVIRONMENT.md _EXITCODES.md _FILES.md _GLOBBING.md _NAME.md _OPTIONS.md _OUTPUT.md _PROGRESS.md _PROTOCOLS.md _PROXYPREFIX.md _SEEALSO.md _SYNOPSIS.md _URL.md _VARIABLES.md _VERSION.md _WWW.md abstract-unix-socket.md alt-svc.md anyauth.md append.md aws-sigv4.md basic.md ca-native.md cacert.md capath.md cert-status.md cert-type.md cert.md ciphers.md compressed-ssh.md compressed.md config.md connect-timeout.md connect-to.md continue-at.md cookie-jar.md cookie.md create-dirs.md create-file-mode.md crlf.md crlfile.md curves.md data-ascii.md data-binary.md data-raw.md data-urlencode.md data.md delegation.md digest.md disable-eprt.md disable-epsv.md disable.md disallow-username-in-url.md dns-interface.md dns-ipv4-addr.md dns-ipv6-addr.md dns-servers.md doh-cert-status.md doh-insecure.md doh-url.md dump-ca-embed.md dump-header.md ech.md egd-file.md engine.md etag-compare.md etag-save.md expect100-timeout.md fail-early.md fail-with-body.md fail.md false-start.md follow.md form-escape.md form-string.md form.md ftp-account.md ftp-alternative-to-user.md ftp-create-dirs.md ftp-method.md ftp-pasv.md ftp-port.md ftp-pret.md ftp-skip-pasv-ip.md ftp-ssl-ccc-mode.md ftp-ssl-ccc.md ftp-ssl-control.md get.md globoff.md happy-eyeballs-timeout-ms.md haproxy-clientip.md haproxy-protocol.md head.md header.md help.md hostpubmd5.md hostpubsha256.md hsts.md http0.9.md http1.0.md http1.1.md http2-prior-knowledge.md http2.md http3-only.md http3.md ignore-content-length.md insecure.md interface.md ip-tos.md ipfs-gateway.md ipv4.md ipv6.md json.md junk-session-cookies.md keepalive-cnt.md keepalive-time.md key-type.md key.md knownhosts.md krb.md libcurl.md limit-rate.md list-only.md local-port.md location-trusted.md location.md login-options.md mail-auth.md mail-from.md mail-rcpt-allowfails.md mail-rcpt.md mainpage.idx manual.md max-filesize.md max-redirs.md max-time.md metalink.md mptcp.md negotiate.md netrc-file.md netrc-optional.md netrc.md next.md no-alpn.md no-buffer.md no-clobber.md no-keepalive.md no-npn.md no-progress-meter.md no-sessionid.md noproxy.md ntlm-wb.md ntlm.md oauth2-bearer.md out-null.md output-dir.md output.md parallel-immediate.md parallel-max-host.md parallel-max.md parallel.md pass.md path-as-is.md pinnedpubkey.md post301.md post302.md post303.md preproxy.md progress-bar.md proto-default.md proto-redir.md proto.md proxy-anyauth.md proxy-basic.md proxy-ca-native.md proxy-cacert.md proxy-capath.md proxy-cert-type.md proxy-cert.md proxy-ciphers.md proxy-crlfile.md proxy-digest.md proxy-header.md proxy-http2.md proxy-insecure.md proxy-key-type.md proxy-key.md proxy-negotiate.md proxy-ntlm.md proxy-pass.md proxy-pinnedpubkey.md proxy-service-name.md proxy-ssl-allow-beast.md proxy-ssl-auto-client-cert.md proxy-tls13-ciphers.md proxy-tlsauthtype.md proxy-tlspassword.md proxy-tlsuser.md proxy-tlsv1.md proxy-user.md proxy.md proxy1.0.md proxytunnel.md pubkey.md quote.md random-file.md range.md rate.md raw.md referer.md remote-header-name.md remote-name-all.md remote-name.md remote-time.md remove-on-error.md request-target.md request.md resolve.md retry-all-errors.md retry-connrefused.md retry-delay.md retry-max-time.md retry.md sasl-authzid.md sasl-ir.md service-name.md show-error.md show-headers.md sigalgs.md silent.md skip-existing.md socks4.md socks4a.md socks5-basic.md socks5-gssapi-nec.md socks5-gssapi-service.md socks5-gssapi.md socks5-hostname.md socks5.md speed-limit.md speed-time.md ssl-allow-beast.md ssl-auto-client-cert.md ssl-no-revoke.md ssl-reqd.md ssl-revoke-best-effort.md ssl-sessions.md ssl.md sslv2.md sslv3.md stderr.md styled-output.md suppress-connect-headers.md tcp-fastopen.md tcp-nodelay.md telnet-option.md tftp-blksize.md tftp-no-options.md time-cond.md tls-earlydata.md tls-max.md tls13-ciphers.md tlsauthtype.md tlspassword.md tlsuser.md tlsv1.0.md tlsv1.1.md tlsv1.2.md tlsv1.3.md tlsv1.md tr-encoding.md trace-ascii.md trace-config.md trace-ids.md trace-time.md trace.md unix-socket.md upload-file.md upload-flags.md url-query.md url.md use-ascii.md user-agent.md user.md variable.md verbose.md version.md vlan-priority.md write-out.md xattr.mdexamples
.checksrc .gitignore 10-at-a-time.c CMakeLists.txt Makefile.am Makefile.example Makefile.inc README.md adddocsref.pl address-scope.c altsvc.c anyauthput.c block_ip.c cacertinmem.c certinfo.c chkspeed.c connect-to.c cookie_interface.c crawler.c debug.c default-scheme.c ephiperfifo.c evhiperfifo.c externalsocket.c fileupload.c ftp-delete.c ftp-wildcard.c ftpget.c ftpgetinfo.c ftpgetresp.c ftpsget.c ftpupload.c ftpuploadfrommem.c ftpuploadresume.c getinfo.c getinmemory.c getredirect.c getreferrer.c ghiper.c headerapi.c hiperfifo.c hsts-preload.c htmltidy.c htmltitle.cpp http-options.c http-post.c http2-download.c http2-pushinmemory.c http2-serverpush.c http2-upload.c http3-present.c http3.c httpcustomheader.c httpput-postfields.c httpput.c https.c imap-append.c imap-authzid.c imap-copy.c imap-create.c imap-delete.c imap-examine.c imap-fetch.c imap-list.c imap-lsub.c imap-multi.c imap-noop.c imap-search.c imap-ssl.c imap-store.c imap-tls.c interface.c ipv6.c keepalive.c localport.c log_failed_transfers.c maxconnects.c multi-app.c multi-debugcallback.c multi-double.c multi-event.c multi-formadd.c multi-legacy.c multi-post.c multi-single.c multi-uv.c netrc.c parseurl.c persistent.c pop3-authzid.c pop3-dele.c pop3-list.c pop3-multi.c pop3-noop.c pop3-retr.c pop3-ssl.c pop3-stat.c pop3-tls.c pop3-top.c pop3-uidl.c post-callback.c postinmemory.c postit2-formadd.c postit2.c progressfunc.c protofeats.c range.c resolve.c rtsp-options.c sendrecv.c sepheaders.c sessioninfo.c sftpget.c sftpuploadresume.c shared-connection-cache.c simple.c simplepost.c simplessl.c smooth-gtk-thread.c smtp-authzid.c smtp-expn.c smtp-mail.c smtp-mime.c smtp-multi.c smtp-ssl.c smtp-tls.c smtp-vrfy.c sslbackend.c synctime.c threaded.c unixsocket.c url2file.c urlapi.c usercertinmem.c version-check.pl websocket-cb.c websocket-updown.c websocket.c xmlstream.cinternals
BUFQ.md BUFREF.md CHECKSRC.md CLIENT-READERS.md CLIENT-WRITERS.md CODE_STYLE.md CONNECTION-FILTERS.md CREDENTIALS.md CURLX.md DYNBUF.md HASH.md LLIST.md MID.md MQTT.md MULTI-EV.md NEW-PROTOCOL.md PEERS.md PORTING.md RATELIMITS.md README.md SCORECARD.md SPLAY.md STRPARSE.md THRDPOOL-AND-QUEUE.md TIME-KEEPING.md TLS-SESSIONS.md UINT_SETS.md WEBSOCKET.mdlibcurl
opts
CMakeLists.txt CURLINFO_ACTIVESOCKET.md CURLINFO_APPCONNECT_TIME.md CURLINFO_APPCONNECT_TIME_T.md CURLINFO_CAINFO.md CURLINFO_CAPATH.md CURLINFO_CERTINFO.md CURLINFO_CONDITION_UNMET.md CURLINFO_CONNECT_TIME.md CURLINFO_CONNECT_TIME_T.md CURLINFO_CONN_ID.md CURLINFO_CONTENT_LENGTH_DOWNLOAD.md CURLINFO_CONTENT_LENGTH_DOWNLOAD_T.md CURLINFO_CONTENT_LENGTH_UPLOAD.md CURLINFO_CONTENT_LENGTH_UPLOAD_T.md CURLINFO_CONTENT_TYPE.md CURLINFO_COOKIELIST.md CURLINFO_EARLYDATA_SENT_T.md CURLINFO_EFFECTIVE_METHOD.md CURLINFO_EFFECTIVE_URL.md CURLINFO_FILETIME.md CURLINFO_FILETIME_T.md CURLINFO_FTP_ENTRY_PATH.md CURLINFO_HEADER_SIZE.md CURLINFO_HTTPAUTH_AVAIL.md CURLINFO_HTTPAUTH_USED.md CURLINFO_HTTP_CONNECTCODE.md CURLINFO_HTTP_VERSION.md CURLINFO_LASTSOCKET.md CURLINFO_LOCAL_IP.md CURLINFO_LOCAL_PORT.md CURLINFO_NAMELOOKUP_TIME.md CURLINFO_NAMELOOKUP_TIME_T.md CURLINFO_NUM_CONNECTS.md CURLINFO_OS_ERRNO.md CURLINFO_POSTTRANSFER_TIME_T.md CURLINFO_PRETRANSFER_TIME.md CURLINFO_PRETRANSFER_TIME_T.md CURLINFO_PRIMARY_IP.md CURLINFO_PRIMARY_PORT.md CURLINFO_PRIVATE.md CURLINFO_PROTOCOL.md CURLINFO_PROXYAUTH_AVAIL.md CURLINFO_PROXYAUTH_USED.md CURLINFO_PROXY_ERROR.md CURLINFO_PROXY_SSL_VERIFYRESULT.md CURLINFO_QUEUE_TIME_T.md CURLINFO_REDIRECT_COUNT.md CURLINFO_REDIRECT_TIME.md CURLINFO_REDIRECT_TIME_T.md CURLINFO_REDIRECT_URL.md CURLINFO_REFERER.md CURLINFO_REQUEST_SIZE.md CURLINFO_RESPONSE_CODE.md CURLINFO_RETRY_AFTER.md CURLINFO_RTSP_CLIENT_CSEQ.md CURLINFO_RTSP_CSEQ_RECV.md CURLINFO_RTSP_SERVER_CSEQ.md CURLINFO_RTSP_SESSION_ID.md CURLINFO_SCHEME.md CURLINFO_SIZE_DELIVERED.md CURLINFO_SIZE_DOWNLOAD.md CURLINFO_SIZE_DOWNLOAD_T.md CURLINFO_SIZE_UPLOAD.md CURLINFO_SIZE_UPLOAD_T.md CURLINFO_SPEED_DOWNLOAD.md CURLINFO_SPEED_DOWNLOAD_T.md CURLINFO_SPEED_UPLOAD.md CURLINFO_SPEED_UPLOAD_T.md CURLINFO_SSL_ENGINES.md CURLINFO_SSL_VERIFYRESULT.md CURLINFO_STARTTRANSFER_TIME.md CURLINFO_STARTTRANSFER_TIME_T.md CURLINFO_TLS_SESSION.md CURLINFO_TLS_SSL_PTR.md CURLINFO_TOTAL_TIME.md CURLINFO_TOTAL_TIME_T.md CURLINFO_USED_PROXY.md CURLINFO_XFER_ID.md CURLMINFO_XFERS_ADDED.md CURLMINFO_XFERS_CURRENT.md CURLMINFO_XFERS_DONE.md CURLMINFO_XFERS_PENDING.md CURLMINFO_XFERS_RUNNING.md CURLMOPT_CHUNK_LENGTH_PENALTY_SIZE.md CURLMOPT_CONTENT_LENGTH_PENALTY_SIZE.md CURLMOPT_MAXCONNECTS.md CURLMOPT_MAX_CONCURRENT_STREAMS.md CURLMOPT_MAX_HOST_CONNECTIONS.md CURLMOPT_MAX_PIPELINE_LENGTH.md CURLMOPT_MAX_TOTAL_CONNECTIONS.md CURLMOPT_NETWORK_CHANGED.md CURLMOPT_NOTIFYDATA.md CURLMOPT_NOTIFYFUNCTION.md CURLMOPT_PIPELINING.md CURLMOPT_PIPELINING_SERVER_BL.md CURLMOPT_PIPELINING_SITE_BL.md CURLMOPT_PUSHDATA.md CURLMOPT_PUSHFUNCTION.md CURLMOPT_QUICK_EXIT.md CURLMOPT_RESOLVE_THREADS_MAX.md CURLMOPT_SOCKETDATA.md CURLMOPT_SOCKETFUNCTION.md CURLMOPT_TIMERDATA.md CURLMOPT_TIMERFUNCTION.md CURLOPT_ABSTRACT_UNIX_SOCKET.md CURLOPT_ACCEPTTIMEOUT_MS.md CURLOPT_ACCEPT_ENCODING.md CURLOPT_ADDRESS_SCOPE.md CURLOPT_ALTSVC.md CURLOPT_ALTSVC_CTRL.md CURLOPT_APPEND.md CURLOPT_AUTOREFERER.md CURLOPT_AWS_SIGV4.md CURLOPT_BUFFERSIZE.md CURLOPT_CAINFO.md CURLOPT_CAINFO_BLOB.md CURLOPT_CAPATH.md CURLOPT_CA_CACHE_TIMEOUT.md CURLOPT_CERTINFO.md CURLOPT_CHUNK_BGN_FUNCTION.md CURLOPT_CHUNK_DATA.md CURLOPT_CHUNK_END_FUNCTION.md CURLOPT_CLOSESOCKETDATA.md CURLOPT_CLOSESOCKETFUNCTION.md CURLOPT_CONNECTTIMEOUT.md CURLOPT_CONNECTTIMEOUT_MS.md CURLOPT_CONNECT_ONLY.md CURLOPT_CONNECT_TO.md CURLOPT_CONV_FROM_NETWORK_FUNCTION.md CURLOPT_CONV_FROM_UTF8_FUNCTION.md CURLOPT_CONV_TO_NETWORK_FUNCTION.md CURLOPT_COOKIE.md CURLOPT_COOKIEFILE.md CURLOPT_COOKIEJAR.md CURLOPT_COOKIELIST.md CURLOPT_COOKIESESSION.md CURLOPT_COPYPOSTFIELDS.md CURLOPT_CRLF.md CURLOPT_CRLFILE.md CURLOPT_CURLU.md CURLOPT_CUSTOMREQUEST.md CURLOPT_DEBUGDATA.md CURLOPT_DEBUGFUNCTION.md CURLOPT_DEFAULT_PROTOCOL.md CURLOPT_DIRLISTONLY.md CURLOPT_DISALLOW_USERNAME_IN_URL.md CURLOPT_DNS_CACHE_TIMEOUT.md CURLOPT_DNS_INTERFACE.md CURLOPT_DNS_LOCAL_IP4.md CURLOPT_DNS_LOCAL_IP6.md CURLOPT_DNS_SERVERS.md CURLOPT_DNS_SHUFFLE_ADDRESSES.md CURLOPT_DNS_USE_GLOBAL_CACHE.md CURLOPT_DOH_SSL_VERIFYHOST.md CURLOPT_DOH_SSL_VERIFYPEER.md CURLOPT_DOH_SSL_VERIFYSTATUS.md CURLOPT_DOH_URL.md CURLOPT_ECH.md CURLOPT_EGDSOCKET.md CURLOPT_ERRORBUFFER.md CURLOPT_EXPECT_100_TIMEOUT_MS.md CURLOPT_FAILONERROR.md CURLOPT_FILETIME.md CURLOPT_FNMATCH_DATA.md CURLOPT_FNMATCH_FUNCTION.md CURLOPT_FOLLOWLOCATION.md CURLOPT_FORBID_REUSE.md CURLOPT_FRESH_CONNECT.md CURLOPT_FTPPORT.md CURLOPT_FTPSSLAUTH.md CURLOPT_FTP_ACCOUNT.md CURLOPT_FTP_ALTERNATIVE_TO_USER.md CURLOPT_FTP_CREATE_MISSING_DIRS.md CURLOPT_FTP_FILEMETHOD.md CURLOPT_FTP_SKIP_PASV_IP.md CURLOPT_FTP_SSL_CCC.md CURLOPT_FTP_USE_EPRT.md CURLOPT_FTP_USE_EPSV.md CURLOPT_FTP_USE_PRET.md CURLOPT_GSSAPI_DELEGATION.md CURLOPT_HAPPY_EYEBALLS_TIMEOUT_MS.md CURLOPT_HAPROXYPROTOCOL.md CURLOPT_HAPROXY_CLIENT_IP.md CURLOPT_HEADER.md CURLOPT_HEADERDATA.md CURLOPT_HEADERFUNCTION.md CURLOPT_HEADEROPT.md CURLOPT_HSTS.md CURLOPT_HSTSREADDATA.md CURLOPT_HSTSREADFUNCTION.md CURLOPT_HSTSWRITEDATA.md CURLOPT_HSTSWRITEFUNCTION.md CURLOPT_HSTS_CTRL.md CURLOPT_HTTP09_ALLOWED.md CURLOPT_HTTP200ALIASES.md CURLOPT_HTTPAUTH.md CURLOPT_HTTPGET.md CURLOPT_HTTPHEADER.md CURLOPT_HTTPPOST.md CURLOPT_HTTPPROXYTUNNEL.md CURLOPT_HTTP_CONTENT_DECODING.md CURLOPT_HTTP_TRANSFER_DECODING.md CURLOPT_HTTP_VERSION.md CURLOPT_IGNORE_CONTENT_LENGTH.md CURLOPT_INFILESIZE.md CURLOPT_INFILESIZE_LARGE.md CURLOPT_INTERFACE.md CURLOPT_INTERLEAVEDATA.md CURLOPT_INTERLEAVEFUNCTION.md CURLOPT_IOCTLDATA.md CURLOPT_IOCTLFUNCTION.md CURLOPT_IPRESOLVE.md CURLOPT_ISSUERCERT.md CURLOPT_ISSUERCERT_BLOB.md CURLOPT_KEEP_SENDING_ON_ERROR.md CURLOPT_KEYPASSWD.md CURLOPT_KRBLEVEL.md CURLOPT_LOCALPORT.md CURLOPT_LOCALPORTRANGE.md CURLOPT_LOGIN_OPTIONS.md CURLOPT_LOW_SPEED_LIMIT.md CURLOPT_LOW_SPEED_TIME.md CURLOPT_MAIL_AUTH.md CURLOPT_MAIL_FROM.md CURLOPT_MAIL_RCPT.md CURLOPT_MAIL_RCPT_ALLOWFAILS.md CURLOPT_MAXAGE_CONN.md CURLOPT_MAXCONNECTS.md CURLOPT_MAXFILESIZE.md CURLOPT_MAXFILESIZE_LARGE.md CURLOPT_MAXLIFETIME_CONN.md CURLOPT_MAXREDIRS.md CURLOPT_MAX_RECV_SPEED_LARGE.md CURLOPT_MAX_SEND_SPEED_LARGE.md CURLOPT_MIMEPOST.md CURLOPT_MIME_OPTIONS.md CURLOPT_NETRC.md CURLOPT_NETRC_FILE.md CURLOPT_NEW_DIRECTORY_PERMS.md CURLOPT_NEW_FILE_PERMS.md CURLOPT_NOBODY.md CURLOPT_NOPROGRESS.md CURLOPT_NOPROXY.md CURLOPT_NOSIGNAL.md CURLOPT_OPENSOCKETDATA.md CURLOPT_OPENSOCKETFUNCTION.md CURLOPT_PASSWORD.md CURLOPT_PATH_AS_IS.md CURLOPT_PINNEDPUBLICKEY.md CURLOPT_PIPEWAIT.md CURLOPT_PORT.md CURLOPT_POST.md CURLOPT_POSTFIELDS.md CURLOPT_POSTFIELDSIZE.md CURLOPT_POSTFIELDSIZE_LARGE.md CURLOPT_POSTQUOTE.md CURLOPT_POSTREDIR.md CURLOPT_PREQUOTE.md CURLOPT_PREREQDATA.md CURLOPT_PREREQFUNCTION.md CURLOPT_PRE_PROXY.md CURLOPT_PRIVATE.md CURLOPT_PROGRESSDATA.md CURLOPT_PROGRESSFUNCTION.md CURLOPT_PROTOCOLS.md CURLOPT_PROTOCOLS_STR.md CURLOPT_PROXY.md CURLOPT_PROXYAUTH.md CURLOPT_PROXYHEADER.md CURLOPT_PROXYPASSWORD.md CURLOPT_PROXYPORT.md CURLOPT_PROXYTYPE.md CURLOPT_PROXYUSERNAME.md CURLOPT_PROXYUSERPWD.md CURLOPT_PROXY_CAINFO.md CURLOPT_PROXY_CAINFO_BLOB.md CURLOPT_PROXY_CAPATH.md CURLOPT_PROXY_CRLFILE.md CURLOPT_PROXY_ISSUERCERT.md CURLOPT_PROXY_ISSUERCERT_BLOB.md CURLOPT_PROXY_KEYPASSWD.md CURLOPT_PROXY_PINNEDPUBLICKEY.md CURLOPT_PROXY_SERVICE_NAME.md CURLOPT_PROXY_SSLCERT.md CURLOPT_PROXY_SSLCERTTYPE.md CURLOPT_PROXY_SSLCERT_BLOB.md CURLOPT_PROXY_SSLKEY.md CURLOPT_PROXY_SSLKEYTYPE.md CURLOPT_PROXY_SSLKEY_BLOB.md CURLOPT_PROXY_SSLVERSION.md CURLOPT_PROXY_SSL_CIPHER_LIST.md CURLOPT_PROXY_SSL_OPTIONS.md CURLOPT_PROXY_SSL_VERIFYHOST.md CURLOPT_PROXY_SSL_VERIFYPEER.md CURLOPT_PROXY_TLS13_CIPHERS.md CURLOPT_PROXY_TLSAUTH_PASSWORD.md CURLOPT_PROXY_TLSAUTH_TYPE.md CURLOPT_PROXY_TLSAUTH_USERNAME.md CURLOPT_PROXY_TRANSFER_MODE.md CURLOPT_PUT.md CURLOPT_QUICK_EXIT.md CURLOPT_QUOTE.md CURLOPT_RANDOM_FILE.md CURLOPT_RANGE.md CURLOPT_READDATA.md CURLOPT_READFUNCTION.md CURLOPT_REDIR_PROTOCOLS.md CURLOPT_REDIR_PROTOCOLS_STR.md CURLOPT_REFERER.md CURLOPT_REQUEST_TARGET.md CURLOPT_RESOLVE.md CURLOPT_RESOLVER_START_DATA.md CURLOPT_RESOLVER_START_FUNCTION.md CURLOPT_RESUME_FROM.md CURLOPT_RESUME_FROM_LARGE.md CURLOPT_RTSP_CLIENT_CSEQ.md CURLOPT_RTSP_REQUEST.md CURLOPT_RTSP_SERVER_CSEQ.md CURLOPT_RTSP_SESSION_ID.md CURLOPT_RTSP_STREAM_URI.md CURLOPT_RTSP_TRANSPORT.md CURLOPT_SASL_AUTHZID.md CURLOPT_SASL_IR.md CURLOPT_SEEKDATA.md CURLOPT_SEEKFUNCTION.md CURLOPT_SERVER_RESPONSE_TIMEOUT.md CURLOPT_SERVER_RESPONSE_TIMEOUT_MS.md CURLOPT_SERVICE_NAME.md CURLOPT_SHARE.md CURLOPT_SOCKOPTDATA.md CURLOPT_SOCKOPTFUNCTION.md CURLOPT_SOCKS5_AUTH.md CURLOPT_SOCKS5_GSSAPI_NEC.md CURLOPT_SOCKS5_GSSAPI_SERVICE.md CURLOPT_SSH_AUTH_TYPES.md CURLOPT_SSH_COMPRESSION.md CURLOPT_SSH_HOSTKEYDATA.md CURLOPT_SSH_HOSTKEYFUNCTION.md CURLOPT_SSH_HOST_PUBLIC_KEY_MD5.md CURLOPT_SSH_HOST_PUBLIC_KEY_SHA256.md CURLOPT_SSH_KEYDATA.md CURLOPT_SSH_KEYFUNCTION.md CURLOPT_SSH_KNOWNHOSTS.md CURLOPT_SSH_PRIVATE_KEYFILE.md CURLOPT_SSH_PUBLIC_KEYFILE.md CURLOPT_SSLCERT.md CURLOPT_SSLCERTTYPE.md CURLOPT_SSLCERT_BLOB.md CURLOPT_SSLENGINE.md CURLOPT_SSLENGINE_DEFAULT.md CURLOPT_SSLKEY.md CURLOPT_SSLKEYTYPE.md CURLOPT_SSLKEY_BLOB.md CURLOPT_SSLVERSION.md CURLOPT_SSL_CIPHER_LIST.md CURLOPT_SSL_CTX_DATA.md CURLOPT_SSL_CTX_FUNCTION.md CURLOPT_SSL_EC_CURVES.md CURLOPT_SSL_ENABLE_ALPN.md CURLOPT_SSL_ENABLE_NPN.md CURLOPT_SSL_FALSESTART.md CURLOPT_SSL_OPTIONS.md CURLOPT_SSL_SESSIONID_CACHE.md CURLOPT_SSL_SIGNATURE_ALGORITHMS.md CURLOPT_SSL_VERIFYHOST.md CURLOPT_SSL_VERIFYPEER.md CURLOPT_SSL_VERIFYSTATUS.md CURLOPT_STDERR.md CURLOPT_STREAM_DEPENDS.md CURLOPT_STREAM_DEPENDS_E.md CURLOPT_STREAM_WEIGHT.md CURLOPT_SUPPRESS_CONNECT_HEADERS.md CURLOPT_TCP_FASTOPEN.md CURLOPT_TCP_KEEPALIVE.md CURLOPT_TCP_KEEPCNT.md CURLOPT_TCP_KEEPIDLE.md CURLOPT_TCP_KEEPINTVL.md CURLOPT_TCP_NODELAY.md CURLOPT_TELNETOPTIONS.md CURLOPT_TFTP_BLKSIZE.md CURLOPT_TFTP_NO_OPTIONS.md CURLOPT_TIMECONDITION.md CURLOPT_TIMEOUT.md CURLOPT_TIMEOUT_MS.md CURLOPT_TIMEVALUE.md CURLOPT_TIMEVALUE_LARGE.md CURLOPT_TLS13_CIPHERS.md CURLOPT_TLSAUTH_PASSWORD.md CURLOPT_TLSAUTH_TYPE.md CURLOPT_TLSAUTH_USERNAME.md CURLOPT_TRAILERDATA.md CURLOPT_TRAILERFUNCTION.md CURLOPT_TRANSFERTEXT.md CURLOPT_TRANSFER_ENCODING.md CURLOPT_UNIX_SOCKET_PATH.md CURLOPT_UNRESTRICTED_AUTH.md CURLOPT_UPKEEP_INTERVAL_MS.md CURLOPT_UPLOAD.md CURLOPT_UPLOAD_BUFFERSIZE.md CURLOPT_UPLOAD_FLAGS.md CURLOPT_URL.md CURLOPT_USERAGENT.md CURLOPT_USERNAME.md CURLOPT_USERPWD.md CURLOPT_USE_SSL.md CURLOPT_VERBOSE.md CURLOPT_WILDCARDMATCH.md CURLOPT_WRITEDATA.md CURLOPT_WRITEFUNCTION.md CURLOPT_WS_OPTIONS.md CURLOPT_XFERINFODATA.md CURLOPT_XFERINFOFUNCTION.md CURLOPT_XOAUTH2_BEARER.md CURLSHOPT_LOCKFUNC.md CURLSHOPT_SHARE.md CURLSHOPT_UNLOCKFUNC.md CURLSHOPT_UNSHARE.md CURLSHOPT_USERDATA.md Makefile.am Makefile.incinclude
curl
Makefile.am curl.h curlver.h easy.h header.h mprintf.h multi.h options.h stdcheaders.h system.h typecheck-gcc.h urlapi.h websockets.hlib
curlx
base64.c base64.h basename.c basename.h dynbuf.c dynbuf.h fopen.c fopen.h inet_ntop.c inet_ntop.h inet_pton.c inet_pton.h multibyte.c multibyte.h nonblock.c nonblock.h snprintf.c snprintf.h strcopy.c strcopy.h strdup.c strdup.h strerr.c strerr.h strparse.c strparse.h timediff.c timediff.h timeval.c timeval.h version_win32.c version_win32.h wait.c wait.h warnless.c warnless.h winapi.c winapi.hvauth
cleartext.c cram.c digest.c digest.h digest_sspi.c gsasl.c krb5_gssapi.c krb5_sspi.c ntlm.c ntlm_sspi.c oauth2.c spnego_gssapi.c spnego_sspi.c vauth.c vauth.hvquic
curl_ngtcp2.c curl_ngtcp2.h curl_quiche.c curl_quiche.h vquic-tls.c vquic-tls.h vquic.c vquic.h vquic_int.hvtls
apple.c apple.h cipher_suite.c cipher_suite.h gtls.c gtls.h hostcheck.c hostcheck.h keylog.c keylog.h mbedtls.c mbedtls.h openssl.c openssl.h rustls.c rustls.h schannel.c schannel.h schannel_int.h schannel_verify.c vtls.c vtls.h vtls_int.h vtls_scache.c vtls_scache.h vtls_spack.c vtls_spack.h wolfssl.c wolfssl.h x509asn1.c x509asn1.hm4
.gitignore curl-amissl.m4 curl-apple-sectrust.m4 curl-compilers.m4 curl-confopts.m4 curl-functions.m4 curl-gnutls.m4 curl-mbedtls.m4 curl-openssl.m4 curl-override.m4 curl-reentrant.m4 curl-rustls.m4 curl-schannel.m4 curl-sysconfig.m4 curl-wolfssl.m4 xc-am-iface.m4 xc-cc-check.m4 xc-lt-iface.m4 xc-val-flgs.m4 zz40-xc-ovr.m4 zz50-xc-ovr.m4projects
OS400
.checksrc README.OS400 ccsidcurl.c ccsidcurl.h config400.default curl.cmd curl.inc.in curlcl.c curlmain.c initscript.sh make-docs.sh make-include.sh make-lib.sh make-src.sh make-tests.sh makefile.sh os400sys.c os400sys.hWindows
tmpl
.gitattributes README.txt curl-all.sln curl.sln curl.vcxproj curl.vcxproj.filters libcurl.sln libcurl.vcxproj libcurl.vcxproj.filtersvms
Makefile.am backup_gnv_curl_src.com build_curl-config_script.com build_gnv_curl.com build_gnv_curl_pcsi_desc.com build_gnv_curl_pcsi_text.com build_gnv_curl_release_notes.com build_libcurl_pc.com build_vms.com clean_gnv_curl.com compare_curl_source.com config_h.com curl_crtl_init.c curl_gnv_build_steps.txt curl_release_note_start.txt curl_startup.com curlmsg.h curlmsg.msg curlmsg.sdl curlmsg_vms.h generate_config_vms_h_curl.com generate_vax_transfer.com gnv_conftest.c_first gnv_curl_configure.sh gnv_libcurl_symbols.opt gnv_link_curl.com macro32_exactcase.patch make_gnv_curl_install.sh make_pcsi_curl_kit_name.com pcsi_gnv_curl_file_list.txt pcsi_product_gnv_curl.com readme report_openssl_version.c setup_gnv_curl_build.com stage_curl_install.com vms_eco_level.hscripts
.checksrc CMakeLists.txt Makefile.am badwords badwords-all badwords.txt cd2cd cd2nroff cdall checksrc-all.pl checksrc.pl cmakelint.sh completion.pl contributors.sh contrithanks.sh coverage.sh delta dmaketgz extract-unit-protos firefox-db2pem.sh installcheck.sh maketgz managen mdlinkcheck mk-ca-bundle.pl mk-unity.pl nroff2cd perlcheck.sh pythonlint.sh randdisable release-notes.pl release-tools.sh schemetable.c singleuse.pl spacecheck.pl top-complexity top-length verify-release wcurlsrc
.checksrc .gitignore CMakeLists.txt Makefile.am Makefile.inc config2setopts.c config2setopts.h curl.rc curlinfo.c mk-file-embed.pl mkhelp.pl slist_wc.c slist_wc.h terminal.c terminal.h tool_cb_dbg.c tool_cb_dbg.h tool_cb_hdr.c tool_cb_hdr.h tool_cb_prg.c tool_cb_prg.h tool_cb_rea.c tool_cb_rea.h tool_cb_see.c tool_cb_see.h tool_cb_soc.c tool_cb_soc.h tool_cb_wrt.c tool_cb_wrt.h tool_cfgable.c tool_cfgable.h tool_dirhie.c tool_dirhie.h tool_doswin.c tool_doswin.h tool_easysrc.c tool_easysrc.h tool_filetime.c tool_filetime.h tool_findfile.c tool_findfile.h tool_formparse.c tool_formparse.h tool_getparam.c tool_getparam.h tool_getpass.c tool_getpass.h tool_help.c tool_help.h tool_helpers.c tool_helpers.h tool_hugehelp.h tool_ipfs.c tool_ipfs.h tool_libinfo.c tool_libinfo.h tool_listhelp.c tool_main.c tool_main.h tool_msgs.c tool_msgs.h tool_operate.c tool_operate.h tool_operhlp.c tool_operhlp.h tool_paramhlp.c tool_paramhlp.h tool_parsecfg.c tool_parsecfg.h tool_progress.c tool_progress.h tool_sdecls.h tool_setopt.c tool_setopt.h tool_setup.h tool_ssls.c tool_ssls.h tool_stderr.c tool_stderr.h tool_urlglob.c tool_urlglob.h tool_util.c tool_util.h tool_version.h tool_vms.c tool_vms.h tool_writeout.c tool_writeout.h tool_writeout_json.c tool_writeout_json.h tool_xattr.c tool_xattr.h var.c var.htests
certs
.gitignore CMakeLists.txt Makefile.am Makefile.inc genserv.pl srp-verifier-conf srp-verifier-db test-ca.cnf test-ca.prm test-client-cert.prm test-client-eku-only.prm test-localhost-san-first.prm test-localhost-san-last.prm test-localhost.nn.prm test-localhost.prm test-localhost0h.prmdata
.gitignore DISABLED Makefile.am data-xml1 data1400.c data1401.c data1402.c data1403.c data1404.c data1405.c data1406.c data1407.c data1420.c data1461.txt data1463.txt data1465.c data1481.c data1705-1.md data1705-2.md data1705-3.md data1705-4.md data1705-stdout.1 data1706-1.md data1706-2.md data1706-3.md data1706-4.md data1706-stdout.txt data320.html test1 test10 test100 test1000 test1001 test1002 test1003 test1004 test1005 test1006 test1007 test1008 test1009 test101 test1010 test1011 test1012 test1013 test1014 test1015 test1016 test1017 test1018 test1019 test102 test1020 test1021 test1022 test1023 test1024 test1025 test1026 test1027 test1028 test1029 test103 test1030 test1031 test1032 test1033 test1034 test1035 test1036 test1037 test1038 test1039 test104 test1040 test1041 test1042 test1043 test1044 test1045 test1046 test1047 test1048 test1049 test105 test1050 test1051 test1052 test1053 test1054 test1055 test1056 test1057 test1058 test1059 test106 test1060 test1061 test1062 test1063 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testenv
__init__.py caddy.py certs.py client.py curl.py dante.py dnsd.py env.py httpd.py nghttpx.py ports.py sshd.py vsftpd.py ws_echo_server.pylibtest
.gitignore CMakeLists.txt Makefile.am Makefile.inc cli_ftp_upload.c cli_h2_pausing.c cli_h2_serverpush.c cli_h2_upgrade_extreme.c cli_hx_download.c cli_hx_upload.c cli_tls_session_reuse.c cli_upload_pausing.c cli_ws_data.c cli_ws_pingpong.c first.c first.h lib1156.c lib1301.c lib1308.c lib1485.c lib1500.c lib1501.c lib1502.c lib1506.c lib1507.c lib1508.c lib1509.c lib1510.c lib1511.c lib1512.c lib1513.c lib1514.c lib1515.c lib1517.c lib1518.c lib1520.c lib1522.c lib1523.c lib1525.c lib1526.c lib1527.c lib1528.c lib1529.c lib1530.c lib1531.c lib1532.c lib1533.c lib1534.c lib1535.c lib1536.c lib1537.c lib1538.c lib1540.c lib1541.c lib1542.c lib1545.c lib1549.c lib1550.c lib1551.c lib1552.c lib1553.c lib1554.c lib1555.c lib1556.c lib1557.c lib1558.c lib1559.c lib1560.c lib1564.c lib1565.c lib1567.c lib1568.c lib1569.c lib1571.c lib1576.c lib1582.c lib1587.c lib1588.c lib1589.c lib1591.c lib1592.c lib1593.c lib1594.c lib1597.c lib1598.c lib1599.c lib1662.c lib1900.c lib1901.c lib1902.c lib1903.c lib1905.c lib1906.c lib1907.c lib1908.c lib1910.c lib1911.c lib1912.c lib1913.c lib1915.c lib1916.c lib1918.c lib1919.c lib1920.c lib1921.c lib1933.c lib1934.c lib1935.c lib1936.c lib1937.c lib1938.c lib1939.c lib1940.c lib1945.c lib1947.c lib1948.c lib1955.c lib1956.c lib1957.c lib1958.c lib1959.c lib1960.c lib1964.c lib1965.c lib1970.c lib1971.c lib1972.c lib1973.c lib1974.c lib1975.c lib1977.c lib1978.c lib2023.c lib2032.c lib2082.c lib2301.c lib2302.c lib2304.c lib2306.c lib2308.c lib2309.c lib2402.c lib2404.c lib2405.c lib2502.c lib2504.c lib2505.c lib2506.c lib2700.c lib3010.c lib3025.c lib3026.c lib3027.c lib3033.c lib3034.c lib3100.c lib3101.c lib3102.c lib3103.c lib3104.c lib3105.c lib3207.c lib3208.c lib500.c lib501.c lib502.c lib503.c lib504.c lib505.c lib506.c lib507.c lib508.c lib509.c lib510.c lib511.c lib512.c lib513.c lib514.c lib515.c lib516.c lib517.c lib518.c lib519.c lib520.c lib521.c lib523.c lib524.c lib525.c lib526.c lib530.c lib533.c lib536.c lib537.c lib539.c lib540.c lib541.c lib542.c lib543.c lib544.c lib547.c lib549.c lib552.c lib553.c lib554.c lib555.c lib556.c lib557.c lib558.c lib559.c lib560.c lib562.c lib564.c lib566.c lib567.c lib568.c lib569.c lib570.c lib571.c lib572.c lib573.c lib574.c lib575.c lib576.c lib578.c lib579.c lib582.c lib583.c lib586.c lib589.c lib590.c lib591.c lib597.c lib598.c lib599.c lib643.c lib650.c lib651.c lib652.c lib653.c lib654.c lib655.c lib658.c lib659.c lib661.c lib666.c lib667.c lib668.c lib670.c lib674.c lib676.c lib677.c lib678.c lib694.c lib695.c lib751.c lib753.c lib757.c lib758.c lib766.c memptr.c mk-lib1521.pl test1013.pl test1022.pl test307.pl test610.pl test613.pl testtrace.c testtrace.h testutil.c testutil.h unitcheck.hserver
.checksrc .gitignore CMakeLists.txt Makefile.am Makefile.inc dnsd.c first.c first.h getpart.c mqttd.c resolve.c rtspd.c sockfilt.c socksd.c sws.c tftpd.c util.ctunit
.gitignore CMakeLists.txt Makefile.am Makefile.inc README.md tool1394.c tool1604.c tool1621.c tool1622.c tool1623.c tool1720.cunit
.gitignore CMakeLists.txt Makefile.am Makefile.inc README.md unit1300.c unit1302.c unit1303.c unit1304.c unit1305.c unit1307.c unit1309.c unit1323.c unit1330.c unit1395.c unit1396.c unit1397.c unit1398.c unit1399.c unit1600.c unit1601.c unit1602.c unit1603.c unit1605.c unit1606.c unit1607.c unit1608.c unit1609.c unit1610.c unit1611.c unit1612.c unit1614.c unit1615.c unit1616.c unit1620.c unit1625.c unit1626.c unit1627.c unit1636.c unit1650.c unit1651.c unit1652.c unit1653.c unit1654.c unit1655.c unit1656.c unit1657.c unit1658.c unit1660.c unit1661.c unit1663.c unit1664.c unit1666.c unit1667.c unit1668.c unit1669.c unit1674.c unit1675.c unit1676.c unit1979.c unit1980.c unit2600.c unit2601.c unit2602.c unit2603.c unit2604.c unit2605.c unit3200.c unit3205.c unit3211.c unit3212.c unit3213.c unit3214.c unit3216.c unit3219.c unit3300.c unit3301.c unit3302.cexamples
.env config.ini crypto_test.lua env_test.lua fs_example.lua http_server.lua https_test.lua ini_example.lua json.lua log.lua path_fs_example.lua process_example.lua request_download.lua request_test.lua run_all.lua sqlite_example.lua sqlite_http_template.lua stash_test.lua template_test.lua timer.lua websocket.luainiparser
example
iniexample.c iniwrite.c parse.c twisted-errors.ini twisted-genhuge.py twisted-ofkey.ini twisted-ofval.ini twisted.initest
CMakeLists.txt test_dictionary.c test_iniparser.c unity-config.yml unity_config.hjinjac
libjinjac
src
CMakeLists.txt ast.c ast.h block_statement.c block_statement.h buffer.c buffer.h buildin.c buildin.h common.h convert.c convert.h flex_decl.h jfunction.c jfunction.h jinja_expression.l jinja_expression.y jinjac_parse.c jinjac_parse.h jinjac_stream.c jinjac_stream.h jlist.c jlist.h jobject.c jobject.h parameter.c parameter.h str_obj.c str_obj.h trace.c trace.htest
.gitignore CMakeLists.txt autotest.rb test_01.expected test_01.jinja test_01b.expected test_01b.jinja test_01c.expected test_01c.jinja test_01d.expected test_01d.jinja test_02.expected test_02.jinja test_03.expected test_03.jinja test_04.expected test_04.jinja test_05.expected test_05.jinja test_06.expected test_06.jinja test_07.expected test_07.jinja test_08.expected test_08.jinja test_08b.expected test_08b.jinja test_09.expected test_09.jinja test_10.expected test_10.jinja test_11.expected test_11.jinja test_12.expected test_12.jinja test_13.expected test_13.jinja test_14.expected test_14.jinja test_15.expected test_15.jinja test_16.expected test_16.jinja test_17.expected test_17.jinja test_18.expected test_18.jinja test_18b.expected test_18b.jinja test_18c.expected test_18c.jinja test_19.expected test_19.jinja test_19b.expected test_19b.jinja test_19c.expected test_19c.jinja test_19d.expected test_19d.jinja test_19e.expected test_19e.jinja test_19f.expected test_19f.jinja test_20.expected test_20.jinja test_21.expected test_21.jinja test_22.expected test_22.jinja test_22a.expected test_22a.jinja test_22b.expected test_22b.jinja test_23.expected test_23.jinja test_24.expected test_24.jinjalibev
Changes LICENSE Makefile Makefile.am Makefile.in README Symbols.ev Symbols.event aclocal.m4 autogen.sh compile config.guess config.h config.h.in config.status config.sub configure configure.ac depcomp ev++.h ev.3 ev.c ev.h ev.pod ev_epoll.c ev_kqueue.c ev_poll.c ev_port.c ev_select.c ev_vars.h ev_win32.c ev_wrap.h event.c event.h install-sh libev.m4 libtool ltmain.sh missing mkinstalldirs stamp-h1luajit
doc
bluequad-print.css bluequad.css contact.html ext_buffer.html ext_c_api.html ext_ffi.html ext_ffi_api.html ext_ffi_semantics.html ext_ffi_tutorial.html ext_jit.html ext_profiler.html extensions.html install.html luajit.html running.htmldynasm
dasm_arm.h dasm_arm.lua dasm_arm64.h dasm_arm64.lua dasm_mips.h dasm_mips.lua dasm_mips64.lua dasm_ppc.h dasm_ppc.lua dasm_proto.h dasm_x64.lua dasm_x86.h dasm_x86.lua dynasm.luasrc
host
.gitignore README buildvm.c buildvm.h buildvm_asm.c buildvm_fold.c buildvm_lib.c buildvm_libbc.h buildvm_peobj.c genlibbc.lua genminilua.lua genversion.lua minilua.cjit
.gitignore bc.lua bcsave.lua dis_arm.lua dis_arm64.lua dis_arm64be.lua dis_mips.lua dis_mips64.lua dis_mips64el.lua dis_mips64r6.lua dis_mips64r6el.lua dis_mipsel.lua dis_ppc.lua dis_x64.lua dis_x86.lua dump.lua p.lua v.lua zone.luawolfssl
.github
workflows
ada.yml arduino.yml async-examples.yml async.yml atecc608-sim.yml bind.yml cmake-autoconf.yml cmake.yml codespell.yml coverity-scan-fixes.yml cryptocb-only.yml curl.yml cyrus-sasl.yml disable-pk-algs.yml docker-Espressif.yml docker-OpenWrt.yml emnet-nonblock.yml fil-c.yml freertos-mem-track.yml gencertbuf.yml grpc.yml haproxy.yml hostap-vm.yml intelasm-c-fallback.yml ipmitool.yml jwt-cpp.yml krb5.yml libspdm.yml libssh2.yml libvncserver.yml linuxkm.yml macos-apple-native-cert-validation.yml mbedtls.sh mbedtls.yml membrowse-comment.yml membrowse-onboard.yml membrowse-report.yml memcached.sh memcached.yml mono.yml mosquitto.yml msmtp.yml msys2.yml multi-arch.yml multi-compiler.yml net-snmp.yml nginx.yml no-malloc.yml no-tls.yml nss.sh nss.yml ntp.yml ocsp.yml openldap.yml openssh.yml openssl-ech.yml opensslcoexist.yml openvpn.yml os-check.yml packaging.yml pam-ipmi.yml pq-all.yml pr-commit-check.yml psk.yml puf.yml python.yml rng-tools.yml rust-wrapper.yml se050-sim.yml smallStackSize.yml socat.yml softhsm.yml sssd.yml stm32-sim.yml stsafe-a120-sim.yml stunnel.yml symbol-prefixes.yml threadx.yml tls-anvil.yml trackmemory.yml watcomc.yml win-csharp-test.yml wolfCrypt-Wconversion.yml wolfboot-integration.yml wolfsm.yml xcode.yml zephyr-4.x.yml zephyr.ymlIDE
ARDUINO
Arduino_README_prepend.md README.md include.am keywords.txt library.properties.template wolfssl-arduino.cpp wolfssl-arduino.sh wolfssl.hECLIPSE
Espressif
ESP-IDF
examples
template
CMakeLists.txt Makefile README.md partitions_singleapp_large.csv sdkconfig.defaults sdkconfig.defaults.esp8266wolfssl_benchmark
VisualGDB
wolfssl_benchmark_IDF_v4.4_ESP32.sln wolfssl_benchmark_IDF_v4.4_ESP32.vgdbproj wolfssl_benchmark_IDF_v5_ESP32.sln wolfssl_benchmark_IDF_v5_ESP32.vgdbproj wolfssl_benchmark_IDF_v5_ESP32C3.sln wolfssl_benchmark_IDF_v5_ESP32C3.vgdbproj wolfssl_benchmark_IDF_v5_ESP32S3.sln wolfssl_benchmark_IDF_v5_ESP32S3.vgdbprojwolfssl_client
CMakeLists.txt Makefile README.md README_server_sm.md partitions_singleapp_large.csv sdkconfig.defaults sdkconfig.defaults.esp32c2 sdkconfig.defaults.esp8266 wolfssl_client_ESP8266.vgdbprojwolfssl_server
CMakeLists.txt Makefile README.md README_server_sm.md partitions_singleapp_large.csv sdkconfig.defaults sdkconfig.defaults.esp32c2 sdkconfig.defaults.esp8266 wolfssl_server_ESP8266.vgdbprojwolfssl_test
VisualGDB
wolfssl_test-IDF_v5_ESP32.sln wolfssl_test-IDF_v5_ESP32.vgdbproj wolfssl_test-IDF_v5_ESP32C3.sln wolfssl_test-IDF_v5_ESP32C3.vgdbproj wolfssl_test-IDF_v5_ESP32C6.sln wolfssl_test-IDF_v5_ESP32C6.vgdbproj wolfssl_test_IDF_v5_ESP32S3.sln wolfssl_test_IDF_v5_ESP32S3.vgdbprojGCC-ARM
Makefile Makefile.bench Makefile.client Makefile.common Makefile.server Makefile.static Makefile.test README.md include.am linker.ld linker_fips.ldIAR-EWARM
embOS
SAMV71_XULT
embOS_SAMV71_XULT_user_settings
user_settings.h user_settings_simple_example.h user_settings_verbose_example.hembOS_wolfcrypt_benchmark_SAMV71_XULT
README_wolfcrypt_benchmark wolfcrypt_benchmark.ewd wolfcrypt_benchmark.ewpINTIME-RTOS
Makefile README.md include.am libwolfssl.c libwolfssl.vcxproj user_settings.h wolfExamples.c wolfExamples.h wolfExamples.sln wolfExamples.vcxproj wolfssl-lib.sln wolfssl-lib.vcxprojMQX
Makefile README-jp.md README.md client-tls.c include.am server-tls.c user_config.h user_settings.hMSVS-2019-AZSPHERE
wolfssl_new_azsphere
.gitignore CMakeLists.txt CMakeSettings.json app_manifest.json applibs_versions.h launch.vs.json main.cNETOS
Makefile.wolfcrypt.inc README.md include.am user_settings.h user_settings.h-cert2425 user_settings.h-cert3389 wolfssl_netos_custom.cPlatformIO
examples
wolfssl_benchmark
CMakeLists.txt README.md platformio.ini sdkconfig.defaults wolfssl_benchmark.code-workspaceROWLEY-CROSSWORKS-ARM
Kinetis_FlashPlacement.xml README.md arm_startup.c benchmark_main.c hw.h include.am kinetis_hw.c retarget.c test_main.c user_settings.h wolfssl.hzp wolfssl_ltc.hzpRenesas
e2studio
RA6M3
README.md README_APRA6M_en.md README_APRA6M_jp.md include.amRX72N
EnvisionKit
Simple
README_EN.md README_JP.mdwolfssl_demo
key_data.c key_data.h user_settings.h wolfssl_demo.c wolfssl_demo.h wolfssl_tsip_unit_test.cSTM32Cube
README.md STM32_Benchmarks.md default_conf.ftl include.am main.c wolfssl_example.c wolfssl_example.hWIN
README.txt include.am test.vcxproj user_settings.h user_settings_dtls.h wolfssl-fips.sln wolfssl-fips.vcxprojWIN-SRTP-KDF-140-3
README.txt include.am resource.h test.vcxproj user_settings.h wolfssl-fips.rc wolfssl-fips.sln wolfssl-fips.vcxprojWIN10
README.txt include.am resource.h test.vcxproj user_settings.h wolfssl-fips.rc wolfssl-fips.sln wolfssl-fips.vcxprojXCODE
Benchmark
include.amXilinxSDK
README.md bench.sh combine.sh eclipse_formatter_profile.xml graph.sh include.am user_settings.h wolfssl_example.capple-universal
wolfssl-multiplatform
iotsafe
Makefile README.md ca-cert.c devices.c devices.h include.am main.c memory-tls.c startup.c target.ld user_settings.hmynewt
README.md apps.wolfcrypttest.pkg.yml crypto.wolfssl.pkg.yml crypto.wolfssl.syscfg.yml include.am setup.shcerts
1024
ca-cert.der ca-cert.pem ca-key.der ca-key.pem client-cert.der client-cert.pem client-key.der client-key.pem client-keyPub.der dh1024.der dh1024.pem dsa-pub-1024.pem dsa1024.der dsa1024.pem include.am rsa1024.der server-cert.der server-cert.pem server-key.der server-key.pemcrl
extra-crls
ca-int-cert-revoked.pem claim-root.pem crl_critical_entry.pem crlnum_57oct.pem crlnum_64oct.pem general-server-crl.pem large_crlnum.pem large_crlnum2.pemdilithium
bench_dilithium_level2_key.der bench_dilithium_level3_key.der bench_dilithium_level5_key.der include.amecc
bp256r1-key.der bp256r1-key.pem ca-secp256k1-cert.pem ca-secp256k1-key.pem client-bp256r1-cert.der client-bp256r1-cert.pem client-secp256k1-cert.der client-secp256k1-cert.pem genecc.sh include.am secp256k1-key.der secp256k1-key.pem secp256k1-param.pem secp256k1-privkey.der secp256k1-privkey.pem server-bp256r1-cert.der server-bp256r1-cert.pem server-secp256k1-cert.der server-secp256k1-cert.pem server2-secp256k1-cert.der server2-secp256k1-cert.pem wolfssl.cnf wolfssl_384.cnfed25519
ca-ed25519-key.der ca-ed25519-key.pem ca-ed25519-priv.der ca-ed25519-priv.pem ca-ed25519.der ca-ed25519.pem client-ed25519-key.der client-ed25519-key.pem client-ed25519-priv.der client-ed25519-priv.pem client-ed25519.der client-ed25519.pem eddsa-ed25519.der eddsa-ed25519.pem gen-ed25519-certs.sh gen-ed25519-keys.sh gen-ed25519.sh include.am root-ed25519-key.der root-ed25519-key.pem root-ed25519-priv.der root-ed25519-priv.pem root-ed25519.der root-ed25519.pem server-ed25519-cert.pem server-ed25519-key.der server-ed25519-key.pem server-ed25519-priv.der server-ed25519-priv.pem server-ed25519.der server-ed25519.pemed448
ca-ed448-key.der ca-ed448-key.pem ca-ed448-priv.der ca-ed448-priv.pem ca-ed448.der ca-ed448.pem client-ed448-key.der client-ed448-key.pem client-ed448-priv.der client-ed448-priv.pem client-ed448.der client-ed448.pem gen-ed448-certs.sh gen-ed448-keys.sh include.am root-ed448-key.der root-ed448-key.pem root-ed448-priv.der root-ed448-priv.pem root-ed448.der root-ed448.pem server-ed448-cert.pem server-ed448-key.der server-ed448-key.pem server-ed448-priv.der server-ed448-priv.pem server-ed448.der server-ed448.pemexternal
DigiCertGlobalRootCA.pem README.txt ca-digicert-ev.pem ca-globalsign-root.pem ca-google-root.pem ca_collection.pem include.amintermediate
ca_false_intermediate
gentestcert.sh int_ca.key server.key test_ca.key test_ca.pem test_int_not_cacert.pem test_sign_bynoca_srv.pem wolfssl_base.conf wolfssl_srv.conflms
bc_hss_L2_H5_W8_root.der bc_hss_L3_H5_W4_root.der bc_lms_chain_ca.der bc_lms_chain_leaf.der bc_lms_native_bc_root.der bc_lms_sha256_h10_w8_root.der bc_lms_sha256_h5_w4_root.der include.ammldsa
README.txt include.am mldsa44-cert.der mldsa44-cert.pem mldsa44-key.pem mldsa44_bare-priv.der mldsa44_bare-seed.der mldsa44_oqskeypair.der mldsa44_priv-only.der mldsa44_pub-spki.der mldsa44_seed-only.der mldsa44_seed-priv.der mldsa65-cert.der mldsa65-cert.pem mldsa65-key.pem mldsa65_bare-priv.der mldsa65_bare-seed.der mldsa65_oqskeypair.der mldsa65_priv-only.der mldsa65_pub-spki.der mldsa65_seed-only.der mldsa65_seed-priv.der mldsa87-cert.der mldsa87-cert.pem mldsa87-key.pem mldsa87_bare-priv.der mldsa87_bare-seed.der mldsa87_oqskeypair.der mldsa87_priv-only.der mldsa87_pub-spki.der mldsa87_seed-only.der mldsa87_seed-priv.derocsp
imposter-root-ca-cert.der imposter-root-ca-cert.pem imposter-root-ca-key.der imposter-root-ca-key.pem include.am index-ca-and-intermediate-cas.txt index-ca-and-intermediate-cas.txt.attr index-intermediate1-ca-issued-certs.txt index-intermediate1-ca-issued-certs.txt.attr index-intermediate2-ca-issued-certs.txt index-intermediate2-ca-issued-certs.txt.attr index-intermediate3-ca-issued-certs.txt index-intermediate3-ca-issued-certs.txt.attr intermediate1-ca-cert.der intermediate1-ca-cert.pem intermediate1-ca-key.der intermediate1-ca-key.pem intermediate2-ca-cert.der intermediate2-ca-cert.pem intermediate2-ca-key.der intermediate2-ca-key.pem intermediate3-ca-cert.der intermediate3-ca-cert.pem intermediate3-ca-key.der intermediate3-ca-key.pem ocsp-responder-cert.der ocsp-responder-cert.pem ocsp-responder-key.der ocsp-responder-key.pem openssl.cnf renewcerts-for-test.sh renewcerts.sh root-ca-cert.der root-ca-cert.pem root-ca-crl.pem root-ca-key.der root-ca-key.pem server1-cert.der server1-cert.pem server1-chain-noroot.pem server1-key.der server1-key.pem server2-cert.der server2-cert.pem server2-key.der server2-key.pem server3-cert.der server3-cert.pem server3-key.der server3-key.pem server4-cert.der server4-cert.pem server4-key.der server4-key.pem server5-cert.der server5-cert.pem server5-key.der server5-key.pem test-leaf-response.der test-multi-response.der test-response-nointern.der test-response-rsapss.der test-response.derp521
ca-p521-key.der ca-p521-key.pem ca-p521-priv.der ca-p521-priv.pem ca-p521.der ca-p521.pem client-p521-key.der client-p521-key.pem client-p521-priv.der client-p521-priv.pem client-p521.der client-p521.pem gen-p521-certs.sh gen-p521-keys.sh include.am root-p521-key.der root-p521-key.pem root-p521-priv.der root-p521-priv.pem root-p521.der root-p521.pem server-p521-cert.pem server-p521-key.der server-p521-key.pem server-p521-priv.der server-p521-priv.pem server-p521.der server-p521.pemrpk
client-cert-rpk.der client-ecc-cert-rpk.der include.am server-cert-rpk.der server-ecc-cert-rpk.derrsapss
ca-3072-rsapss-key.der ca-3072-rsapss-key.pem ca-3072-rsapss-priv.der ca-3072-rsapss-priv.pem ca-3072-rsapss.der ca-3072-rsapss.pem ca-rsapss-key.der ca-rsapss-key.pem ca-rsapss-priv.der ca-rsapss-priv.pem ca-rsapss.der ca-rsapss.pem client-3072-rsapss-key.der client-3072-rsapss-key.pem client-3072-rsapss-priv.der client-3072-rsapss-priv.pem client-3072-rsapss.der client-3072-rsapss.pem client-rsapss-key.der client-rsapss-key.pem client-rsapss-priv.der client-rsapss-priv.pem client-rsapss.der client-rsapss.pem gen-rsapss-keys.sh include.am renew-rsapss-certs.sh root-3072-rsapss-key.der root-3072-rsapss-key.pem root-3072-rsapss-priv.der root-3072-rsapss-priv.pem root-3072-rsapss.der root-3072-rsapss.pem root-rsapss-key.der root-rsapss-key.pem root-rsapss-priv.der root-rsapss-priv.pem root-rsapss.der root-rsapss.pem server-3072-rsapss-cert.pem server-3072-rsapss-key.der server-3072-rsapss-key.pem server-3072-rsapss-priv.der server-3072-rsapss-priv.pem server-3072-rsapss.der server-3072-rsapss.pem server-mix-rsapss-cert.pem server-rsapss-cert.pem server-rsapss-key.der server-rsapss-key.pem server-rsapss-priv.der server-rsapss-priv.pem server-rsapss.der server-rsapss.pemslhdsa
bench_slhdsa_sha2_128f_key.der bench_slhdsa_sha2_128s_key.der bench_slhdsa_sha2_192f_key.der bench_slhdsa_sha2_192s_key.der bench_slhdsa_sha2_256f_key.der bench_slhdsa_sha2_256s_key.der bench_slhdsa_shake128f_key.der bench_slhdsa_shake128s_key.der bench_slhdsa_shake192f_key.der bench_slhdsa_shake192s_key.der bench_slhdsa_shake256f_key.der bench_slhdsa_shake256s_key.der client-mldsa44-priv.pem client-mldsa44-sha2.der client-mldsa44-sha2.pem client-mldsa44-shake.der client-mldsa44-shake.pem gen-slhdsa-mldsa-certs.sh include.am root-slhdsa-sha2-128s-priv.der root-slhdsa-sha2-128s-priv.pem root-slhdsa-sha2-128s.der root-slhdsa-sha2-128s.pem root-slhdsa-shake-128s-priv.der root-slhdsa-shake-128s-priv.pem root-slhdsa-shake-128s.der root-slhdsa-shake-128s.pem server-mldsa44-priv.pem server-mldsa44-sha2.der server-mldsa44-sha2.pem server-mldsa44-shake.der server-mldsa44-shake.pemsm2
ca-sm2-key.der ca-sm2-key.pem ca-sm2-priv.der ca-sm2-priv.pem ca-sm2.der ca-sm2.pem client-sm2-key.der client-sm2-key.pem client-sm2-priv.der client-sm2-priv.pem client-sm2.der client-sm2.pem fix_sm2_spki.py gen-sm2-certs.sh gen-sm2-keys.sh include.am root-sm2-key.der root-sm2-key.pem root-sm2-priv.der root-sm2-priv.pem root-sm2.der root-sm2.pem self-sm2-cert.pem self-sm2-key.pem self-sm2-priv.pem server-sm2-cert.der server-sm2-cert.pem server-sm2-key.der server-sm2-key.pem server-sm2-priv.der server-sm2-priv.pem server-sm2.der server-sm2.pemstatickeys
dh-ffdhe2048-params.pem dh-ffdhe2048-pub.der dh-ffdhe2048-pub.pem dh-ffdhe2048.der dh-ffdhe2048.pem ecc-secp256r1.der ecc-secp256r1.pem gen-static.sh include.am x25519-pub.der x25519-pub.pem x25519.der x25519.pemtest
catalog.txt cert-bad-neg-int.der cert-bad-oid.der cert-bad-utf8.der cert-ext-ia.cfg cert-ext-ia.der cert-ext-ia.pem cert-ext-joi.cfg cert-ext-joi.der cert-ext-joi.pem cert-ext-mnc.der cert-ext-multiple.cfg cert-ext-multiple.der cert-ext-multiple.pem cert-ext-nc-combined.der cert-ext-nc-combined.pem cert-ext-nc.cfg cert-ext-nc.der cert-ext-nc.pem cert-ext-ncdns.der cert-ext-ncdns.pem cert-ext-ncip.der cert-ext-ncip.pem cert-ext-ncmixed.der cert-ext-ncmulti.der cert-ext-ncmulti.pem cert-ext-ncrid.der cert-ext-ncrid.pem cert-ext-nct.cfg cert-ext-nct.der cert-ext-nct.pem cert-ext-ndir-exc.cfg cert-ext-ndir-exc.der cert-ext-ndir-exc.pem cert-ext-ndir.cfg cert-ext-ndir.der cert-ext-ndir.pem cert-ext-ns.der cert-over-max-altnames.cfg cert-over-max-altnames.der cert-over-max-altnames.pem cert-over-max-nc.cfg cert-over-max-nc.der cert-over-max-nc.pem client-ecc-cert-ski.hex cn-ip-literal.der cn-ip-wildcard.der crit-cert.pem crit-key.pem dh1024.der dh1024.pem dh512.der dh512.pem digsigku.pem encrypteddata.msg gen-badsig.sh gen-ext-certs.sh gen-testcerts.sh include.am kari-keyid-cms.msg ktri-keyid-cms.msg ossl-trusted-cert.pem server-badaltname.der server-badaltname.pem server-badaltnull.der server-badaltnull.pem server-badcn.der server-badcn.pem server-badcnnull.der server-badcnnull.pem server-cert-ecc-badsig.der server-cert-ecc-badsig.pem server-cert-rsa-badsig.der server-cert-rsa-badsig.pem server-duplicate-policy.pem server-garbage.der server-garbage.pem server-goodalt.der server-goodalt.pem server-goodaltwild.der server-goodaltwild.pem server-goodcn.der server-goodcn.pem server-goodcnwild.der server-goodcnwild.pem server-localhost.der server-localhost.pem smime-test-canon.p7s smime-test-multipart-badsig.p7s smime-test-multipart.p7s smime-test.p7stest-pathlen
assemble-chains.sh chainA-ICA1-key.pem chainA-ICA1-pathlen0.pem chainA-assembled.pem chainA-entity-key.pem chainA-entity.pem chainB-ICA1-key.pem chainB-ICA1-pathlen0.pem chainB-ICA2-key.pem chainB-ICA2-pathlen1.pem chainB-assembled.pem chainB-entity-key.pem chainB-entity.pem chainC-ICA1-key.pem chainC-ICA1-pathlen1.pem chainC-assembled.pem chainC-entity-key.pem chainC-entity.pem chainD-ICA1-key.pem chainD-ICA1-pathlen127.pem chainD-assembled.pem chainD-entity-key.pem chainD-entity.pem chainE-ICA1-key.pem chainE-ICA1-pathlen128.pem chainE-assembled.pem chainE-entity-key.pem chainE-entity.pem chainF-ICA1-key.pem chainF-ICA1-pathlen1.pem chainF-ICA2-key.pem chainF-ICA2-pathlen0.pem chainF-assembled.pem chainF-entity-key.pem chainF-entity.pem chainG-ICA1-key.pem chainG-ICA1-pathlen0.pem chainG-ICA2-key.pem chainG-ICA2-pathlen1.pem chainG-ICA3-key.pem chainG-ICA3-pathlen99.pem chainG-ICA4-key.pem chainG-ICA4-pathlen5.pem chainG-ICA5-key.pem chainG-ICA5-pathlen20.pem chainG-ICA6-key.pem chainG-ICA6-pathlen10.pem chainG-ICA7-key.pem chainG-ICA7-pathlen100.pem chainG-assembled.pem chainG-entity-key.pem chainG-entity.pem chainH-ICA1-key.pem chainH-ICA1-pathlen0.pem chainH-ICA2-key.pem chainH-ICA2-pathlen2.pem chainH-ICA3-key.pem chainH-ICA3-pathlen2.pem chainH-ICA4-key.pem chainH-ICA4-pathlen2.pem chainH-assembled.pem chainH-entity-key.pem chainH-entity.pem chainI-ICA1-key.pem chainI-ICA1-no_pathlen.pem chainI-ICA2-key.pem chainI-ICA2-no_pathlen.pem chainI-ICA3-key.pem chainI-ICA3-pathlen2.pem chainI-assembled.pem chainI-entity-key.pem chainI-entity.pem chainJ-ICA1-key.pem chainJ-ICA1-no_pathlen.pem chainJ-ICA2-key.pem chainJ-ICA2-no_pathlen.pem chainJ-ICA3-key.pem chainJ-ICA3-no_pathlen.pem chainJ-ICA4-key.pem chainJ-ICA4-pathlen2.pem chainJ-assembled.pem chainJ-entity-key.pem chainJ-entity.pem include.am refreshkeys.shtest-serial0
ee_normal.pem ee_serial0.pem generate_certs.sh include.am intermediate_serial0.pem root_serial0.pem root_serial0_key.pem selfsigned_nonca_serial0.pemxmss
bc_xmss_chain_ca.der bc_xmss_chain_leaf.der bc_xmss_sha2_10_256_root.der bc_xmss_sha2_16_256_root.der bc_xmssmt_sha2_20_2_256_root.der bc_xmssmt_sha2_20_4_256_root.der bc_xmssmt_sha2_40_8_256_root.der include.amcmake
Config.cmake.in README.md config.in functions.cmake include.am options.h.in wolfssl-config-version.cmake.in wolfssl-targets.cmake.indebian
changelog.in control.in copyright include.am libwolfssl-dev.install libwolfssl.install rules.indoc
dox_comments
header_files
aes.h arc4.h ascon.h asn.h asn_public.h blake2.h bn.h camellia.h chacha.h chacha20_poly1305.h cmac.h coding.h compress.h cryptocb.h curve25519.h curve448.h des3.h dh.h doxygen_groups.h doxygen_pages.h dsa.h ecc.h eccsi.h ed25519.h ed448.h error-crypt.h evp.h hash.h hmac.h iotsafe.h kdf.h logging.h md2.h md4.h md5.h memory.h ocsp.h pem.h pkcs11.h pkcs7.h poly1305.h psa.h puf.h pwdbased.h quic.h random.h ripemd.h rsa.h sakke.h sha.h sha256.h sha3.h sha512.h signature.h siphash.h srp.h ssl.h tfm.h types.h wc_encrypt.h wc_port.h wc_she.h wc_slhdsa.h wolfio.hheader_files-ja
aes.h arc4.h ascon.h asn.h asn_public.h blake2.h bn.h camellia.h chacha.h chacha20_poly1305.h cmac.h coding.h compress.h cryptocb.h curve25519.h curve448.h des3.h dh.h doxygen_groups.h doxygen_pages.h dsa.h ecc.h eccsi.h ed25519.h ed448.h error-crypt.h evp.h hash.h hmac.h iotsafe.h kdf.h logging.h md2.h md4.h md5.h memory.h ocsp.h pem.h pkcs11.h pkcs7.h poly1305.h psa.h pwdbased.h quic.h random.h ripemd.h rsa.h sakke.h sha.h sha256.h sha3.h sha512.h signature.h siphash.h srp.h ssl.h tfm.h types.h wc_encrypt.h wc_port.h wolfio.hexamples
async
Makefile README.md async_client.c async_server.c async_tls.c async_tls.h include.am user_settings.hconfigs
README.md include.am user_settings_EBSnet.h user_settings_all.h user_settings_arduino.h user_settings_baremetal.h user_settings_ca.h user_settings_curve25519nonblock.h user_settings_dtls13.h user_settings_eccnonblock.h user_settings_espressif.h user_settings_fipsv2.h user_settings_fipsv5.h user_settings_min_ecc.h user_settings_openssl_compat.h user_settings_pkcs7.h user_settings_platformio.h user_settings_pq.h user_settings_rsa_only.h user_settings_stm32.h user_settings_template.h user_settings_tls12.h user_settings_tls13.h user_settings_wolfboot_keytools.h user_settings_wolfssh.h user_settings_wolftpm.hechoclient
echoclient.c echoclient.h echoclient.sln echoclient.vcproj echoclient.vcxproj include.am quitlinuxkm
Kbuild Makefile README.md get_thread_size.c include.am linuxkm-fips-hash-wrapper.sh linuxkm-fips-hash.c linuxkm_memory.c linuxkm_memory.h linuxkm_wc_port.h lkcapi_aes_glue.c lkcapi_dh_glue.c lkcapi_ecdh_glue.c lkcapi_ecdsa_glue.c lkcapi_glue.c lkcapi_rsa_glue.c lkcapi_sha_glue.c module_exports.c.template module_hooks.c pie_redirect_table.c wolfcrypt.lds x86_vector_register_glue.cm4
ax_add_am_macro.m4 ax_am_jobserver.m4 ax_am_macros.m4 ax_append_compile_flags.m4 ax_append_flag.m4 ax_append_link_flags.m4 ax_append_to_file.m4 ax_atomic.m4 ax_bsdkm.m4 ax_check_compile_flag.m4 ax_check_link_flag.m4 ax_compiler_version.m4 ax_count_cpus.m4 ax_create_generic_config.m4 ax_debug.m4 ax_file_escapes.m4 ax_harden_compiler_flags.m4 ax_linuxkm.m4 ax_print_to_file.m4 ax_pthread.m4 ax_require_defined.m4 ax_tls.m4 ax_vcs_checkout.m4 hexversion.m4 lib_socket_nsl.m4 visibility.m4mqx
wolfcrypt_benchmark
ReferencedRSESystems.xml wolfcrypt_benchmark_twrk70f120m_Int_Flash_DDRData_Debug_PnE_U-MultiLink.launch wolfcrypt_benchmark_twrk70f120m_Int_Flash_DDRData_Release_PnE_U-MultiLink.launch wolfcrypt_benchmark_twrk70f120m_Int_Flash_SramData_Debug_JTrace.jlink wolfcrypt_benchmark_twrk70f120m_Int_Flash_SramData_Debug_JTrace.launch wolfcrypt_benchmark_twrk70f120m_Int_Flash_SramData_Debug_PnE_U-MultiLink.launch wolfcrypt_benchmark_twrk70f120m_Int_Flash_SramData_Release_PnE_U-MultiLink.launchwolfcrypt_test
ReferencedRSESystems.xml wolfcrypt_test_twrk70f120m_Int_Flash_DDRData_Debug_PnE_U-MultiLink.launch wolfcrypt_test_twrk70f120m_Int_Flash_DDRData_Release_PnE_U-MultiLink.launch wolfcrypt_test_twrk70f120m_Int_Flash_SramData_Debug_JTrace.jlink wolfcrypt_test_twrk70f120m_Int_Flash_SramData_Debug_JTrace.launch wolfcrypt_test_twrk70f120m_Int_Flash_SramData_Debug_PnE_U-MultiLink.launch wolfcrypt_test_twrk70f120m_Int_Flash_SramData_Release_PnE_U-MultiLink.launchwolfssl_client
ReferencedRSESystems.xml wolfssl_client_twrk70f120m_Int_Flash_DDRData_Debug_PnE_U-MultiLink.launch wolfssl_client_twrk70f120m_Int_Flash_DDRData_Release_PnE_U-MultiLink.launch wolfssl_client_twrk70f120m_Int_Flash_SramData_Debug_JTrace.jlink wolfssl_client_twrk70f120m_Int_Flash_SramData_Debug_JTrace.launch wolfssl_client_twrk70f120m_Int_Flash_SramData_Debug_PnE_U-MultiLink.launch wolfssl_client_twrk70f120m_Int_Flash_SramData_Release_PnE_U-MultiLink.launchscripts
aria-cmake-build-test.sh asn1_oid_sum.pl benchmark.test benchmark_compare.sh cleanup_testfiles.sh crl-gen-openssl.test crl-revoked.test dertoc.pl dtls.test dtlscid.test external.test google.test include.am makedistsmall.sh memtest.sh ocsp-responder-openssl-interop.test ocsp-stapling-with-ca-as-responder.test ocsp-stapling-with-wolfssl-responder.test ocsp-stapling.test ocsp-stapling2.test ocsp-stapling_tls13multi.test ocsp.test openssl.test openssl_srtp.test pem.test ping.test pkcallbacks.test psk.test resume.test rsapss.test sniffer-gen.sh sniffer-ipv6.pcap sniffer-static-rsa.pcap sniffer-testsuite.test sniffer-tls12-keylog.out sniffer-tls12-keylog.pcap sniffer-tls12-keylog.sslkeylog sniffer-tls13-dh-resume.pcap sniffer-tls13-dh.pcap sniffer-tls13-ecc-resume.pcap sniffer-tls13-ecc.pcap sniffer-tls13-hrr.pcap sniffer-tls13-keylog.out sniffer-tls13-keylog.pcap sniffer-tls13-keylog.sslkeylog sniffer-tls13-x25519-resume.pcap sniffer-tls13-x25519.pcap stm32l4-v4_0_1_build.sh tls13.test trusted_peer.test unit.test.in user_settings_asm.shsrc
bio.c conf.c crl.c dtls.c dtls13.c include.am internal.c keys.c ocsp.c pk.c pk_ec.c pk_rsa.c quic.c sniffer.c ssl.c ssl_api_cert.c ssl_api_crl_ocsp.c ssl_api_pk.c ssl_asn1.c ssl_bn.c ssl_certman.c ssl_crypto.c ssl_ech.c ssl_load.c ssl_misc.c ssl_p7p12.c ssl_sess.c ssl_sk.c tls.c tls13.c wolfio.c x509.c x509_str.ctests
api
api.h api_decl.h create_ocsp_test_blobs.py include.am test_aes.c test_aes.h test_arc4.c test_arc4.h test_ascon.c test_ascon.h test_ascon_kats.h test_asn.c test_asn.h test_blake2.c test_blake2.h test_camellia.c test_camellia.h test_certman.c test_certman.h test_chacha.c test_chacha.h test_chacha20_poly1305.c test_chacha20_poly1305.h test_cmac.c test_cmac.h test_curve25519.c test_curve25519.h test_curve448.c test_curve448.h test_des3.c test_des3.h test_dh.c test_dh.h test_digest.h test_dsa.c test_dsa.h test_dtls.c test_dtls.h test_ecc.c test_ecc.h test_ed25519.c test_ed25519.h test_ed448.c test_ed448.h test_evp.c test_evp.h test_evp_cipher.c test_evp_cipher.h test_evp_digest.c test_evp_digest.h test_evp_pkey.c test_evp_pkey.h test_hash.c test_hash.h test_hmac.c test_hmac.h test_md2.c test_md2.h test_md4.c test_md4.h test_md5.c test_md5.h test_mldsa.c test_mldsa.h test_mlkem.c test_mlkem.h test_ocsp.c test_ocsp.h test_ocsp_test_blobs.h test_ossl_asn1.c test_ossl_asn1.h test_ossl_bio.c test_ossl_bio.h test_ossl_bn.c test_ossl_bn.h test_ossl_cipher.c test_ossl_cipher.h test_ossl_dgst.c test_ossl_dgst.h test_ossl_dh.c test_ossl_dh.h test_ossl_dsa.c test_ossl_dsa.h test_ossl_ec.c test_ossl_ec.h test_ossl_ecx.c test_ossl_ecx.h test_ossl_mac.c test_ossl_mac.h test_ossl_obj.c test_ossl_obj.h test_ossl_p7p12.c test_ossl_p7p12.h test_ossl_pem.c test_ossl_pem.h test_ossl_rand.c test_ossl_rand.h test_ossl_rsa.c test_ossl_rsa.h test_ossl_sk.c test_ossl_sk.h test_ossl_x509.c test_ossl_x509.h test_ossl_x509_acert.c test_ossl_x509_acert.h test_ossl_x509_crypto.c test_ossl_x509_crypto.h test_ossl_x509_ext.c test_ossl_x509_ext.h test_ossl_x509_info.c test_ossl_x509_info.h test_ossl_x509_io.c test_ossl_x509_io.h test_ossl_x509_lu.c test_ossl_x509_lu.h test_ossl_x509_name.c test_ossl_x509_name.h test_ossl_x509_pk.c test_ossl_x509_pk.h test_ossl_x509_str.c test_ossl_x509_str.h test_ossl_x509_vp.c test_ossl_x509_vp.h test_pkcs12.c test_pkcs12.h test_pkcs7.c test_pkcs7.h test_poly1305.c test_poly1305.h test_random.c test_random.h test_rc2.c test_rc2.h test_ripemd.c test_ripemd.h test_rsa.c test_rsa.h test_sha.c test_sha.h test_sha256.c test_sha256.h test_sha3.c test_sha3.h test_sha512.c test_sha512.h test_she.c test_she.h test_signature.c test_signature.h test_slhdsa.c test_slhdsa.h test_sm2.c test_sm2.h test_sm3.c test_sm3.h test_sm4.c test_sm4.h test_tls.c test_tls.h test_tls13.c test_tls13.h test_tls_ext.c test_tls_ext.h test_wc_encrypt.c test_wc_encrypt.h test_wolfmath.c test_wolfmath.h test_x509.c test_x509.hwolfcrypt
benchmark
README.md benchmark-VS2022.sln benchmark-VS2022.vcxproj benchmark-VS2022.vcxproj.user benchmark.c benchmark.h benchmark.sln benchmark.vcproj benchmark.vcxproj include.amsrc
port
Espressif
esp_crt_bundle
README.md cacrt_all.pem cacrt_deprecated.pem cacrt_local.pem esp_crt_bundle.c gen_crt_bundle.py pio_install_cryptography.pyRenesas
README.md renesas_common.c renesas_fspsm_aes.c renesas_fspsm_rsa.c renesas_fspsm_sha.c renesas_fspsm_util.c renesas_rx64_hw_sha.c renesas_rx64_hw_util.c renesas_tsip_aes.c renesas_tsip_rsa.c renesas_tsip_sha.c renesas_tsip_util.carm
armv8-32-aes-asm.S armv8-32-aes-asm_c.c armv8-32-chacha-asm.S armv8-32-chacha-asm_c.c armv8-32-curve25519.S armv8-32-curve25519_c.c armv8-32-mlkem-asm.S armv8-32-mlkem-asm_c.c armv8-32-poly1305-asm.S armv8-32-poly1305-asm_c.c armv8-32-sha256-asm.S armv8-32-sha256-asm_c.c armv8-32-sha3-asm.S armv8-32-sha3-asm_c.c armv8-32-sha512-asm.S armv8-32-sha512-asm_c.c armv8-aes-asm.S armv8-aes-asm_c.c armv8-aes.c armv8-chacha-asm.S armv8-chacha-asm_c.c armv8-curve25519.S armv8-curve25519_c.c armv8-mlkem-asm.S armv8-mlkem-asm_c.c armv8-poly1305-asm.S armv8-poly1305-asm_c.c armv8-sha256-asm.S armv8-sha256-asm_c.c armv8-sha256.c armv8-sha3-asm.S armv8-sha3-asm_c.c armv8-sha512-asm.S armv8-sha512-asm_c.c armv8-sha512.c cryptoCell.c cryptoCellHash.c thumb2-aes-asm.S thumb2-aes-asm_c.c thumb2-chacha-asm.S thumb2-chacha-asm_c.c thumb2-curve25519.S thumb2-curve25519_c.c thumb2-mlkem-asm.S thumb2-mlkem-asm_c.c thumb2-poly1305-asm.S thumb2-poly1305-asm_c.c thumb2-sha256-asm.S thumb2-sha256-asm_c.c thumb2-sha3-asm.S thumb2-sha3-asm_c.c thumb2-sha512-asm.S thumb2-sha512-asm_c.ccaam
README.md caam_aes.c caam_doc.pdf caam_driver.c caam_error.c caam_integrity.c caam_qnx.c caam_sha.c wolfcaam_aes.c wolfcaam_cmac.c wolfcaam_ecdsa.c wolfcaam_fsl_nxp.c wolfcaam_hash.c wolfcaam_hmac.c wolfcaam_init.c wolfcaam_qnx.c wolfcaam_rsa.c wolfcaam_seco.c wolfcaam_x25519.cdevcrypto
README.md devcrypto_aes.c devcrypto_ecdsa.c devcrypto_hash.c devcrypto_hmac.c devcrypto_rsa.c devcrypto_x25519.c wc_devcrypto.criscv
riscv-64-aes.c riscv-64-chacha.c riscv-64-poly1305.c riscv-64-sha256.c riscv-64-sha3.c riscv-64-sha512.cwolfssl
openssl
aes.h asn1.h asn1t.h bio.h bn.h buffer.h camellia.h cmac.h cms.h compat_types.h conf.h crypto.h des.h dh.h dsa.h ec.h ec25519.h ec448.h ecdh.h ecdsa.h ed25519.h ed448.h engine.h err.h evp.h fips_rand.h hmac.h include.am kdf.h lhash.h md4.h md5.h modes.h obj_mac.h objects.h ocsp.h opensslconf.h opensslv.h ossl_typ.h pem.h pkcs12.h pkcs7.h rand.h rc4.h ripemd.h rsa.h safestack.h sha.h sha3.h srp.h ssl.h ssl23.h stack.h tls1.h txt_db.h ui.h x509.h x509_vfy.h x509v3.hwolfcrypt
port
Renesas
renesas-fspsm-crypt.h renesas-fspsm-types.h renesas-rx64-hw-crypt.h renesas-tsip-crypt.h renesas_cmn.h renesas_fspsm_internal.h renesas_sync.h renesas_tsip_internal.h renesas_tsip_types.hcaam
caam_driver.h caam_error.h caam_qnx.h wolfcaam.h wolfcaam_aes.h wolfcaam_cmac.h wolfcaam_ecdsa.h wolfcaam_fsl_nxp.h wolfcaam_hash.h wolfcaam_qnx.h wolfcaam_rsa.h wolfcaam_seco.h wolfcaam_sha.h wolfcaam_x25519.hwrapper
Ada
examples
src
aes_verify_main.adb rsa_verify_main.adb sha256_main.adb spark_sockets.adb spark_sockets.ads spark_terminal.adb spark_terminal.ads tls_client.adb tls_client.ads tls_client_main.adb tls_server.adb tls_server.ads tls_server_main.adbtests
src
aes_bindings_tests.adb aes_bindings_tests.ads rsa_verify_bindings_tests.adb rsa_verify_bindings_tests.ads sha256_bindings_tests.adb sha256_bindings_tests.ads tests.adbCSharp
wolfSSL-Example-IOCallbacks
App.config wolfSSL-Example-IOCallbacks.cs wolfSSL-Example-IOCallbacks.csprojwolfSSL-TLS-ServerThreaded
App.config wolfSSL-TLS-ServerThreaded.cs wolfSSL-TLS-ServerThreaded.csprojrust
wolfssl-wolfcrypt
src
aes.rs blake2.rs chacha20_poly1305.rs cmac.rs cmac_mac.rs curve25519.rs dh.rs dilithium.rs ecc.rs ecdsa.rs ed25519.rs ed448.rs fips.rs hkdf.rs hmac.rs hmac_mac.rs kdf.rs lib.rs lms.rs mlkem.rs mlkem_kem.rs pbkdf2_password_hash.rs prf.rs random.rs rsa.rs rsa_pkcs1v15.rs sha.rs sha_digest.rs sys.rstests
test_aes.rs test_blake2.rs test_chacha20_poly1305.rs test_cmac.rs test_cmac_mac.rs test_curve25519.rs test_dh.rs test_dilithium.rs test_ecc.rs test_ecdsa.rs test_ed25519.rs test_ed448.rs test_hkdf.rs test_hmac.rs test_hmac_mac.rs test_kdf.rs test_lms.rs test_mlkem.rs test_mlkem_kem.rs test_pbkdf2_password_hash.rs test_prf.rs test_random.rs test_rsa.rs test_rsa_pkcs1v15.rs test_sha.rs test_sha_digest.rs test_wolfcrypt.rszephyr
samples
wolfssl_benchmark
CMakeLists.txt README install_test.sh prj.conf sample.yaml zephyr_legacy.conf zephyr_v4.1.confwolfssl_test
CMakeLists.txt README install_test.sh prj-no-malloc.conf prj.conf sample.yaml zephyr_legacy.conf zephyr_v4.1.conf
wolfssl/wolfcrypt/src/port/arm/thumb2-curve25519_c.c
raw
1/* thumb2-curve25519
2 *
3 * Copyright (C) 2006-2026 wolfSSL Inc.
4 *
5 * This file is part of wolfSSL.
6 *
7 * wolfSSL is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * wolfSSL is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA
20 */
21
22/* Generated using (from wolfssl):
23 * cd ../scripts
24 * ruby ./x25519/x25519.rb \
25 * thumb2 ../wolfssl/wolfcrypt/src/port/arm/thumb2-curve25519.c
26 */
27
28#include <wolfssl/wolfcrypt/libwolfssl_sources_asm.h>
29#include <wolfssl/wolfcrypt/error-crypt.h>
30
31#ifdef WOLFSSL_ARMASM
32#ifdef WOLFSSL_ARMASM_THUMB2
33#ifdef WOLFSSL_ARMASM_INLINE
34
35#ifdef __IAR_SYSTEMS_ICC__
36#define __asm__ asm
37#define __volatile__ volatile
38#define WOLFSSL_NO_VAR_ASSIGN_REG
39#endif /* __IAR_SYSTEMS_ICC__ */
40#ifdef __KEIL__
41#define __asm__ __asm
42#define __volatile__ volatile
43#endif /* __KEIL__ */
44#ifdef __ghs__
45#define __asm__ __asm
46#define __volatile__
47#define WOLFSSL_NO_VAR_ASSIGN_REG
48#endif /* __ghs__ */
49
50/* Based on work by: Emil Lenngren
51 * https://github.com/pornin/X25519-Cortex-M4
52 */
53
54#include <wolfssl/wolfcrypt/fe_operations.h>
55#define CURVED25519_ASM
56#include <wolfssl/wolfcrypt/ge_operations.h>
57
58#if defined(HAVE_CURVE25519) || defined(HAVE_ED25519)
59#if !defined(CURVE25519_SMALL) || !defined(ED25519_SMALL)
60
61#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
62WC_OMIT_FRAME_POINTER void fe_init()
63#else
64WC_OMIT_FRAME_POINTER void fe_init()
65#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
66{
67#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
68#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
69 __asm__ __volatile__ (
70 "\n\t"
71#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
72 :
73 :
74#else
75 :
76 :
77#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
78 : "memory", "cc"
79 );
80}
81
82void fe_add_sub_op(void);
83#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
84WC_OMIT_FRAME_POINTER void fe_add_sub_op()
85#else
86WC_OMIT_FRAME_POINTER void fe_add_sub_op()
87#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
88{
89#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
90#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
91 __asm__ __volatile__ (
92 /* Add-Sub */
93 "LDRD r4, r5, [r2]\n\t"
94 "LDRD r6, r7, [r3]\n\t"
95 /* Add */
96 "ADDS r8, r4, r6\n\t"
97 "MOV r12, #0x0\n\t"
98 "ADCS r9, r5, r7\n\t"
99 "ADC r12, r12, #0x0\n\t"
100 "STRD r8, r9, [r0]\n\t"
101 /* Sub */
102 "SUBS r10, r4, r6\n\t"
103 "SBCS r11, r5, r7\n\t"
104 "STRD r10, r11, [r1]\n\t"
105 "LDRD r4, r5, [r2, #8]\n\t"
106 "LDRD r6, r7, [r3, #8]\n\t"
107 /* Sub */
108 "SBCS r10, r4, r6\n\t"
109 "MOV lr, #0x0\n\t"
110 "SBCS r11, r5, r7\n\t"
111 "ADC lr, lr, #0x0\n\t"
112 "STRD r10, r11, [r1, #8]\n\t"
113 /* Add */
114 "SUBS r12, r12, #0x1\n\t"
115 "ADCS r8, r4, r6\n\t"
116 "ADCS r9, r5, r7\n\t"
117 "STRD r8, r9, [r0, #8]\n\t"
118 "LDRD r4, r5, [r2, #16]\n\t"
119 "LDRD r6, r7, [r3, #16]\n\t"
120 /* Add */
121 "ADCS r8, r4, r6\n\t"
122 "MOV r12, #0x0\n\t"
123 "ADCS r9, r5, r7\n\t"
124 "ADC r12, r12, #0x0\n\t"
125 "STRD r8, r9, [r0, #16]\n\t"
126 /* Sub */
127 "SUBS lr, lr, #0x1\n\t"
128 "SBCS r10, r4, r6\n\t"
129 "SBCS r11, r5, r7\n\t"
130 "STRD r10, r11, [r1, #16]\n\t"
131 "LDRD r4, r5, [r2, #24]\n\t"
132 "LDRD r6, r7, [r3, #24]\n\t"
133 /* Sub */
134 "SBCS r10, r4, r6\n\t"
135 "SBC r11, r5, r7\n\t"
136 /* Add */
137 "SUBS r12, r12, #0x1\n\t"
138 "ADCS r8, r4, r6\n\t"
139 "MOV r12, #0x0\n\t"
140 "ADCS r9, r5, r7\n\t"
141 "ADC r12, r12, #0x0\n\t"
142 /* Multiply -modulus by overflow */
143 "LSL r3, r12, #1\n\t"
144 "MOV r12, #0x13\n\t"
145 "ORR r3, r3, r9, LSR #31\n\t"
146 "MUL r12, r3, r12\n\t"
147 /* Add -x*modulus (if overflow) */
148 "LDRD r4, r5, [r0]\n\t"
149 "LDRD r6, r7, [r0, #8]\n\t"
150 "ADDS r4, r4, r12\n\t"
151 "ADCS r5, r5, #0x0\n\t"
152 "ADCS r6, r6, #0x0\n\t"
153 "ADCS r7, r7, #0x0\n\t"
154 "STRD r4, r5, [r0]\n\t"
155 "STRD r6, r7, [r0, #8]\n\t"
156 "LDRD r4, r5, [r0, #16]\n\t"
157 "ADCS r4, r4, #0x0\n\t"
158 "ADCS r5, r5, #0x0\n\t"
159 "STRD r4, r5, [r0, #16]\n\t"
160 "BFC r9, #31, #1\n\t"
161 "ADCS r8, r8, #0x0\n\t"
162 "ADC r9, r9, #0x0\n\t"
163 "STRD r8, r9, [r0, #24]\n\t"
164 /* Add -modulus on underflow */
165 "MOV lr, #0x13\n\t"
166 "AND lr, lr, r11, ASR #31\n\t"
167 "LDM r1, {r4, r5, r6, r7, r8, r9}\n\t"
168 "SUBS r4, r4, lr\n\t"
169 "SBCS r5, r5, #0x0\n\t"
170 "SBCS r6, r6, #0x0\n\t"
171 "SBCS r7, r7, #0x0\n\t"
172 "SBCS r8, r8, #0x0\n\t"
173 "SBCS r9, r9, #0x0\n\t"
174 "BFC r11, #31, #1\n\t"
175 "SBCS r10, r10, #0x0\n\t"
176 "SBC r11, r11, #0x0\n\t"
177 "STM r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
178 /* Done Add-Sub */
179#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
180 :
181 :
182#else
183 :
184 :
185#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
186 : "memory", "cc", "lr"
187 );
188}
189
190void fe_sub_op(void);
191#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
192WC_OMIT_FRAME_POINTER void fe_sub_op()
193#else
194WC_OMIT_FRAME_POINTER void fe_sub_op()
195#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
196{
197#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
198#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
199 __asm__ __volatile__ (
200 /* Sub */
201 "LDM r2!, {r6, r7, r8, r9, r10, r11, r12, lr}\n\t"
202 "LDM r1!, {r2, r3, r4, r5}\n\t"
203 "SUBS r6, r2, r6\n\t"
204 "SBCS r7, r3, r7\n\t"
205 "SBCS r8, r4, r8\n\t"
206 "SBCS r9, r5, r9\n\t"
207 "LDM r1!, {r2, r3, r4, r5}\n\t"
208 "SBCS r10, r2, r10\n\t"
209 "SBCS r11, r3, r11\n\t"
210 "SBCS r12, r4, r12\n\t"
211 "SBC lr, r5, lr\n\t"
212 "MOV r2, #0x13\n\t"
213 "AND r2, r2, lr, ASR #31\n\t"
214 "SUBS r6, r6, r2\n\t"
215 "SBCS r7, r7, #0x0\n\t"
216 "SBCS r8, r8, #0x0\n\t"
217 "SBCS r9, r9, #0x0\n\t"
218 "SBCS r10, r10, #0x0\n\t"
219 "SBCS r11, r11, #0x0\n\t"
220 "BFC lr, #31, #1\n\t"
221 "SBCS r12, r12, #0x0\n\t"
222 "SBC lr, lr, #0x0\n\t"
223 "STM r0, {r6, r7, r8, r9, r10, r11, r12, lr}\n\t"
224 /* Done Sub */
225#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
226 :
227 :
228#else
229 :
230 :
231#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
232 : "memory", "cc", "lr"
233 );
234}
235
236#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
237WC_OMIT_FRAME_POINTER void fe_sub(fe r_p, const fe a_p, const fe b_p)
238#else
239WC_OMIT_FRAME_POINTER void fe_sub(fe r, const fe a, const fe b)
240#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
241{
242#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
243 register sword32* r __asm__ ("r0") = (sword32*)r_p;
244 register const sword32* a __asm__ ("r1") = (const sword32*)a_p;
245 register const sword32* b __asm__ ("r2") = (const sword32*)b_p;
246#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
247
248 __asm__ __volatile__ (
249 "BL fe_sub_op\n\t"
250#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
251 : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b)
252 :
253#else
254 :
255 : [r] "r" (r), [a] "r" (a), [b] "r" (b)
256#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
257 : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
258 "r11", "r12", "lr"
259 );
260}
261
262void fe_add_op(void);
263#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
264WC_OMIT_FRAME_POINTER void fe_add_op()
265#else
266WC_OMIT_FRAME_POINTER void fe_add_op()
267#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
268{
269#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
270#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
271 __asm__ __volatile__ (
272 /* Add */
273 "LDM r2!, {r6, r7, r8, r9, r10, r11, r12, lr}\n\t"
274 "LDM r1!, {r2, r3, r4, r5}\n\t"
275 "ADDS r6, r2, r6\n\t"
276 "ADCS r7, r3, r7\n\t"
277 "ADCS r8, r4, r8\n\t"
278 "ADCS r9, r5, r9\n\t"
279 "LDM r1!, {r2, r3, r4, r5}\n\t"
280 "ADCS r10, r2, r10\n\t"
281 "ADCS r11, r3, r11\n\t"
282 "ADCS r12, r4, r12\n\t"
283 "ADC lr, r5, lr\n\t"
284 "MOV r2, #0x13\n\t"
285 "AND r2, r2, lr, ASR #31\n\t"
286 "ADDS r6, r6, r2\n\t"
287 "ADCS r7, r7, #0x0\n\t"
288 "ADCS r8, r8, #0x0\n\t"
289 "ADCS r9, r9, #0x0\n\t"
290 "ADCS r10, r10, #0x0\n\t"
291 "ADCS r11, r11, #0x0\n\t"
292 "BFC lr, #31, #1\n\t"
293 "ADCS r12, r12, #0x0\n\t"
294 "ADC lr, lr, #0x0\n\t"
295 "STM r0, {r6, r7, r8, r9, r10, r11, r12, lr}\n\t"
296 /* Done Add */
297#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
298 :
299 :
300#else
301 :
302 :
303#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
304 : "memory", "cc", "lr"
305 );
306}
307
308#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
309WC_OMIT_FRAME_POINTER void fe_add(fe r_p, const fe a_p, const fe b_p)
310#else
311WC_OMIT_FRAME_POINTER void fe_add(fe r, const fe a, const fe b)
312#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
313{
314#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
315 register sword32* r __asm__ ("r0") = (sword32*)r_p;
316 register const sword32* a __asm__ ("r1") = (const sword32*)a_p;
317 register const sword32* b __asm__ ("r2") = (const sword32*)b_p;
318#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
319
320 __asm__ __volatile__ (
321 "BL fe_add_op\n\t"
322#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
323 : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b)
324 :
325#else
326 :
327 : [r] "r" (r), [a] "r" (a), [b] "r" (b)
328#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
329 : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
330 "r11", "r12", "lr"
331 );
332}
333
334#if defined(HAVE_ED25519) || defined(WOLFSSL_CURVE25519_USE_ED25519)
335#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
336WC_OMIT_FRAME_POINTER void fe_frombytes(fe out_p, const unsigned char* in_p)
337#else
338WC_OMIT_FRAME_POINTER void fe_frombytes(fe out, const unsigned char* in)
339#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
340{
341#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
342 register sword32* out __asm__ ("r0") = (sword32*)out_p;
343 register const unsigned char* in __asm__ ("r1") =
344 (const unsigned char*)in_p;
345#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
346
347 __asm__ __volatile__ (
348 "LDR r2, [%[in]]\n\t"
349 "LDR r3, [%[in], #4]\n\t"
350 "LDR r4, [%[in], #8]\n\t"
351 "LDR r5, [%[in], #12]\n\t"
352 "LDR r6, [%[in], #16]\n\t"
353 "LDR r7, [%[in], #20]\n\t"
354 "LDR r8, [%[in], #24]\n\t"
355 "LDR r9, [%[in], #28]\n\t"
356 "BFC r9, #31, #1\n\t"
357 "STR r2, [%[out]]\n\t"
358 "STR r3, [%[out], #4]\n\t"
359 "STR r4, [%[out], #8]\n\t"
360 "STR r5, [%[out], #12]\n\t"
361 "STR r6, [%[out], #16]\n\t"
362 "STR r7, [%[out], #20]\n\t"
363 "STR r8, [%[out], #24]\n\t"
364 "STR r9, [%[out], #28]\n\t"
365#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
366 : [out] "+r" (out), [in] "+r" (in)
367 :
368#else
369 :
370 : [out] "r" (out), [in] "r" (in)
371#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
372 : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9"
373 );
374}
375
376#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
377WC_OMIT_FRAME_POINTER void fe_tobytes(unsigned char* out_p, const fe n_p)
378#else
379WC_OMIT_FRAME_POINTER void fe_tobytes(unsigned char* out, const fe n)
380#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
381{
382#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
383 register unsigned char* out __asm__ ("r0") = (unsigned char*)out_p;
384 register const sword32* n __asm__ ("r1") = (const sword32*)n_p;
385#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
386
387 __asm__ __volatile__ (
388 "LDM %[n], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
389 "ADDS r10, r2, #0x13\n\t"
390 "ADCS r10, r3, #0x0\n\t"
391 "ADCS r10, r4, #0x0\n\t"
392 "ADCS r10, r5, #0x0\n\t"
393 "ADCS r10, r6, #0x0\n\t"
394 "ADCS r10, r7, #0x0\n\t"
395 "ADCS r10, r8, #0x0\n\t"
396 "ADC r10, r9, #0x0\n\t"
397 "ASR r10, r10, #31\n\t"
398 "AND r10, r10, #0x13\n\t"
399 "ADDS r2, r2, r10\n\t"
400 "ADCS r3, r3, #0x0\n\t"
401 "ADCS r4, r4, #0x0\n\t"
402 "ADCS r5, r5, #0x0\n\t"
403 "ADCS r6, r6, #0x0\n\t"
404 "ADCS r7, r7, #0x0\n\t"
405 "ADCS r8, r8, #0x0\n\t"
406 "ADC r9, r9, #0x0\n\t"
407 "BFC r9, #31, #1\n\t"
408 "STR r2, [%[out]]\n\t"
409 "STR r3, [%[out], #4]\n\t"
410 "STR r4, [%[out], #8]\n\t"
411 "STR r5, [%[out], #12]\n\t"
412 "STR r6, [%[out], #16]\n\t"
413 "STR r7, [%[out], #20]\n\t"
414 "STR r8, [%[out], #24]\n\t"
415 "STR r9, [%[out], #28]\n\t"
416#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
417 : [out] "+r" (out), [n] "+r" (n)
418 :
419#else
420 :
421 : [out] "r" (out), [n] "r" (n)
422#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
423 : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
424 );
425}
426
427#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
428WC_OMIT_FRAME_POINTER void fe_1(fe n_p)
429#else
430WC_OMIT_FRAME_POINTER void fe_1(fe n)
431#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
432{
433#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
434 register sword32* n __asm__ ("r0") = (sword32*)n_p;
435#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
436
437 __asm__ __volatile__ (
438 /* Set one */
439 "MOV r2, #0x1\n\t"
440 "MOV r3, #0x0\n\t"
441 "MOV r4, #0x0\n\t"
442 "MOV r5, #0x0\n\t"
443 "MOV r6, #0x0\n\t"
444 "MOV r7, #0x0\n\t"
445 "MOV r8, #0x0\n\t"
446 "MOV r9, #0x0\n\t"
447 "STM %[n], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
448#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
449 : [n] "+r" (n)
450 :
451#else
452 :
453 : [n] "r" (n)
454#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
455 : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9"
456 );
457}
458
459#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
460WC_OMIT_FRAME_POINTER void fe_0(fe n_p)
461#else
462WC_OMIT_FRAME_POINTER void fe_0(fe n)
463#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
464{
465#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
466 register sword32* n __asm__ ("r0") = (sword32*)n_p;
467#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
468
469 __asm__ __volatile__ (
470 /* Set zero */
471 "MOV r2, #0x0\n\t"
472 "MOV r3, #0x0\n\t"
473 "MOV r4, #0x0\n\t"
474 "MOV r5, #0x0\n\t"
475 "MOV r6, #0x0\n\t"
476 "MOV r7, #0x0\n\t"
477 "MOV r8, #0x0\n\t"
478 "MOV r9, #0x0\n\t"
479 "STM %[n], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
480#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
481 : [n] "+r" (n)
482 :
483#else
484 :
485 : [n] "r" (n)
486#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
487 : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9"
488 );
489}
490
491#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
492WC_OMIT_FRAME_POINTER void fe_copy(fe r_p, const fe a_p)
493#else
494WC_OMIT_FRAME_POINTER void fe_copy(fe r, const fe a)
495#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
496{
497#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
498 register sword32* r __asm__ ("r0") = (sword32*)r_p;
499 register const sword32* a __asm__ ("r1") = (const sword32*)a_p;
500#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
501
502 __asm__ __volatile__ (
503 /* Copy */
504 "LDRD r2, r3, [%[a]]\n\t"
505 "LDRD r4, r5, [%[a], #8]\n\t"
506 "STRD r2, r3, [%[r]]\n\t"
507 "STRD r4, r5, [%[r], #8]\n\t"
508 "LDRD r2, r3, [%[a], #16]\n\t"
509 "LDRD r4, r5, [%[a], #24]\n\t"
510 "STRD r2, r3, [%[r], #16]\n\t"
511 "STRD r4, r5, [%[r], #24]\n\t"
512#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
513 : [r] "+r" (r), [a] "+r" (a)
514 :
515#else
516 :
517 : [r] "r" (r), [a] "r" (a)
518#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
519 : "memory", "cc", "r2", "r3", "r4", "r5"
520 );
521}
522
523#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
524WC_OMIT_FRAME_POINTER void fe_neg(fe r_p, const fe a_p)
525#else
526WC_OMIT_FRAME_POINTER void fe_neg(fe r, const fe a)
527#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
528{
529#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
530 register sword32* r __asm__ ("r0") = (sword32*)r_p;
531 register const sword32* a __asm__ ("r1") = (const sword32*)a_p;
532#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
533
534 __asm__ __volatile__ (
535 "MVN r7, #0x0\n\t"
536 "MVN r6, #0x12\n\t"
537 "LDM %[a]!, {r2, r3, r4, r5}\n\t"
538 "SUBS r2, r6, r2\n\t"
539 "SBCS r3, r7, r3\n\t"
540 "SBCS r4, r7, r4\n\t"
541 "SBCS r5, r7, r5\n\t"
542 "STM %[r]!, {r2, r3, r4, r5}\n\t"
543 "MVN r6, #0x80000000\n\t"
544 "LDM %[a]!, {r2, r3, r4, r5}\n\t"
545 "SBCS r2, r7, r2\n\t"
546 "SBCS r3, r7, r3\n\t"
547 "SBCS r4, r7, r4\n\t"
548 "SBC r5, r6, r5\n\t"
549 "STM %[r]!, {r2, r3, r4, r5}\n\t"
550#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
551 : [r] "+r" (r), [a] "+r" (a)
552 :
553#else
554 :
555 : [r] "r" (r), [a] "r" (a)
556#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
557 : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7"
558 );
559}
560
561#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
562WC_OMIT_FRAME_POINTER int fe_isnonzero(const fe a_p)
563#else
564WC_OMIT_FRAME_POINTER int fe_isnonzero(const fe a)
565#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
566{
567#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
568 register const sword32* a __asm__ ("r0") = (const sword32*)a_p;
569#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
570
571 __asm__ __volatile__ (
572 "LDM %[a], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
573 "ADDS r1, r2, #0x13\n\t"
574 "ADCS r1, r3, #0x0\n\t"
575 "ADCS r1, r4, #0x0\n\t"
576 "ADCS r1, r5, #0x0\n\t"
577 "ADCS r1, r6, #0x0\n\t"
578 "ADCS r1, r7, #0x0\n\t"
579 "ADCS r1, r8, #0x0\n\t"
580 "ADC r1, r9, #0x0\n\t"
581 "ASR r1, r1, #31\n\t"
582 "AND r1, r1, #0x13\n\t"
583 "ADDS r2, r2, r1\n\t"
584 "ADCS r3, r3, #0x0\n\t"
585 "ADCS r4, r4, #0x0\n\t"
586 "ADCS r5, r5, #0x0\n\t"
587 "ADCS r6, r6, #0x0\n\t"
588 "ADCS r7, r7, #0x0\n\t"
589 "ADCS r8, r8, #0x0\n\t"
590 "ADC r9, r9, #0x0\n\t"
591 "BFC r9, #31, #1\n\t"
592 "ORR r2, r2, r3\n\t"
593 "ORR r4, r4, r5\n\t"
594 "ORR r6, r6, r7\n\t"
595 "ORR r8, r8, r9\n\t"
596 "ORR r4, r4, r6\n\t"
597 "ORR r2, r2, r8\n\t"
598 "ORR %[a], r2, r4\n\t"
599#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
600 : [a] "+r" (a)
601 :
602#else
603 :
604 : [a] "r" (a)
605#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
606 : "memory", "cc", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
607 "r10"
608 );
609 return (word32)(size_t)a;
610}
611
612#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
613WC_OMIT_FRAME_POINTER int fe_isnegative(const fe a_p)
614#else
615WC_OMIT_FRAME_POINTER int fe_isnegative(const fe a)
616#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
617{
618#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
619 register const sword32* a __asm__ ("r0") = (const sword32*)a_p;
620#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
621
622 __asm__ __volatile__ (
623 "LDM %[a]!, {r2, r3, r4, r5}\n\t"
624 "ADDS r1, r2, #0x13\n\t"
625 "ADCS r1, r3, #0x0\n\t"
626 "ADCS r1, r4, #0x0\n\t"
627 "ADCS r1, r5, #0x0\n\t"
628 "LDM %[a], {r2, r3, r4, r5}\n\t"
629 "ADCS r1, r2, #0x0\n\t"
630 "ADCS r1, r3, #0x0\n\t"
631 "ADCS r1, r4, #0x0\n\t"
632 "LDR r2, [%[a], #-16]\n\t"
633 "ADC r1, r5, #0x0\n\t"
634 "AND %[a], r2, #0x1\n\t"
635 "LSR r1, r1, #31\n\t"
636 "EOR %[a], %[a], r1\n\t"
637#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
638 : [a] "+r" (a)
639 :
640#else
641 :
642 : [a] "r" (a)
643#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
644 : "memory", "cc", "r1", "r2", "r3", "r4", "r5"
645 );
646 return (word32)(size_t)a;
647}
648
649#if defined(HAVE_ED25519_MAKE_KEY) || defined(HAVE_ED25519_SIGN) || \
650 defined(WOLFSSL_CURVE25519_USE_ED25519)
651#ifndef WC_NO_CACHE_RESISTANT
652#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
653WC_OMIT_FRAME_POINTER void fe_cmov_table(fe* r_p, const fe* base_p,
654 signed char b_p)
655#else
656WC_OMIT_FRAME_POINTER void fe_cmov_table(fe* r, const fe* base, signed char b)
657#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
658{
659#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
660 register fe* r __asm__ ("r0") = (fe*)r_p;
661 register const fe* base __asm__ ("r1") = (const fe*)base_p;
662 register signed char b __asm__ ("r2") = (signed char)b_p;
663#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
664
665 __asm__ __volatile__ (
666 "SXTB %[b], %[b]\n\t"
667 "SBFX r3, %[b], #7, #1\n\t"
668 "EOR r12, %[b], r3\n\t"
669 "SUB r12, r12, r3\n\t"
670 "MOV r4, #0x1\n\t"
671 "MOV r5, #0x0\n\t"
672 "MOV r6, #0x1\n\t"
673 "MOV r7, #0x0\n\t"
674 "MOV r8, #0x0\n\t"
675 "MOV r9, #0x0\n\t"
676 "MOV r3, #0x80000000\n\t"
677 "ROR r3, r3, #31\n\t"
678 "ROR r3, r3, r12\n\t"
679 "ASR r3, r3, #31\n\t"
680 "LDRD r10, r11, [%[base]]\n\t"
681 "EOR r10, r10, r4\n\t"
682 "EOR r11, r11, r5\n\t"
683 "AND r10, r10, r3\n\t"
684 "AND r11, r11, r3\n\t"
685 "EOR r4, r4, r10\n\t"
686 "EOR r5, r5, r11\n\t"
687 "LDRD r10, r11, [%[base], #32]\n\t"
688 "EOR r10, r10, r6\n\t"
689 "EOR r11, r11, r7\n\t"
690 "AND r10, r10, r3\n\t"
691 "AND r11, r11, r3\n\t"
692 "EOR r6, r6, r10\n\t"
693 "EOR r7, r7, r11\n\t"
694 "LDRD r10, r11, [%[base], #64]\n\t"
695 "EOR r10, r10, r8\n\t"
696 "EOR r11, r11, r9\n\t"
697 "AND r10, r10, r3\n\t"
698 "AND r11, r11, r3\n\t"
699 "EOR r8, r8, r10\n\t"
700 "EOR r9, r9, r11\n\t"
701 "ADD %[base], %[base], #0x60\n\t"
702 "MOV r3, #0x80000000\n\t"
703 "ROR r3, r3, #30\n\t"
704 "ROR r3, r3, r12\n\t"
705 "ASR r3, r3, #31\n\t"
706 "LDRD r10, r11, [%[base]]\n\t"
707 "EOR r10, r10, r4\n\t"
708 "EOR r11, r11, r5\n\t"
709 "AND r10, r10, r3\n\t"
710 "AND r11, r11, r3\n\t"
711 "EOR r4, r4, r10\n\t"
712 "EOR r5, r5, r11\n\t"
713 "LDRD r10, r11, [%[base], #32]\n\t"
714 "EOR r10, r10, r6\n\t"
715 "EOR r11, r11, r7\n\t"
716 "AND r10, r10, r3\n\t"
717 "AND r11, r11, r3\n\t"
718 "EOR r6, r6, r10\n\t"
719 "EOR r7, r7, r11\n\t"
720 "LDRD r10, r11, [%[base], #64]\n\t"
721 "EOR r10, r10, r8\n\t"
722 "EOR r11, r11, r9\n\t"
723 "AND r10, r10, r3\n\t"
724 "AND r11, r11, r3\n\t"
725 "EOR r8, r8, r10\n\t"
726 "EOR r9, r9, r11\n\t"
727 "ADD %[base], %[base], #0x60\n\t"
728 "MOV r3, #0x80000000\n\t"
729 "ROR r3, r3, #29\n\t"
730 "ROR r3, r3, r12\n\t"
731 "ASR r3, r3, #31\n\t"
732 "LDRD r10, r11, [%[base]]\n\t"
733 "EOR r10, r10, r4\n\t"
734 "EOR r11, r11, r5\n\t"
735 "AND r10, r10, r3\n\t"
736 "AND r11, r11, r3\n\t"
737 "EOR r4, r4, r10\n\t"
738 "EOR r5, r5, r11\n\t"
739 "LDRD r10, r11, [%[base], #32]\n\t"
740 "EOR r10, r10, r6\n\t"
741 "EOR r11, r11, r7\n\t"
742 "AND r10, r10, r3\n\t"
743 "AND r11, r11, r3\n\t"
744 "EOR r6, r6, r10\n\t"
745 "EOR r7, r7, r11\n\t"
746 "LDRD r10, r11, [%[base], #64]\n\t"
747 "EOR r10, r10, r8\n\t"
748 "EOR r11, r11, r9\n\t"
749 "AND r10, r10, r3\n\t"
750 "AND r11, r11, r3\n\t"
751 "EOR r8, r8, r10\n\t"
752 "EOR r9, r9, r11\n\t"
753 "ADD %[base], %[base], #0x60\n\t"
754 "MOV r3, #0x80000000\n\t"
755 "ROR r3, r3, #28\n\t"
756 "ROR r3, r3, r12\n\t"
757 "ASR r3, r3, #31\n\t"
758 "LDRD r10, r11, [%[base]]\n\t"
759 "EOR r10, r10, r4\n\t"
760 "EOR r11, r11, r5\n\t"
761 "AND r10, r10, r3\n\t"
762 "AND r11, r11, r3\n\t"
763 "EOR r4, r4, r10\n\t"
764 "EOR r5, r5, r11\n\t"
765 "LDRD r10, r11, [%[base], #32]\n\t"
766 "EOR r10, r10, r6\n\t"
767 "EOR r11, r11, r7\n\t"
768 "AND r10, r10, r3\n\t"
769 "AND r11, r11, r3\n\t"
770 "EOR r6, r6, r10\n\t"
771 "EOR r7, r7, r11\n\t"
772 "LDRD r10, r11, [%[base], #64]\n\t"
773 "EOR r10, r10, r8\n\t"
774 "EOR r11, r11, r9\n\t"
775 "AND r10, r10, r3\n\t"
776 "AND r11, r11, r3\n\t"
777 "EOR r8, r8, r10\n\t"
778 "EOR r9, r9, r11\n\t"
779 "ADD %[base], %[base], #0x60\n\t"
780 "MOV r3, #0x80000000\n\t"
781 "ROR r3, r3, #27\n\t"
782 "ROR r3, r3, r12\n\t"
783 "ASR r3, r3, #31\n\t"
784 "LDRD r10, r11, [%[base]]\n\t"
785 "EOR r10, r10, r4\n\t"
786 "EOR r11, r11, r5\n\t"
787 "AND r10, r10, r3\n\t"
788 "AND r11, r11, r3\n\t"
789 "EOR r4, r4, r10\n\t"
790 "EOR r5, r5, r11\n\t"
791 "LDRD r10, r11, [%[base], #32]\n\t"
792 "EOR r10, r10, r6\n\t"
793 "EOR r11, r11, r7\n\t"
794 "AND r10, r10, r3\n\t"
795 "AND r11, r11, r3\n\t"
796 "EOR r6, r6, r10\n\t"
797 "EOR r7, r7, r11\n\t"
798 "LDRD r10, r11, [%[base], #64]\n\t"
799 "EOR r10, r10, r8\n\t"
800 "EOR r11, r11, r9\n\t"
801 "AND r10, r10, r3\n\t"
802 "AND r11, r11, r3\n\t"
803 "EOR r8, r8, r10\n\t"
804 "EOR r9, r9, r11\n\t"
805 "ADD %[base], %[base], #0x60\n\t"
806 "MOV r3, #0x80000000\n\t"
807 "ROR r3, r3, #26\n\t"
808 "ROR r3, r3, r12\n\t"
809 "ASR r3, r3, #31\n\t"
810 "LDRD r10, r11, [%[base]]\n\t"
811 "EOR r10, r10, r4\n\t"
812 "EOR r11, r11, r5\n\t"
813 "AND r10, r10, r3\n\t"
814 "AND r11, r11, r3\n\t"
815 "EOR r4, r4, r10\n\t"
816 "EOR r5, r5, r11\n\t"
817 "LDRD r10, r11, [%[base], #32]\n\t"
818 "EOR r10, r10, r6\n\t"
819 "EOR r11, r11, r7\n\t"
820 "AND r10, r10, r3\n\t"
821 "AND r11, r11, r3\n\t"
822 "EOR r6, r6, r10\n\t"
823 "EOR r7, r7, r11\n\t"
824 "LDRD r10, r11, [%[base], #64]\n\t"
825 "EOR r10, r10, r8\n\t"
826 "EOR r11, r11, r9\n\t"
827 "AND r10, r10, r3\n\t"
828 "AND r11, r11, r3\n\t"
829 "EOR r8, r8, r10\n\t"
830 "EOR r9, r9, r11\n\t"
831 "ADD %[base], %[base], #0x60\n\t"
832 "MOV r3, #0x80000000\n\t"
833 "ROR r3, r3, #25\n\t"
834 "ROR r3, r3, r12\n\t"
835 "ASR r3, r3, #31\n\t"
836 "LDRD r10, r11, [%[base]]\n\t"
837 "EOR r10, r10, r4\n\t"
838 "EOR r11, r11, r5\n\t"
839 "AND r10, r10, r3\n\t"
840 "AND r11, r11, r3\n\t"
841 "EOR r4, r4, r10\n\t"
842 "EOR r5, r5, r11\n\t"
843 "LDRD r10, r11, [%[base], #32]\n\t"
844 "EOR r10, r10, r6\n\t"
845 "EOR r11, r11, r7\n\t"
846 "AND r10, r10, r3\n\t"
847 "AND r11, r11, r3\n\t"
848 "EOR r6, r6, r10\n\t"
849 "EOR r7, r7, r11\n\t"
850 "LDRD r10, r11, [%[base], #64]\n\t"
851 "EOR r10, r10, r8\n\t"
852 "EOR r11, r11, r9\n\t"
853 "AND r10, r10, r3\n\t"
854 "AND r11, r11, r3\n\t"
855 "EOR r8, r8, r10\n\t"
856 "EOR r9, r9, r11\n\t"
857 "ADD %[base], %[base], #0x60\n\t"
858 "MOV r3, #0x80000000\n\t"
859 "ROR r3, r3, #24\n\t"
860 "ROR r3, r3, r12\n\t"
861 "ASR r3, r3, #31\n\t"
862 "LDRD r10, r11, [%[base]]\n\t"
863 "EOR r10, r10, r4\n\t"
864 "EOR r11, r11, r5\n\t"
865 "AND r10, r10, r3\n\t"
866 "AND r11, r11, r3\n\t"
867 "EOR r4, r4, r10\n\t"
868 "EOR r5, r5, r11\n\t"
869 "LDRD r10, r11, [%[base], #32]\n\t"
870 "EOR r10, r10, r6\n\t"
871 "EOR r11, r11, r7\n\t"
872 "AND r10, r10, r3\n\t"
873 "AND r11, r11, r3\n\t"
874 "EOR r6, r6, r10\n\t"
875 "EOR r7, r7, r11\n\t"
876 "LDRD r10, r11, [%[base], #64]\n\t"
877 "EOR r10, r10, r8\n\t"
878 "EOR r11, r11, r9\n\t"
879 "AND r10, r10, r3\n\t"
880 "AND r11, r11, r3\n\t"
881 "EOR r8, r8, r10\n\t"
882 "EOR r9, r9, r11\n\t"
883 "SUB %[base], %[base], #0x2a0\n\t"
884 "MVN r10, #0x12\n\t"
885 "MVN r11, #0x0\n\t"
886 "SUBS r10, r10, r8\n\t"
887 "SBCS r11, r11, r9\n\t"
888 "SBC lr, lr, lr\n\t"
889 "ASR r12, %[b], #31\n\t"
890 "EOR r3, r4, r6\n\t"
891 "AND r3, r3, r12\n\t"
892 "EOR r4, r4, r3\n\t"
893 "EOR r6, r6, r3\n\t"
894 "EOR r3, r5, r7\n\t"
895 "AND r3, r3, r12\n\t"
896 "EOR r5, r5, r3\n\t"
897 "EOR r7, r7, r3\n\t"
898 "EOR r10, r10, r8\n\t"
899 "AND r10, r10, r12\n\t"
900 "EOR r8, r8, r10\n\t"
901 "EOR r11, r11, r9\n\t"
902 "AND r11, r11, r12\n\t"
903 "EOR r9, r9, r11\n\t"
904 "STRD r4, r5, [%[r]]\n\t"
905 "STRD r6, r7, [%[r], #32]\n\t"
906 "STRD r8, r9, [%[r], #64]\n\t"
907 "SBFX r3, %[b], #7, #1\n\t"
908 "EOR r12, %[b], r3\n\t"
909 "SUB r12, r12, r3\n\t"
910 "MOV r4, #0x0\n\t"
911 "MOV r5, #0x0\n\t"
912 "MOV r6, #0x0\n\t"
913 "MOV r7, #0x0\n\t"
914 "MOV r8, #0x0\n\t"
915 "MOV r9, #0x0\n\t"
916 "MOV r3, #0x80000000\n\t"
917 "ROR r3, r3, #31\n\t"
918 "ROR r3, r3, r12\n\t"
919 "ASR r3, r3, #31\n\t"
920 "LDRD r10, r11, [%[base], #8]\n\t"
921 "EOR r10, r10, r4\n\t"
922 "EOR r11, r11, r5\n\t"
923 "AND r10, r10, r3\n\t"
924 "AND r11, r11, r3\n\t"
925 "EOR r4, r4, r10\n\t"
926 "EOR r5, r5, r11\n\t"
927 "LDRD r10, r11, [%[base], #40]\n\t"
928 "EOR r10, r10, r6\n\t"
929 "EOR r11, r11, r7\n\t"
930 "AND r10, r10, r3\n\t"
931 "AND r11, r11, r3\n\t"
932 "EOR r6, r6, r10\n\t"
933 "EOR r7, r7, r11\n\t"
934 "LDRD r10, r11, [%[base], #72]\n\t"
935 "EOR r10, r10, r8\n\t"
936 "EOR r11, r11, r9\n\t"
937 "AND r10, r10, r3\n\t"
938 "AND r11, r11, r3\n\t"
939 "EOR r8, r8, r10\n\t"
940 "EOR r9, r9, r11\n\t"
941 "ADD %[base], %[base], #0x60\n\t"
942 "MOV r3, #0x80000000\n\t"
943 "ROR r3, r3, #30\n\t"
944 "ROR r3, r3, r12\n\t"
945 "ASR r3, r3, #31\n\t"
946 "LDRD r10, r11, [%[base], #8]\n\t"
947 "EOR r10, r10, r4\n\t"
948 "EOR r11, r11, r5\n\t"
949 "AND r10, r10, r3\n\t"
950 "AND r11, r11, r3\n\t"
951 "EOR r4, r4, r10\n\t"
952 "EOR r5, r5, r11\n\t"
953 "LDRD r10, r11, [%[base], #40]\n\t"
954 "EOR r10, r10, r6\n\t"
955 "EOR r11, r11, r7\n\t"
956 "AND r10, r10, r3\n\t"
957 "AND r11, r11, r3\n\t"
958 "EOR r6, r6, r10\n\t"
959 "EOR r7, r7, r11\n\t"
960 "LDRD r10, r11, [%[base], #72]\n\t"
961 "EOR r10, r10, r8\n\t"
962 "EOR r11, r11, r9\n\t"
963 "AND r10, r10, r3\n\t"
964 "AND r11, r11, r3\n\t"
965 "EOR r8, r8, r10\n\t"
966 "EOR r9, r9, r11\n\t"
967 "ADD %[base], %[base], #0x60\n\t"
968 "MOV r3, #0x80000000\n\t"
969 "ROR r3, r3, #29\n\t"
970 "ROR r3, r3, r12\n\t"
971 "ASR r3, r3, #31\n\t"
972 "LDRD r10, r11, [%[base], #8]\n\t"
973 "EOR r10, r10, r4\n\t"
974 "EOR r11, r11, r5\n\t"
975 "AND r10, r10, r3\n\t"
976 "AND r11, r11, r3\n\t"
977 "EOR r4, r4, r10\n\t"
978 "EOR r5, r5, r11\n\t"
979 "LDRD r10, r11, [%[base], #40]\n\t"
980 "EOR r10, r10, r6\n\t"
981 "EOR r11, r11, r7\n\t"
982 "AND r10, r10, r3\n\t"
983 "AND r11, r11, r3\n\t"
984 "EOR r6, r6, r10\n\t"
985 "EOR r7, r7, r11\n\t"
986 "LDRD r10, r11, [%[base], #72]\n\t"
987 "EOR r10, r10, r8\n\t"
988 "EOR r11, r11, r9\n\t"
989 "AND r10, r10, r3\n\t"
990 "AND r11, r11, r3\n\t"
991 "EOR r8, r8, r10\n\t"
992 "EOR r9, r9, r11\n\t"
993 "ADD %[base], %[base], #0x60\n\t"
994 "MOV r3, #0x80000000\n\t"
995 "ROR r3, r3, #28\n\t"
996 "ROR r3, r3, r12\n\t"
997 "ASR r3, r3, #31\n\t"
998 "LDRD r10, r11, [%[base], #8]\n\t"
999 "EOR r10, r10, r4\n\t"
1000 "EOR r11, r11, r5\n\t"
1001 "AND r10, r10, r3\n\t"
1002 "AND r11, r11, r3\n\t"
1003 "EOR r4, r4, r10\n\t"
1004 "EOR r5, r5, r11\n\t"
1005 "LDRD r10, r11, [%[base], #40]\n\t"
1006 "EOR r10, r10, r6\n\t"
1007 "EOR r11, r11, r7\n\t"
1008 "AND r10, r10, r3\n\t"
1009 "AND r11, r11, r3\n\t"
1010 "EOR r6, r6, r10\n\t"
1011 "EOR r7, r7, r11\n\t"
1012 "LDRD r10, r11, [%[base], #72]\n\t"
1013 "EOR r10, r10, r8\n\t"
1014 "EOR r11, r11, r9\n\t"
1015 "AND r10, r10, r3\n\t"
1016 "AND r11, r11, r3\n\t"
1017 "EOR r8, r8, r10\n\t"
1018 "EOR r9, r9, r11\n\t"
1019 "ADD %[base], %[base], #0x60\n\t"
1020 "MOV r3, #0x80000000\n\t"
1021 "ROR r3, r3, #27\n\t"
1022 "ROR r3, r3, r12\n\t"
1023 "ASR r3, r3, #31\n\t"
1024 "LDRD r10, r11, [%[base], #8]\n\t"
1025 "EOR r10, r10, r4\n\t"
1026 "EOR r11, r11, r5\n\t"
1027 "AND r10, r10, r3\n\t"
1028 "AND r11, r11, r3\n\t"
1029 "EOR r4, r4, r10\n\t"
1030 "EOR r5, r5, r11\n\t"
1031 "LDRD r10, r11, [%[base], #40]\n\t"
1032 "EOR r10, r10, r6\n\t"
1033 "EOR r11, r11, r7\n\t"
1034 "AND r10, r10, r3\n\t"
1035 "AND r11, r11, r3\n\t"
1036 "EOR r6, r6, r10\n\t"
1037 "EOR r7, r7, r11\n\t"
1038 "LDRD r10, r11, [%[base], #72]\n\t"
1039 "EOR r10, r10, r8\n\t"
1040 "EOR r11, r11, r9\n\t"
1041 "AND r10, r10, r3\n\t"
1042 "AND r11, r11, r3\n\t"
1043 "EOR r8, r8, r10\n\t"
1044 "EOR r9, r9, r11\n\t"
1045 "ADD %[base], %[base], #0x60\n\t"
1046 "MOV r3, #0x80000000\n\t"
1047 "ROR r3, r3, #26\n\t"
1048 "ROR r3, r3, r12\n\t"
1049 "ASR r3, r3, #31\n\t"
1050 "LDRD r10, r11, [%[base], #8]\n\t"
1051 "EOR r10, r10, r4\n\t"
1052 "EOR r11, r11, r5\n\t"
1053 "AND r10, r10, r3\n\t"
1054 "AND r11, r11, r3\n\t"
1055 "EOR r4, r4, r10\n\t"
1056 "EOR r5, r5, r11\n\t"
1057 "LDRD r10, r11, [%[base], #40]\n\t"
1058 "EOR r10, r10, r6\n\t"
1059 "EOR r11, r11, r7\n\t"
1060 "AND r10, r10, r3\n\t"
1061 "AND r11, r11, r3\n\t"
1062 "EOR r6, r6, r10\n\t"
1063 "EOR r7, r7, r11\n\t"
1064 "LDRD r10, r11, [%[base], #72]\n\t"
1065 "EOR r10, r10, r8\n\t"
1066 "EOR r11, r11, r9\n\t"
1067 "AND r10, r10, r3\n\t"
1068 "AND r11, r11, r3\n\t"
1069 "EOR r8, r8, r10\n\t"
1070 "EOR r9, r9, r11\n\t"
1071 "ADD %[base], %[base], #0x60\n\t"
1072 "MOV r3, #0x80000000\n\t"
1073 "ROR r3, r3, #25\n\t"
1074 "ROR r3, r3, r12\n\t"
1075 "ASR r3, r3, #31\n\t"
1076 "LDRD r10, r11, [%[base], #8]\n\t"
1077 "EOR r10, r10, r4\n\t"
1078 "EOR r11, r11, r5\n\t"
1079 "AND r10, r10, r3\n\t"
1080 "AND r11, r11, r3\n\t"
1081 "EOR r4, r4, r10\n\t"
1082 "EOR r5, r5, r11\n\t"
1083 "LDRD r10, r11, [%[base], #40]\n\t"
1084 "EOR r10, r10, r6\n\t"
1085 "EOR r11, r11, r7\n\t"
1086 "AND r10, r10, r3\n\t"
1087 "AND r11, r11, r3\n\t"
1088 "EOR r6, r6, r10\n\t"
1089 "EOR r7, r7, r11\n\t"
1090 "LDRD r10, r11, [%[base], #72]\n\t"
1091 "EOR r10, r10, r8\n\t"
1092 "EOR r11, r11, r9\n\t"
1093 "AND r10, r10, r3\n\t"
1094 "AND r11, r11, r3\n\t"
1095 "EOR r8, r8, r10\n\t"
1096 "EOR r9, r9, r11\n\t"
1097 "ADD %[base], %[base], #0x60\n\t"
1098 "MOV r3, #0x80000000\n\t"
1099 "ROR r3, r3, #24\n\t"
1100 "ROR r3, r3, r12\n\t"
1101 "ASR r3, r3, #31\n\t"
1102 "LDRD r10, r11, [%[base], #8]\n\t"
1103 "EOR r10, r10, r4\n\t"
1104 "EOR r11, r11, r5\n\t"
1105 "AND r10, r10, r3\n\t"
1106 "AND r11, r11, r3\n\t"
1107 "EOR r4, r4, r10\n\t"
1108 "EOR r5, r5, r11\n\t"
1109 "LDRD r10, r11, [%[base], #40]\n\t"
1110 "EOR r10, r10, r6\n\t"
1111 "EOR r11, r11, r7\n\t"
1112 "AND r10, r10, r3\n\t"
1113 "AND r11, r11, r3\n\t"
1114 "EOR r6, r6, r10\n\t"
1115 "EOR r7, r7, r11\n\t"
1116 "LDRD r10, r11, [%[base], #72]\n\t"
1117 "EOR r10, r10, r8\n\t"
1118 "EOR r11, r11, r9\n\t"
1119 "AND r10, r10, r3\n\t"
1120 "AND r11, r11, r3\n\t"
1121 "EOR r8, r8, r10\n\t"
1122 "EOR r9, r9, r11\n\t"
1123 "SUB %[base], %[base], #0x2a0\n\t"
1124 "MVN r10, #0x0\n\t"
1125 "MVN r11, #0x0\n\t"
1126 "RSBS lr, lr, #0x0\n\t"
1127 "SBCS r10, r10, r8\n\t"
1128 "SBCS r11, r11, r9\n\t"
1129 "SBC lr, lr, lr\n\t"
1130 "ASR r12, %[b], #31\n\t"
1131 "EOR r3, r4, r6\n\t"
1132 "AND r3, r3, r12\n\t"
1133 "EOR r4, r4, r3\n\t"
1134 "EOR r6, r6, r3\n\t"
1135 "EOR r3, r5, r7\n\t"
1136 "AND r3, r3, r12\n\t"
1137 "EOR r5, r5, r3\n\t"
1138 "EOR r7, r7, r3\n\t"
1139 "EOR r10, r10, r8\n\t"
1140 "AND r10, r10, r12\n\t"
1141 "EOR r8, r8, r10\n\t"
1142 "EOR r11, r11, r9\n\t"
1143 "AND r11, r11, r12\n\t"
1144 "EOR r9, r9, r11\n\t"
1145 "STRD r4, r5, [%[r], #8]\n\t"
1146 "STRD r6, r7, [%[r], #40]\n\t"
1147 "STRD r8, r9, [%[r], #72]\n\t"
1148 "SBFX r3, %[b], #7, #1\n\t"
1149 "EOR r12, %[b], r3\n\t"
1150 "SUB r12, r12, r3\n\t"
1151 "MOV r4, #0x0\n\t"
1152 "MOV r5, #0x0\n\t"
1153 "MOV r6, #0x0\n\t"
1154 "MOV r7, #0x0\n\t"
1155 "MOV r8, #0x0\n\t"
1156 "MOV r9, #0x0\n\t"
1157 "MOV r3, #0x80000000\n\t"
1158 "ROR r3, r3, #31\n\t"
1159 "ROR r3, r3, r12\n\t"
1160 "ASR r3, r3, #31\n\t"
1161 "LDRD r10, r11, [%[base], #16]\n\t"
1162 "EOR r10, r10, r4\n\t"
1163 "EOR r11, r11, r5\n\t"
1164 "AND r10, r10, r3\n\t"
1165 "AND r11, r11, r3\n\t"
1166 "EOR r4, r4, r10\n\t"
1167 "EOR r5, r5, r11\n\t"
1168 "LDRD r10, r11, [%[base], #48]\n\t"
1169 "EOR r10, r10, r6\n\t"
1170 "EOR r11, r11, r7\n\t"
1171 "AND r10, r10, r3\n\t"
1172 "AND r11, r11, r3\n\t"
1173 "EOR r6, r6, r10\n\t"
1174 "EOR r7, r7, r11\n\t"
1175 "LDRD r10, r11, [%[base], #80]\n\t"
1176 "EOR r10, r10, r8\n\t"
1177 "EOR r11, r11, r9\n\t"
1178 "AND r10, r10, r3\n\t"
1179 "AND r11, r11, r3\n\t"
1180 "EOR r8, r8, r10\n\t"
1181 "EOR r9, r9, r11\n\t"
1182 "ADD %[base], %[base], #0x60\n\t"
1183 "MOV r3, #0x80000000\n\t"
1184 "ROR r3, r3, #30\n\t"
1185 "ROR r3, r3, r12\n\t"
1186 "ASR r3, r3, #31\n\t"
1187 "LDRD r10, r11, [%[base], #16]\n\t"
1188 "EOR r10, r10, r4\n\t"
1189 "EOR r11, r11, r5\n\t"
1190 "AND r10, r10, r3\n\t"
1191 "AND r11, r11, r3\n\t"
1192 "EOR r4, r4, r10\n\t"
1193 "EOR r5, r5, r11\n\t"
1194 "LDRD r10, r11, [%[base], #48]\n\t"
1195 "EOR r10, r10, r6\n\t"
1196 "EOR r11, r11, r7\n\t"
1197 "AND r10, r10, r3\n\t"
1198 "AND r11, r11, r3\n\t"
1199 "EOR r6, r6, r10\n\t"
1200 "EOR r7, r7, r11\n\t"
1201 "LDRD r10, r11, [%[base], #80]\n\t"
1202 "EOR r10, r10, r8\n\t"
1203 "EOR r11, r11, r9\n\t"
1204 "AND r10, r10, r3\n\t"
1205 "AND r11, r11, r3\n\t"
1206 "EOR r8, r8, r10\n\t"
1207 "EOR r9, r9, r11\n\t"
1208 "ADD %[base], %[base], #0x60\n\t"
1209 "MOV r3, #0x80000000\n\t"
1210 "ROR r3, r3, #29\n\t"
1211 "ROR r3, r3, r12\n\t"
1212 "ASR r3, r3, #31\n\t"
1213 "LDRD r10, r11, [%[base], #16]\n\t"
1214 "EOR r10, r10, r4\n\t"
1215 "EOR r11, r11, r5\n\t"
1216 "AND r10, r10, r3\n\t"
1217 "AND r11, r11, r3\n\t"
1218 "EOR r4, r4, r10\n\t"
1219 "EOR r5, r5, r11\n\t"
1220 "LDRD r10, r11, [%[base], #48]\n\t"
1221 "EOR r10, r10, r6\n\t"
1222 "EOR r11, r11, r7\n\t"
1223 "AND r10, r10, r3\n\t"
1224 "AND r11, r11, r3\n\t"
1225 "EOR r6, r6, r10\n\t"
1226 "EOR r7, r7, r11\n\t"
1227 "LDRD r10, r11, [%[base], #80]\n\t"
1228 "EOR r10, r10, r8\n\t"
1229 "EOR r11, r11, r9\n\t"
1230 "AND r10, r10, r3\n\t"
1231 "AND r11, r11, r3\n\t"
1232 "EOR r8, r8, r10\n\t"
1233 "EOR r9, r9, r11\n\t"
1234 "ADD %[base], %[base], #0x60\n\t"
1235 "MOV r3, #0x80000000\n\t"
1236 "ROR r3, r3, #28\n\t"
1237 "ROR r3, r3, r12\n\t"
1238 "ASR r3, r3, #31\n\t"
1239 "LDRD r10, r11, [%[base], #16]\n\t"
1240 "EOR r10, r10, r4\n\t"
1241 "EOR r11, r11, r5\n\t"
1242 "AND r10, r10, r3\n\t"
1243 "AND r11, r11, r3\n\t"
1244 "EOR r4, r4, r10\n\t"
1245 "EOR r5, r5, r11\n\t"
1246 "LDRD r10, r11, [%[base], #48]\n\t"
1247 "EOR r10, r10, r6\n\t"
1248 "EOR r11, r11, r7\n\t"
1249 "AND r10, r10, r3\n\t"
1250 "AND r11, r11, r3\n\t"
1251 "EOR r6, r6, r10\n\t"
1252 "EOR r7, r7, r11\n\t"
1253 "LDRD r10, r11, [%[base], #80]\n\t"
1254 "EOR r10, r10, r8\n\t"
1255 "EOR r11, r11, r9\n\t"
1256 "AND r10, r10, r3\n\t"
1257 "AND r11, r11, r3\n\t"
1258 "EOR r8, r8, r10\n\t"
1259 "EOR r9, r9, r11\n\t"
1260 "ADD %[base], %[base], #0x60\n\t"
1261 "MOV r3, #0x80000000\n\t"
1262 "ROR r3, r3, #27\n\t"
1263 "ROR r3, r3, r12\n\t"
1264 "ASR r3, r3, #31\n\t"
1265 "LDRD r10, r11, [%[base], #16]\n\t"
1266 "EOR r10, r10, r4\n\t"
1267 "EOR r11, r11, r5\n\t"
1268 "AND r10, r10, r3\n\t"
1269 "AND r11, r11, r3\n\t"
1270 "EOR r4, r4, r10\n\t"
1271 "EOR r5, r5, r11\n\t"
1272 "LDRD r10, r11, [%[base], #48]\n\t"
1273 "EOR r10, r10, r6\n\t"
1274 "EOR r11, r11, r7\n\t"
1275 "AND r10, r10, r3\n\t"
1276 "AND r11, r11, r3\n\t"
1277 "EOR r6, r6, r10\n\t"
1278 "EOR r7, r7, r11\n\t"
1279 "LDRD r10, r11, [%[base], #80]\n\t"
1280 "EOR r10, r10, r8\n\t"
1281 "EOR r11, r11, r9\n\t"
1282 "AND r10, r10, r3\n\t"
1283 "AND r11, r11, r3\n\t"
1284 "EOR r8, r8, r10\n\t"
1285 "EOR r9, r9, r11\n\t"
1286 "ADD %[base], %[base], #0x60\n\t"
1287 "MOV r3, #0x80000000\n\t"
1288 "ROR r3, r3, #26\n\t"
1289 "ROR r3, r3, r12\n\t"
1290 "ASR r3, r3, #31\n\t"
1291 "LDRD r10, r11, [%[base], #16]\n\t"
1292 "EOR r10, r10, r4\n\t"
1293 "EOR r11, r11, r5\n\t"
1294 "AND r10, r10, r3\n\t"
1295 "AND r11, r11, r3\n\t"
1296 "EOR r4, r4, r10\n\t"
1297 "EOR r5, r5, r11\n\t"
1298 "LDRD r10, r11, [%[base], #48]\n\t"
1299 "EOR r10, r10, r6\n\t"
1300 "EOR r11, r11, r7\n\t"
1301 "AND r10, r10, r3\n\t"
1302 "AND r11, r11, r3\n\t"
1303 "EOR r6, r6, r10\n\t"
1304 "EOR r7, r7, r11\n\t"
1305 "LDRD r10, r11, [%[base], #80]\n\t"
1306 "EOR r10, r10, r8\n\t"
1307 "EOR r11, r11, r9\n\t"
1308 "AND r10, r10, r3\n\t"
1309 "AND r11, r11, r3\n\t"
1310 "EOR r8, r8, r10\n\t"
1311 "EOR r9, r9, r11\n\t"
1312 "ADD %[base], %[base], #0x60\n\t"
1313 "MOV r3, #0x80000000\n\t"
1314 "ROR r3, r3, #25\n\t"
1315 "ROR r3, r3, r12\n\t"
1316 "ASR r3, r3, #31\n\t"
1317 "LDRD r10, r11, [%[base], #16]\n\t"
1318 "EOR r10, r10, r4\n\t"
1319 "EOR r11, r11, r5\n\t"
1320 "AND r10, r10, r3\n\t"
1321 "AND r11, r11, r3\n\t"
1322 "EOR r4, r4, r10\n\t"
1323 "EOR r5, r5, r11\n\t"
1324 "LDRD r10, r11, [%[base], #48]\n\t"
1325 "EOR r10, r10, r6\n\t"
1326 "EOR r11, r11, r7\n\t"
1327 "AND r10, r10, r3\n\t"
1328 "AND r11, r11, r3\n\t"
1329 "EOR r6, r6, r10\n\t"
1330 "EOR r7, r7, r11\n\t"
1331 "LDRD r10, r11, [%[base], #80]\n\t"
1332 "EOR r10, r10, r8\n\t"
1333 "EOR r11, r11, r9\n\t"
1334 "AND r10, r10, r3\n\t"
1335 "AND r11, r11, r3\n\t"
1336 "EOR r8, r8, r10\n\t"
1337 "EOR r9, r9, r11\n\t"
1338 "ADD %[base], %[base], #0x60\n\t"
1339 "MOV r3, #0x80000000\n\t"
1340 "ROR r3, r3, #24\n\t"
1341 "ROR r3, r3, r12\n\t"
1342 "ASR r3, r3, #31\n\t"
1343 "LDRD r10, r11, [%[base], #16]\n\t"
1344 "EOR r10, r10, r4\n\t"
1345 "EOR r11, r11, r5\n\t"
1346 "AND r10, r10, r3\n\t"
1347 "AND r11, r11, r3\n\t"
1348 "EOR r4, r4, r10\n\t"
1349 "EOR r5, r5, r11\n\t"
1350 "LDRD r10, r11, [%[base], #48]\n\t"
1351 "EOR r10, r10, r6\n\t"
1352 "EOR r11, r11, r7\n\t"
1353 "AND r10, r10, r3\n\t"
1354 "AND r11, r11, r3\n\t"
1355 "EOR r6, r6, r10\n\t"
1356 "EOR r7, r7, r11\n\t"
1357 "LDRD r10, r11, [%[base], #80]\n\t"
1358 "EOR r10, r10, r8\n\t"
1359 "EOR r11, r11, r9\n\t"
1360 "AND r10, r10, r3\n\t"
1361 "AND r11, r11, r3\n\t"
1362 "EOR r8, r8, r10\n\t"
1363 "EOR r9, r9, r11\n\t"
1364 "SUB %[base], %[base], #0x2a0\n\t"
1365 "MVN r10, #0x0\n\t"
1366 "MVN r11, #0x0\n\t"
1367 "RSBS lr, lr, #0x0\n\t"
1368 "SBCS r10, r10, r8\n\t"
1369 "SBCS r11, r11, r9\n\t"
1370 "SBC lr, lr, lr\n\t"
1371 "ASR r12, %[b], #31\n\t"
1372 "EOR r3, r4, r6\n\t"
1373 "AND r3, r3, r12\n\t"
1374 "EOR r4, r4, r3\n\t"
1375 "EOR r6, r6, r3\n\t"
1376 "EOR r3, r5, r7\n\t"
1377 "AND r3, r3, r12\n\t"
1378 "EOR r5, r5, r3\n\t"
1379 "EOR r7, r7, r3\n\t"
1380 "EOR r10, r10, r8\n\t"
1381 "AND r10, r10, r12\n\t"
1382 "EOR r8, r8, r10\n\t"
1383 "EOR r11, r11, r9\n\t"
1384 "AND r11, r11, r12\n\t"
1385 "EOR r9, r9, r11\n\t"
1386 "STRD r4, r5, [%[r], #16]\n\t"
1387 "STRD r6, r7, [%[r], #48]\n\t"
1388 "STRD r8, r9, [%[r], #80]\n\t"
1389 "SBFX r3, %[b], #7, #1\n\t"
1390 "EOR r12, %[b], r3\n\t"
1391 "SUB r12, r12, r3\n\t"
1392 "MOV r4, #0x0\n\t"
1393 "MOV r5, #0x0\n\t"
1394 "MOV r6, #0x0\n\t"
1395 "MOV r7, #0x0\n\t"
1396 "MOV r8, #0x0\n\t"
1397 "MOV r9, #0x0\n\t"
1398 "MOV r3, #0x80000000\n\t"
1399 "ROR r3, r3, #31\n\t"
1400 "ROR r3, r3, r12\n\t"
1401 "ASR r3, r3, #31\n\t"
1402 "LDRD r10, r11, [%[base], #24]\n\t"
1403 "EOR r10, r10, r4\n\t"
1404 "EOR r11, r11, r5\n\t"
1405 "AND r10, r10, r3\n\t"
1406 "AND r11, r11, r3\n\t"
1407 "EOR r4, r4, r10\n\t"
1408 "EOR r5, r5, r11\n\t"
1409 "LDRD r10, r11, [%[base], #56]\n\t"
1410 "EOR r10, r10, r6\n\t"
1411 "EOR r11, r11, r7\n\t"
1412 "AND r10, r10, r3\n\t"
1413 "AND r11, r11, r3\n\t"
1414 "EOR r6, r6, r10\n\t"
1415 "EOR r7, r7, r11\n\t"
1416 "LDRD r10, r11, [%[base], #88]\n\t"
1417 "EOR r10, r10, r8\n\t"
1418 "EOR r11, r11, r9\n\t"
1419 "AND r10, r10, r3\n\t"
1420 "AND r11, r11, r3\n\t"
1421 "EOR r8, r8, r10\n\t"
1422 "EOR r9, r9, r11\n\t"
1423 "ADD %[base], %[base], #0x60\n\t"
1424 "MOV r3, #0x80000000\n\t"
1425 "ROR r3, r3, #30\n\t"
1426 "ROR r3, r3, r12\n\t"
1427 "ASR r3, r3, #31\n\t"
1428 "LDRD r10, r11, [%[base], #24]\n\t"
1429 "EOR r10, r10, r4\n\t"
1430 "EOR r11, r11, r5\n\t"
1431 "AND r10, r10, r3\n\t"
1432 "AND r11, r11, r3\n\t"
1433 "EOR r4, r4, r10\n\t"
1434 "EOR r5, r5, r11\n\t"
1435 "LDRD r10, r11, [%[base], #56]\n\t"
1436 "EOR r10, r10, r6\n\t"
1437 "EOR r11, r11, r7\n\t"
1438 "AND r10, r10, r3\n\t"
1439 "AND r11, r11, r3\n\t"
1440 "EOR r6, r6, r10\n\t"
1441 "EOR r7, r7, r11\n\t"
1442 "LDRD r10, r11, [%[base], #88]\n\t"
1443 "EOR r10, r10, r8\n\t"
1444 "EOR r11, r11, r9\n\t"
1445 "AND r10, r10, r3\n\t"
1446 "AND r11, r11, r3\n\t"
1447 "EOR r8, r8, r10\n\t"
1448 "EOR r9, r9, r11\n\t"
1449 "ADD %[base], %[base], #0x60\n\t"
1450 "MOV r3, #0x80000000\n\t"
1451 "ROR r3, r3, #29\n\t"
1452 "ROR r3, r3, r12\n\t"
1453 "ASR r3, r3, #31\n\t"
1454 "LDRD r10, r11, [%[base], #24]\n\t"
1455 "EOR r10, r10, r4\n\t"
1456 "EOR r11, r11, r5\n\t"
1457 "AND r10, r10, r3\n\t"
1458 "AND r11, r11, r3\n\t"
1459 "EOR r4, r4, r10\n\t"
1460 "EOR r5, r5, r11\n\t"
1461 "LDRD r10, r11, [%[base], #56]\n\t"
1462 "EOR r10, r10, r6\n\t"
1463 "EOR r11, r11, r7\n\t"
1464 "AND r10, r10, r3\n\t"
1465 "AND r11, r11, r3\n\t"
1466 "EOR r6, r6, r10\n\t"
1467 "EOR r7, r7, r11\n\t"
1468 "LDRD r10, r11, [%[base], #88]\n\t"
1469 "EOR r10, r10, r8\n\t"
1470 "EOR r11, r11, r9\n\t"
1471 "AND r10, r10, r3\n\t"
1472 "AND r11, r11, r3\n\t"
1473 "EOR r8, r8, r10\n\t"
1474 "EOR r9, r9, r11\n\t"
1475 "ADD %[base], %[base], #0x60\n\t"
1476 "MOV r3, #0x80000000\n\t"
1477 "ROR r3, r3, #28\n\t"
1478 "ROR r3, r3, r12\n\t"
1479 "ASR r3, r3, #31\n\t"
1480 "LDRD r10, r11, [%[base], #24]\n\t"
1481 "EOR r10, r10, r4\n\t"
1482 "EOR r11, r11, r5\n\t"
1483 "AND r10, r10, r3\n\t"
1484 "AND r11, r11, r3\n\t"
1485 "EOR r4, r4, r10\n\t"
1486 "EOR r5, r5, r11\n\t"
1487 "LDRD r10, r11, [%[base], #56]\n\t"
1488 "EOR r10, r10, r6\n\t"
1489 "EOR r11, r11, r7\n\t"
1490 "AND r10, r10, r3\n\t"
1491 "AND r11, r11, r3\n\t"
1492 "EOR r6, r6, r10\n\t"
1493 "EOR r7, r7, r11\n\t"
1494 "LDRD r10, r11, [%[base], #88]\n\t"
1495 "EOR r10, r10, r8\n\t"
1496 "EOR r11, r11, r9\n\t"
1497 "AND r10, r10, r3\n\t"
1498 "AND r11, r11, r3\n\t"
1499 "EOR r8, r8, r10\n\t"
1500 "EOR r9, r9, r11\n\t"
1501 "ADD %[base], %[base], #0x60\n\t"
1502 "MOV r3, #0x80000000\n\t"
1503 "ROR r3, r3, #27\n\t"
1504 "ROR r3, r3, r12\n\t"
1505 "ASR r3, r3, #31\n\t"
1506 "LDRD r10, r11, [%[base], #24]\n\t"
1507 "EOR r10, r10, r4\n\t"
1508 "EOR r11, r11, r5\n\t"
1509 "AND r10, r10, r3\n\t"
1510 "AND r11, r11, r3\n\t"
1511 "EOR r4, r4, r10\n\t"
1512 "EOR r5, r5, r11\n\t"
1513 "LDRD r10, r11, [%[base], #56]\n\t"
1514 "EOR r10, r10, r6\n\t"
1515 "EOR r11, r11, r7\n\t"
1516 "AND r10, r10, r3\n\t"
1517 "AND r11, r11, r3\n\t"
1518 "EOR r6, r6, r10\n\t"
1519 "EOR r7, r7, r11\n\t"
1520 "LDRD r10, r11, [%[base], #88]\n\t"
1521 "EOR r10, r10, r8\n\t"
1522 "EOR r11, r11, r9\n\t"
1523 "AND r10, r10, r3\n\t"
1524 "AND r11, r11, r3\n\t"
1525 "EOR r8, r8, r10\n\t"
1526 "EOR r9, r9, r11\n\t"
1527 "ADD %[base], %[base], #0x60\n\t"
1528 "MOV r3, #0x80000000\n\t"
1529 "ROR r3, r3, #26\n\t"
1530 "ROR r3, r3, r12\n\t"
1531 "ASR r3, r3, #31\n\t"
1532 "LDRD r10, r11, [%[base], #24]\n\t"
1533 "EOR r10, r10, r4\n\t"
1534 "EOR r11, r11, r5\n\t"
1535 "AND r10, r10, r3\n\t"
1536 "AND r11, r11, r3\n\t"
1537 "EOR r4, r4, r10\n\t"
1538 "EOR r5, r5, r11\n\t"
1539 "LDRD r10, r11, [%[base], #56]\n\t"
1540 "EOR r10, r10, r6\n\t"
1541 "EOR r11, r11, r7\n\t"
1542 "AND r10, r10, r3\n\t"
1543 "AND r11, r11, r3\n\t"
1544 "EOR r6, r6, r10\n\t"
1545 "EOR r7, r7, r11\n\t"
1546 "LDRD r10, r11, [%[base], #88]\n\t"
1547 "EOR r10, r10, r8\n\t"
1548 "EOR r11, r11, r9\n\t"
1549 "AND r10, r10, r3\n\t"
1550 "AND r11, r11, r3\n\t"
1551 "EOR r8, r8, r10\n\t"
1552 "EOR r9, r9, r11\n\t"
1553 "ADD %[base], %[base], #0x60\n\t"
1554 "MOV r3, #0x80000000\n\t"
1555 "ROR r3, r3, #25\n\t"
1556 "ROR r3, r3, r12\n\t"
1557 "ASR r3, r3, #31\n\t"
1558 "LDRD r10, r11, [%[base], #24]\n\t"
1559 "EOR r10, r10, r4\n\t"
1560 "EOR r11, r11, r5\n\t"
1561 "AND r10, r10, r3\n\t"
1562 "AND r11, r11, r3\n\t"
1563 "EOR r4, r4, r10\n\t"
1564 "EOR r5, r5, r11\n\t"
1565 "LDRD r10, r11, [%[base], #56]\n\t"
1566 "EOR r10, r10, r6\n\t"
1567 "EOR r11, r11, r7\n\t"
1568 "AND r10, r10, r3\n\t"
1569 "AND r11, r11, r3\n\t"
1570 "EOR r6, r6, r10\n\t"
1571 "EOR r7, r7, r11\n\t"
1572 "LDRD r10, r11, [%[base], #88]\n\t"
1573 "EOR r10, r10, r8\n\t"
1574 "EOR r11, r11, r9\n\t"
1575 "AND r10, r10, r3\n\t"
1576 "AND r11, r11, r3\n\t"
1577 "EOR r8, r8, r10\n\t"
1578 "EOR r9, r9, r11\n\t"
1579 "ADD %[base], %[base], #0x60\n\t"
1580 "MOV r3, #0x80000000\n\t"
1581 "ROR r3, r3, #24\n\t"
1582 "ROR r3, r3, r12\n\t"
1583 "ASR r3, r3, #31\n\t"
1584 "LDRD r10, r11, [%[base], #24]\n\t"
1585 "EOR r10, r10, r4\n\t"
1586 "EOR r11, r11, r5\n\t"
1587 "AND r10, r10, r3\n\t"
1588 "AND r11, r11, r3\n\t"
1589 "EOR r4, r4, r10\n\t"
1590 "EOR r5, r5, r11\n\t"
1591 "LDRD r10, r11, [%[base], #56]\n\t"
1592 "EOR r10, r10, r6\n\t"
1593 "EOR r11, r11, r7\n\t"
1594 "AND r10, r10, r3\n\t"
1595 "AND r11, r11, r3\n\t"
1596 "EOR r6, r6, r10\n\t"
1597 "EOR r7, r7, r11\n\t"
1598 "LDRD r10, r11, [%[base], #88]\n\t"
1599 "EOR r10, r10, r8\n\t"
1600 "EOR r11, r11, r9\n\t"
1601 "AND r10, r10, r3\n\t"
1602 "AND r11, r11, r3\n\t"
1603 "EOR r8, r8, r10\n\t"
1604 "EOR r9, r9, r11\n\t"
1605 "SUB %[base], %[base], #0x2a0\n\t"
1606 "MVN r10, #0x0\n\t"
1607 "MVN r11, #0x80000000\n\t"
1608 "RSBS lr, lr, #0x0\n\t"
1609 "SBCS r10, r10, r8\n\t"
1610 "SBC r11, r11, r9\n\t"
1611 "ASR r12, %[b], #31\n\t"
1612 "EOR r3, r4, r6\n\t"
1613 "AND r3, r3, r12\n\t"
1614 "EOR r4, r4, r3\n\t"
1615 "EOR r6, r6, r3\n\t"
1616 "EOR r3, r5, r7\n\t"
1617 "AND r3, r3, r12\n\t"
1618 "EOR r5, r5, r3\n\t"
1619 "EOR r7, r7, r3\n\t"
1620 "EOR r10, r10, r8\n\t"
1621 "AND r10, r10, r12\n\t"
1622 "EOR r8, r8, r10\n\t"
1623 "EOR r11, r11, r9\n\t"
1624 "AND r11, r11, r12\n\t"
1625 "EOR r9, r9, r11\n\t"
1626 "STRD r4, r5, [%[r], #24]\n\t"
1627 "STRD r6, r7, [%[r], #56]\n\t"
1628 "STRD r8, r9, [%[r], #88]\n\t"
1629#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
1630 : [r] "+r" (r), [base] "+r" (base), [b] "+r" (b)
1631 :
1632#else
1633 :
1634 : [r] "r" (r), [base] "r" (base), [b] "r" (b)
1635#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
1636 : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r3", "r10",
1637 "r11", "r12", "lr"
1638 );
1639}
1640
1641#else
1642#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
1643WC_OMIT_FRAME_POINTER void fe_cmov_table(fe* r_p, const fe* base_p,
1644 signed char b_p)
1645#else
1646WC_OMIT_FRAME_POINTER void fe_cmov_table(fe* r, const fe* base, signed char b)
1647#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
1648{
1649#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
1650 register fe* r __asm__ ("r0") = (fe*)r_p;
1651 register const fe* base __asm__ ("r1") = (const fe*)base_p;
1652 register signed char b __asm__ ("r2") = (signed char)b_p;
1653#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
1654
1655 __asm__ __volatile__ (
1656 "SXTB %[b], %[b]\n\t"
1657 "SBFX r3, %[b], #7, #1\n\t"
1658 "EOR %[b], %[b], r3\n\t"
1659 "SUB %[b], %[b], r3\n\t"
1660 "CLZ lr, %[b]\n\t"
1661 "LSL lr, lr, #26\n\t"
1662 "ASR lr, lr, #31\n\t"
1663 "MVN lr, lr\n\t"
1664 "ADD %[b], %[b], lr\n\t"
1665 "MOV r12, #0x60\n\t"
1666 "MUL %[b], %[b], r12\n\t"
1667 "ADD %[base], %[base], %[b]\n\t"
1668 "LDM %[base]!, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
1669 "AND r4, r4, lr\n\t"
1670 "AND r5, r5, lr\n\t"
1671 "AND r6, r6, lr\n\t"
1672 "AND r7, r7, lr\n\t"
1673 "AND r8, r8, lr\n\t"
1674 "AND r9, r9, lr\n\t"
1675 "AND r10, r10, lr\n\t"
1676 "AND r11, r11, lr\n\t"
1677 "MVN r12, lr\n\t"
1678 "SUB r4, r4, r12\n\t"
1679 "MOV r12, #0x20\n\t"
1680 "AND r12, r12, r3\n\t"
1681 "ADD %[r], %[r], r12\n\t"
1682 "STM %[r], {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
1683 "SUB %[r], %[r], r12\n\t"
1684 "LDM %[base]!, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
1685 "AND r4, r4, lr\n\t"
1686 "AND r5, r5, lr\n\t"
1687 "AND r6, r6, lr\n\t"
1688 "AND r7, r7, lr\n\t"
1689 "AND r8, r8, lr\n\t"
1690 "AND r9, r9, lr\n\t"
1691 "AND r10, r10, lr\n\t"
1692 "AND r11, r11, lr\n\t"
1693 "MVN r12, lr\n\t"
1694 "SUB r4, r4, r12\n\t"
1695 "MOV r12, #0x20\n\t"
1696 "BIC r12, r12, r3\n\t"
1697 "ADD %[r], %[r], r12\n\t"
1698 "STM %[r], {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
1699 "SUB %[r], %[r], r12\n\t"
1700 "ADD %[r], %[r], #0x40\n\t"
1701 "LDM %[base]!, {r4, r5, r6, r7}\n\t"
1702 "MVN r12, #0x12\n\t"
1703 "SUBS r8, r12, r4\n\t"
1704 "SBCS r9, r3, r5\n\t"
1705 "SBCS r10, r3, r6\n\t"
1706 "SBCS r11, r3, r7\n\t"
1707 "BIC r4, r4, r3\n\t"
1708 "BIC r5, r5, r3\n\t"
1709 "BIC r6, r6, r3\n\t"
1710 "BIC r7, r7, r3\n\t"
1711 "AND r8, r8, r3\n\t"
1712 "AND r9, r9, r3\n\t"
1713 "AND r10, r10, r3\n\t"
1714 "AND r11, r11, r3\n\t"
1715 "ORR r4, r4, r8\n\t"
1716 "ORR r5, r5, r9\n\t"
1717 "ORR r6, r6, r10\n\t"
1718 "ORR r7, r7, r11\n\t"
1719 "AND r4, r4, lr\n\t"
1720 "AND r5, r5, lr\n\t"
1721 "AND r6, r6, lr\n\t"
1722 "AND r7, r7, lr\n\t"
1723 "STM %[r]!, {r4, r5, r6, r7}\n\t"
1724 "LDM %[base]!, {r4, r5, r6, r7}\n\t"
1725 "MVN r12, #0x80000000\n\t"
1726 "SBCS r8, r3, r4\n\t"
1727 "SBCS r9, r3, r5\n\t"
1728 "SBCS r10, r3, r6\n\t"
1729 "SBC r11, r12, r7\n\t"
1730 "BIC r4, r4, r3\n\t"
1731 "BIC r5, r5, r3\n\t"
1732 "BIC r6, r6, r3\n\t"
1733 "BIC r7, r7, r3\n\t"
1734 "AND r8, r8, r3\n\t"
1735 "AND r9, r9, r3\n\t"
1736 "AND r10, r10, r3\n\t"
1737 "AND r11, r11, r3\n\t"
1738 "ORR r4, r4, r8\n\t"
1739 "ORR r5, r5, r9\n\t"
1740 "ORR r6, r6, r10\n\t"
1741 "ORR r7, r7, r11\n\t"
1742 "AND r4, r4, lr\n\t"
1743 "AND r5, r5, lr\n\t"
1744 "AND r6, r6, lr\n\t"
1745 "AND r7, r7, lr\n\t"
1746 "STM %[r]!, {r4, r5, r6, r7}\n\t"
1747 "SUB %[base], %[base], %[b]\n\t"
1748#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
1749 : [r] "+r" (r), [base] "+r" (base), [b] "+r" (b)
1750 :
1751#else
1752 :
1753 : [r] "r" (r), [base] "r" (base), [b] "r" (b)
1754#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
1755 : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
1756 "r11", "r12", "lr"
1757 );
1758}
1759
1760#endif /* WC_NO_CACHE_RESISTANT */
1761#endif /* HAVE_ED25519_MAKE_KEY || HAVE_ED25519_SIGN ||
1762 * WOLFSSL_CURVE25519_USE_ED25519 */
1763#endif /* HAVE_ED25519 || WOLFSSL_CURVE25519_USE_ED25519 */
1764#ifdef WOLFSSL_ARM_ARCH_7M
1765void fe_mul_op(void);
1766#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
1767WC_OMIT_FRAME_POINTER void fe_mul_op()
1768#else
1769WC_OMIT_FRAME_POINTER void fe_mul_op()
1770#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
1771{
1772#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
1773#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
1774 __asm__ __volatile__ (
1775 "SUB sp, sp, #0x28\n\t"
1776 "STR r0, [sp, #36]\n\t"
1777 "MOV r0, #0x0\n\t"
1778 "LDR r12, [r1]\n\t"
1779 /* A[0] * B[0] */
1780 "LDR lr, [r2]\n\t"
1781 "UMULL r3, r4, r12, lr\n\t"
1782 /* A[0] * B[2] */
1783 "LDR lr, [r2, #8]\n\t"
1784 "UMULL r5, r6, r12, lr\n\t"
1785 /* A[0] * B[4] */
1786 "LDR lr, [r2, #16]\n\t"
1787 "UMULL r7, r8, r12, lr\n\t"
1788 /* A[0] * B[6] */
1789 "LDR lr, [r2, #24]\n\t"
1790 "UMULL r9, r10, r12, lr\n\t"
1791 "STR r3, [sp]\n\t"
1792 /* A[0] * B[1] */
1793 "LDR lr, [r2, #4]\n\t"
1794 "MOV r11, r0\n\t"
1795 "UMLAL r4, r11, r12, lr\n\t"
1796 "ADDS r5, r5, r11\n\t"
1797 /* A[0] * B[3] */
1798 "LDR lr, [r2, #12]\n\t"
1799 "ADCS r6, r6, #0x0\n\t"
1800 "ADC r11, r0, #0x0\n\t"
1801 "UMLAL r6, r11, r12, lr\n\t"
1802 "ADDS r7, r7, r11\n\t"
1803 /* A[0] * B[5] */
1804 "LDR lr, [r2, #20]\n\t"
1805 "ADCS r8, r8, #0x0\n\t"
1806 "ADC r11, r0, #0x0\n\t"
1807 "UMLAL r8, r11, r12, lr\n\t"
1808 "ADDS r9, r9, r11\n\t"
1809 /* A[0] * B[7] */
1810 "LDR lr, [r2, #28]\n\t"
1811 "ADCS r10, r10, #0x0\n\t"
1812 "ADC r3, r0, #0x0\n\t"
1813 "UMLAL r10, r3, r12, lr\n\t"
1814 /* A[1] * B[0] */
1815 "LDR r12, [r1, #4]\n\t"
1816 "LDR lr, [r2]\n\t"
1817 "MOV r11, #0x0\n\t"
1818 "UMLAL r4, r11, r12, lr\n\t"
1819 "STR r4, [sp, #4]\n\t"
1820 "ADDS r5, r5, r11\n\t"
1821 /* A[1] * B[1] */
1822 "LDR lr, [r2, #4]\n\t"
1823 "ADC r11, r0, #0x0\n\t"
1824 "UMLAL r5, r11, r12, lr\n\t"
1825 "ADDS r6, r6, r11\n\t"
1826 /* A[1] * B[2] */
1827 "LDR lr, [r2, #8]\n\t"
1828 "ADC r11, r0, #0x0\n\t"
1829 "UMLAL r6, r11, r12, lr\n\t"
1830 "ADDS r7, r7, r11\n\t"
1831 /* A[1] * B[3] */
1832 "LDR lr, [r2, #12]\n\t"
1833 "ADC r11, r0, #0x0\n\t"
1834 "UMLAL r7, r11, r12, lr\n\t"
1835 "ADDS r8, r8, r11\n\t"
1836 /* A[1] * B[4] */
1837 "LDR lr, [r2, #16]\n\t"
1838 "ADC r11, r0, #0x0\n\t"
1839 "UMLAL r8, r11, r12, lr\n\t"
1840 "ADDS r9, r9, r11\n\t"
1841 /* A[1] * B[5] */
1842 "LDR lr, [r2, #20]\n\t"
1843 "ADC r11, r0, #0x0\n\t"
1844 "UMLAL r9, r11, r12, lr\n\t"
1845 "ADDS r10, r10, r11\n\t"
1846 /* A[1] * B[6] */
1847 "LDR lr, [r2, #24]\n\t"
1848 "ADC r11, r0, #0x0\n\t"
1849 "UMLAL r10, r11, r12, lr\n\t"
1850 "ADDS r3, r3, r11\n\t"
1851 /* A[1] * B[7] */
1852 "LDR lr, [r2, #28]\n\t"
1853 "ADC r4, r0, #0x0\n\t"
1854 "UMLAL r3, r4, r12, lr\n\t"
1855 /* A[2] * B[0] */
1856 "LDR r12, [r1, #8]\n\t"
1857 "LDR lr, [r2]\n\t"
1858 "MOV r11, #0x0\n\t"
1859 "UMLAL r5, r11, r12, lr\n\t"
1860 "STR r5, [sp, #8]\n\t"
1861 "ADDS r6, r6, r11\n\t"
1862 /* A[2] * B[1] */
1863 "LDR lr, [r2, #4]\n\t"
1864 "ADC r11, r0, #0x0\n\t"
1865 "UMLAL r6, r11, r12, lr\n\t"
1866 "ADDS r7, r7, r11\n\t"
1867 /* A[2] * B[2] */
1868 "LDR lr, [r2, #8]\n\t"
1869 "ADC r11, r0, #0x0\n\t"
1870 "UMLAL r7, r11, r12, lr\n\t"
1871 "ADDS r8, r8, r11\n\t"
1872 /* A[2] * B[3] */
1873 "LDR lr, [r2, #12]\n\t"
1874 "ADC r11, r0, #0x0\n\t"
1875 "UMLAL r8, r11, r12, lr\n\t"
1876 "ADDS r9, r9, r11\n\t"
1877 /* A[2] * B[4] */
1878 "LDR lr, [r2, #16]\n\t"
1879 "ADC r11, r0, #0x0\n\t"
1880 "UMLAL r9, r11, r12, lr\n\t"
1881 "ADDS r10, r10, r11\n\t"
1882 /* A[2] * B[5] */
1883 "LDR lr, [r2, #20]\n\t"
1884 "ADC r11, r0, #0x0\n\t"
1885 "UMLAL r10, r11, r12, lr\n\t"
1886 "ADDS r3, r3, r11\n\t"
1887 /* A[2] * B[6] */
1888 "LDR lr, [r2, #24]\n\t"
1889 "ADC r11, r0, #0x0\n\t"
1890 "UMLAL r3, r11, r12, lr\n\t"
1891 "ADDS r4, r4, r11\n\t"
1892 /* A[2] * B[7] */
1893 "LDR lr, [r2, #28]\n\t"
1894 "ADC r5, r0, #0x0\n\t"
1895 "UMLAL r4, r5, r12, lr\n\t"
1896 /* A[3] * B[0] */
1897 "LDR r12, [r1, #12]\n\t"
1898 "LDR lr, [r2]\n\t"
1899 "MOV r11, #0x0\n\t"
1900 "UMLAL r6, r11, r12, lr\n\t"
1901 "STR r6, [sp, #12]\n\t"
1902 "ADDS r7, r7, r11\n\t"
1903 /* A[3] * B[1] */
1904 "LDR lr, [r2, #4]\n\t"
1905 "ADC r11, r0, #0x0\n\t"
1906 "UMLAL r7, r11, r12, lr\n\t"
1907 "ADDS r8, r8, r11\n\t"
1908 /* A[3] * B[2] */
1909 "LDR lr, [r2, #8]\n\t"
1910 "ADC r11, r0, #0x0\n\t"
1911 "UMLAL r8, r11, r12, lr\n\t"
1912 "ADDS r9, r9, r11\n\t"
1913 /* A[3] * B[3] */
1914 "LDR lr, [r2, #12]\n\t"
1915 "ADC r11, r0, #0x0\n\t"
1916 "UMLAL r9, r11, r12, lr\n\t"
1917 "ADDS r10, r10, r11\n\t"
1918 /* A[3] * B[4] */
1919 "LDR lr, [r2, #16]\n\t"
1920 "ADC r11, r0, #0x0\n\t"
1921 "UMLAL r10, r11, r12, lr\n\t"
1922 "ADDS r3, r3, r11\n\t"
1923 /* A[3] * B[5] */
1924 "LDR lr, [r2, #20]\n\t"
1925 "ADC r11, r0, #0x0\n\t"
1926 "UMLAL r3, r11, r12, lr\n\t"
1927 "ADDS r4, r4, r11\n\t"
1928 /* A[3] * B[6] */
1929 "LDR lr, [r2, #24]\n\t"
1930 "ADC r11, r0, #0x0\n\t"
1931 "UMLAL r4, r11, r12, lr\n\t"
1932 "ADDS r5, r5, r11\n\t"
1933 /* A[3] * B[7] */
1934 "LDR lr, [r2, #28]\n\t"
1935 "ADC r6, r0, #0x0\n\t"
1936 "UMLAL r5, r6, r12, lr\n\t"
1937 /* A[4] * B[0] */
1938 "LDR r12, [r1, #16]\n\t"
1939 "LDR lr, [r2]\n\t"
1940 "MOV r11, #0x0\n\t"
1941 "UMLAL r7, r11, r12, lr\n\t"
1942 "STR r7, [sp, #16]\n\t"
1943 "ADDS r8, r8, r11\n\t"
1944 /* A[4] * B[1] */
1945 "LDR lr, [r2, #4]\n\t"
1946 "ADC r11, r0, #0x0\n\t"
1947 "UMLAL r8, r11, r12, lr\n\t"
1948 "ADDS r9, r9, r11\n\t"
1949 /* A[4] * B[2] */
1950 "LDR lr, [r2, #8]\n\t"
1951 "ADC r11, r0, #0x0\n\t"
1952 "UMLAL r9, r11, r12, lr\n\t"
1953 "ADDS r10, r10, r11\n\t"
1954 /* A[4] * B[3] */
1955 "LDR lr, [r2, #12]\n\t"
1956 "ADC r11, r0, #0x0\n\t"
1957 "UMLAL r10, r11, r12, lr\n\t"
1958 "ADDS r3, r3, r11\n\t"
1959 /* A[4] * B[4] */
1960 "LDR lr, [r2, #16]\n\t"
1961 "ADC r11, r0, #0x0\n\t"
1962 "UMLAL r3, r11, r12, lr\n\t"
1963 "ADDS r4, r4, r11\n\t"
1964 /* A[4] * B[5] */
1965 "LDR lr, [r2, #20]\n\t"
1966 "ADC r11, r0, #0x0\n\t"
1967 "UMLAL r4, r11, r12, lr\n\t"
1968 "ADDS r5, r5, r11\n\t"
1969 /* A[4] * B[6] */
1970 "LDR lr, [r2, #24]\n\t"
1971 "ADC r11, r0, #0x0\n\t"
1972 "UMLAL r5, r11, r12, lr\n\t"
1973 "ADDS r6, r6, r11\n\t"
1974 /* A[4] * B[7] */
1975 "LDR lr, [r2, #28]\n\t"
1976 "ADC r7, r0, #0x0\n\t"
1977 "UMLAL r6, r7, r12, lr\n\t"
1978 /* A[5] * B[0] */
1979 "LDR r12, [r1, #20]\n\t"
1980 "LDR lr, [r2]\n\t"
1981 "MOV r11, #0x0\n\t"
1982 "UMLAL r8, r11, r12, lr\n\t"
1983 "STR r8, [sp, #20]\n\t"
1984 "ADDS r9, r9, r11\n\t"
1985 /* A[5] * B[1] */
1986 "LDR lr, [r2, #4]\n\t"
1987 "ADC r11, r0, #0x0\n\t"
1988 "UMLAL r9, r11, r12, lr\n\t"
1989 "ADDS r10, r10, r11\n\t"
1990 /* A[5] * B[2] */
1991 "LDR lr, [r2, #8]\n\t"
1992 "ADC r11, r0, #0x0\n\t"
1993 "UMLAL r10, r11, r12, lr\n\t"
1994 "ADDS r3, r3, r11\n\t"
1995 /* A[5] * B[3] */
1996 "LDR lr, [r2, #12]\n\t"
1997 "ADC r11, r0, #0x0\n\t"
1998 "UMLAL r3, r11, r12, lr\n\t"
1999 "ADDS r4, r4, r11\n\t"
2000 /* A[5] * B[4] */
2001 "LDR lr, [r2, #16]\n\t"
2002 "ADC r11, r0, #0x0\n\t"
2003 "UMLAL r4, r11, r12, lr\n\t"
2004 "ADDS r5, r5, r11\n\t"
2005 /* A[5] * B[5] */
2006 "LDR lr, [r2, #20]\n\t"
2007 "ADC r11, r0, #0x0\n\t"
2008 "UMLAL r5, r11, r12, lr\n\t"
2009 "ADDS r6, r6, r11\n\t"
2010 /* A[5] * B[6] */
2011 "LDR lr, [r2, #24]\n\t"
2012 "ADC r11, r0, #0x0\n\t"
2013 "UMLAL r6, r11, r12, lr\n\t"
2014 "ADDS r7, r7, r11\n\t"
2015 /* A[5] * B[7] */
2016 "LDR lr, [r2, #28]\n\t"
2017 "ADC r8, r0, #0x0\n\t"
2018 "UMLAL r7, r8, r12, lr\n\t"
2019 /* A[6] * B[0] */
2020 "LDR r12, [r1, #24]\n\t"
2021 "LDR lr, [r2]\n\t"
2022 "MOV r11, #0x0\n\t"
2023 "UMLAL r9, r11, r12, lr\n\t"
2024 "STR r9, [sp, #24]\n\t"
2025 "ADDS r10, r10, r11\n\t"
2026 /* A[6] * B[1] */
2027 "LDR lr, [r2, #4]\n\t"
2028 "ADC r11, r0, #0x0\n\t"
2029 "UMLAL r10, r11, r12, lr\n\t"
2030 "ADDS r3, r3, r11\n\t"
2031 /* A[6] * B[2] */
2032 "LDR lr, [r2, #8]\n\t"
2033 "ADC r11, r0, #0x0\n\t"
2034 "UMLAL r3, r11, r12, lr\n\t"
2035 "ADDS r4, r4, r11\n\t"
2036 /* A[6] * B[3] */
2037 "LDR lr, [r2, #12]\n\t"
2038 "ADC r11, r0, #0x0\n\t"
2039 "UMLAL r4, r11, r12, lr\n\t"
2040 "ADDS r5, r5, r11\n\t"
2041 /* A[6] * B[4] */
2042 "LDR lr, [r2, #16]\n\t"
2043 "ADC r11, r0, #0x0\n\t"
2044 "UMLAL r5, r11, r12, lr\n\t"
2045 "ADDS r6, r6, r11\n\t"
2046 /* A[6] * B[5] */
2047 "LDR lr, [r2, #20]\n\t"
2048 "ADC r11, r0, #0x0\n\t"
2049 "UMLAL r6, r11, r12, lr\n\t"
2050 "ADDS r7, r7, r11\n\t"
2051 /* A[6] * B[6] */
2052 "LDR lr, [r2, #24]\n\t"
2053 "ADC r11, r0, #0x0\n\t"
2054 "UMLAL r7, r11, r12, lr\n\t"
2055 "ADDS r8, r8, r11\n\t"
2056 /* A[6] * B[7] */
2057 "LDR lr, [r2, #28]\n\t"
2058 "ADC r9, r0, #0x0\n\t"
2059 "UMLAL r8, r9, r12, lr\n\t"
2060 /* A[7] * B[0] */
2061 "LDR r12, [r1, #28]\n\t"
2062 "LDR lr, [r2]\n\t"
2063 "MOV r11, #0x0\n\t"
2064 "UMLAL r10, r11, r12, lr\n\t"
2065 "STR r10, [sp, #28]\n\t"
2066 "ADDS r3, r3, r11\n\t"
2067 /* A[7] * B[1] */
2068 "LDR lr, [r2, #4]\n\t"
2069 "ADC r11, r0, #0x0\n\t"
2070 "UMLAL r3, r11, r12, lr\n\t"
2071 "ADDS r4, r4, r11\n\t"
2072 /* A[7] * B[2] */
2073 "LDR lr, [r2, #8]\n\t"
2074 "ADC r11, r0, #0x0\n\t"
2075 "UMLAL r4, r11, r12, lr\n\t"
2076 "ADDS r5, r5, r11\n\t"
2077 /* A[7] * B[3] */
2078 "LDR lr, [r2, #12]\n\t"
2079 "ADC r11, r0, #0x0\n\t"
2080 "UMLAL r5, r11, r12, lr\n\t"
2081 "ADDS r6, r6, r11\n\t"
2082 /* A[7] * B[4] */
2083 "LDR lr, [r2, #16]\n\t"
2084 "ADC r11, r0, #0x0\n\t"
2085 "UMLAL r6, r11, r12, lr\n\t"
2086 "ADDS r7, r7, r11\n\t"
2087 /* A[7] * B[5] */
2088 "LDR lr, [r2, #20]\n\t"
2089 "ADC r11, r0, #0x0\n\t"
2090 "UMLAL r7, r11, r12, lr\n\t"
2091 "ADDS r8, r8, r11\n\t"
2092 /* A[7] * B[6] */
2093 "LDR lr, [r2, #24]\n\t"
2094 "ADC r11, r0, #0x0\n\t"
2095 "UMLAL r8, r11, r12, lr\n\t"
2096 "ADDS r9, r9, r11\n\t"
2097 /* A[7] * B[7] */
2098 "LDR lr, [r2, #28]\n\t"
2099 "ADC r10, r0, #0x0\n\t"
2100 "UMLAL r9, r10, r12, lr\n\t"
2101 /* Reduce */
2102 "LDR r2, [sp, #28]\n\t"
2103 "MOV lr, sp\n\t"
2104 "MOV r12, #0x26\n\t"
2105 "UMULL r10, r11, r10, r12\n\t"
2106 "ADDS r10, r10, r2\n\t"
2107 "ADC r11, r11, #0x0\n\t"
2108 "MOV r12, #0x13\n\t"
2109 "LSL r11, r11, #1\n\t"
2110 "ORR r11, r11, r10, LSR #31\n\t"
2111 "MUL r11, r11, r12\n\t"
2112 "LDM lr!, {r1, r2}\n\t"
2113 "MOV r12, #0x26\n\t"
2114 "ADDS r1, r1, r11\n\t"
2115 "ADC r11, r0, #0x0\n\t"
2116 "UMLAL r1, r11, r3, r12\n\t"
2117 "ADDS r2, r2, r11\n\t"
2118 "ADC r11, r0, #0x0\n\t"
2119 "UMLAL r2, r11, r4, r12\n\t"
2120 "LDM lr!, {r3, r4}\n\t"
2121 "ADDS r3, r3, r11\n\t"
2122 "ADC r11, r0, #0x0\n\t"
2123 "UMLAL r3, r11, r5, r12\n\t"
2124 "ADDS r4, r4, r11\n\t"
2125 "ADC r11, r0, #0x0\n\t"
2126 "UMLAL r4, r11, r6, r12\n\t"
2127 "LDM lr!, {r5, r6}\n\t"
2128 "ADDS r5, r5, r11\n\t"
2129 "ADC r11, r0, #0x0\n\t"
2130 "UMLAL r5, r11, r7, r12\n\t"
2131 "ADDS r6, r6, r11\n\t"
2132 "ADC r11, r0, #0x0\n\t"
2133 "UMLAL r6, r11, r8, r12\n\t"
2134 "LDM lr!, {r7, r8}\n\t"
2135 "ADDS r7, r7, r11\n\t"
2136 "ADC r11, r0, #0x0\n\t"
2137 "UMLAL r7, r11, r9, r12\n\t"
2138 "BFC r10, #31, #1\n\t"
2139 "ADDS r8, r10, r11\n\t"
2140 /* Store */
2141 "LDR r0, [sp, #36]\n\t"
2142 "STM r0, {r1, r2, r3, r4, r5, r6, r7, r8}\n\t"
2143 "ADD sp, sp, #0x28\n\t"
2144#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2145 :
2146 :
2147#else
2148 :
2149 :
2150#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2151 : "memory", "cc", "lr"
2152 );
2153}
2154
2155#else
2156void fe_mul_op(void);
2157#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2158WC_OMIT_FRAME_POINTER void fe_mul_op()
2159#else
2160WC_OMIT_FRAME_POINTER void fe_mul_op()
2161#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2162{
2163#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2164#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2165 __asm__ __volatile__ (
2166 "SUB sp, sp, #0x2c\n\t"
2167 "STRD r0, r1, [sp, #36]\n\t"
2168 "MOV lr, r2\n\t"
2169 "LDM r1, {r0, r1, r2, r3}\n\t"
2170 "LDM lr!, {r4, r5, r6}\n\t"
2171 "UMULL r10, r11, r0, r4\n\t"
2172 "UMULL r12, r7, r1, r4\n\t"
2173 "UMAAL r11, r12, r0, r5\n\t"
2174 "UMULL r8, r9, r2, r4\n\t"
2175 "UMAAL r12, r8, r1, r5\n\t"
2176 "UMAAL r12, r7, r0, r6\n\t"
2177 "UMAAL r8, r9, r3, r4\n\t"
2178 "STM sp, {r10, r11, r12}\n\t"
2179 "UMAAL r7, r8, r2, r5\n\t"
2180 "LDM lr!, {r4}\n\t"
2181 "UMULL r10, r11, r1, r6\n\t"
2182 "UMAAL r8, r9, r2, r6\n\t"
2183 "UMAAL r7, r10, r0, r4\n\t"
2184 "UMAAL r8, r11, r3, r5\n\t"
2185 "STR r7, [sp, #12]\n\t"
2186 "UMAAL r8, r10, r1, r4\n\t"
2187 "UMAAL r9, r11, r3, r6\n\t"
2188 "UMAAL r9, r10, r2, r4\n\t"
2189 "UMAAL r10, r11, r3, r4\n\t"
2190 "LDM lr, {r4, r5, r6, r7}\n\t"
2191 "MOV r12, #0x0\n\t"
2192 "UMLAL r8, r12, r0, r4\n\t"
2193 "UMAAL r9, r12, r1, r4\n\t"
2194 "UMAAL r10, r12, r2, r4\n\t"
2195 "UMAAL r11, r12, r3, r4\n\t"
2196 "MOV r4, #0x0\n\t"
2197 "UMLAL r9, r4, r0, r5\n\t"
2198 "UMAAL r10, r4, r1, r5\n\t"
2199 "UMAAL r11, r4, r2, r5\n\t"
2200 "UMAAL r12, r4, r3, r5\n\t"
2201 "MOV r5, #0x0\n\t"
2202 "UMLAL r10, r5, r0, r6\n\t"
2203 "UMAAL r11, r5, r1, r6\n\t"
2204 "UMAAL r12, r5, r2, r6\n\t"
2205 "UMAAL r4, r5, r3, r6\n\t"
2206 "MOV r6, #0x0\n\t"
2207 "UMLAL r11, r6, r0, r7\n\t"
2208 "LDR r0, [sp, #40]\n\t"
2209 "UMAAL r12, r6, r1, r7\n\t"
2210 "ADD r0, r0, #0x10\n\t"
2211 "UMAAL r4, r6, r2, r7\n\t"
2212 "SUB lr, lr, #0x10\n\t"
2213 "UMAAL r5, r6, r3, r7\n\t"
2214 "LDM r0, {r0, r1, r2, r3}\n\t"
2215 "STR r6, [sp, #32]\n\t"
2216 "LDM lr!, {r6}\n\t"
2217 "MOV r7, #0x0\n\t"
2218 "UMLAL r8, r7, r0, r6\n\t"
2219 "UMAAL r9, r7, r1, r6\n\t"
2220 "STR r8, [sp, #16]\n\t"
2221 "UMAAL r10, r7, r2, r6\n\t"
2222 "UMAAL r11, r7, r3, r6\n\t"
2223 "LDM lr!, {r6}\n\t"
2224 "MOV r8, #0x0\n\t"
2225 "UMLAL r9, r8, r0, r6\n\t"
2226 "UMAAL r10, r8, r1, r6\n\t"
2227 "STR r9, [sp, #20]\n\t"
2228 "UMAAL r11, r8, r2, r6\n\t"
2229 "UMAAL r12, r8, r3, r6\n\t"
2230 "LDM lr!, {r6}\n\t"
2231 "MOV r9, #0x0\n\t"
2232 "UMLAL r10, r9, r0, r6\n\t"
2233 "UMAAL r11, r9, r1, r6\n\t"
2234 "STR r10, [sp, #24]\n\t"
2235 "UMAAL r12, r9, r2, r6\n\t"
2236 "UMAAL r4, r9, r3, r6\n\t"
2237 "LDM lr!, {r6}\n\t"
2238 "MOV r10, #0x0\n\t"
2239 "UMLAL r11, r10, r0, r6\n\t"
2240 "UMAAL r12, r10, r1, r6\n\t"
2241 "STR r11, [sp, #28]\n\t"
2242 "UMAAL r4, r10, r2, r6\n\t"
2243 "UMAAL r5, r10, r3, r6\n\t"
2244 "LDM lr!, {r11}\n\t"
2245 "UMAAL r12, r7, r0, r11\n\t"
2246 "UMAAL r4, r7, r1, r11\n\t"
2247 "LDR r6, [sp, #32]\n\t"
2248 "UMAAL r5, r7, r2, r11\n\t"
2249 "UMAAL r6, r7, r3, r11\n\t"
2250 "LDM lr!, {r11}\n\t"
2251 "UMAAL r4, r8, r0, r11\n\t"
2252 "UMAAL r5, r8, r1, r11\n\t"
2253 "UMAAL r6, r8, r2, r11\n\t"
2254 "UMAAL r7, r8, r3, r11\n\t"
2255 "LDM lr, {r11, lr}\n\t"
2256 "UMAAL r5, r9, r0, r11\n\t"
2257 "UMAAL r6, r10, r0, lr\n\t"
2258 "UMAAL r6, r9, r1, r11\n\t"
2259 "UMAAL r7, r10, r1, lr\n\t"
2260 "UMAAL r7, r9, r2, r11\n\t"
2261 "UMAAL r8, r10, r2, lr\n\t"
2262 "UMAAL r8, r9, r3, r11\n\t"
2263 "UMAAL r9, r10, r3, lr\n\t"
2264 /* Reduce */
2265 "LDR r0, [sp, #28]\n\t"
2266 "MOV lr, #0x25\n\t"
2267 "UMAAL r10, r0, r10, lr\n\t"
2268 "MOV lr, #0x13\n\t"
2269 "LSL r0, r0, #1\n\t"
2270 "ORR r0, r0, r10, LSR #31\n\t"
2271 "MUL r11, r0, lr\n\t"
2272 "POP {r0, r1, r2}\n\t"
2273 "MOV lr, #0x26\n\t"
2274 "UMAAL r0, r11, r12, lr\n\t"
2275 "UMAAL r1, r11, r4, lr\n\t"
2276 "UMAAL r2, r11, r5, lr\n\t"
2277 "POP {r3, r4, r5}\n\t"
2278 "UMAAL r3, r11, r6, lr\n\t"
2279 "UMAAL r4, r11, r7, lr\n\t"
2280 "UMAAL r5, r11, r8, lr\n\t"
2281 "POP {r6}\n\t"
2282 "BFC r10, #31, #1\n\t"
2283 "UMAAL r6, r11, r9, lr\n\t"
2284 "ADD r7, r10, r11\n\t"
2285 "LDR lr, [sp, #8]\n\t"
2286 /* Store */
2287 "STM lr, {r0, r1, r2, r3, r4, r5, r6, r7}\n\t"
2288 "ADD sp, sp, #0x10\n\t"
2289#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2290 :
2291 :
2292#else
2293 :
2294 :
2295#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2296 : "memory", "cc", "lr"
2297 );
2298}
2299
2300#endif /* WOLFSSL_ARM_ARCH_7M */
2301#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2302WC_OMIT_FRAME_POINTER void fe_mul(fe r_p, const fe a_p, const fe b_p)
2303#else
2304WC_OMIT_FRAME_POINTER void fe_mul(fe r, const fe a, const fe b)
2305#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2306{
2307#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2308 register sword32* r __asm__ ("r0") = (sword32*)r_p;
2309 register const sword32* a __asm__ ("r1") = (const sword32*)a_p;
2310 register const sword32* b __asm__ ("r2") = (const sword32*)b_p;
2311#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2312
2313 __asm__ __volatile__ (
2314 "BL fe_mul_op\n\t"
2315#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2316 : [r] "+r" (r), [a] "+r" (a), [b] "+r" (b)
2317 :
2318#else
2319 :
2320 : [r] "r" (r), [a] "r" (a), [b] "r" (b)
2321#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2322 : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
2323 "r11", "r12", "lr"
2324 );
2325}
2326
2327#ifdef WOLFSSL_ARM_ARCH_7M
2328void fe_sq_op(void);
2329#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2330WC_OMIT_FRAME_POINTER void fe_sq_op()
2331#else
2332WC_OMIT_FRAME_POINTER void fe_sq_op()
2333#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2334{
2335#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2336#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2337 __asm__ __volatile__ (
2338 "SUB sp, sp, #0x44\n\t"
2339 "STR r0, [sp, #64]\n\t"
2340 /* Square */
2341 "MOV r0, #0x0\n\t"
2342 "LDR r12, [r1]\n\t"
2343 /* A[0] * A[1] */
2344 "LDR lr, [r1, #4]\n\t"
2345 "UMULL r4, r5, r12, lr\n\t"
2346 /* A[0] * A[3] */
2347 "LDR lr, [r1, #12]\n\t"
2348 "UMULL r6, r7, r12, lr\n\t"
2349 /* A[0] * A[5] */
2350 "LDR lr, [r1, #20]\n\t"
2351 "UMULL r8, r9, r12, lr\n\t"
2352 /* A[0] * A[7] */
2353 "LDR lr, [r1, #28]\n\t"
2354 "UMULL r10, r3, r12, lr\n\t"
2355 /* A[0] * A[2] */
2356 "LDR lr, [r1, #8]\n\t"
2357 "MOV r11, #0x0\n\t"
2358 "UMLAL r5, r11, r12, lr\n\t"
2359 "ADDS r6, r6, r11\n\t"
2360 /* A[0] * A[4] */
2361 "LDR lr, [r1, #16]\n\t"
2362 "ADCS r7, r7, #0x0\n\t"
2363 "ADC r11, r0, #0x0\n\t"
2364 "UMLAL r7, r11, r12, lr\n\t"
2365 "ADDS r8, r8, r11\n\t"
2366 /* A[0] * A[6] */
2367 "LDR lr, [r1, #24]\n\t"
2368 "ADCS r9, r9, #0x0\n\t"
2369 "ADC r11, r0, #0x0\n\t"
2370 "UMLAL r9, r11, r12, lr\n\t"
2371 "ADDS r10, r10, r11\n\t"
2372 "ADCS r3, r3, #0x0\n\t"
2373 "STR r4, [sp, #4]\n\t"
2374 "STR r5, [sp, #8]\n\t"
2375 /* A[1] * A[2] */
2376 "LDR r12, [r1, #4]\n\t"
2377 "LDR lr, [r1, #8]\n\t"
2378 "MOV r11, #0x0\n\t"
2379 "UMLAL r6, r11, r12, lr\n\t"
2380 "STR r6, [sp, #12]\n\t"
2381 "ADDS r7, r7, r11\n\t"
2382 /* A[1] * A[3] */
2383 "LDR lr, [r1, #12]\n\t"
2384 "ADC r11, r0, #0x0\n\t"
2385 "UMLAL r7, r11, r12, lr\n\t"
2386 "STR r7, [sp, #16]\n\t"
2387 "ADDS r8, r8, r11\n\t"
2388 /* A[1] * A[4] */
2389 "LDR lr, [r1, #16]\n\t"
2390 "ADC r11, r0, #0x0\n\t"
2391 "UMLAL r8, r11, r12, lr\n\t"
2392 "ADDS r9, r9, r11\n\t"
2393 /* A[1] * A[5] */
2394 "LDR lr, [r1, #20]\n\t"
2395 "ADC r11, r0, #0x0\n\t"
2396 "UMLAL r9, r11, r12, lr\n\t"
2397 "ADDS r10, r10, r11\n\t"
2398 /* A[1] * A[6] */
2399 "LDR lr, [r1, #24]\n\t"
2400 "ADC r11, r0, #0x0\n\t"
2401 "UMLAL r10, r11, r12, lr\n\t"
2402 "ADDS r3, r3, r11\n\t"
2403 /* A[1] * A[7] */
2404 "LDR lr, [r1, #28]\n\t"
2405 "ADC r4, r0, #0x0\n\t"
2406 "UMLAL r3, r4, r12, lr\n\t"
2407 /* A[2] * A[3] */
2408 "LDR r12, [r1, #8]\n\t"
2409 "LDR lr, [r1, #12]\n\t"
2410 "MOV r11, #0x0\n\t"
2411 "UMLAL r8, r11, r12, lr\n\t"
2412 "STR r8, [sp, #20]\n\t"
2413 "ADDS r9, r9, r11\n\t"
2414 /* A[2] * A[4] */
2415 "LDR lr, [r1, #16]\n\t"
2416 "ADC r11, r0, #0x0\n\t"
2417 "UMLAL r9, r11, r12, lr\n\t"
2418 "STR r9, [sp, #24]\n\t"
2419 "ADDS r10, r10, r11\n\t"
2420 /* A[2] * A[5] */
2421 "LDR lr, [r1, #20]\n\t"
2422 "ADC r11, r0, #0x0\n\t"
2423 "UMLAL r10, r11, r12, lr\n\t"
2424 "ADDS r3, r3, r11\n\t"
2425 /* A[2] * A[6] */
2426 "LDR lr, [r1, #24]\n\t"
2427 "ADC r11, r0, #0x0\n\t"
2428 "UMLAL r3, r11, r12, lr\n\t"
2429 "ADDS r4, r4, r11\n\t"
2430 /* A[2] * A[7] */
2431 "LDR lr, [r1, #28]\n\t"
2432 "ADC r5, r0, #0x0\n\t"
2433 "UMLAL r4, r5, r12, lr\n\t"
2434 /* A[3] * A[4] */
2435 "LDR r12, [r1, #12]\n\t"
2436 "LDR lr, [r1, #16]\n\t"
2437 "MOV r11, #0x0\n\t"
2438 "UMLAL r10, r11, r12, lr\n\t"
2439 "STR r10, [sp, #28]\n\t"
2440 "ADDS r3, r3, r11\n\t"
2441 /* A[3] * A[5] */
2442 "LDR lr, [r1, #20]\n\t"
2443 "ADC r11, r0, #0x0\n\t"
2444 "UMLAL r3, r11, r12, lr\n\t"
2445 "ADDS r4, r4, r11\n\t"
2446 /* A[3] * A[6] */
2447 "LDR lr, [r1, #24]\n\t"
2448 "ADC r11, r0, #0x0\n\t"
2449 "UMLAL r4, r11, r12, lr\n\t"
2450 "ADDS r5, r5, r11\n\t"
2451 /* A[3] * A[7] */
2452 "LDR lr, [r1, #28]\n\t"
2453 "ADC r6, r0, #0x0\n\t"
2454 "UMLAL r5, r6, r12, lr\n\t"
2455 /* A[4] * A[5] */
2456 "LDR r12, [r1, #16]\n\t"
2457 "LDR lr, [r1, #20]\n\t"
2458 "MOV r11, #0x0\n\t"
2459 "UMLAL r4, r11, r12, lr\n\t"
2460 "ADDS r5, r5, r11\n\t"
2461 /* A[4] * A[6] */
2462 "LDR lr, [r1, #24]\n\t"
2463 "ADC r11, r0, #0x0\n\t"
2464 "UMLAL r5, r11, r12, lr\n\t"
2465 "ADDS r6, r6, r11\n\t"
2466 /* A[4] * A[7] */
2467 "LDR lr, [r1, #28]\n\t"
2468 "ADC r7, r0, #0x0\n\t"
2469 "UMLAL r6, r7, r12, lr\n\t"
2470 /* A[5] * A[6] */
2471 "LDR r12, [r1, #20]\n\t"
2472 "LDR lr, [r1, #24]\n\t"
2473 "MOV r11, #0x0\n\t"
2474 "UMLAL r6, r11, r12, lr\n\t"
2475 "ADDS r7, r7, r11\n\t"
2476 /* A[5] * A[7] */
2477 "LDR lr, [r1, #28]\n\t"
2478 "ADC r8, r0, #0x0\n\t"
2479 "UMLAL r7, r8, r12, lr\n\t"
2480 /* A[6] * A[7] */
2481 "LDR r12, [r1, #24]\n\t"
2482 "LDR lr, [r1, #28]\n\t"
2483 "MOV r9, #0x0\n\t"
2484 "UMLAL r8, r9, r12, lr\n\t"
2485 "ADD lr, sp, #0x20\n\t"
2486 "STM lr, {r3, r4, r5, r6, r7, r8, r9}\n\t"
2487 "ADD lr, sp, #0x4\n\t"
2488 "LDM lr, {r4, r5, r6, r7, r8, r9, r10}\n\t"
2489 "ADDS r4, r4, r4\n\t"
2490 "ADCS r5, r5, r5\n\t"
2491 "ADCS r6, r6, r6\n\t"
2492 "ADCS r7, r7, r7\n\t"
2493 "ADCS r8, r8, r8\n\t"
2494 "ADCS r9, r9, r9\n\t"
2495 "ADCS r10, r10, r10\n\t"
2496 "STM lr!, {r4, r5, r6, r7, r8, r9, r10}\n\t"
2497 "LDM lr, {r3, r4, r5, r6, r7, r8, r9}\n\t"
2498 "ADCS r3, r3, r3\n\t"
2499 "ADCS r4, r4, r4\n\t"
2500 "ADCS r5, r5, r5\n\t"
2501 "ADCS r6, r6, r6\n\t"
2502 "ADCS r7, r7, r7\n\t"
2503 "ADCS r8, r8, r8\n\t"
2504 "ADCS r9, r9, r9\n\t"
2505 "ADC r10, r0, #0x0\n\t"
2506 "STM lr, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t"
2507 "ADD lr, sp, #0x4\n\t"
2508 "LDM lr, {r4, r5, r6, r7, r8, r9, r10}\n\t"
2509 "MOV lr, sp\n\t"
2510 /* A[0] * A[0] */
2511 "LDR r12, [r1]\n\t"
2512 "UMULL r3, r11, r12, r12\n\t"
2513 "ADDS r4, r4, r11\n\t"
2514 /* A[1] * A[1] */
2515 "LDR r12, [r1, #4]\n\t"
2516 "ADCS r5, r5, #0x0\n\t"
2517 "ADC r11, r0, #0x0\n\t"
2518 "UMLAL r5, r11, r12, r12\n\t"
2519 "ADDS r6, r6, r11\n\t"
2520 /* A[2] * A[2] */
2521 "LDR r12, [r1, #8]\n\t"
2522 "ADCS r7, r7, #0x0\n\t"
2523 "ADC r11, r0, #0x0\n\t"
2524 "UMLAL r7, r11, r12, r12\n\t"
2525 "ADDS r8, r8, r11\n\t"
2526 /* A[3] * A[3] */
2527 "LDR r12, [r1, #12]\n\t"
2528 "ADCS r9, r9, #0x0\n\t"
2529 "ADC r11, r0, #0x0\n\t"
2530 "UMLAL r9, r11, r12, r12\n\t"
2531 "ADDS r10, r10, r11\n\t"
2532 "STM lr!, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t"
2533 "LDM lr, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t"
2534 /* A[4] * A[4] */
2535 "LDR r12, [r1, #16]\n\t"
2536 "ADCS r3, r3, #0x0\n\t"
2537 "ADC r11, r0, #0x0\n\t"
2538 "UMLAL r3, r11, r12, r12\n\t"
2539 "ADDS r4, r4, r11\n\t"
2540 /* A[5] * A[5] */
2541 "LDR r12, [r1, #20]\n\t"
2542 "ADCS r5, r5, #0x0\n\t"
2543 "ADC r11, r0, #0x0\n\t"
2544 "UMLAL r5, r11, r12, r12\n\t"
2545 "ADDS r6, r6, r11\n\t"
2546 /* A[6] * A[6] */
2547 "LDR r12, [r1, #24]\n\t"
2548 "ADCS r7, r7, #0x0\n\t"
2549 "ADC r11, r0, #0x0\n\t"
2550 "UMLAL r7, r11, r12, r12\n\t"
2551 "ADDS r8, r8, r11\n\t"
2552 /* A[7] * A[7] */
2553 "LDR r12, [r1, #28]\n\t"
2554 "ADCS r9, r9, #0x0\n\t"
2555 "ADC r10, r10, #0x0\n\t"
2556 "UMLAL r9, r10, r12, r12\n\t"
2557 /* Reduce */
2558 "LDR r2, [sp, #28]\n\t"
2559 "MOV lr, sp\n\t"
2560 "MOV r12, #0x26\n\t"
2561 "UMULL r10, r11, r10, r12\n\t"
2562 "ADDS r10, r10, r2\n\t"
2563 "ADC r11, r11, #0x0\n\t"
2564 "MOV r12, #0x13\n\t"
2565 "LSL r11, r11, #1\n\t"
2566 "ORR r11, r11, r10, LSR #31\n\t"
2567 "MUL r11, r11, r12\n\t"
2568 "LDM lr!, {r1, r2}\n\t"
2569 "MOV r12, #0x26\n\t"
2570 "ADDS r1, r1, r11\n\t"
2571 "ADC r11, r0, #0x0\n\t"
2572 "UMLAL r1, r11, r3, r12\n\t"
2573 "ADDS r2, r2, r11\n\t"
2574 "ADC r11, r0, #0x0\n\t"
2575 "UMLAL r2, r11, r4, r12\n\t"
2576 "LDM lr!, {r3, r4}\n\t"
2577 "ADDS r3, r3, r11\n\t"
2578 "ADC r11, r0, #0x0\n\t"
2579 "UMLAL r3, r11, r5, r12\n\t"
2580 "ADDS r4, r4, r11\n\t"
2581 "ADC r11, r0, #0x0\n\t"
2582 "UMLAL r4, r11, r6, r12\n\t"
2583 "LDM lr!, {r5, r6}\n\t"
2584 "ADDS r5, r5, r11\n\t"
2585 "ADC r11, r0, #0x0\n\t"
2586 "UMLAL r5, r11, r7, r12\n\t"
2587 "ADDS r6, r6, r11\n\t"
2588 "ADC r11, r0, #0x0\n\t"
2589 "UMLAL r6, r11, r8, r12\n\t"
2590 "LDM lr!, {r7, r8}\n\t"
2591 "ADDS r7, r7, r11\n\t"
2592 "ADC r11, r0, #0x0\n\t"
2593 "UMLAL r7, r11, r9, r12\n\t"
2594 "BFC r10, #31, #1\n\t"
2595 "ADDS r8, r10, r11\n\t"
2596 /* Store */
2597 "LDR r0, [sp, #64]\n\t"
2598 "STM r0, {r1, r2, r3, r4, r5, r6, r7, r8}\n\t"
2599 "ADD sp, sp, #0x44\n\t"
2600#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2601 :
2602 :
2603#else
2604 :
2605 :
2606#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2607 : "memory", "cc", "lr"
2608 );
2609}
2610
2611#else
2612void fe_sq_op(void);
2613#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2614WC_OMIT_FRAME_POINTER void fe_sq_op()
2615#else
2616WC_OMIT_FRAME_POINTER void fe_sq_op()
2617#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2618{
2619#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2620#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2621 __asm__ __volatile__ (
2622 "SUB sp, sp, #0x20\n\t"
2623 "STR r0, [sp, #28]\n\t"
2624 "LDM r1, {r0, r1, r2, r3, r4, r5, r6, r7}\n\t"
2625 /* Square */
2626 "UMULL r9, r10, r0, r0\n\t"
2627 "UMULL r11, r12, r0, r1\n\t"
2628 "ADDS r11, r11, r11\n\t"
2629 "MOV lr, #0x0\n\t"
2630 "UMAAL r10, r11, lr, lr\n\t"
2631 "STM sp, {r9, r10}\n\t"
2632 "MOV r8, lr\n\t"
2633 "UMAAL r8, r12, r0, r2\n\t"
2634 "ADCS r8, r8, r8\n\t"
2635 "UMAAL r8, r11, r1, r1\n\t"
2636 "UMULL r9, r10, r0, r3\n\t"
2637 "UMAAL r9, r12, r1, r2\n\t"
2638 "ADCS r9, r9, r9\n\t"
2639 "UMAAL r9, r11, lr, lr\n\t"
2640 "STRD r8, r9, [sp, #8]\n\t"
2641 "MOV r9, lr\n\t"
2642 "UMAAL r9, r10, r0, r4\n\t"
2643 "UMAAL r9, r12, r1, r3\n\t"
2644 "ADCS r9, r9, r9\n\t"
2645 "UMAAL r9, r11, r2, r2\n\t"
2646 "STR r9, [sp, #16]\n\t"
2647 "UMULL r9, r8, r0, r5\n\t"
2648 "UMAAL r9, r12, r1, r4\n\t"
2649 "UMAAL r9, r10, r2, r3\n\t"
2650 "ADCS r9, r9, r9\n\t"
2651 "UMAAL r9, r11, lr, lr\n\t"
2652 "STR r9, [sp, #20]\n\t"
2653 "MOV r9, lr\n\t"
2654 "UMAAL r9, r8, r0, r6\n\t"
2655 "UMAAL r9, r12, r1, r5\n\t"
2656 "UMAAL r9, r10, r2, r4\n\t"
2657 "ADCS r9, r9, r9\n\t"
2658 "UMAAL r9, r11, r3, r3\n\t"
2659 "STR r9, [sp, #24]\n\t"
2660 "UMULL r0, r9, r0, r7\n\t"
2661 "UMAAL r0, r8, r1, r6\n\t"
2662 "UMAAL r0, r12, r2, r5\n\t"
2663 "UMAAL r0, r10, r3, r4\n\t"
2664 "ADCS r0, r0, r0\n\t"
2665 "UMAAL r0, r11, lr, lr\n\t"
2666 /* R[7] = r0 */
2667 "UMAAL r9, r8, r1, r7\n\t"
2668 "UMAAL r9, r10, r2, r6\n\t"
2669 "UMAAL r12, r9, r3, r5\n\t"
2670 "ADCS r12, r12, r12\n\t"
2671 "UMAAL r12, r11, r4, r4\n\t"
2672 /* R[8] = r12 */
2673 "UMAAL r9, r8, r2, r7\n\t"
2674 "UMAAL r10, r9, r3, r6\n\t"
2675 "MOV r2, lr\n\t"
2676 "UMAAL r10, r2, r4, r5\n\t"
2677 "ADCS r10, r10, r10\n\t"
2678 "UMAAL r11, r10, lr, lr\n\t"
2679 /* R[9] = r11 */
2680 "UMAAL r2, r8, r3, r7\n\t"
2681 "UMAAL r2, r9, r4, r6\n\t"
2682 "ADCS r3, r2, r2\n\t"
2683 "UMAAL r10, r3, r5, r5\n\t"
2684 /* R[10] = r10 */
2685 "MOV r1, lr\n\t"
2686 "UMAAL r1, r8, r4, r7\n\t"
2687 "UMAAL r1, r9, r5, r6\n\t"
2688 "ADCS r4, r1, r1\n\t"
2689 "UMAAL r3, r4, lr, lr\n\t"
2690 /* R[11] = r3 */
2691 "UMAAL r8, r9, r5, r7\n\t"
2692 "ADCS r8, r8, r8\n\t"
2693 "UMAAL r4, r8, r6, r6\n\t"
2694 /* R[12] = r4 */
2695 "MOV r5, lr\n\t"
2696 "UMAAL r5, r9, r6, r7\n\t"
2697 "ADCS r5, r5, r5\n\t"
2698 "UMAAL r8, r5, lr, lr\n\t"
2699 /* R[13] = r8 */
2700 "ADCS r9, r9, r9\n\t"
2701 "UMAAL r9, r5, r7, r7\n\t"
2702 "ADCS r7, r5, lr\n\t"
2703 /* R[14] = r9 */
2704 /* R[15] = r7 */
2705 /* Reduce */
2706 "MOV r6, #0x25\n\t"
2707 "UMAAL r7, r0, r7, r6\n\t"
2708 "MOV r6, #0x13\n\t"
2709 "LSL r0, r0, #1\n\t"
2710 "ORR r0, r0, r7, LSR #31\n\t"
2711 "MUL lr, r0, r6\n\t"
2712 "POP {r0, r1}\n\t"
2713 "MOV r6, #0x26\n\t"
2714 "UMAAL r0, lr, r12, r6\n\t"
2715 "UMAAL r1, lr, r11, r6\n\t"
2716 "MOV r12, r3\n\t"
2717 "MOV r11, r4\n\t"
2718 "POP {r2, r3, r4}\n\t"
2719 "UMAAL r2, lr, r10, r6\n\t"
2720 "UMAAL r3, lr, r12, r6\n\t"
2721 "UMAAL r4, lr, r11, r6\n\t"
2722 "MOV r12, r6\n\t"
2723 "POP {r5, r6}\n\t"
2724 "UMAAL r5, lr, r8, r12\n\t"
2725 "BFC r7, #31, #1\n\t"
2726 "UMAAL r6, lr, r9, r12\n\t"
2727 "ADD r7, r7, lr\n\t"
2728 "POP {lr}\n\t"
2729 /* Store */
2730 "STM lr, {r0, r1, r2, r3, r4, r5, r6, r7}\n\t"
2731#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2732 :
2733 :
2734#else
2735 :
2736 :
2737#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2738 : "memory", "cc", "lr"
2739 );
2740}
2741
2742#endif /* WOLFSSL_ARM_ARCH_7M */
2743#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2744WC_OMIT_FRAME_POINTER void fe_sq(fe r_p, const fe a_p)
2745#else
2746WC_OMIT_FRAME_POINTER void fe_sq(fe r, const fe a)
2747#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2748{
2749#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2750 register sword32* r __asm__ ("r0") = (sword32*)r_p;
2751 register const sword32* a __asm__ ("r1") = (const sword32*)a_p;
2752#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2753
2754 __asm__ __volatile__ (
2755 "BL fe_sq_op\n\t"
2756#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2757 : [r] "+r" (r), [a] "+r" (a)
2758 :
2759#else
2760 :
2761 : [r] "r" (r), [a] "r" (a)
2762#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2763 : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
2764 "r11", "r12", "lr"
2765 );
2766}
2767
2768#ifdef HAVE_CURVE25519
2769#ifdef WOLFSSL_ARM_ARCH_7M
2770#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2771WC_OMIT_FRAME_POINTER void fe_mul121666(fe r_p, fe a_p)
2772#else
2773WC_OMIT_FRAME_POINTER void fe_mul121666(fe r, fe a)
2774#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2775{
2776#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2777 register sword32* r __asm__ ("r0") = (sword32*)r_p;
2778 register sword32* a __asm__ ("r1") = (sword32*)a_p;
2779#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2780
2781 __asm__ __volatile__ (
2782 /* Multiply by 121666 */
2783 "LDM %[a], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
2784 "MOV r12, #0xdb42\n\t"
2785 "MOVT r12, #0x1\n\t"
2786 "UMULL r2, r10, r2, r12\n\t"
2787 "UMULL r3, r11, r3, r12\n\t"
2788 "ADDS r3, r3, r10\n\t"
2789 "ADC r11, r11, #0x0\n\t"
2790 "UMULL r4, r10, r4, r12\n\t"
2791 "ADDS r4, r4, r11\n\t"
2792 "ADC r10, r10, #0x0\n\t"
2793 "UMULL r5, r11, r5, r12\n\t"
2794 "ADDS r5, r5, r10\n\t"
2795 "ADC r11, r11, #0x0\n\t"
2796 "UMULL r6, r10, r6, r12\n\t"
2797 "ADDS r6, r6, r11\n\t"
2798 "ADC r10, r10, #0x0\n\t"
2799 "UMULL r7, r11, r7, r12\n\t"
2800 "ADDS r7, r7, r10\n\t"
2801 "ADC r11, r11, #0x0\n\t"
2802 "UMULL r8, r10, r8, r12\n\t"
2803 "ADDS r8, r8, r11\n\t"
2804 "ADC r10, r10, #0x0\n\t"
2805 "UMULL r9, r11, r9, r12\n\t"
2806 "ADDS r9, r9, r10\n\t"
2807 "MOV r12, #0x13\n\t"
2808 "ADC r11, r11, #0x0\n\t"
2809 "LSL r11, r11, #1\n\t"
2810 "ORR r11, r11, r9, LSR #31\n\t"
2811 "MUL r11, r11, r12\n\t"
2812 "ADDS r2, r2, r11\n\t"
2813 "ADCS r3, r3, #0x0\n\t"
2814 "ADCS r4, r4, #0x0\n\t"
2815 "ADCS r5, r5, #0x0\n\t"
2816 "ADCS r6, r6, #0x0\n\t"
2817 "ADCS r7, r7, #0x0\n\t"
2818 "BFC r9, #31, #1\n\t"
2819 "ADCS r8, r8, #0x0\n\t"
2820 "ADC r9, r9, #0x0\n\t"
2821 "STM %[r], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
2822#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2823 : [r] "+r" (r), [a] "+r" (a)
2824 :
2825#else
2826 :
2827 : [r] "r" (r), [a] "r" (a)
2828#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2829 : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
2830 "r11", "r12"
2831 );
2832}
2833
2834#else
2835#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2836WC_OMIT_FRAME_POINTER void fe_mul121666(fe r_p, fe a_p)
2837#else
2838WC_OMIT_FRAME_POINTER void fe_mul121666(fe r, fe a)
2839#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2840{
2841#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2842 register sword32* r __asm__ ("r0") = (sword32*)r_p;
2843 register sword32* a __asm__ ("r1") = (sword32*)a_p;
2844#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2845
2846 __asm__ __volatile__ (
2847 /* Multiply by 121666 */
2848 "LDM %[a], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
2849 "MOV r11, #0xdb42\n\t"
2850 "MOVT r11, #0x1\n\t"
2851 "UMULL r2, r12, r2, r11\n\t"
2852 "SUB r10, r11, #0x1\n\t"
2853 "UMAAL r3, r12, r3, r10\n\t"
2854 "UMAAL r4, r12, r4, r10\n\t"
2855 "UMAAL r5, r12, r5, r10\n\t"
2856 "UMAAL r6, r12, r6, r10\n\t"
2857 "UMAAL r7, r12, r7, r10\n\t"
2858 "UMAAL r8, r12, r8, r10\n\t"
2859 "MOV r11, #0x13\n\t"
2860 "UMAAL r9, r12, r9, r10\n\t"
2861 "LSL r12, r12, #1\n\t"
2862 "ORR r12, r12, r9, LSR #31\n\t"
2863 "MUL r12, r12, r11\n\t"
2864 "ADDS r2, r2, r12\n\t"
2865 "ADCS r3, r3, #0x0\n\t"
2866 "ADCS r4, r4, #0x0\n\t"
2867 "ADCS r5, r5, #0x0\n\t"
2868 "ADCS r6, r6, #0x0\n\t"
2869 "ADCS r7, r7, #0x0\n\t"
2870 "BFC r9, #31, #1\n\t"
2871 "ADCS r8, r8, #0x0\n\t"
2872 "ADC r9, r9, #0x0\n\t"
2873 "STM %[r], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
2874#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2875 : [r] "+r" (r), [a] "+r" (a)
2876 :
2877#else
2878 :
2879 : [r] "r" (r), [a] "r" (a)
2880#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2881 : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
2882 "r11", "r12"
2883 );
2884}
2885
2886#endif /* WOLFSSL_ARM_ARCH_7M */
2887#ifndef WC_NO_CACHE_RESISTANT
2888#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2889WC_OMIT_FRAME_POINTER int curve25519(byte* r_p, const byte* n_p,
2890 const byte* a_p)
2891#else
2892WC_OMIT_FRAME_POINTER int curve25519(byte* r, const byte* n, const byte* a)
2893#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2894{
2895#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
2896 register byte* r __asm__ ("r0") = (byte*)r_p;
2897 register const byte* n __asm__ ("r1") = (const byte*)n_p;
2898 register const byte* a __asm__ ("r2") = (const byte*)a_p;
2899#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
2900
2901 __asm__ __volatile__ (
2902 "SUB sp, sp, #0xbc\n\t"
2903 "STR %[r], [sp, #160]\n\t"
2904 "STR %[n], [sp, #164]\n\t"
2905 "STR %[a], [sp, #168]\n\t"
2906 "MOV %[n], #0x0\n\t"
2907 "STR %[n], [sp, #172]\n\t"
2908 "MOV r4, #0x1\n\t"
2909 "MOV r5, #0x0\n\t"
2910 "MOV r6, #0x0\n\t"
2911 "MOV r7, #0x0\n\t"
2912 "MOV r8, #0x0\n\t"
2913 "MOV r9, #0x0\n\t"
2914 "MOV r10, #0x0\n\t"
2915 "MOV r11, #0x0\n\t"
2916 "STM %[r], {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
2917 "ADD r3, sp, #0x20\n\t"
2918 "STM r3, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
2919 "MOV r4, #0x0\n\t"
2920 "MOV r3, sp\n\t"
2921 "STM r3, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
2922 "ADD r3, sp, #0x40\n\t"
2923 /* Copy */
2924 "LDM r2, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
2925 "STM r3, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
2926 "MOV %[n], #0x1e\n\t"
2927 "STR %[n], [sp, #180]\n\t"
2928 "MOV %[a], #0x1c\n\t"
2929 "STR %[a], [sp, #176]\n\t"
2930 "\n"
2931#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
2932 "L_curve25519_words:\n\t"
2933#else
2934 "L_curve25519_words_%=:\n\t"
2935#endif
2936 "\n"
2937#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
2938 "L_curve25519_bits:\n\t"
2939#else
2940 "L_curve25519_bits_%=:\n\t"
2941#endif
2942 "LDR %[n], [sp, #164]\n\t"
2943 "LDR %[a], [%[n], r2]\n\t"
2944 "LDR %[n], [sp, #180]\n\t"
2945 "LSR %[a], %[a], %[n]\n\t"
2946 "AND %[a], %[a], #0x1\n\t"
2947 "STR %[a], [sp, #184]\n\t"
2948 "LDR %[n], [sp, #172]\n\t"
2949 "EOR %[n], %[n], %[a]\n\t"
2950 "STR %[n], [sp, #172]\n\t"
2951 "LDR %[r], [sp, #160]\n\t"
2952 /* Conditional Swap */
2953 "RSB %[n], %[n], #0x0\n\t"
2954 "MOV r3, r0\n\t"
2955 "ADD r12, sp, #0x40\n\t"
2956 "LDM r3, {r4, r5}\n\t"
2957 "LDM r12, {r6, r7}\n\t"
2958 "EOR r8, r4, r6\n\t"
2959 "EOR r9, r5, r7\n\t"
2960 "AND r8, r8, %[n]\n\t"
2961 "AND r9, r9, %[n]\n\t"
2962 "EOR r4, r4, r8\n\t"
2963 "EOR r5, r5, r9\n\t"
2964 "EOR r6, r6, r8\n\t"
2965 "EOR r7, r7, r9\n\t"
2966 "STM r3!, {r4, r5}\n\t"
2967 "STM r12!, {r6, r7}\n\t"
2968 "LDM r3, {r4, r5}\n\t"
2969 "LDM r12, {r6, r7}\n\t"
2970 "EOR r8, r4, r6\n\t"
2971 "EOR r9, r5, r7\n\t"
2972 "AND r8, r8, %[n]\n\t"
2973 "AND r9, r9, %[n]\n\t"
2974 "EOR r4, r4, r8\n\t"
2975 "EOR r5, r5, r9\n\t"
2976 "EOR r6, r6, r8\n\t"
2977 "EOR r7, r7, r9\n\t"
2978 "STM r3!, {r4, r5}\n\t"
2979 "STM r12!, {r6, r7}\n\t"
2980 "LDM r3, {r4, r5}\n\t"
2981 "LDM r12, {r6, r7}\n\t"
2982 "EOR r8, r4, r6\n\t"
2983 "EOR r9, r5, r7\n\t"
2984 "AND r8, r8, %[n]\n\t"
2985 "AND r9, r9, %[n]\n\t"
2986 "EOR r4, r4, r8\n\t"
2987 "EOR r5, r5, r9\n\t"
2988 "EOR r6, r6, r8\n\t"
2989 "EOR r7, r7, r9\n\t"
2990 "STM r3!, {r4, r5}\n\t"
2991 "STM r12!, {r6, r7}\n\t"
2992 "LDM r3, {r4, r5}\n\t"
2993 "LDM r12, {r6, r7}\n\t"
2994 "EOR r8, r4, r6\n\t"
2995 "EOR r9, r5, r7\n\t"
2996 "AND r8, r8, %[n]\n\t"
2997 "AND r9, r9, %[n]\n\t"
2998 "EOR r4, r4, r8\n\t"
2999 "EOR r5, r5, r9\n\t"
3000 "EOR r6, r6, r8\n\t"
3001 "EOR r7, r7, r9\n\t"
3002 "STM r3!, {r4, r5}\n\t"
3003 "STM r12!, {r6, r7}\n\t"
3004 "LDR %[n], [sp, #172]\n\t"
3005 /* Conditional Swap */
3006 "RSB %[n], %[n], #0x0\n\t"
3007 "MOV r3, sp\n\t"
3008 "ADD r12, sp, #0x20\n\t"
3009 "LDM r3, {r4, r5}\n\t"
3010 "LDM r12, {r6, r7}\n\t"
3011 "EOR r8, r4, r6\n\t"
3012 "EOR r9, r5, r7\n\t"
3013 "AND r8, r8, %[n]\n\t"
3014 "AND r9, r9, %[n]\n\t"
3015 "EOR r4, r4, r8\n\t"
3016 "EOR r5, r5, r9\n\t"
3017 "EOR r6, r6, r8\n\t"
3018 "EOR r7, r7, r9\n\t"
3019 "STM r3!, {r4, r5}\n\t"
3020 "STM r12!, {r6, r7}\n\t"
3021 "LDM r3, {r4, r5}\n\t"
3022 "LDM r12, {r6, r7}\n\t"
3023 "EOR r8, r4, r6\n\t"
3024 "EOR r9, r5, r7\n\t"
3025 "AND r8, r8, %[n]\n\t"
3026 "AND r9, r9, %[n]\n\t"
3027 "EOR r4, r4, r8\n\t"
3028 "EOR r5, r5, r9\n\t"
3029 "EOR r6, r6, r8\n\t"
3030 "EOR r7, r7, r9\n\t"
3031 "STM r3!, {r4, r5}\n\t"
3032 "STM r12!, {r6, r7}\n\t"
3033 "LDM r3, {r4, r5}\n\t"
3034 "LDM r12, {r6, r7}\n\t"
3035 "EOR r8, r4, r6\n\t"
3036 "EOR r9, r5, r7\n\t"
3037 "AND r8, r8, %[n]\n\t"
3038 "AND r9, r9, %[n]\n\t"
3039 "EOR r4, r4, r8\n\t"
3040 "EOR r5, r5, r9\n\t"
3041 "EOR r6, r6, r8\n\t"
3042 "EOR r7, r7, r9\n\t"
3043 "STM r3!, {r4, r5}\n\t"
3044 "STM r12!, {r6, r7}\n\t"
3045 "LDM r3, {r4, r5}\n\t"
3046 "LDM r12, {r6, r7}\n\t"
3047 "EOR r8, r4, r6\n\t"
3048 "EOR r9, r5, r7\n\t"
3049 "AND r8, r8, %[n]\n\t"
3050 "AND r9, r9, %[n]\n\t"
3051 "EOR r4, r4, r8\n\t"
3052 "EOR r5, r5, r9\n\t"
3053 "EOR r6, r6, r8\n\t"
3054 "EOR r7, r7, r9\n\t"
3055 "STM r3!, {r4, r5}\n\t"
3056 "STM r12!, {r6, r7}\n\t"
3057 "LDR %[n], [sp, #184]\n\t"
3058 "STR %[n], [sp, #172]\n\t"
3059 "MOV r3, sp\n\t"
3060 "LDR r2, [sp, #160]\n\t"
3061 "ADD r1, sp, #0x80\n\t"
3062 "LDR r0, [sp, #160]\n\t"
3063 "BL fe_add_sub_op\n\t"
3064 "ADD r3, sp, #0x20\n\t"
3065 "ADD r2, sp, #0x40\n\t"
3066 "ADD r1, sp, #0x60\n\t"
3067 "MOV r0, sp\n\t"
3068 "BL fe_add_sub_op\n\t"
3069 "LDR r2, [sp, #160]\n\t"
3070 "ADD r1, sp, #0x60\n\t"
3071 "ADD r0, sp, #0x20\n\t"
3072 "BL fe_mul_op\n\t"
3073 "ADD r2, sp, #0x80\n\t"
3074 "MOV r1, sp\n\t"
3075 "MOV r0, sp\n\t"
3076 "BL fe_mul_op\n\t"
3077 "ADD r1, sp, #0x80\n\t"
3078 "ADD r0, sp, #0x80\n\t"
3079 "BL fe_sq_op\n\t"
3080 "LDR r1, [sp, #160]\n\t"
3081 "ADD r0, sp, #0x60\n\t"
3082 "BL fe_sq_op\n\t"
3083 "MOV r3, sp\n\t"
3084 "ADD r2, sp, #0x20\n\t"
3085 "MOV r1, sp\n\t"
3086 "ADD r0, sp, #0x40\n\t"
3087 "BL fe_add_sub_op\n\t"
3088 "ADD r2, sp, #0x80\n\t"
3089 "ADD r1, sp, #0x60\n\t"
3090 "LDR r0, [sp, #160]\n\t"
3091 "BL fe_mul_op\n\t"
3092 "ADD r2, sp, #0x80\n\t"
3093 "ADD r1, sp, #0x60\n\t"
3094 "ADD r0, sp, #0x60\n\t"
3095 "BL fe_sub_op\n\t"
3096 "MOV r1, sp\n\t"
3097 "MOV r0, sp\n\t"
3098 "BL fe_sq_op\n\t"
3099 "ADD r1, sp, #0x60\n\t"
3100 "ADD r0, sp, #0x20\n\t"
3101 "BL fe_mul121666\n\t"
3102 "ADD r1, sp, #0x40\n\t"
3103 "ADD r0, sp, #0x40\n\t"
3104 "BL fe_sq_op\n\t"
3105 "ADD r2, sp, #0x20\n\t"
3106 "ADD r1, sp, #0x80\n\t"
3107 "ADD r0, sp, #0x80\n\t"
3108 "BL fe_add_op\n\t"
3109 "MOV r2, sp\n\t"
3110 "LDR r1, [sp, #168]\n\t"
3111 "ADD r0, sp, #0x20\n\t"
3112 "BL fe_mul_op\n\t"
3113 "ADD r2, sp, #0x80\n\t"
3114 "ADD r1, sp, #0x60\n\t"
3115 "MOV r0, sp\n\t"
3116 "BL fe_mul_op\n\t"
3117 "LDR %[a], [sp, #176]\n\t"
3118 "LDR %[n], [sp, #180]\n\t"
3119 "SUBS %[n], %[n], #0x1\n\t"
3120 "STR %[n], [sp, #180]\n\t"
3121#if defined(__GNUC__)
3122 "BGE L_curve25519_bits_%=\n\t"
3123#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3124 "BGE.W L_curve25519_bits\n\t"
3125#else
3126 "BGE.W L_curve25519_bits_%=\n\t"
3127#endif
3128 "MOV %[n], #0x1f\n\t"
3129 "STR %[n], [sp, #180]\n\t"
3130 "SUBS %[a], %[a], #0x4\n\t"
3131 "STR %[a], [sp, #176]\n\t"
3132#if defined(__GNUC__)
3133 "BGE L_curve25519_words_%=\n\t"
3134#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3135 "BGE.W L_curve25519_words\n\t"
3136#else
3137 "BGE.W L_curve25519_words_%=\n\t"
3138#endif
3139 /* Invert */
3140 "ADD r1, sp, #0x0\n\t"
3141 "ADD r0, sp, #0x20\n\t"
3142 "BL fe_sq_op\n\t"
3143 "ADD r1, sp, #0x20\n\t"
3144 "ADD r0, sp, #0x40\n\t"
3145 "BL fe_sq_op\n\t"
3146 "ADD r1, sp, #0x40\n\t"
3147 "ADD r0, sp, #0x40\n\t"
3148 "BL fe_sq_op\n\t"
3149 "ADD r2, sp, #0x40\n\t"
3150 "ADD r1, sp, #0x0\n\t"
3151 "ADD r0, sp, #0x40\n\t"
3152 "BL fe_mul_op\n\t"
3153 "ADD r2, sp, #0x40\n\t"
3154 "ADD r1, sp, #0x20\n\t"
3155 "ADD r0, sp, #0x20\n\t"
3156 "BL fe_mul_op\n\t"
3157 "ADD r1, sp, #0x20\n\t"
3158 "ADD r0, sp, #0x60\n\t"
3159 "BL fe_sq_op\n\t"
3160 "ADD r2, sp, #0x60\n\t"
3161 "ADD r1, sp, #0x40\n\t"
3162 "ADD r0, sp, #0x40\n\t"
3163 "BL fe_mul_op\n\t"
3164 "ADD r1, sp, #0x40\n\t"
3165 "ADD r0, sp, #0x60\n\t"
3166 "BL fe_sq_op\n\t"
3167 "MOV r12, #0x4\n\t"
3168 "\n"
3169#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3170 "L_curve25519_inv_1:\n\t"
3171#else
3172 "L_curve25519_inv_1_%=:\n\t"
3173#endif
3174 "ADD r1, sp, #0x60\n\t"
3175 "ADD r0, sp, #0x60\n\t"
3176 "PUSH {r12}\n\t"
3177 "BL fe_sq_op\n\t"
3178 "POP {r12}\n\t"
3179 "SUBS r12, r12, #0x1\n\t"
3180#if defined(__GNUC__)
3181 "BNE L_curve25519_inv_1_%=\n\t"
3182#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3183 "BNE.N L_curve25519_inv_1\n\t"
3184#else
3185 "BNE.N L_curve25519_inv_1_%=\n\t"
3186#endif
3187 "ADD r2, sp, #0x40\n\t"
3188 "ADD r1, sp, #0x60\n\t"
3189 "ADD r0, sp, #0x40\n\t"
3190 "BL fe_mul_op\n\t"
3191 "ADD r1, sp, #0x40\n\t"
3192 "ADD r0, sp, #0x60\n\t"
3193 "BL fe_sq_op\n\t"
3194 "MOV r12, #0x9\n\t"
3195 "\n"
3196#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3197 "L_curve25519_inv_2:\n\t"
3198#else
3199 "L_curve25519_inv_2_%=:\n\t"
3200#endif
3201 "ADD r1, sp, #0x60\n\t"
3202 "ADD r0, sp, #0x60\n\t"
3203 "PUSH {r12}\n\t"
3204 "BL fe_sq_op\n\t"
3205 "POP {r12}\n\t"
3206 "SUBS r12, r12, #0x1\n\t"
3207#if defined(__GNUC__)
3208 "BNE L_curve25519_inv_2_%=\n\t"
3209#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3210 "BNE.N L_curve25519_inv_2\n\t"
3211#else
3212 "BNE.N L_curve25519_inv_2_%=\n\t"
3213#endif
3214 "ADD r2, sp, #0x40\n\t"
3215 "ADD r1, sp, #0x60\n\t"
3216 "ADD r0, sp, #0x60\n\t"
3217 "BL fe_mul_op\n\t"
3218 "ADD r1, sp, #0x60\n\t"
3219 "ADD r0, sp, #0x80\n\t"
3220 "BL fe_sq_op\n\t"
3221 "MOV r12, #0x13\n\t"
3222 "\n"
3223#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3224 "L_curve25519_inv_3:\n\t"
3225#else
3226 "L_curve25519_inv_3_%=:\n\t"
3227#endif
3228 "ADD r1, sp, #0x80\n\t"
3229 "ADD r0, sp, #0x80\n\t"
3230 "PUSH {r12}\n\t"
3231 "BL fe_sq_op\n\t"
3232 "POP {r12}\n\t"
3233 "SUBS r12, r12, #0x1\n\t"
3234#if defined(__GNUC__)
3235 "BNE L_curve25519_inv_3_%=\n\t"
3236#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3237 "BNE.N L_curve25519_inv_3\n\t"
3238#else
3239 "BNE.N L_curve25519_inv_3_%=\n\t"
3240#endif
3241 "ADD r2, sp, #0x60\n\t"
3242 "ADD r1, sp, #0x80\n\t"
3243 "ADD r0, sp, #0x60\n\t"
3244 "BL fe_mul_op\n\t"
3245 "MOV r12, #0xa\n\t"
3246 "\n"
3247#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3248 "L_curve25519_inv_4:\n\t"
3249#else
3250 "L_curve25519_inv_4_%=:\n\t"
3251#endif
3252 "ADD r1, sp, #0x60\n\t"
3253 "ADD r0, sp, #0x60\n\t"
3254 "PUSH {r12}\n\t"
3255 "BL fe_sq_op\n\t"
3256 "POP {r12}\n\t"
3257 "SUBS r12, r12, #0x1\n\t"
3258#if defined(__GNUC__)
3259 "BNE L_curve25519_inv_4_%=\n\t"
3260#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3261 "BNE.N L_curve25519_inv_4\n\t"
3262#else
3263 "BNE.N L_curve25519_inv_4_%=\n\t"
3264#endif
3265 "ADD r2, sp, #0x40\n\t"
3266 "ADD r1, sp, #0x60\n\t"
3267 "ADD r0, sp, #0x40\n\t"
3268 "BL fe_mul_op\n\t"
3269 "ADD r1, sp, #0x40\n\t"
3270 "ADD r0, sp, #0x60\n\t"
3271 "BL fe_sq_op\n\t"
3272 "MOV r12, #0x31\n\t"
3273 "\n"
3274#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3275 "L_curve25519_inv_5:\n\t"
3276#else
3277 "L_curve25519_inv_5_%=:\n\t"
3278#endif
3279 "ADD r1, sp, #0x60\n\t"
3280 "ADD r0, sp, #0x60\n\t"
3281 "PUSH {r12}\n\t"
3282 "BL fe_sq_op\n\t"
3283 "POP {r12}\n\t"
3284 "SUBS r12, r12, #0x1\n\t"
3285#if defined(__GNUC__)
3286 "BNE L_curve25519_inv_5_%=\n\t"
3287#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3288 "BNE.N L_curve25519_inv_5\n\t"
3289#else
3290 "BNE.N L_curve25519_inv_5_%=\n\t"
3291#endif
3292 "ADD r2, sp, #0x40\n\t"
3293 "ADD r1, sp, #0x60\n\t"
3294 "ADD r0, sp, #0x60\n\t"
3295 "BL fe_mul_op\n\t"
3296 "ADD r1, sp, #0x60\n\t"
3297 "ADD r0, sp, #0x80\n\t"
3298 "BL fe_sq_op\n\t"
3299 "MOV r12, #0x63\n\t"
3300 "\n"
3301#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3302 "L_curve25519_inv_6:\n\t"
3303#else
3304 "L_curve25519_inv_6_%=:\n\t"
3305#endif
3306 "ADD r1, sp, #0x80\n\t"
3307 "ADD r0, sp, #0x80\n\t"
3308 "PUSH {r12}\n\t"
3309 "BL fe_sq_op\n\t"
3310 "POP {r12}\n\t"
3311 "SUBS r12, r12, #0x1\n\t"
3312#if defined(__GNUC__)
3313 "BNE L_curve25519_inv_6_%=\n\t"
3314#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3315 "BNE.N L_curve25519_inv_6\n\t"
3316#else
3317 "BNE.N L_curve25519_inv_6_%=\n\t"
3318#endif
3319 "ADD r2, sp, #0x60\n\t"
3320 "ADD r1, sp, #0x80\n\t"
3321 "ADD r0, sp, #0x60\n\t"
3322 "BL fe_mul_op\n\t"
3323 "MOV r12, #0x32\n\t"
3324 "\n"
3325#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3326 "L_curve25519_inv_7:\n\t"
3327#else
3328 "L_curve25519_inv_7_%=:\n\t"
3329#endif
3330 "ADD r1, sp, #0x60\n\t"
3331 "ADD r0, sp, #0x60\n\t"
3332 "PUSH {r12}\n\t"
3333 "BL fe_sq_op\n\t"
3334 "POP {r12}\n\t"
3335 "SUBS r12, r12, #0x1\n\t"
3336#if defined(__GNUC__)
3337 "BNE L_curve25519_inv_7_%=\n\t"
3338#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3339 "BNE.N L_curve25519_inv_7\n\t"
3340#else
3341 "BNE.N L_curve25519_inv_7_%=\n\t"
3342#endif
3343 "ADD r2, sp, #0x40\n\t"
3344 "ADD r1, sp, #0x60\n\t"
3345 "ADD r0, sp, #0x40\n\t"
3346 "BL fe_mul_op\n\t"
3347 "MOV r12, #0x5\n\t"
3348 "\n"
3349#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3350 "L_curve25519_inv_8:\n\t"
3351#else
3352 "L_curve25519_inv_8_%=:\n\t"
3353#endif
3354 "ADD r1, sp, #0x40\n\t"
3355 "ADD r0, sp, #0x40\n\t"
3356 "PUSH {r12}\n\t"
3357 "BL fe_sq_op\n\t"
3358 "POP {r12}\n\t"
3359 "SUBS r12, r12, #0x1\n\t"
3360#if defined(__GNUC__)
3361 "BNE L_curve25519_inv_8_%=\n\t"
3362#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3363 "BNE.N L_curve25519_inv_8\n\t"
3364#else
3365 "BNE.N L_curve25519_inv_8_%=\n\t"
3366#endif
3367 "ADD r2, sp, #0x20\n\t"
3368 "ADD r1, sp, #0x40\n\t"
3369 "ADD r0, sp, #0x0\n\t"
3370 "BL fe_mul_op\n\t"
3371 "MOV r2, sp\n\t"
3372 "LDR r1, [sp, #160]\n\t"
3373 "LDR r0, [sp, #160]\n\t"
3374 "BL fe_mul_op\n\t"
3375 "MOV r0, #0x0\n\t"
3376 "ADD sp, sp, #0xbc\n\t"
3377#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
3378 : [r] "+r" (r), [n] "+r" (n), [a] "+r" (a)
3379 :
3380#else
3381 :
3382 : [r] "r" (r), [n] "r" (n), [a] "r" (a)
3383#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
3384 : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11",
3385 "r3", "r12", "lr"
3386 );
3387 return (word32)(size_t)r;
3388}
3389
3390#else
3391#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
3392WC_OMIT_FRAME_POINTER int curve25519(byte* r_p, const byte* n_p,
3393 const byte* a_p)
3394#else
3395WC_OMIT_FRAME_POINTER int curve25519(byte* r, const byte* n, const byte* a)
3396#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
3397{
3398#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
3399 register byte* r __asm__ ("r0") = (byte*)r_p;
3400 register const byte* n __asm__ ("r1") = (const byte*)n_p;
3401 register const byte* a __asm__ ("r2") = (const byte*)a_p;
3402#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
3403
3404 __asm__ __volatile__ (
3405 "SUB sp, sp, #0xc0\n\t"
3406 "STR %[r], [sp, #176]\n\t"
3407 "STR %[n], [sp, #160]\n\t"
3408 "STR %[a], [sp, #172]\n\t"
3409 "ADD r5, sp, #0x40\n\t"
3410 "ADD r4, sp, #0x20\n\t"
3411 "STR sp, [sp, #184]\n\t"
3412 "STR r5, [sp, #180]\n\t"
3413 "STR r4, [sp, #188]\n\t"
3414 "MOV %[n], #0x0\n\t"
3415 "STR %[n], [sp, #164]\n\t"
3416 "MOV r4, #0x1\n\t"
3417 "MOV r5, #0x0\n\t"
3418 "MOV r6, #0x0\n\t"
3419 "MOV r7, #0x0\n\t"
3420 "MOV r8, #0x0\n\t"
3421 "MOV r9, #0x0\n\t"
3422 "MOV r10, #0x0\n\t"
3423 "MOV r11, #0x0\n\t"
3424 "STM %[r], {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
3425 "ADD r3, sp, #0x20\n\t"
3426 "STM r3, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
3427 "MOV r4, #0x0\n\t"
3428 "MOV r3, sp\n\t"
3429 "STM r3, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
3430 "ADD r3, sp, #0x40\n\t"
3431 /* Copy */
3432 "LDM r2, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
3433 "STM r3, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
3434 "MOV %[a], #0xfe\n\t"
3435 "\n"
3436#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3437 "L_curve25519_bits:\n\t"
3438#else
3439 "L_curve25519_bits_%=:\n\t"
3440#endif
3441 "STR %[a], [sp, #168]\n\t"
3442 "LDR %[n], [sp, #160]\n\t"
3443 "AND r4, %[a], #0x1f\n\t"
3444 "LSR %[a], %[a], #5\n\t"
3445 "LDR %[a], [%[n], r2, LSL #2]\n\t"
3446 "RSB r4, r4, #0x1f\n\t"
3447 "LSL %[a], %[a], r4\n\t"
3448 "LDR %[n], [sp, #164]\n\t"
3449 "EOR %[n], %[n], %[a]\n\t"
3450 "ASR %[n], %[n], #31\n\t"
3451 "STR %[a], [sp, #164]\n\t"
3452 /* Conditional Swap */
3453 "ADD r11, sp, #0xb0\n\t"
3454 "LDM r11, {r4, r5, r6, r7}\n\t"
3455 "EOR r8, r4, r5\n\t"
3456 "EOR r9, r6, r7\n\t"
3457 "AND r8, r8, %[n]\n\t"
3458 "AND r9, r9, %[n]\n\t"
3459 "EOR r4, r4, r8\n\t"
3460 "EOR r5, r5, r8\n\t"
3461 "EOR r6, r6, r9\n\t"
3462 "EOR r7, r7, r9\n\t"
3463 "STM r11, {r4, r5, r6, r7}\n\t"
3464 /* Ladder step */
3465 "LDR r3, [sp, #184]\n\t"
3466 "LDR r2, [sp, #176]\n\t"
3467 "ADD r1, sp, #0x80\n\t"
3468 "LDR r0, [sp, #176]\n\t"
3469 "BL fe_add_sub_op\n\t"
3470 "LDR r3, [sp, #188]\n\t"
3471 "LDR r2, [sp, #180]\n\t"
3472 "ADD r1, sp, #0x60\n\t"
3473 "LDR r0, [sp, #184]\n\t"
3474 "BL fe_add_sub_op\n\t"
3475 "LDR r2, [sp, #176]\n\t"
3476 "ADD r1, sp, #0x60\n\t"
3477 "LDR r0, [sp, #188]\n\t"
3478 "BL fe_mul_op\n\t"
3479 "ADD r2, sp, #0x80\n\t"
3480 "LDR r1, [sp, #184]\n\t"
3481 "LDR r0, [sp, #184]\n\t"
3482 "BL fe_mul_op\n\t"
3483 "ADD r1, sp, #0x80\n\t"
3484 "ADD r0, sp, #0x60\n\t"
3485 "BL fe_sq_op\n\t"
3486 "LDR r1, [sp, #176]\n\t"
3487 "ADD r0, sp, #0x80\n\t"
3488 "BL fe_sq_op\n\t"
3489 "LDR r3, [sp, #184]\n\t"
3490 "LDR r2, [sp, #188]\n\t"
3491 "LDR r1, [sp, #184]\n\t"
3492 "LDR r0, [sp, #180]\n\t"
3493 "BL fe_add_sub_op\n\t"
3494 "ADD r2, sp, #0x60\n\t"
3495 "ADD r1, sp, #0x80\n\t"
3496 "LDR r0, [sp, #176]\n\t"
3497 "BL fe_mul_op\n\t"
3498 "ADD r2, sp, #0x60\n\t"
3499 "ADD r1, sp, #0x80\n\t"
3500 "ADD r0, sp, #0x80\n\t"
3501 "BL fe_sub_op\n\t"
3502 "LDR r1, [sp, #184]\n\t"
3503 "LDR r0, [sp, #184]\n\t"
3504 "BL fe_sq_op\n\t"
3505 "ADD r1, sp, #0x80\n\t"
3506 "LDR r0, [sp, #188]\n\t"
3507 "BL fe_mul121666\n\t"
3508 "LDR r1, [sp, #180]\n\t"
3509 "LDR r0, [sp, #180]\n\t"
3510 "BL fe_sq_op\n\t"
3511 "LDR r2, [sp, #188]\n\t"
3512 "ADD r1, sp, #0x60\n\t"
3513 "ADD r0, sp, #0x60\n\t"
3514 "BL fe_add_op\n\t"
3515 "LDR r2, [sp, #184]\n\t"
3516 "LDR r1, [sp, #172]\n\t"
3517 "LDR r0, [sp, #188]\n\t"
3518 "BL fe_mul_op\n\t"
3519 "ADD r2, sp, #0x60\n\t"
3520 "ADD r1, sp, #0x80\n\t"
3521 "LDR r0, [sp, #184]\n\t"
3522 "BL fe_mul_op\n\t"
3523 "LDR %[a], [sp, #168]\n\t"
3524 "SUBS %[a], %[a], #0x1\n\t"
3525#if defined(__GNUC__)
3526 "BGE L_curve25519_bits_%=\n\t"
3527#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3528 "BGE.N L_curve25519_bits\n\t"
3529#else
3530 "BGE.N L_curve25519_bits_%=\n\t"
3531#endif
3532 /* Cycle Count: 166 */
3533 "LDR %[n], [sp, #184]\n\t"
3534 /* Copy */
3535 "LDM r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
3536 "STM sp, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
3537 /* Invert */
3538 "ADD r1, sp, #0x0\n\t"
3539 "ADD r0, sp, #0x20\n\t"
3540 "BL fe_sq_op\n\t"
3541 "ADD r1, sp, #0x20\n\t"
3542 "ADD r0, sp, #0x40\n\t"
3543 "BL fe_sq_op\n\t"
3544 "ADD r1, sp, #0x40\n\t"
3545 "ADD r0, sp, #0x40\n\t"
3546 "BL fe_sq_op\n\t"
3547 "ADD r2, sp, #0x40\n\t"
3548 "ADD r1, sp, #0x0\n\t"
3549 "ADD r0, sp, #0x40\n\t"
3550 "BL fe_mul_op\n\t"
3551 "ADD r2, sp, #0x40\n\t"
3552 "ADD r1, sp, #0x20\n\t"
3553 "ADD r0, sp, #0x20\n\t"
3554 "BL fe_mul_op\n\t"
3555 "ADD r1, sp, #0x20\n\t"
3556 "ADD r0, sp, #0x60\n\t"
3557 "BL fe_sq_op\n\t"
3558 "ADD r2, sp, #0x60\n\t"
3559 "ADD r1, sp, #0x40\n\t"
3560 "ADD r0, sp, #0x40\n\t"
3561 "BL fe_mul_op\n\t"
3562 "ADD r1, sp, #0x40\n\t"
3563 "ADD r0, sp, #0x60\n\t"
3564 "BL fe_sq_op\n\t"
3565 "MOV r12, #0x4\n\t"
3566 "\n"
3567#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3568 "L_curve25519_inv_1:\n\t"
3569#else
3570 "L_curve25519_inv_1_%=:\n\t"
3571#endif
3572 "ADD r1, sp, #0x60\n\t"
3573 "ADD r0, sp, #0x60\n\t"
3574 "PUSH {r12}\n\t"
3575 "BL fe_sq_op\n\t"
3576 "POP {r12}\n\t"
3577 "SUBS r12, r12, #0x1\n\t"
3578#if defined(__GNUC__)
3579 "BNE L_curve25519_inv_1_%=\n\t"
3580#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3581 "BNE.N L_curve25519_inv_1\n\t"
3582#else
3583 "BNE.N L_curve25519_inv_1_%=\n\t"
3584#endif
3585 "ADD r2, sp, #0x40\n\t"
3586 "ADD r1, sp, #0x60\n\t"
3587 "ADD r0, sp, #0x40\n\t"
3588 "BL fe_mul_op\n\t"
3589 "ADD r1, sp, #0x40\n\t"
3590 "ADD r0, sp, #0x60\n\t"
3591 "BL fe_sq_op\n\t"
3592 "MOV r12, #0x9\n\t"
3593 "\n"
3594#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3595 "L_curve25519_inv_2:\n\t"
3596#else
3597 "L_curve25519_inv_2_%=:\n\t"
3598#endif
3599 "ADD r1, sp, #0x60\n\t"
3600 "ADD r0, sp, #0x60\n\t"
3601 "PUSH {r12}\n\t"
3602 "BL fe_sq_op\n\t"
3603 "POP {r12}\n\t"
3604 "SUBS r12, r12, #0x1\n\t"
3605#if defined(__GNUC__)
3606 "BNE L_curve25519_inv_2_%=\n\t"
3607#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3608 "BNE.N L_curve25519_inv_2\n\t"
3609#else
3610 "BNE.N L_curve25519_inv_2_%=\n\t"
3611#endif
3612 "ADD r2, sp, #0x40\n\t"
3613 "ADD r1, sp, #0x60\n\t"
3614 "ADD r0, sp, #0x60\n\t"
3615 "BL fe_mul_op\n\t"
3616 "ADD r1, sp, #0x60\n\t"
3617 "ADD r0, sp, #0x80\n\t"
3618 "BL fe_sq_op\n\t"
3619 "MOV r12, #0x13\n\t"
3620 "\n"
3621#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3622 "L_curve25519_inv_3:\n\t"
3623#else
3624 "L_curve25519_inv_3_%=:\n\t"
3625#endif
3626 "ADD r1, sp, #0x80\n\t"
3627 "ADD r0, sp, #0x80\n\t"
3628 "PUSH {r12}\n\t"
3629 "BL fe_sq_op\n\t"
3630 "POP {r12}\n\t"
3631 "SUBS r12, r12, #0x1\n\t"
3632#if defined(__GNUC__)
3633 "BNE L_curve25519_inv_3_%=\n\t"
3634#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3635 "BNE.N L_curve25519_inv_3\n\t"
3636#else
3637 "BNE.N L_curve25519_inv_3_%=\n\t"
3638#endif
3639 "ADD r2, sp, #0x60\n\t"
3640 "ADD r1, sp, #0x80\n\t"
3641 "ADD r0, sp, #0x60\n\t"
3642 "BL fe_mul_op\n\t"
3643 "MOV r12, #0xa\n\t"
3644 "\n"
3645#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3646 "L_curve25519_inv_4:\n\t"
3647#else
3648 "L_curve25519_inv_4_%=:\n\t"
3649#endif
3650 "ADD r1, sp, #0x60\n\t"
3651 "ADD r0, sp, #0x60\n\t"
3652 "PUSH {r12}\n\t"
3653 "BL fe_sq_op\n\t"
3654 "POP {r12}\n\t"
3655 "SUBS r12, r12, #0x1\n\t"
3656#if defined(__GNUC__)
3657 "BNE L_curve25519_inv_4_%=\n\t"
3658#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3659 "BNE.N L_curve25519_inv_4\n\t"
3660#else
3661 "BNE.N L_curve25519_inv_4_%=\n\t"
3662#endif
3663 "ADD r2, sp, #0x40\n\t"
3664 "ADD r1, sp, #0x60\n\t"
3665 "ADD r0, sp, #0x40\n\t"
3666 "BL fe_mul_op\n\t"
3667 "ADD r1, sp, #0x40\n\t"
3668 "ADD r0, sp, #0x60\n\t"
3669 "BL fe_sq_op\n\t"
3670 "MOV r12, #0x31\n\t"
3671 "\n"
3672#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3673 "L_curve25519_inv_5:\n\t"
3674#else
3675 "L_curve25519_inv_5_%=:\n\t"
3676#endif
3677 "ADD r1, sp, #0x60\n\t"
3678 "ADD r0, sp, #0x60\n\t"
3679 "PUSH {r12}\n\t"
3680 "BL fe_sq_op\n\t"
3681 "POP {r12}\n\t"
3682 "SUBS r12, r12, #0x1\n\t"
3683#if defined(__GNUC__)
3684 "BNE L_curve25519_inv_5_%=\n\t"
3685#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3686 "BNE.N L_curve25519_inv_5\n\t"
3687#else
3688 "BNE.N L_curve25519_inv_5_%=\n\t"
3689#endif
3690 "ADD r2, sp, #0x40\n\t"
3691 "ADD r1, sp, #0x60\n\t"
3692 "ADD r0, sp, #0x60\n\t"
3693 "BL fe_mul_op\n\t"
3694 "ADD r1, sp, #0x60\n\t"
3695 "ADD r0, sp, #0x80\n\t"
3696 "BL fe_sq_op\n\t"
3697 "MOV r12, #0x63\n\t"
3698 "\n"
3699#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3700 "L_curve25519_inv_6:\n\t"
3701#else
3702 "L_curve25519_inv_6_%=:\n\t"
3703#endif
3704 "ADD r1, sp, #0x80\n\t"
3705 "ADD r0, sp, #0x80\n\t"
3706 "PUSH {r12}\n\t"
3707 "BL fe_sq_op\n\t"
3708 "POP {r12}\n\t"
3709 "SUBS r12, r12, #0x1\n\t"
3710#if defined(__GNUC__)
3711 "BNE L_curve25519_inv_6_%=\n\t"
3712#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3713 "BNE.N L_curve25519_inv_6\n\t"
3714#else
3715 "BNE.N L_curve25519_inv_6_%=\n\t"
3716#endif
3717 "ADD r2, sp, #0x60\n\t"
3718 "ADD r1, sp, #0x80\n\t"
3719 "ADD r0, sp, #0x60\n\t"
3720 "BL fe_mul_op\n\t"
3721 "MOV r12, #0x32\n\t"
3722 "\n"
3723#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3724 "L_curve25519_inv_7:\n\t"
3725#else
3726 "L_curve25519_inv_7_%=:\n\t"
3727#endif
3728 "ADD r1, sp, #0x60\n\t"
3729 "ADD r0, sp, #0x60\n\t"
3730 "PUSH {r12}\n\t"
3731 "BL fe_sq_op\n\t"
3732 "POP {r12}\n\t"
3733 "SUBS r12, r12, #0x1\n\t"
3734#if defined(__GNUC__)
3735 "BNE L_curve25519_inv_7_%=\n\t"
3736#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3737 "BNE.N L_curve25519_inv_7\n\t"
3738#else
3739 "BNE.N L_curve25519_inv_7_%=\n\t"
3740#endif
3741 "ADD r2, sp, #0x40\n\t"
3742 "ADD r1, sp, #0x60\n\t"
3743 "ADD r0, sp, #0x40\n\t"
3744 "BL fe_mul_op\n\t"
3745 "MOV r12, #0x5\n\t"
3746 "\n"
3747#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3748 "L_curve25519_inv_8:\n\t"
3749#else
3750 "L_curve25519_inv_8_%=:\n\t"
3751#endif
3752 "ADD r1, sp, #0x40\n\t"
3753 "ADD r0, sp, #0x40\n\t"
3754 "PUSH {r12}\n\t"
3755 "BL fe_sq_op\n\t"
3756 "POP {r12}\n\t"
3757 "SUBS r12, r12, #0x1\n\t"
3758#if defined(__GNUC__)
3759 "BNE L_curve25519_inv_8_%=\n\t"
3760#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3761 "BNE.N L_curve25519_inv_8\n\t"
3762#else
3763 "BNE.N L_curve25519_inv_8_%=\n\t"
3764#endif
3765 "ADD r2, sp, #0x20\n\t"
3766 "ADD r1, sp, #0x40\n\t"
3767 "ADD r0, sp, #0x0\n\t"
3768 "BL fe_mul_op\n\t"
3769 "LDR r2, [sp, #184]\n\t"
3770 "LDR r1, [sp, #176]\n\t"
3771 "LDR r0, [sp, #176]\n\t"
3772 "BL fe_mul_op\n\t"
3773 /* Ensure result is less than modulus */
3774 "LDR %[r], [sp, #176]\n\t"
3775 "LDM %[r], {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
3776 "MOV %[a], #0x13\n\t"
3777 "AND %[a], %[a], r11, ASR #31\n\t"
3778 "ADDS r4, r4, %[a]\n\t"
3779 "ADCS r5, r5, #0x0\n\t"
3780 "ADCS r6, r6, #0x0\n\t"
3781 "ADCS r7, r7, #0x0\n\t"
3782 "ADCS r8, r8, #0x0\n\t"
3783 "ADCS r9, r9, #0x0\n\t"
3784 "BFC r11, #31, #1\n\t"
3785 "ADCS r10, r10, #0x0\n\t"
3786 "ADC r11, r11, #0x0\n\t"
3787 "STM %[r], {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
3788 "MOV r0, #0x0\n\t"
3789 "ADD sp, sp, #0xc0\n\t"
3790#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
3791 : [r] "+r" (r), [n] "+r" (n), [a] "+r" (a)
3792 :
3793#else
3794 :
3795 : [r] "r" (r), [n] "r" (n), [a] "r" (a)
3796#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
3797 : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11",
3798 "r3", "r12", "lr"
3799 );
3800 return (word32)(size_t)r;
3801}
3802
3803#endif /* WC_NO_CACHE_RESISTANT */
3804#endif /* HAVE_CURVE25519 */
3805#if defined(HAVE_ED25519) || defined(WOLFSSL_CURVE25519_USE_ED25519)
3806#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
3807WC_OMIT_FRAME_POINTER void fe_invert(fe r_p, const fe a_p)
3808#else
3809WC_OMIT_FRAME_POINTER void fe_invert(fe r, const fe a)
3810#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
3811{
3812#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
3813 register sword32* r __asm__ ("r0") = (sword32*)r_p;
3814 register const sword32* a __asm__ ("r1") = (const sword32*)a_p;
3815#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
3816
3817 __asm__ __volatile__ (
3818 "SUB sp, sp, #0x88\n\t"
3819 /* Invert */
3820 "STR %[r], [sp, #128]\n\t"
3821 "STR %[a], [sp, #132]\n\t"
3822 "LDR r1, [sp, #132]\n\t"
3823 "MOV r0, sp\n\t"
3824 "BL fe_sq_op\n\t"
3825 "MOV r1, sp\n\t"
3826 "ADD r0, sp, #0x20\n\t"
3827 "BL fe_sq_op\n\t"
3828 "ADD r1, sp, #0x20\n\t"
3829 "ADD r0, sp, #0x20\n\t"
3830 "BL fe_sq_op\n\t"
3831 "ADD r2, sp, #0x20\n\t"
3832 "LDR r1, [sp, #132]\n\t"
3833 "ADD r0, sp, #0x20\n\t"
3834 "BL fe_mul_op\n\t"
3835 "ADD r2, sp, #0x20\n\t"
3836 "MOV r1, sp\n\t"
3837 "MOV r0, sp\n\t"
3838 "BL fe_mul_op\n\t"
3839 "MOV r1, sp\n\t"
3840 "ADD r0, sp, #0x40\n\t"
3841 "BL fe_sq_op\n\t"
3842 "ADD r2, sp, #0x40\n\t"
3843 "ADD r1, sp, #0x20\n\t"
3844 "ADD r0, sp, #0x20\n\t"
3845 "BL fe_mul_op\n\t"
3846 "ADD r1, sp, #0x20\n\t"
3847 "ADD r0, sp, #0x40\n\t"
3848 "BL fe_sq_op\n\t"
3849 "MOV r12, #0x4\n\t"
3850 "\n"
3851#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3852 "L_fe_invert1:\n\t"
3853#else
3854 "L_fe_invert1_%=:\n\t"
3855#endif
3856 "ADD r1, sp, #0x40\n\t"
3857 "ADD r0, sp, #0x40\n\t"
3858 "PUSH {r12}\n\t"
3859 "BL fe_sq_op\n\t"
3860 "POP {r12}\n\t"
3861 "SUBS r12, r12, #0x1\n\t"
3862#if defined(__GNUC__)
3863 "BNE L_fe_invert1_%=\n\t"
3864#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3865 "BNE.N L_fe_invert1\n\t"
3866#else
3867 "BNE.N L_fe_invert1_%=\n\t"
3868#endif
3869 "ADD r2, sp, #0x20\n\t"
3870 "ADD r1, sp, #0x40\n\t"
3871 "ADD r0, sp, #0x20\n\t"
3872 "BL fe_mul_op\n\t"
3873 "ADD r1, sp, #0x20\n\t"
3874 "ADD r0, sp, #0x40\n\t"
3875 "BL fe_sq_op\n\t"
3876 "MOV r12, #0x9\n\t"
3877 "\n"
3878#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3879 "L_fe_invert2:\n\t"
3880#else
3881 "L_fe_invert2_%=:\n\t"
3882#endif
3883 "ADD r1, sp, #0x40\n\t"
3884 "ADD r0, sp, #0x40\n\t"
3885 "PUSH {r12}\n\t"
3886 "BL fe_sq_op\n\t"
3887 "POP {r12}\n\t"
3888 "SUBS r12, r12, #0x1\n\t"
3889#if defined(__GNUC__)
3890 "BNE L_fe_invert2_%=\n\t"
3891#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3892 "BNE.N L_fe_invert2\n\t"
3893#else
3894 "BNE.N L_fe_invert2_%=\n\t"
3895#endif
3896 "ADD r2, sp, #0x20\n\t"
3897 "ADD r1, sp, #0x40\n\t"
3898 "ADD r0, sp, #0x40\n\t"
3899 "BL fe_mul_op\n\t"
3900 "ADD r1, sp, #0x40\n\t"
3901 "ADD r0, sp, #0x60\n\t"
3902 "BL fe_sq_op\n\t"
3903 "MOV r12, #0x13\n\t"
3904 "\n"
3905#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3906 "L_fe_invert3:\n\t"
3907#else
3908 "L_fe_invert3_%=:\n\t"
3909#endif
3910 "ADD r1, sp, #0x60\n\t"
3911 "ADD r0, sp, #0x60\n\t"
3912 "PUSH {r12}\n\t"
3913 "BL fe_sq_op\n\t"
3914 "POP {r12}\n\t"
3915 "SUBS r12, r12, #0x1\n\t"
3916#if defined(__GNUC__)
3917 "BNE L_fe_invert3_%=\n\t"
3918#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3919 "BNE.N L_fe_invert3\n\t"
3920#else
3921 "BNE.N L_fe_invert3_%=\n\t"
3922#endif
3923 "ADD r2, sp, #0x40\n\t"
3924 "ADD r1, sp, #0x60\n\t"
3925 "ADD r0, sp, #0x40\n\t"
3926 "BL fe_mul_op\n\t"
3927 "MOV r12, #0xa\n\t"
3928 "\n"
3929#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3930 "L_fe_invert4:\n\t"
3931#else
3932 "L_fe_invert4_%=:\n\t"
3933#endif
3934 "ADD r1, sp, #0x40\n\t"
3935 "ADD r0, sp, #0x40\n\t"
3936 "PUSH {r12}\n\t"
3937 "BL fe_sq_op\n\t"
3938 "POP {r12}\n\t"
3939 "SUBS r12, r12, #0x1\n\t"
3940#if defined(__GNUC__)
3941 "BNE L_fe_invert4_%=\n\t"
3942#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3943 "BNE.N L_fe_invert4\n\t"
3944#else
3945 "BNE.N L_fe_invert4_%=\n\t"
3946#endif
3947 "ADD r2, sp, #0x20\n\t"
3948 "ADD r1, sp, #0x40\n\t"
3949 "ADD r0, sp, #0x20\n\t"
3950 "BL fe_mul_op\n\t"
3951 "ADD r1, sp, #0x20\n\t"
3952 "ADD r0, sp, #0x40\n\t"
3953 "BL fe_sq_op\n\t"
3954 "MOV r12, #0x31\n\t"
3955 "\n"
3956#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3957 "L_fe_invert5:\n\t"
3958#else
3959 "L_fe_invert5_%=:\n\t"
3960#endif
3961 "ADD r1, sp, #0x40\n\t"
3962 "ADD r0, sp, #0x40\n\t"
3963 "PUSH {r12}\n\t"
3964 "BL fe_sq_op\n\t"
3965 "POP {r12}\n\t"
3966 "SUBS r12, r12, #0x1\n\t"
3967#if defined(__GNUC__)
3968 "BNE L_fe_invert5_%=\n\t"
3969#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3970 "BNE.N L_fe_invert5\n\t"
3971#else
3972 "BNE.N L_fe_invert5_%=\n\t"
3973#endif
3974 "ADD r2, sp, #0x20\n\t"
3975 "ADD r1, sp, #0x40\n\t"
3976 "ADD r0, sp, #0x40\n\t"
3977 "BL fe_mul_op\n\t"
3978 "ADD r1, sp, #0x40\n\t"
3979 "ADD r0, sp, #0x60\n\t"
3980 "BL fe_sq_op\n\t"
3981 "MOV r12, #0x63\n\t"
3982 "\n"
3983#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3984 "L_fe_invert6:\n\t"
3985#else
3986 "L_fe_invert6_%=:\n\t"
3987#endif
3988 "ADD r1, sp, #0x60\n\t"
3989 "ADD r0, sp, #0x60\n\t"
3990 "PUSH {r12}\n\t"
3991 "BL fe_sq_op\n\t"
3992 "POP {r12}\n\t"
3993 "SUBS r12, r12, #0x1\n\t"
3994#if defined(__GNUC__)
3995 "BNE L_fe_invert6_%=\n\t"
3996#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
3997 "BNE.N L_fe_invert6\n\t"
3998#else
3999 "BNE.N L_fe_invert6_%=\n\t"
4000#endif
4001 "ADD r2, sp, #0x40\n\t"
4002 "ADD r1, sp, #0x60\n\t"
4003 "ADD r0, sp, #0x40\n\t"
4004 "BL fe_mul_op\n\t"
4005 "MOV r12, #0x32\n\t"
4006 "\n"
4007#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4008 "L_fe_invert7:\n\t"
4009#else
4010 "L_fe_invert7_%=:\n\t"
4011#endif
4012 "ADD r1, sp, #0x40\n\t"
4013 "ADD r0, sp, #0x40\n\t"
4014 "PUSH {r12}\n\t"
4015 "BL fe_sq_op\n\t"
4016 "POP {r12}\n\t"
4017 "SUBS r12, r12, #0x1\n\t"
4018#if defined(__GNUC__)
4019 "BNE L_fe_invert7_%=\n\t"
4020#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4021 "BNE.N L_fe_invert7\n\t"
4022#else
4023 "BNE.N L_fe_invert7_%=\n\t"
4024#endif
4025 "ADD r2, sp, #0x20\n\t"
4026 "ADD r1, sp, #0x40\n\t"
4027 "ADD r0, sp, #0x20\n\t"
4028 "BL fe_mul_op\n\t"
4029 "MOV r12, #0x5\n\t"
4030 "\n"
4031#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4032 "L_fe_invert8:\n\t"
4033#else
4034 "L_fe_invert8_%=:\n\t"
4035#endif
4036 "ADD r1, sp, #0x20\n\t"
4037 "ADD r0, sp, #0x20\n\t"
4038 "PUSH {r12}\n\t"
4039 "BL fe_sq_op\n\t"
4040 "POP {r12}\n\t"
4041 "SUBS r12, r12, #0x1\n\t"
4042#if defined(__GNUC__)
4043 "BNE L_fe_invert8_%=\n\t"
4044#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4045 "BNE.N L_fe_invert8\n\t"
4046#else
4047 "BNE.N L_fe_invert8_%=\n\t"
4048#endif
4049 "MOV r2, sp\n\t"
4050 "ADD r1, sp, #0x20\n\t"
4051 "LDR r0, [sp, #128]\n\t"
4052 "BL fe_mul_op\n\t"
4053 "LDR %[a], [sp, #132]\n\t"
4054 "LDR %[r], [sp, #128]\n\t"
4055 "ADD sp, sp, #0x88\n\t"
4056#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4057 : [r] "+r" (r), [a] "+r" (a)
4058 :
4059#else
4060 :
4061 : [r] "r" (r), [a] "r" (a)
4062#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4063 : "memory", "cc", "lr", "r12", "r2", "r3", "r4", "r5", "r6", "r7", "r8",
4064 "r9", "r10", "r11"
4065 );
4066}
4067
4068#ifdef WOLFSSL_ARM_ARCH_7M
4069#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4070WC_OMIT_FRAME_POINTER void fe_sq2(fe r_p, const fe a_p)
4071#else
4072WC_OMIT_FRAME_POINTER void fe_sq2(fe r, const fe a)
4073#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4074{
4075#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4076 register sword32* r __asm__ ("r0") = (sword32*)r_p;
4077 register const sword32* a __asm__ ("r1") = (const sword32*)a_p;
4078#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4079
4080 __asm__ __volatile__ (
4081 "SUB sp, sp, #0x44\n\t"
4082 "STR r0, [sp, #64]\n\t"
4083 /* Square * 2 */
4084 "MOV r0, #0x0\n\t"
4085 "LDR r12, [r1]\n\t"
4086 /* A[0] * A[1] */
4087 "LDR lr, [r1, #4]\n\t"
4088 "UMULL r4, r5, r12, lr\n\t"
4089 /* A[0] * A[3] */
4090 "LDR lr, [r1, #12]\n\t"
4091 "UMULL r6, r7, r12, lr\n\t"
4092 /* A[0] * A[5] */
4093 "LDR lr, [r1, #20]\n\t"
4094 "UMULL r8, r9, r12, lr\n\t"
4095 /* A[0] * A[7] */
4096 "LDR lr, [r1, #28]\n\t"
4097 "UMULL r10, r3, r12, lr\n\t"
4098 /* A[0] * A[2] */
4099 "LDR lr, [r1, #8]\n\t"
4100 "MOV r11, #0x0\n\t"
4101 "UMLAL r5, r11, r12, lr\n\t"
4102 "ADDS r6, r6, r11\n\t"
4103 /* A[0] * A[4] */
4104 "LDR lr, [r1, #16]\n\t"
4105 "ADCS r7, r7, #0x0\n\t"
4106 "ADC r11, r0, #0x0\n\t"
4107 "UMLAL r7, r11, r12, lr\n\t"
4108 "ADDS r8, r8, r11\n\t"
4109 /* A[0] * A[6] */
4110 "LDR lr, [r1, #24]\n\t"
4111 "ADCS r9, r9, #0x0\n\t"
4112 "ADC r11, r0, #0x0\n\t"
4113 "UMLAL r9, r11, r12, lr\n\t"
4114 "ADDS r10, r10, r11\n\t"
4115 "ADCS r3, r3, #0x0\n\t"
4116 "STR r4, [sp, #4]\n\t"
4117 "STR r5, [sp, #8]\n\t"
4118 /* A[1] * A[2] */
4119 "LDR r12, [r1, #4]\n\t"
4120 "LDR lr, [r1, #8]\n\t"
4121 "MOV r11, #0x0\n\t"
4122 "UMLAL r6, r11, r12, lr\n\t"
4123 "STR r6, [sp, #12]\n\t"
4124 "ADDS r7, r7, r11\n\t"
4125 /* A[1] * A[3] */
4126 "LDR lr, [r1, #12]\n\t"
4127 "ADC r11, r0, #0x0\n\t"
4128 "UMLAL r7, r11, r12, lr\n\t"
4129 "STR r7, [sp, #16]\n\t"
4130 "ADDS r8, r8, r11\n\t"
4131 /* A[1] * A[4] */
4132 "LDR lr, [r1, #16]\n\t"
4133 "ADC r11, r0, #0x0\n\t"
4134 "UMLAL r8, r11, r12, lr\n\t"
4135 "ADDS r9, r9, r11\n\t"
4136 /* A[1] * A[5] */
4137 "LDR lr, [r1, #20]\n\t"
4138 "ADC r11, r0, #0x0\n\t"
4139 "UMLAL r9, r11, r12, lr\n\t"
4140 "ADDS r10, r10, r11\n\t"
4141 /* A[1] * A[6] */
4142 "LDR lr, [r1, #24]\n\t"
4143 "ADC r11, r0, #0x0\n\t"
4144 "UMLAL r10, r11, r12, lr\n\t"
4145 "ADDS r3, r3, r11\n\t"
4146 /* A[1] * A[7] */
4147 "LDR lr, [r1, #28]\n\t"
4148 "ADC r4, r0, #0x0\n\t"
4149 "UMLAL r3, r4, r12, lr\n\t"
4150 /* A[2] * A[3] */
4151 "LDR r12, [r1, #8]\n\t"
4152 "LDR lr, [r1, #12]\n\t"
4153 "MOV r11, #0x0\n\t"
4154 "UMLAL r8, r11, r12, lr\n\t"
4155 "STR r8, [sp, #20]\n\t"
4156 "ADDS r9, r9, r11\n\t"
4157 /* A[2] * A[4] */
4158 "LDR lr, [r1, #16]\n\t"
4159 "ADC r11, r0, #0x0\n\t"
4160 "UMLAL r9, r11, r12, lr\n\t"
4161 "STR r9, [sp, #24]\n\t"
4162 "ADDS r10, r10, r11\n\t"
4163 /* A[2] * A[5] */
4164 "LDR lr, [r1, #20]\n\t"
4165 "ADC r11, r0, #0x0\n\t"
4166 "UMLAL r10, r11, r12, lr\n\t"
4167 "ADDS r3, r3, r11\n\t"
4168 /* A[2] * A[6] */
4169 "LDR lr, [r1, #24]\n\t"
4170 "ADC r11, r0, #0x0\n\t"
4171 "UMLAL r3, r11, r12, lr\n\t"
4172 "ADDS r4, r4, r11\n\t"
4173 /* A[2] * A[7] */
4174 "LDR lr, [r1, #28]\n\t"
4175 "ADC r5, r0, #0x0\n\t"
4176 "UMLAL r4, r5, r12, lr\n\t"
4177 /* A[3] * A[4] */
4178 "LDR r12, [r1, #12]\n\t"
4179 "LDR lr, [r1, #16]\n\t"
4180 "MOV r11, #0x0\n\t"
4181 "UMLAL r10, r11, r12, lr\n\t"
4182 "STR r10, [sp, #28]\n\t"
4183 "ADDS r3, r3, r11\n\t"
4184 /* A[3] * A[5] */
4185 "LDR lr, [r1, #20]\n\t"
4186 "ADC r11, r0, #0x0\n\t"
4187 "UMLAL r3, r11, r12, lr\n\t"
4188 "ADDS r4, r4, r11\n\t"
4189 /* A[3] * A[6] */
4190 "LDR lr, [r1, #24]\n\t"
4191 "ADC r11, r0, #0x0\n\t"
4192 "UMLAL r4, r11, r12, lr\n\t"
4193 "ADDS r5, r5, r11\n\t"
4194 /* A[3] * A[7] */
4195 "LDR lr, [r1, #28]\n\t"
4196 "ADC r6, r0, #0x0\n\t"
4197 "UMLAL r5, r6, r12, lr\n\t"
4198 /* A[4] * A[5] */
4199 "LDR r12, [r1, #16]\n\t"
4200 "LDR lr, [r1, #20]\n\t"
4201 "MOV r11, #0x0\n\t"
4202 "UMLAL r4, r11, r12, lr\n\t"
4203 "ADDS r5, r5, r11\n\t"
4204 /* A[4] * A[6] */
4205 "LDR lr, [r1, #24]\n\t"
4206 "ADC r11, r0, #0x0\n\t"
4207 "UMLAL r5, r11, r12, lr\n\t"
4208 "ADDS r6, r6, r11\n\t"
4209 /* A[4] * A[7] */
4210 "LDR lr, [r1, #28]\n\t"
4211 "ADC r7, r0, #0x0\n\t"
4212 "UMLAL r6, r7, r12, lr\n\t"
4213 /* A[5] * A[6] */
4214 "LDR r12, [r1, #20]\n\t"
4215 "LDR lr, [r1, #24]\n\t"
4216 "MOV r11, #0x0\n\t"
4217 "UMLAL r6, r11, r12, lr\n\t"
4218 "ADDS r7, r7, r11\n\t"
4219 /* A[5] * A[7] */
4220 "LDR lr, [r1, #28]\n\t"
4221 "ADC r8, r0, #0x0\n\t"
4222 "UMLAL r7, r8, r12, lr\n\t"
4223 /* A[6] * A[7] */
4224 "LDR r12, [r1, #24]\n\t"
4225 "LDR lr, [r1, #28]\n\t"
4226 "MOV r9, #0x0\n\t"
4227 "UMLAL r8, r9, r12, lr\n\t"
4228 "ADD lr, sp, #0x20\n\t"
4229 "STM lr, {r3, r4, r5, r6, r7, r8, r9}\n\t"
4230 "ADD lr, sp, #0x4\n\t"
4231 "LDM lr, {r4, r5, r6, r7, r8, r9, r10}\n\t"
4232 "ADDS r4, r4, r4\n\t"
4233 "ADCS r5, r5, r5\n\t"
4234 "ADCS r6, r6, r6\n\t"
4235 "ADCS r7, r7, r7\n\t"
4236 "ADCS r8, r8, r8\n\t"
4237 "ADCS r9, r9, r9\n\t"
4238 "ADCS r10, r10, r10\n\t"
4239 "STM lr!, {r4, r5, r6, r7, r8, r9, r10}\n\t"
4240 "LDM lr, {r3, r4, r5, r6, r7, r8, r9}\n\t"
4241 "ADCS r3, r3, r3\n\t"
4242 "ADCS r4, r4, r4\n\t"
4243 "ADCS r5, r5, r5\n\t"
4244 "ADCS r6, r6, r6\n\t"
4245 "ADCS r7, r7, r7\n\t"
4246 "ADCS r8, r8, r8\n\t"
4247 "ADCS r9, r9, r9\n\t"
4248 "ADC r10, r0, #0x0\n\t"
4249 "STM lr, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t"
4250 "ADD lr, sp, #0x4\n\t"
4251 "LDM lr, {r4, r5, r6, r7, r8, r9, r10}\n\t"
4252 "MOV lr, sp\n\t"
4253 /* A[0] * A[0] */
4254 "LDR r12, [r1]\n\t"
4255 "UMULL r3, r11, r12, r12\n\t"
4256 "ADDS r4, r4, r11\n\t"
4257 /* A[1] * A[1] */
4258 "LDR r12, [r1, #4]\n\t"
4259 "ADCS r5, r5, #0x0\n\t"
4260 "ADC r11, r0, #0x0\n\t"
4261 "UMLAL r5, r11, r12, r12\n\t"
4262 "ADDS r6, r6, r11\n\t"
4263 /* A[2] * A[2] */
4264 "LDR r12, [r1, #8]\n\t"
4265 "ADCS r7, r7, #0x0\n\t"
4266 "ADC r11, r0, #0x0\n\t"
4267 "UMLAL r7, r11, r12, r12\n\t"
4268 "ADDS r8, r8, r11\n\t"
4269 /* A[3] * A[3] */
4270 "LDR r12, [r1, #12]\n\t"
4271 "ADCS r9, r9, #0x0\n\t"
4272 "ADC r11, r0, #0x0\n\t"
4273 "UMLAL r9, r11, r12, r12\n\t"
4274 "ADDS r10, r10, r11\n\t"
4275 "STM lr!, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t"
4276 "LDM lr, {r3, r4, r5, r6, r7, r8, r9, r10}\n\t"
4277 /* A[4] * A[4] */
4278 "LDR r12, [r1, #16]\n\t"
4279 "ADCS r3, r3, #0x0\n\t"
4280 "ADC r11, r0, #0x0\n\t"
4281 "UMLAL r3, r11, r12, r12\n\t"
4282 "ADDS r4, r4, r11\n\t"
4283 /* A[5] * A[5] */
4284 "LDR r12, [r1, #20]\n\t"
4285 "ADCS r5, r5, #0x0\n\t"
4286 "ADC r11, r0, #0x0\n\t"
4287 "UMLAL r5, r11, r12, r12\n\t"
4288 "ADDS r6, r6, r11\n\t"
4289 /* A[6] * A[6] */
4290 "LDR r12, [r1, #24]\n\t"
4291 "ADCS r7, r7, #0x0\n\t"
4292 "ADC r11, r0, #0x0\n\t"
4293 "UMLAL r7, r11, r12, r12\n\t"
4294 "ADDS r8, r8, r11\n\t"
4295 /* A[7] * A[7] */
4296 "LDR r12, [r1, #28]\n\t"
4297 "ADCS r9, r9, #0x0\n\t"
4298 "ADC r10, r10, #0x0\n\t"
4299 "UMLAL r9, r10, r12, r12\n\t"
4300 /* Reduce */
4301 "LDR r2, [sp, #28]\n\t"
4302 "MOV lr, sp\n\t"
4303 "MOV r12, #0x26\n\t"
4304 "UMULL r10, r11, r10, r12\n\t"
4305 "ADDS r10, r10, r2\n\t"
4306 "ADC r11, r11, #0x0\n\t"
4307 "MOV r12, #0x13\n\t"
4308 "LSL r11, r11, #1\n\t"
4309 "ORR r11, r11, r10, LSR #31\n\t"
4310 "MUL r11, r11, r12\n\t"
4311 "LDM lr!, {r1, r2}\n\t"
4312 "MOV r12, #0x26\n\t"
4313 "ADDS r1, r1, r11\n\t"
4314 "ADC r11, r0, #0x0\n\t"
4315 "UMLAL r1, r11, r3, r12\n\t"
4316 "ADDS r2, r2, r11\n\t"
4317 "ADC r11, r0, #0x0\n\t"
4318 "UMLAL r2, r11, r4, r12\n\t"
4319 "LDM lr!, {r3, r4}\n\t"
4320 "ADDS r3, r3, r11\n\t"
4321 "ADC r11, r0, #0x0\n\t"
4322 "UMLAL r3, r11, r5, r12\n\t"
4323 "ADDS r4, r4, r11\n\t"
4324 "ADC r11, r0, #0x0\n\t"
4325 "UMLAL r4, r11, r6, r12\n\t"
4326 "LDM lr!, {r5, r6}\n\t"
4327 "ADDS r5, r5, r11\n\t"
4328 "ADC r11, r0, #0x0\n\t"
4329 "UMLAL r5, r11, r7, r12\n\t"
4330 "ADDS r6, r6, r11\n\t"
4331 "ADC r11, r0, #0x0\n\t"
4332 "UMLAL r6, r11, r8, r12\n\t"
4333 "LDM lr!, {r7, r8}\n\t"
4334 "ADDS r7, r7, r11\n\t"
4335 "ADC r11, r0, #0x0\n\t"
4336 "UMLAL r7, r11, r9, r12\n\t"
4337 "BFC r10, #31, #1\n\t"
4338 "ADDS r8, r10, r11\n\t"
4339 /* Reduce if top bit set */
4340 "MOV r12, #0x13\n\t"
4341 "AND r11, r12, r8, ASR #31\n\t"
4342 "ADDS r1, r1, r11\n\t"
4343 "ADCS r2, r2, #0x0\n\t"
4344 "ADCS r3, r3, #0x0\n\t"
4345 "ADCS r4, r4, #0x0\n\t"
4346 "ADCS r5, r5, #0x0\n\t"
4347 "ADCS r6, r6, #0x0\n\t"
4348 "BFC r8, #31, #1\n\t"
4349 "ADCS r7, r7, #0x0\n\t"
4350 "ADC r8, r8, #0x0\n\t"
4351 /* Double */
4352 "ADDS r1, r1, r1\n\t"
4353 "ADCS r2, r2, r2\n\t"
4354 "ADCS r3, r3, r3\n\t"
4355 "ADCS r4, r4, r4\n\t"
4356 "ADCS r5, r5, r5\n\t"
4357 "ADCS r6, r6, r6\n\t"
4358 "ADCS r7, r7, r7\n\t"
4359 "ADC r8, r8, r8\n\t"
4360 /* Reduce if top bit set */
4361 "MOV r12, #0x13\n\t"
4362 "AND r11, r12, r8, ASR #31\n\t"
4363 "ADDS r1, r1, r11\n\t"
4364 "ADCS r2, r2, #0x0\n\t"
4365 "ADCS r3, r3, #0x0\n\t"
4366 "ADCS r4, r4, #0x0\n\t"
4367 "ADCS r5, r5, #0x0\n\t"
4368 "ADCS r6, r6, #0x0\n\t"
4369 "BFC r8, #31, #1\n\t"
4370 "ADCS r7, r7, #0x0\n\t"
4371 "ADC r8, r8, #0x0\n\t"
4372 /* Store */
4373 "LDR r0, [sp, #64]\n\t"
4374 "STM r0, {r1, r2, r3, r4, r5, r6, r7, r8}\n\t"
4375 "ADD sp, sp, #0x44\n\t"
4376#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4377 : [r] "+r" (r), [a] "+r" (a)
4378 :
4379#else
4380 :
4381 : [r] "r" (r), [a] "r" (a)
4382#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4383 : "memory", "cc", "lr"
4384 );
4385}
4386
4387#else
4388#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4389WC_OMIT_FRAME_POINTER void fe_sq2(fe r_p, const fe a_p)
4390#else
4391WC_OMIT_FRAME_POINTER void fe_sq2(fe r, const fe a)
4392#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4393{
4394#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4395 register sword32* r __asm__ ("r0") = (sword32*)r_p;
4396 register const sword32* a __asm__ ("r1") = (const sword32*)a_p;
4397#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4398
4399 __asm__ __volatile__ (
4400 "SUB sp, sp, #0x24\n\t"
4401 "STRD r0, r1, [sp, #28]\n\t"
4402 "LDM r1, {r0, r1, r2, r3, r4, r5, r6, r7}\n\t"
4403 /* Square * 2 */
4404 "UMULL r9, r10, r0, r0\n\t"
4405 "UMULL r11, r12, r0, r1\n\t"
4406 "ADDS r11, r11, r11\n\t"
4407 "MOV lr, #0x0\n\t"
4408 "UMAAL r10, r11, lr, lr\n\t"
4409 "STM sp, {r9, r10}\n\t"
4410 "MOV r8, lr\n\t"
4411 "UMAAL r8, r12, r0, r2\n\t"
4412 "ADCS r8, r8, r8\n\t"
4413 "UMAAL r8, r11, r1, r1\n\t"
4414 "UMULL r9, r10, r0, r3\n\t"
4415 "UMAAL r9, r12, r1, r2\n\t"
4416 "ADCS r9, r9, r9\n\t"
4417 "UMAAL r9, r11, lr, lr\n\t"
4418 "STRD r8, r9, [sp, #8]\n\t"
4419 "MOV r9, lr\n\t"
4420 "UMAAL r9, r10, r0, r4\n\t"
4421 "UMAAL r9, r12, r1, r3\n\t"
4422 "ADCS r9, r9, r9\n\t"
4423 "UMAAL r9, r11, r2, r2\n\t"
4424 "STR r9, [sp, #16]\n\t"
4425 "UMULL r9, r8, r0, r5\n\t"
4426 "UMAAL r9, r12, r1, r4\n\t"
4427 "UMAAL r9, r10, r2, r3\n\t"
4428 "ADCS r9, r9, r9\n\t"
4429 "UMAAL r9, r11, lr, lr\n\t"
4430 "STR r9, [sp, #20]\n\t"
4431 "MOV r9, lr\n\t"
4432 "UMAAL r9, r8, r0, r6\n\t"
4433 "UMAAL r9, r12, r1, r5\n\t"
4434 "UMAAL r9, r10, r2, r4\n\t"
4435 "ADCS r9, r9, r9\n\t"
4436 "UMAAL r9, r11, r3, r3\n\t"
4437 "STR r9, [sp, #24]\n\t"
4438 "UMULL r0, r9, r0, r7\n\t"
4439 "UMAAL r0, r8, r1, r6\n\t"
4440 "UMAAL r0, r12, r2, r5\n\t"
4441 "UMAAL r0, r10, r3, r4\n\t"
4442 "ADCS r0, r0, r0\n\t"
4443 "UMAAL r0, r11, lr, lr\n\t"
4444 /* R[7] = r0 */
4445 "UMAAL r9, r8, r1, r7\n\t"
4446 "UMAAL r9, r10, r2, r6\n\t"
4447 "UMAAL r12, r9, r3, r5\n\t"
4448 "ADCS r12, r12, r12\n\t"
4449 "UMAAL r12, r11, r4, r4\n\t"
4450 /* R[8] = r12 */
4451 "UMAAL r9, r8, r2, r7\n\t"
4452 "UMAAL r10, r9, r3, r6\n\t"
4453 "MOV r2, lr\n\t"
4454 "UMAAL r10, r2, r4, r5\n\t"
4455 "ADCS r10, r10, r10\n\t"
4456 "UMAAL r11, r10, lr, lr\n\t"
4457 /* R[9] = r11 */
4458 "UMAAL r2, r8, r3, r7\n\t"
4459 "UMAAL r2, r9, r4, r6\n\t"
4460 "ADCS r3, r2, r2\n\t"
4461 "UMAAL r10, r3, r5, r5\n\t"
4462 /* R[10] = r10 */
4463 "MOV r1, lr\n\t"
4464 "UMAAL r1, r8, r4, r7\n\t"
4465 "UMAAL r1, r9, r5, r6\n\t"
4466 "ADCS r4, r1, r1\n\t"
4467 "UMAAL r3, r4, lr, lr\n\t"
4468 /* R[11] = r3 */
4469 "UMAAL r8, r9, r5, r7\n\t"
4470 "ADCS r8, r8, r8\n\t"
4471 "UMAAL r4, r8, r6, r6\n\t"
4472 /* R[12] = r4 */
4473 "MOV r5, lr\n\t"
4474 "UMAAL r5, r9, r6, r7\n\t"
4475 "ADCS r5, r5, r5\n\t"
4476 "UMAAL r8, r5, lr, lr\n\t"
4477 /* R[13] = r8 */
4478 "ADCS r9, r9, r9\n\t"
4479 "UMAAL r9, r5, r7, r7\n\t"
4480 "ADCS r7, r5, lr\n\t"
4481 /* R[14] = r9 */
4482 /* R[15] = r7 */
4483 /* Reduce */
4484 "MOV r6, #0x25\n\t"
4485 "UMAAL r7, r0, r7, r6\n\t"
4486 "MOV r6, #0x13\n\t"
4487 "LSL r0, r0, #1\n\t"
4488 "ORR r0, r0, r7, LSR #31\n\t"
4489 "MUL lr, r0, r6\n\t"
4490 "POP {r0, r1}\n\t"
4491 "MOV r6, #0x26\n\t"
4492 "UMAAL r0, lr, r12, r6\n\t"
4493 "UMAAL r1, lr, r11, r6\n\t"
4494 "MOV r12, r3\n\t"
4495 "MOV r11, r4\n\t"
4496 "POP {r2, r3, r4}\n\t"
4497 "UMAAL r2, lr, r10, r6\n\t"
4498 "UMAAL r3, lr, r12, r6\n\t"
4499 "UMAAL r4, lr, r11, r6\n\t"
4500 "MOV r12, r6\n\t"
4501 "POP {r5, r6}\n\t"
4502 "UMAAL r5, lr, r8, r12\n\t"
4503 "BFC r7, #31, #1\n\t"
4504 "UMAAL r6, lr, r9, r12\n\t"
4505 "ADD r7, r7, lr\n\t"
4506 /* Reduce if top bit set */
4507 "MOV r11, #0x13\n\t"
4508 "AND r12, r11, r7, ASR #31\n\t"
4509 "ADDS r0, r0, r12\n\t"
4510 "ADCS r1, r1, #0x0\n\t"
4511 "ADCS r2, r2, #0x0\n\t"
4512 "ADCS r3, r3, #0x0\n\t"
4513 "ADCS r4, r4, #0x0\n\t"
4514 "ADCS r5, r5, #0x0\n\t"
4515 "BFC r7, #31, #1\n\t"
4516 "ADCS r6, r6, #0x0\n\t"
4517 "ADC r7, r7, #0x0\n\t"
4518 /* Double */
4519 "ADDS r0, r0, r0\n\t"
4520 "ADCS r1, r1, r1\n\t"
4521 "ADCS r2, r2, r2\n\t"
4522 "ADCS r3, r3, r3\n\t"
4523 "ADCS r4, r4, r4\n\t"
4524 "ADCS r5, r5, r5\n\t"
4525 "ADCS r6, r6, r6\n\t"
4526 "ADC r7, r7, r7\n\t"
4527 /* Reduce if top bit set */
4528 "MOV r11, #0x13\n\t"
4529 "AND r12, r11, r7, ASR #31\n\t"
4530 "ADDS r0, r0, r12\n\t"
4531 "ADCS r1, r1, #0x0\n\t"
4532 "ADCS r2, r2, #0x0\n\t"
4533 "ADCS r3, r3, #0x0\n\t"
4534 "ADCS r4, r4, #0x0\n\t"
4535 "ADCS r5, r5, #0x0\n\t"
4536 "BFC r7, #31, #1\n\t"
4537 "ADCS r6, r6, #0x0\n\t"
4538 "ADC r7, r7, #0x0\n\t"
4539 "POP {r12, lr}\n\t"
4540 /* Store */
4541 "STM r12, {r0, r1, r2, r3, r4, r5, r6, r7}\n\t"
4542 "MOV r0, r12\n\t"
4543 "MOV r1, lr\n\t"
4544#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4545 : [r] "+r" (r), [a] "+r" (a)
4546 :
4547#else
4548 :
4549 : [r] "r" (r), [a] "r" (a)
4550#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4551 : "memory", "cc", "lr"
4552 );
4553}
4554
4555#endif /* WOLFSSL_ARM_ARCH_7M */
4556#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4557WC_OMIT_FRAME_POINTER void fe_pow22523(fe r_p, const fe a_p)
4558#else
4559WC_OMIT_FRAME_POINTER void fe_pow22523(fe r, const fe a)
4560#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4561{
4562#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4563 register sword32* r __asm__ ("r0") = (sword32*)r_p;
4564 register const sword32* a __asm__ ("r1") = (const sword32*)a_p;
4565#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4566
4567 __asm__ __volatile__ (
4568 "SUB sp, sp, #0x68\n\t"
4569 /* pow22523 */
4570 "STR %[r], [sp, #96]\n\t"
4571 "STR %[a], [sp, #100]\n\t"
4572 "LDR r1, [sp, #100]\n\t"
4573 "MOV r0, sp\n\t"
4574 "BL fe_sq_op\n\t"
4575 "MOV r1, sp\n\t"
4576 "ADD r0, sp, #0x20\n\t"
4577 "BL fe_sq_op\n\t"
4578 "ADD r1, sp, #0x20\n\t"
4579 "ADD r0, sp, #0x20\n\t"
4580 "BL fe_sq_op\n\t"
4581 "ADD r2, sp, #0x20\n\t"
4582 "LDR r1, [sp, #100]\n\t"
4583 "ADD r0, sp, #0x20\n\t"
4584 "BL fe_mul_op\n\t"
4585 "ADD r2, sp, #0x20\n\t"
4586 "MOV r1, sp\n\t"
4587 "MOV r0, sp\n\t"
4588 "BL fe_mul_op\n\t"
4589 "MOV r1, sp\n\t"
4590 "MOV r0, sp\n\t"
4591 "BL fe_sq_op\n\t"
4592 "MOV r2, sp\n\t"
4593 "ADD r1, sp, #0x20\n\t"
4594 "MOV r0, sp\n\t"
4595 "BL fe_mul_op\n\t"
4596 "MOV r1, sp\n\t"
4597 "ADD r0, sp, #0x20\n\t"
4598 "BL fe_sq_op\n\t"
4599 "MOV r12, #0x4\n\t"
4600 "\n"
4601#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4602 "L_fe_pow22523_1:\n\t"
4603#else
4604 "L_fe_pow22523_1_%=:\n\t"
4605#endif
4606 "ADD r1, sp, #0x20\n\t"
4607 "ADD r0, sp, #0x20\n\t"
4608 "PUSH {r12}\n\t"
4609 "BL fe_sq_op\n\t"
4610 "POP {r12}\n\t"
4611 "SUBS r12, r12, #0x1\n\t"
4612#if defined(__GNUC__)
4613 "BNE L_fe_pow22523_1_%=\n\t"
4614#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4615 "BNE.N L_fe_pow22523_1\n\t"
4616#else
4617 "BNE.N L_fe_pow22523_1_%=\n\t"
4618#endif
4619 "MOV r2, sp\n\t"
4620 "ADD r1, sp, #0x20\n\t"
4621 "MOV r0, sp\n\t"
4622 "BL fe_mul_op\n\t"
4623 "MOV r1, sp\n\t"
4624 "ADD r0, sp, #0x20\n\t"
4625 "BL fe_sq_op\n\t"
4626 "MOV r12, #0x9\n\t"
4627 "\n"
4628#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4629 "L_fe_pow22523_2:\n\t"
4630#else
4631 "L_fe_pow22523_2_%=:\n\t"
4632#endif
4633 "ADD r1, sp, #0x20\n\t"
4634 "ADD r0, sp, #0x20\n\t"
4635 "PUSH {r12}\n\t"
4636 "BL fe_sq_op\n\t"
4637 "POP {r12}\n\t"
4638 "SUBS r12, r12, #0x1\n\t"
4639#if defined(__GNUC__)
4640 "BNE L_fe_pow22523_2_%=\n\t"
4641#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4642 "BNE.N L_fe_pow22523_2\n\t"
4643#else
4644 "BNE.N L_fe_pow22523_2_%=\n\t"
4645#endif
4646 "MOV r2, sp\n\t"
4647 "ADD r1, sp, #0x20\n\t"
4648 "ADD r0, sp, #0x20\n\t"
4649 "BL fe_mul_op\n\t"
4650 "ADD r1, sp, #0x20\n\t"
4651 "ADD r0, sp, #0x40\n\t"
4652 "BL fe_sq_op\n\t"
4653 "MOV r12, #0x13\n\t"
4654 "\n"
4655#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4656 "L_fe_pow22523_3:\n\t"
4657#else
4658 "L_fe_pow22523_3_%=:\n\t"
4659#endif
4660 "ADD r1, sp, #0x40\n\t"
4661 "ADD r0, sp, #0x40\n\t"
4662 "PUSH {r12}\n\t"
4663 "BL fe_sq_op\n\t"
4664 "POP {r12}\n\t"
4665 "SUBS r12, r12, #0x1\n\t"
4666#if defined(__GNUC__)
4667 "BNE L_fe_pow22523_3_%=\n\t"
4668#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4669 "BNE.N L_fe_pow22523_3\n\t"
4670#else
4671 "BNE.N L_fe_pow22523_3_%=\n\t"
4672#endif
4673 "ADD r2, sp, #0x20\n\t"
4674 "ADD r1, sp, #0x40\n\t"
4675 "ADD r0, sp, #0x20\n\t"
4676 "BL fe_mul_op\n\t"
4677 "MOV r12, #0xa\n\t"
4678 "\n"
4679#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4680 "L_fe_pow22523_4:\n\t"
4681#else
4682 "L_fe_pow22523_4_%=:\n\t"
4683#endif
4684 "ADD r1, sp, #0x20\n\t"
4685 "ADD r0, sp, #0x20\n\t"
4686 "PUSH {r12}\n\t"
4687 "BL fe_sq_op\n\t"
4688 "POP {r12}\n\t"
4689 "SUBS r12, r12, #0x1\n\t"
4690#if defined(__GNUC__)
4691 "BNE L_fe_pow22523_4_%=\n\t"
4692#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4693 "BNE.N L_fe_pow22523_4\n\t"
4694#else
4695 "BNE.N L_fe_pow22523_4_%=\n\t"
4696#endif
4697 "MOV r2, sp\n\t"
4698 "ADD r1, sp, #0x20\n\t"
4699 "MOV r0, sp\n\t"
4700 "BL fe_mul_op\n\t"
4701 "MOV r1, sp\n\t"
4702 "ADD r0, sp, #0x20\n\t"
4703 "BL fe_sq_op\n\t"
4704 "MOV r12, #0x31\n\t"
4705 "\n"
4706#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4707 "L_fe_pow22523_5:\n\t"
4708#else
4709 "L_fe_pow22523_5_%=:\n\t"
4710#endif
4711 "ADD r1, sp, #0x20\n\t"
4712 "ADD r0, sp, #0x20\n\t"
4713 "PUSH {r12}\n\t"
4714 "BL fe_sq_op\n\t"
4715 "POP {r12}\n\t"
4716 "SUBS r12, r12, #0x1\n\t"
4717#if defined(__GNUC__)
4718 "BNE L_fe_pow22523_5_%=\n\t"
4719#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4720 "BNE.N L_fe_pow22523_5\n\t"
4721#else
4722 "BNE.N L_fe_pow22523_5_%=\n\t"
4723#endif
4724 "MOV r2, sp\n\t"
4725 "ADD r1, sp, #0x20\n\t"
4726 "ADD r0, sp, #0x20\n\t"
4727 "BL fe_mul_op\n\t"
4728 "ADD r1, sp, #0x20\n\t"
4729 "ADD r0, sp, #0x40\n\t"
4730 "BL fe_sq_op\n\t"
4731 "MOV r12, #0x63\n\t"
4732 "\n"
4733#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4734 "L_fe_pow22523_6:\n\t"
4735#else
4736 "L_fe_pow22523_6_%=:\n\t"
4737#endif
4738 "ADD r1, sp, #0x40\n\t"
4739 "ADD r0, sp, #0x40\n\t"
4740 "PUSH {r12}\n\t"
4741 "BL fe_sq_op\n\t"
4742 "POP {r12}\n\t"
4743 "SUBS r12, r12, #0x1\n\t"
4744#if defined(__GNUC__)
4745 "BNE L_fe_pow22523_6_%=\n\t"
4746#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4747 "BNE.N L_fe_pow22523_6\n\t"
4748#else
4749 "BNE.N L_fe_pow22523_6_%=\n\t"
4750#endif
4751 "ADD r2, sp, #0x20\n\t"
4752 "ADD r1, sp, #0x40\n\t"
4753 "ADD r0, sp, #0x20\n\t"
4754 "BL fe_mul_op\n\t"
4755 "MOV r12, #0x32\n\t"
4756 "\n"
4757#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4758 "L_fe_pow22523_7:\n\t"
4759#else
4760 "L_fe_pow22523_7_%=:\n\t"
4761#endif
4762 "ADD r1, sp, #0x20\n\t"
4763 "ADD r0, sp, #0x20\n\t"
4764 "PUSH {r12}\n\t"
4765 "BL fe_sq_op\n\t"
4766 "POP {r12}\n\t"
4767 "SUBS r12, r12, #0x1\n\t"
4768#if defined(__GNUC__)
4769 "BNE L_fe_pow22523_7_%=\n\t"
4770#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4771 "BNE.N L_fe_pow22523_7\n\t"
4772#else
4773 "BNE.N L_fe_pow22523_7_%=\n\t"
4774#endif
4775 "MOV r2, sp\n\t"
4776 "ADD r1, sp, #0x20\n\t"
4777 "MOV r0, sp\n\t"
4778 "BL fe_mul_op\n\t"
4779 "MOV r12, #0x2\n\t"
4780 "\n"
4781#if defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4782 "L_fe_pow22523_8:\n\t"
4783#else
4784 "L_fe_pow22523_8_%=:\n\t"
4785#endif
4786 "MOV r1, sp\n\t"
4787 "MOV r0, sp\n\t"
4788 "PUSH {r12}\n\t"
4789 "BL fe_sq_op\n\t"
4790 "POP {r12}\n\t"
4791 "SUBS r12, r12, #0x1\n\t"
4792#if defined(__GNUC__)
4793 "BNE L_fe_pow22523_8_%=\n\t"
4794#elif defined(__IAR_SYSTEMS_ICC__) && (__VER__ < 9000000)
4795 "BNE.N L_fe_pow22523_8\n\t"
4796#else
4797 "BNE.N L_fe_pow22523_8_%=\n\t"
4798#endif
4799 "LDR r2, [sp, #100]\n\t"
4800 "MOV r1, sp\n\t"
4801 "LDR r0, [sp, #96]\n\t"
4802 "BL fe_mul_op\n\t"
4803 "LDR %[a], [sp, #100]\n\t"
4804 "LDR %[r], [sp, #96]\n\t"
4805 "ADD sp, sp, #0x68\n\t"
4806#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4807 : [r] "+r" (r), [a] "+r" (a)
4808 :
4809#else
4810 :
4811 : [r] "r" (r), [a] "r" (a)
4812#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4813 : "memory", "cc", "lr", "r12", "r2", "r3", "r4", "r5", "r6", "r7", "r8",
4814 "r9", "r10", "r11"
4815 );
4816}
4817
4818#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4819WC_OMIT_FRAME_POINTER void ge_p1p1_to_p2(ge_p2 * r_p, const ge_p1p1 * p_p)
4820#else
4821WC_OMIT_FRAME_POINTER void ge_p1p1_to_p2(ge_p2 * r, const ge_p1p1 * p)
4822#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4823{
4824#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4825 register ge_p2 * r __asm__ ("r0") = (ge_p2 *)r_p;
4826 register const ge_p1p1 * p __asm__ ("r1") = (const ge_p1p1 *)p_p;
4827#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4828
4829 __asm__ __volatile__ (
4830 "SUB sp, sp, #0x8\n\t"
4831 "STR %[r], [sp]\n\t"
4832 "STR %[p], [sp, #4]\n\t"
4833 "ADD r2, r1, #0x60\n\t"
4834 "BL fe_mul_op\n\t"
4835 "LDR r0, [sp]\n\t"
4836 "LDR r1, [sp, #4]\n\t"
4837 "ADD r2, r1, #0x40\n\t"
4838 "ADD r1, r1, #0x20\n\t"
4839 "ADD r0, r0, #0x20\n\t"
4840 "BL fe_mul_op\n\t"
4841 "LDR r0, [sp]\n\t"
4842 "LDR r1, [sp, #4]\n\t"
4843 "ADD r2, r1, #0x60\n\t"
4844 "ADD r1, r1, #0x40\n\t"
4845 "ADD r0, r0, #0x40\n\t"
4846 "BL fe_mul_op\n\t"
4847 "ADD sp, sp, #0x8\n\t"
4848#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4849 : [r] "+r" (r), [p] "+r" (p)
4850 :
4851#else
4852 :
4853 : [r] "r" (r), [p] "r" (p)
4854#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4855 : "memory", "cc", "lr", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
4856 "r10", "r11", "r12"
4857 );
4858}
4859
4860#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4861WC_OMIT_FRAME_POINTER void ge_p1p1_to_p3(ge_p3 * r_p, const ge_p1p1 * p_p)
4862#else
4863WC_OMIT_FRAME_POINTER void ge_p1p1_to_p3(ge_p3 * r, const ge_p1p1 * p)
4864#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4865{
4866#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4867 register ge_p3 * r __asm__ ("r0") = (ge_p3 *)r_p;
4868 register const ge_p1p1 * p __asm__ ("r1") = (const ge_p1p1 *)p_p;
4869#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4870
4871 __asm__ __volatile__ (
4872 "SUB sp, sp, #0x8\n\t"
4873 "STR %[r], [sp]\n\t"
4874 "STR %[p], [sp, #4]\n\t"
4875 "ADD r2, r1, #0x60\n\t"
4876 "BL fe_mul_op\n\t"
4877 "LDR r0, [sp]\n\t"
4878 "LDR r1, [sp, #4]\n\t"
4879 "ADD r2, r1, #0x40\n\t"
4880 "ADD r1, r1, #0x20\n\t"
4881 "ADD r0, r0, #0x20\n\t"
4882 "BL fe_mul_op\n\t"
4883 "LDR r0, [sp]\n\t"
4884 "LDR r1, [sp, #4]\n\t"
4885 "ADD r2, r1, #0x60\n\t"
4886 "ADD r1, r1, #0x40\n\t"
4887 "ADD r0, r0, #0x40\n\t"
4888 "BL fe_mul_op\n\t"
4889 "LDR r0, [sp]\n\t"
4890 "LDR r1, [sp, #4]\n\t"
4891 "ADD r2, r1, #0x20\n\t"
4892 "ADD r0, r0, #0x60\n\t"
4893 "BL fe_mul_op\n\t"
4894 "ADD sp, sp, #0x8\n\t"
4895#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4896 : [r] "+r" (r), [p] "+r" (p)
4897 :
4898#else
4899 :
4900 : [r] "r" (r), [p] "r" (p)
4901#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4902 : "memory", "cc", "lr", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
4903 "r10", "r11", "r12"
4904 );
4905}
4906
4907#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4908WC_OMIT_FRAME_POINTER void ge_p2_dbl(ge_p1p1 * r_p, const ge_p2 * p_p)
4909#else
4910WC_OMIT_FRAME_POINTER void ge_p2_dbl(ge_p1p1 * r, const ge_p2 * p)
4911#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4912{
4913#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4914 register ge_p1p1 * r __asm__ ("r0") = (ge_p1p1 *)r_p;
4915 register const ge_p2 * p __asm__ ("r1") = (const ge_p2 *)p_p;
4916#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4917
4918 __asm__ __volatile__ (
4919 "SUB sp, sp, #0x8\n\t"
4920 "STR %[r], [sp]\n\t"
4921 "STR %[p], [sp, #4]\n\t"
4922 "BL fe_sq_op\n\t"
4923 "LDR r0, [sp]\n\t"
4924 "LDR r1, [sp, #4]\n\t"
4925 "ADD r1, r1, #0x20\n\t"
4926 "ADD r0, r0, #0x40\n\t"
4927 "BL fe_sq_op\n\t"
4928 "LDR r0, [sp]\n\t"
4929 "LDR r1, [sp, #4]\n\t"
4930 "ADD r2, r1, #0x20\n\t"
4931 "ADD r0, r0, #0x20\n\t"
4932 "BL fe_add_op\n\t"
4933 "MOV r1, r0\n\t"
4934 "ADD r0, r0, #0x40\n\t"
4935 "BL fe_sq_op\n\t"
4936 "LDR r0, [sp]\n\t"
4937 "MOV r3, r0\n\t"
4938 "ADD r2, r0, #0x40\n\t"
4939 "ADD r1, r0, #0x40\n\t"
4940 "ADD r0, r0, #0x20\n\t"
4941 "BL fe_add_sub_op\n\t"
4942 "MOV r2, r0\n\t"
4943 "ADD r1, r0, #0x40\n\t"
4944 "SUB r0, r0, #0x20\n\t"
4945 "BL fe_sub_op\n\t"
4946 "LDR r1, [sp, #4]\n\t"
4947 "ADD r1, r1, #0x40\n\t"
4948 "ADD r0, r0, #0x60\n\t"
4949 "BL fe_sq2\n\t"
4950 "SUB r2, r0, #0x20\n\t"
4951 "MOV r1, r0\n\t"
4952 "BL fe_sub_op\n\t"
4953 "ADD sp, sp, #0x8\n\t"
4954#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4955 : [r] "+r" (r), [p] "+r" (p)
4956 :
4957#else
4958 :
4959 : [r] "r" (r), [p] "r" (p)
4960#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4961 : "memory", "cc", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
4962 "r11", "r12", "lr"
4963 );
4964}
4965
4966#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4967WC_OMIT_FRAME_POINTER void ge_madd(ge_p1p1 * r_p, const ge_p3 * p_p,
4968 const ge_precomp * q_p)
4969#else
4970WC_OMIT_FRAME_POINTER void ge_madd(ge_p1p1 * r, const ge_p3 * p,
4971 const ge_precomp * q)
4972#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4973{
4974#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
4975 register ge_p1p1 * r __asm__ ("r0") = (ge_p1p1 *)r_p;
4976 register const ge_p3 * p __asm__ ("r1") = (const ge_p3 *)p_p;
4977 register const ge_precomp * q __asm__ ("r2") = (const ge_precomp *)q_p;
4978#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
4979
4980 __asm__ __volatile__ (
4981 "SUB sp, sp, #0xc\n\t"
4982 "STR %[r], [sp]\n\t"
4983 "STR %[p], [sp, #4]\n\t"
4984 "STR %[q], [sp, #8]\n\t"
4985 "MOV r2, r1\n\t"
4986 "ADD r1, r1, #0x20\n\t"
4987 "BL fe_add_op\n\t"
4988 "LDR r1, [sp, #4]\n\t"
4989 "MOV r2, r1\n\t"
4990 "ADD r1, r1, #0x20\n\t"
4991 "ADD r0, r0, #0x20\n\t"
4992 "BL fe_sub_op\n\t"
4993 "LDR r2, [sp, #8]\n\t"
4994 "SUB r1, r0, #0x20\n\t"
4995 "ADD r0, r0, #0x20\n\t"
4996 "BL fe_mul_op\n\t"
4997 "LDR r0, [sp]\n\t"
4998 "LDR r2, [sp, #8]\n\t"
4999 "ADD r2, r2, #0x20\n\t"
5000 "ADD r1, r0, #0x20\n\t"
5001 "ADD r0, r0, #0x20\n\t"
5002 "BL fe_mul_op\n\t"
5003 "LDR r0, [sp]\n\t"
5004 "LDR r1, [sp, #8]\n\t"
5005 "LDR r2, [sp, #4]\n\t"
5006 "ADD r2, r2, #0x60\n\t"
5007 "ADD r1, r1, #0x40\n\t"
5008 "ADD r0, r0, #0x60\n\t"
5009 "BL fe_mul_op\n\t"
5010 "LDR r0, [sp]\n\t"
5011 "ADD r3, r0, #0x20\n\t"
5012 "ADD r2, r0, #0x40\n\t"
5013 "MOV r1, r0\n\t"
5014 "ADD r0, r0, #0x20\n\t"
5015 "BL fe_add_sub_op\n\t"
5016 "LDR r1, [sp, #4]\n\t"
5017 "ADD r1, r1, #0x40\n\t"
5018 "ADD r0, r0, #0x20\n\t"
5019 /* Double */
5020 "LDM r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
5021 "ADDS r4, r4, r4\n\t"
5022 "ADCS r5, r5, r5\n\t"
5023 "ADCS r6, r6, r6\n\t"
5024 "ADCS r7, r7, r7\n\t"
5025 "ADCS r8, r8, r8\n\t"
5026 "ADCS r9, r9, r9\n\t"
5027 "ADCS r10, r10, r10\n\t"
5028 "MOV lr, #0x0\n\t"
5029 "ADCS r11, r11, r11\n\t"
5030 "ADC lr, lr, #0x0\n\t"
5031 "MOV r12, #0x13\n\t"
5032 "LSL lr, lr, #1\n\t"
5033 "ORR lr, lr, r11, LSR #31\n\t"
5034 "MUL r12, lr, r12\n\t"
5035 "ADDS r4, r4, r12\n\t"
5036 "ADCS r5, r5, #0x0\n\t"
5037 "ADCS r6, r6, #0x0\n\t"
5038 "ADCS r7, r7, #0x0\n\t"
5039 "ADCS r8, r8, #0x0\n\t"
5040 "ADCS r9, r9, #0x0\n\t"
5041 "BFC r11, #31, #1\n\t"
5042 "ADCS r10, r10, #0x0\n\t"
5043 "ADC r11, r11, #0x0\n\t"
5044 "STM r0, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
5045 /* Done Double */
5046 "ADD r3, r0, #0x20\n\t"
5047 "ADD r1, r0, #0x20\n\t"
5048 "BL fe_add_sub_op\n\t"
5049 "ADD sp, sp, #0xc\n\t"
5050#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5051 : [r] "+r" (r), [p] "+r" (p), [q] "+r" (q)
5052 :
5053#else
5054 :
5055 : [r] "r" (r), [p] "r" (p), [q] "r" (q)
5056#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5057 : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
5058 "r11", "r12", "lr"
5059 );
5060}
5061
5062#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5063WC_OMIT_FRAME_POINTER void ge_msub(ge_p1p1 * r_p, const ge_p3 * p_p,
5064 const ge_precomp * q_p)
5065#else
5066WC_OMIT_FRAME_POINTER void ge_msub(ge_p1p1 * r, const ge_p3 * p,
5067 const ge_precomp * q)
5068#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5069{
5070#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5071 register ge_p1p1 * r __asm__ ("r0") = (ge_p1p1 *)r_p;
5072 register const ge_p3 * p __asm__ ("r1") = (const ge_p3 *)p_p;
5073 register const ge_precomp * q __asm__ ("r2") = (const ge_precomp *)q_p;
5074#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5075
5076 __asm__ __volatile__ (
5077 "SUB sp, sp, #0xc\n\t"
5078 "STR %[r], [sp]\n\t"
5079 "STR %[p], [sp, #4]\n\t"
5080 "STR %[q], [sp, #8]\n\t"
5081 "MOV r2, r1\n\t"
5082 "ADD r1, r1, #0x20\n\t"
5083 "BL fe_add_op\n\t"
5084 "LDR r1, [sp, #4]\n\t"
5085 "MOV r2, r1\n\t"
5086 "ADD r1, r1, #0x20\n\t"
5087 "ADD r0, r0, #0x20\n\t"
5088 "BL fe_sub_op\n\t"
5089 "LDR r2, [sp, #8]\n\t"
5090 "ADD r2, r2, #0x20\n\t"
5091 "SUB r1, r0, #0x20\n\t"
5092 "ADD r0, r0, #0x20\n\t"
5093 "BL fe_mul_op\n\t"
5094 "LDR r0, [sp]\n\t"
5095 "LDR r2, [sp, #8]\n\t"
5096 "ADD r1, r0, #0x20\n\t"
5097 "ADD r0, r0, #0x20\n\t"
5098 "BL fe_mul_op\n\t"
5099 "LDR r0, [sp]\n\t"
5100 "LDR r1, [sp, #8]\n\t"
5101 "LDR r2, [sp, #4]\n\t"
5102 "ADD r2, r2, #0x60\n\t"
5103 "ADD r1, r1, #0x40\n\t"
5104 "ADD r0, r0, #0x60\n\t"
5105 "BL fe_mul_op\n\t"
5106 "LDR r0, [sp]\n\t"
5107 "ADD r3, r0, #0x20\n\t"
5108 "ADD r2, r0, #0x40\n\t"
5109 "MOV r1, r0\n\t"
5110 "ADD r0, r0, #0x20\n\t"
5111 "BL fe_add_sub_op\n\t"
5112 "LDR r1, [sp, #4]\n\t"
5113 "ADD r1, r1, #0x40\n\t"
5114 "ADD r0, r0, #0x20\n\t"
5115 /* Double */
5116 "LDM r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
5117 "ADDS r4, r4, r4\n\t"
5118 "ADCS r5, r5, r5\n\t"
5119 "ADCS r6, r6, r6\n\t"
5120 "ADCS r7, r7, r7\n\t"
5121 "ADCS r8, r8, r8\n\t"
5122 "ADCS r9, r9, r9\n\t"
5123 "ADCS r10, r10, r10\n\t"
5124 "MOV lr, #0x0\n\t"
5125 "ADCS r11, r11, r11\n\t"
5126 "ADC lr, lr, #0x0\n\t"
5127 "MOV r12, #0x13\n\t"
5128 "LSL lr, lr, #1\n\t"
5129 "ORR lr, lr, r11, LSR #31\n\t"
5130 "MUL r12, lr, r12\n\t"
5131 "ADDS r4, r4, r12\n\t"
5132 "ADCS r5, r5, #0x0\n\t"
5133 "ADCS r6, r6, #0x0\n\t"
5134 "ADCS r7, r7, #0x0\n\t"
5135 "ADCS r8, r8, #0x0\n\t"
5136 "ADCS r9, r9, #0x0\n\t"
5137 "BFC r11, #31, #1\n\t"
5138 "ADCS r10, r10, #0x0\n\t"
5139 "ADC r11, r11, #0x0\n\t"
5140 "STM r0, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
5141 /* Done Double */
5142 "ADD r3, r0, #0x20\n\t"
5143 "MOV r1, r0\n\t"
5144 "ADD r0, r0, #0x20\n\t"
5145 "BL fe_add_sub_op\n\t"
5146 "ADD sp, sp, #0xc\n\t"
5147#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5148 : [r] "+r" (r), [p] "+r" (p), [q] "+r" (q)
5149 :
5150#else
5151 :
5152 : [r] "r" (r), [p] "r" (p), [q] "r" (q)
5153#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5154 : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
5155 "r11", "r12", "lr"
5156 );
5157}
5158
5159#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5160WC_OMIT_FRAME_POINTER void ge_add(ge_p1p1 * r_p, const ge_p3 * p_p,
5161 const ge_cached* q_p)
5162#else
5163WC_OMIT_FRAME_POINTER void ge_add(ge_p1p1 * r, const ge_p3 * p,
5164 const ge_cached* q)
5165#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5166{
5167#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5168 register ge_p1p1 * r __asm__ ("r0") = (ge_p1p1 *)r_p;
5169 register const ge_p3 * p __asm__ ("r1") = (const ge_p3 *)p_p;
5170 register const ge_cached* q __asm__ ("r2") = (const ge_cached*)q_p;
5171#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5172
5173 __asm__ __volatile__ (
5174 "SUB sp, sp, #0x2c\n\t"
5175 "STR %[r], [sp]\n\t"
5176 "STR %[p], [sp, #4]\n\t"
5177 "STR %[q], [sp, #8]\n\t"
5178 "MOV r3, r1\n\t"
5179 "ADD r2, r1, #0x20\n\t"
5180 "ADD r1, r0, #0x20\n\t"
5181 "BL fe_add_sub_op\n\t"
5182 "LDR r2, [sp, #8]\n\t"
5183 "MOV r1, r0\n\t"
5184 "ADD r0, r0, #0x40\n\t"
5185 "BL fe_mul_op\n\t"
5186 "LDR r0, [sp]\n\t"
5187 "LDR r2, [sp, #8]\n\t"
5188 "ADD r2, r2, #0x20\n\t"
5189 "ADD r1, r0, #0x20\n\t"
5190 "ADD r0, r0, #0x20\n\t"
5191 "BL fe_mul_op\n\t"
5192 "LDR r0, [sp]\n\t"
5193 "LDR r1, [sp, #8]\n\t"
5194 "LDR r2, [sp, #4]\n\t"
5195 "ADD r2, r2, #0x60\n\t"
5196 "ADD r1, r1, #0x60\n\t"
5197 "ADD r0, r0, #0x60\n\t"
5198 "BL fe_mul_op\n\t"
5199 "LDR r0, [sp]\n\t"
5200 "LDR r1, [sp, #4]\n\t"
5201 "LDR r2, [sp, #8]\n\t"
5202 "ADD r2, r2, #0x40\n\t"
5203 "ADD r1, r1, #0x40\n\t"
5204 "BL fe_mul_op\n\t"
5205 "LDR r1, [sp]\n\t"
5206 "ADD r0, sp, #0xc\n\t"
5207 /* Double */
5208 "LDM r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
5209 "ADDS r4, r4, r4\n\t"
5210 "ADCS r5, r5, r5\n\t"
5211 "ADCS r6, r6, r6\n\t"
5212 "ADCS r7, r7, r7\n\t"
5213 "ADCS r8, r8, r8\n\t"
5214 "ADCS r9, r9, r9\n\t"
5215 "ADCS r10, r10, r10\n\t"
5216 "MOV lr, #0x0\n\t"
5217 "ADCS r11, r11, r11\n\t"
5218 "ADC lr, lr, #0x0\n\t"
5219 "MOV r12, #0x13\n\t"
5220 "LSL lr, lr, #1\n\t"
5221 "ORR lr, lr, r11, LSR #31\n\t"
5222 "MUL r12, lr, r12\n\t"
5223 "ADDS r4, r4, r12\n\t"
5224 "ADCS r5, r5, #0x0\n\t"
5225 "ADCS r6, r6, #0x0\n\t"
5226 "ADCS r7, r7, #0x0\n\t"
5227 "ADCS r8, r8, #0x0\n\t"
5228 "ADCS r9, r9, #0x0\n\t"
5229 "BFC r11, #31, #1\n\t"
5230 "ADCS r10, r10, #0x0\n\t"
5231 "ADC r11, r11, #0x0\n\t"
5232 "STM r0, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
5233 /* Done Double */
5234 "ADD r3, r1, #0x20\n\t"
5235 "ADD r2, r1, #0x40\n\t"
5236 "ADD r0, r1, #0x20\n\t"
5237 "BL fe_add_sub_op\n\t"
5238 "ADD r3, r0, #0x40\n\t"
5239 "ADD r2, sp, #0xc\n\t"
5240 "ADD r1, r0, #0x40\n\t"
5241 "ADD r0, r0, #0x20\n\t"
5242 "BL fe_add_sub_op\n\t"
5243 "ADD sp, sp, #0x2c\n\t"
5244#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5245 : [r] "+r" (r), [p] "+r" (p), [q] "+r" (q)
5246 :
5247#else
5248 :
5249 : [r] "r" (r), [p] "r" (p), [q] "r" (q)
5250#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5251 : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
5252 "r11", "r12", "lr"
5253 );
5254}
5255
5256#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5257WC_OMIT_FRAME_POINTER void ge_sub(ge_p1p1 * r_p, const ge_p3 * p_p,
5258 const ge_cached* q_p)
5259#else
5260WC_OMIT_FRAME_POINTER void ge_sub(ge_p1p1 * r, const ge_p3 * p,
5261 const ge_cached* q)
5262#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5263{
5264#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5265 register ge_p1p1 * r __asm__ ("r0") = (ge_p1p1 *)r_p;
5266 register const ge_p3 * p __asm__ ("r1") = (const ge_p3 *)p_p;
5267 register const ge_cached* q __asm__ ("r2") = (const ge_cached*)q_p;
5268#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5269
5270 __asm__ __volatile__ (
5271 "SUB sp, sp, #0x2c\n\t"
5272 "STR %[r], [sp]\n\t"
5273 "STR %[p], [sp, #4]\n\t"
5274 "STR %[q], [sp, #8]\n\t"
5275 "MOV r3, r1\n\t"
5276 "ADD r2, r1, #0x20\n\t"
5277 "ADD r1, r0, #0x20\n\t"
5278 "BL fe_add_sub_op\n\t"
5279 "LDR r2, [sp, #8]\n\t"
5280 "ADD r2, r2, #0x20\n\t"
5281 "MOV r1, r0\n\t"
5282 "ADD r0, r0, #0x40\n\t"
5283 "BL fe_mul_op\n\t"
5284 "LDR r0, [sp]\n\t"
5285 "LDR r2, [sp, #8]\n\t"
5286 "ADD r1, r0, #0x20\n\t"
5287 "ADD r0, r0, #0x20\n\t"
5288 "BL fe_mul_op\n\t"
5289 "LDR r0, [sp]\n\t"
5290 "LDR r1, [sp, #8]\n\t"
5291 "LDR r2, [sp, #4]\n\t"
5292 "ADD r2, r2, #0x60\n\t"
5293 "ADD r1, r1, #0x60\n\t"
5294 "ADD r0, r0, #0x60\n\t"
5295 "BL fe_mul_op\n\t"
5296 "LDR r0, [sp]\n\t"
5297 "LDR r1, [sp, #4]\n\t"
5298 "LDR r2, [sp, #8]\n\t"
5299 "ADD r2, r2, #0x40\n\t"
5300 "ADD r1, r1, #0x40\n\t"
5301 "BL fe_mul_op\n\t"
5302 "LDR r1, [sp]\n\t"
5303 "ADD r0, sp, #0xc\n\t"
5304 /* Double */
5305 "LDM r1, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
5306 "ADDS r4, r4, r4\n\t"
5307 "ADCS r5, r5, r5\n\t"
5308 "ADCS r6, r6, r6\n\t"
5309 "ADCS r7, r7, r7\n\t"
5310 "ADCS r8, r8, r8\n\t"
5311 "ADCS r9, r9, r9\n\t"
5312 "ADCS r10, r10, r10\n\t"
5313 "MOV lr, #0x0\n\t"
5314 "ADCS r11, r11, r11\n\t"
5315 "ADC lr, lr, #0x0\n\t"
5316 "MOV r12, #0x13\n\t"
5317 "LSL lr, lr, #1\n\t"
5318 "ORR lr, lr, r11, LSR #31\n\t"
5319 "MUL r12, lr, r12\n\t"
5320 "ADDS r4, r4, r12\n\t"
5321 "ADCS r5, r5, #0x0\n\t"
5322 "ADCS r6, r6, #0x0\n\t"
5323 "ADCS r7, r7, #0x0\n\t"
5324 "ADCS r8, r8, #0x0\n\t"
5325 "ADCS r9, r9, #0x0\n\t"
5326 "BFC r11, #31, #1\n\t"
5327 "ADCS r10, r10, #0x0\n\t"
5328 "ADC r11, r11, #0x0\n\t"
5329 "STM r0, {r4, r5, r6, r7, r8, r9, r10, r11}\n\t"
5330 /* Done Double */
5331 "ADD r3, r1, #0x20\n\t"
5332 "ADD r2, r1, #0x40\n\t"
5333 "ADD r0, r1, #0x20\n\t"
5334 "BL fe_add_sub_op\n\t"
5335 "ADD r3, r0, #0x40\n\t"
5336 "ADD r2, sp, #0xc\n\t"
5337 "ADD r1, r0, #0x20\n\t"
5338 "ADD r0, r0, #0x40\n\t"
5339 "BL fe_add_sub_op\n\t"
5340 "ADD sp, sp, #0x2c\n\t"
5341#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5342 : [r] "+r" (r), [p] "+r" (p), [q] "+r" (q)
5343 :
5344#else
5345 :
5346 : [r] "r" (r), [p] "r" (p), [q] "r" (q)
5347#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5348 : "memory", "cc", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
5349 "r11", "r12", "lr"
5350 );
5351}
5352
5353#endif /* HAVE_ED25519 || WOLFSSL_CURVE25519_USE_ED25519 */
5354#ifdef HAVE_ED25519
5355#ifdef WOLFSSL_ARM_ARCH_7M
5356#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5357WC_OMIT_FRAME_POINTER void sc_reduce(byte* s_p)
5358#else
5359WC_OMIT_FRAME_POINTER void sc_reduce(byte* s)
5360#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5361{
5362#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5363 register byte* s __asm__ ("r0") = (byte*)s_p;
5364#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5365
5366 __asm__ __volatile__ (
5367 "SUB sp, sp, #0x38\n\t"
5368 "STR %[s], [sp, #52]\n\t"
5369 /* Load bits 252-511 */
5370 "ADD %[s], %[s], #0x1c\n\t"
5371 "LDM %[s], {r1, r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
5372 "LSR lr, r9, #24\n\t"
5373 "LSL r9, r9, #4\n\t"
5374 "ORR r9, r9, r8, LSR #28\n\t"
5375 "LSL r8, r8, #4\n\t"
5376 "ORR r8, r8, r7, LSR #28\n\t"
5377 "LSL r7, r7, #4\n\t"
5378 "ORR r7, r7, r6, LSR #28\n\t"
5379 "LSL r6, r6, #4\n\t"
5380 "ORR r6, r6, r5, LSR #28\n\t"
5381 "LSL r5, r5, #4\n\t"
5382 "ORR r5, r5, r4, LSR #28\n\t"
5383 "LSL r4, r4, #4\n\t"
5384 "ORR r4, r4, r3, LSR #28\n\t"
5385 "LSL r3, r3, #4\n\t"
5386 "ORR r3, r3, r2, LSR #28\n\t"
5387 "LSL r2, r2, #4\n\t"
5388 "ORR r2, r2, r1, LSR #28\n\t"
5389 "BFC r9, #28, #4\n\t"
5390 "SUB %[s], %[s], #0x1c\n\t"
5391 /* Add order times bits 504..511 */
5392 "MOV r10, #0x2c13\n\t"
5393 "MOVT r10, #0xa30a\n\t"
5394 "MOV r11, #0x9ce5\n\t"
5395 "MOVT r11, #0xa7ed\n\t"
5396 "MOV r1, #0x0\n\t"
5397 "UMLAL r2, r1, r10, lr\n\t"
5398 "ADDS r3, r3, r1\n\t"
5399 "MOV r1, #0x0\n\t"
5400 "ADC r1, r1, #0x0\n\t"
5401 "UMLAL r3, r1, r11, lr\n\t"
5402 "MOV r10, #0x6329\n\t"
5403 "MOVT r10, #0x5d08\n\t"
5404 "MOV r11, #0x621\n\t"
5405 "MOVT r11, #0xeb21\n\t"
5406 "ADDS r4, r4, r1\n\t"
5407 "MOV r1, #0x0\n\t"
5408 "ADC r1, r1, #0x0\n\t"
5409 "UMLAL r4, r1, r10, lr\n\t"
5410 "ADDS r5, r5, r1\n\t"
5411 "MOV r1, #0x0\n\t"
5412 "ADC r1, r1, #0x0\n\t"
5413 "UMLAL r5, r1, r11, lr\n\t"
5414 "ADDS r6, r6, r1\n\t"
5415 "ADCS r7, r7, #0x0\n\t"
5416 "ADCS r8, r8, #0x0\n\t"
5417 "ADC r9, r9, #0x0\n\t"
5418 "SUBS r6, r6, lr\n\t"
5419 "SBCS r7, r7, #0x0\n\t"
5420 "SBCS r8, r8, #0x0\n\t"
5421 "SBC r9, r9, #0x0\n\t"
5422 /* Sub product of top 8 words and order */
5423 "MOV r12, sp\n\t"
5424 "MOV r1, #0x2c13\n\t"
5425 "MOVT r1, #0xa30a\n\t"
5426 "MOV lr, #0x0\n\t"
5427 "LDM %[s]!, {r10, r11}\n\t"
5428 "UMLAL r10, lr, r2, r1\n\t"
5429 "ADDS r11, r11, lr\n\t"
5430 "MOV lr, #0x0\n\t"
5431 "ADC lr, lr, #0x0\n\t"
5432 "UMLAL r11, lr, r3, r1\n\t"
5433 "STM r12!, {r10, r11}\n\t"
5434 "LDM %[s]!, {r10, r11}\n\t"
5435 "ADDS r10, r10, lr\n\t"
5436 "MOV lr, #0x0\n\t"
5437 "ADC lr, lr, #0x0\n\t"
5438 "UMLAL r10, lr, r4, r1\n\t"
5439 "ADDS r11, r11, lr\n\t"
5440 "MOV lr, #0x0\n\t"
5441 "ADC lr, lr, #0x0\n\t"
5442 "UMLAL r11, lr, r5, r1\n\t"
5443 "STM r12!, {r10, r11}\n\t"
5444 "LDM %[s]!, {r10, r11}\n\t"
5445 "ADDS r10, r10, lr\n\t"
5446 "MOV lr, #0x0\n\t"
5447 "ADC lr, lr, #0x0\n\t"
5448 "UMLAL r10, lr, r6, r1\n\t"
5449 "ADDS r11, r11, lr\n\t"
5450 "MOV lr, #0x0\n\t"
5451 "ADC lr, lr, #0x0\n\t"
5452 "UMLAL r11, lr, r7, r1\n\t"
5453 "STM r12!, {r10, r11}\n\t"
5454 "LDM %[s]!, {r10, r11}\n\t"
5455 "ADDS r10, r10, lr\n\t"
5456 "MOV lr, #0x0\n\t"
5457 "ADC lr, lr, #0x0\n\t"
5458 "UMLAL r10, lr, r8, r1\n\t"
5459 "BFC r11, #28, #4\n\t"
5460 "ADDS r11, r11, lr\n\t"
5461 "MOV lr, #0x0\n\t"
5462 "ADC lr, lr, #0x0\n\t"
5463 "UMLAL r11, lr, r9, r1\n\t"
5464 "STM r12!, {r10, r11, lr}\n\t"
5465 "SUB %[s], %[s], #0x10\n\t"
5466 "SUB r12, r12, #0x20\n\t"
5467 "MOV r1, #0x9ce5\n\t"
5468 "MOVT r1, #0xa7ed\n\t"
5469 "MOV lr, #0x0\n\t"
5470 "LDM r12, {r10, r11}\n\t"
5471 "UMLAL r10, lr, r2, r1\n\t"
5472 "ADDS r11, r11, lr\n\t"
5473 "MOV lr, #0x0\n\t"
5474 "ADC lr, lr, #0x0\n\t"
5475 "UMLAL r11, lr, r3, r1\n\t"
5476 "STM r12!, {r10, r11}\n\t"
5477 "LDM r12, {r10, r11}\n\t"
5478 "ADDS r10, r10, lr\n\t"
5479 "MOV lr, #0x0\n\t"
5480 "ADC lr, lr, #0x0\n\t"
5481 "UMLAL r10, lr, r4, r1\n\t"
5482 "ADDS r11, r11, lr\n\t"
5483 "MOV lr, #0x0\n\t"
5484 "ADC lr, lr, #0x0\n\t"
5485 "UMLAL r11, lr, r5, r1\n\t"
5486 "STM r12!, {r10, r11}\n\t"
5487 "LDM r12, {r10, r11}\n\t"
5488 "ADDS r10, r10, lr\n\t"
5489 "MOV lr, #0x0\n\t"
5490 "ADC lr, lr, #0x0\n\t"
5491 "UMLAL r10, lr, r6, r1\n\t"
5492 "ADDS r11, r11, lr\n\t"
5493 "MOV lr, #0x0\n\t"
5494 "ADC lr, lr, #0x0\n\t"
5495 "UMLAL r11, lr, r7, r1\n\t"
5496 "STM r12!, {r10, r11}\n\t"
5497 "LDM r12, {r10, r11}\n\t"
5498 "ADDS r10, r10, lr\n\t"
5499 "MOV lr, #0x0\n\t"
5500 "ADC lr, lr, #0x0\n\t"
5501 "UMLAL r10, lr, r8, r1\n\t"
5502 "ADDS r11, r11, lr\n\t"
5503 "MOV lr, #0x0\n\t"
5504 "ADC lr, lr, #0x0\n\t"
5505 "UMLAL r11, lr, r9, r1\n\t"
5506 "STM r12!, {r10, r11, lr}\n\t"
5507 "SUB r12, r12, #0x20\n\t"
5508 "MOV r1, #0x6329\n\t"
5509 "MOVT r1, #0x5d08\n\t"
5510 "MOV lr, #0x0\n\t"
5511 "LDM r12, {r10, r11}\n\t"
5512 "UMLAL r10, lr, r2, r1\n\t"
5513 "ADDS r11, r11, lr\n\t"
5514 "MOV lr, #0x0\n\t"
5515 "ADC lr, lr, #0x0\n\t"
5516 "UMLAL r11, lr, r3, r1\n\t"
5517 "STM r12!, {r10, r11}\n\t"
5518 "LDM r12, {r10, r11}\n\t"
5519 "ADDS r10, r10, lr\n\t"
5520 "MOV lr, #0x0\n\t"
5521 "ADC lr, lr, #0x0\n\t"
5522 "UMLAL r10, lr, r4, r1\n\t"
5523 "ADDS r11, r11, lr\n\t"
5524 "MOV lr, #0x0\n\t"
5525 "ADC lr, lr, #0x0\n\t"
5526 "UMLAL r11, lr, r5, r1\n\t"
5527 "STM r12!, {r10, r11}\n\t"
5528 "LDM r12, {r10, r11}\n\t"
5529 "ADDS r10, r10, lr\n\t"
5530 "MOV lr, #0x0\n\t"
5531 "ADC lr, lr, #0x0\n\t"
5532 "UMLAL r10, lr, r6, r1\n\t"
5533 "ADDS r11, r11, lr\n\t"
5534 "MOV lr, #0x0\n\t"
5535 "ADC lr, lr, #0x0\n\t"
5536 "UMLAL r11, lr, r7, r1\n\t"
5537 "STM r12!, {r10, r11}\n\t"
5538 "LDM r12, {r10, r11}\n\t"
5539 "ADDS r10, r10, lr\n\t"
5540 "MOV lr, #0x0\n\t"
5541 "ADC lr, lr, #0x0\n\t"
5542 "UMLAL r10, lr, r8, r1\n\t"
5543 "ADDS r11, r11, lr\n\t"
5544 "MOV lr, #0x0\n\t"
5545 "ADC lr, lr, #0x0\n\t"
5546 "UMLAL r11, lr, r9, r1\n\t"
5547 "STM r12!, {r10, r11, lr}\n\t"
5548 "SUB r12, r12, #0x20\n\t"
5549 "MOV r1, #0x621\n\t"
5550 "MOVT r1, #0xeb21\n\t"
5551 "MOV lr, #0x0\n\t"
5552 "LDM r12, {r10, r11}\n\t"
5553 "UMLAL r10, lr, r2, r1\n\t"
5554 "ADDS r11, r11, lr\n\t"
5555 "MOV lr, #0x0\n\t"
5556 "ADC lr, lr, #0x0\n\t"
5557 "UMLAL r11, lr, r3, r1\n\t"
5558 "STM r12!, {r10, r11}\n\t"
5559 "LDM r12, {r10, r11}\n\t"
5560 "ADDS r10, r10, lr\n\t"
5561 "MOV lr, #0x0\n\t"
5562 "ADC lr, lr, #0x0\n\t"
5563 "UMLAL r10, lr, r4, r1\n\t"
5564 "ADDS r11, r11, lr\n\t"
5565 "MOV lr, #0x0\n\t"
5566 "ADC lr, lr, #0x0\n\t"
5567 "UMLAL r11, lr, r5, r1\n\t"
5568 "STM r12!, {r10, r11}\n\t"
5569 "LDM r12, {r10, r11}\n\t"
5570 "ADDS r10, r10, lr\n\t"
5571 "MOV lr, #0x0\n\t"
5572 "ADC lr, lr, #0x0\n\t"
5573 "UMLAL r10, lr, r6, r1\n\t"
5574 "ADDS r11, r11, lr\n\t"
5575 "MOV lr, #0x0\n\t"
5576 "ADC lr, lr, #0x0\n\t"
5577 "UMLAL r11, lr, r7, r1\n\t"
5578 "STM r12!, {r10, r11}\n\t"
5579 "LDM r12, {r10, r11}\n\t"
5580 "ADDS r10, r10, lr\n\t"
5581 "MOV lr, #0x0\n\t"
5582 "ADC lr, lr, #0x0\n\t"
5583 "UMLAL r10, lr, r8, r1\n\t"
5584 "ADDS r11, r11, lr\n\t"
5585 "MOV lr, #0x0\n\t"
5586 "ADC lr, lr, #0x0\n\t"
5587 "UMLAL r11, lr, r9, r1\n\t"
5588 "STM r12!, {r10, r11, lr}\n\t"
5589 "SUB r12, r12, #0x20\n\t"
5590 /* Subtract at 4 * 32 */
5591 "LDM r12, {r10, r11}\n\t"
5592 "SUBS r10, r10, r2\n\t"
5593 "SBCS r11, r11, r3\n\t"
5594 "STM r12!, {r10, r11}\n\t"
5595 "LDM r12, {r10, r11}\n\t"
5596 "SBCS r10, r10, r4\n\t"
5597 "SBCS r11, r11, r5\n\t"
5598 "STM r12!, {r10, r11}\n\t"
5599 "LDM r12, {r10, r11}\n\t"
5600 "SBCS r10, r10, r6\n\t"
5601 "SBCS r11, r11, r7\n\t"
5602 "STM r12!, {r10, r11}\n\t"
5603 "LDM r12, {r10, r11}\n\t"
5604 "SBCS r10, r10, r8\n\t"
5605 "SBC r11, r11, r9\n\t"
5606 "STM r12!, {r10, r11}\n\t"
5607 "SUB r12, r12, #0x24\n\t"
5608 "ASR lr, r11, #25\n\t"
5609 /* Conditionally subtract order starting at bit 125 */
5610 "MOV r1, #0xa0000000\n\t"
5611 "MOV r2, #0xba7d\n\t"
5612 "MOVT r2, #0x4b9e\n\t"
5613 "MOV r3, #0x4c63\n\t"
5614 "MOVT r3, #0xcb02\n\t"
5615 "MOV r4, #0xf39a\n\t"
5616 "MOVT r4, #0xd45e\n\t"
5617 "MOV r5, #0xdf3b\n\t"
5618 "MOVT r5, #0x29b\n\t"
5619 "MOV r9, #0x2000000\n\t"
5620 "AND r1, r1, lr\n\t"
5621 "AND r2, r2, lr\n\t"
5622 "AND r3, r3, lr\n\t"
5623 "AND r4, r4, lr\n\t"
5624 "AND r5, r5, lr\n\t"
5625 "AND r9, r9, lr\n\t"
5626 "LDM r12, {r10, r11}\n\t"
5627 "ADDS r10, r10, r1\n\t"
5628 "ADCS r11, r11, r2\n\t"
5629 "STM r12!, {r10, r11}\n\t"
5630 "LDM r12, {r10, r11}\n\t"
5631 "ADCS r10, r10, r3\n\t"
5632 "ADCS r11, r11, r4\n\t"
5633 "STM r12!, {r10, r11}\n\t"
5634 "LDM r12, {r10, r11}\n\t"
5635 "ADCS r10, r10, r5\n\t"
5636 "ADCS r11, r11, #0x0\n\t"
5637 "STM r12!, {r10, r11}\n\t"
5638 "LDM r12, {r10, r11}\n\t"
5639 "ADCS r10, r10, #0x0\n\t"
5640 "ADCS r11, r11, #0x0\n\t"
5641 "STM r12!, {r10, r11}\n\t"
5642 "LDM r12, {r10}\n\t"
5643 "ADCS r10, r10, #0x0\n\t"
5644 "STM r12!, {r10}\n\t"
5645 "SUB %[s], %[s], #0x10\n\t"
5646 "MOV r12, sp\n\t"
5647 /* Load bits 252-376 */
5648 "ADD r12, r12, #0x1c\n\t"
5649 "LDM r12, {r1, r2, r3, r4, r5}\n\t"
5650 "LSL r5, r5, #4\n\t"
5651 "ORR r5, r5, r4, LSR #28\n\t"
5652 "LSL r4, r4, #4\n\t"
5653 "ORR r4, r4, r3, LSR #28\n\t"
5654 "LSL r3, r3, #4\n\t"
5655 "ORR r3, r3, r2, LSR #28\n\t"
5656 "LSL r2, r2, #4\n\t"
5657 "ORR r2, r2, r1, LSR #28\n\t"
5658 "BFC r5, #29, #3\n\t"
5659 "SUB r12, r12, #0x1c\n\t"
5660 /* Sub product of top 4 words and order */
5661 "MOV %[s], sp\n\t"
5662 /* * -5cf5d3ed */
5663 "MOV r1, #0x2c13\n\t"
5664 "MOVT r1, #0xa30a\n\t"
5665 "MOV lr, #0x0\n\t"
5666 "LDM %[s], {r6, r7, r8, r9}\n\t"
5667 "UMLAL r6, lr, r2, r1\n\t"
5668 "ADDS r7, r7, lr\n\t"
5669 "MOV lr, #0x0\n\t"
5670 "ADC lr, lr, #0x0\n\t"
5671 "UMLAL r7, lr, r3, r1\n\t"
5672 "ADDS r8, r8, lr\n\t"
5673 "MOV lr, #0x0\n\t"
5674 "ADC lr, lr, #0x0\n\t"
5675 "UMLAL r8, lr, r4, r1\n\t"
5676 "ADDS r9, r9, lr\n\t"
5677 "MOV lr, #0x0\n\t"
5678 "ADC lr, lr, #0x0\n\t"
5679 "UMLAL r9, lr, r5, r1\n\t"
5680 "STM %[s], {r6, r7, r8, r9}\n\t"
5681 "ADD %[s], %[s], #0x4\n\t"
5682 /* * -5812631b */
5683 "MOV r1, #0x9ce5\n\t"
5684 "MOVT r1, #0xa7ed\n\t"
5685 "MOV r10, #0x0\n\t"
5686 "LDM %[s], {r6, r7, r8, r9}\n\t"
5687 "UMLAL r6, r10, r2, r1\n\t"
5688 "ADDS r7, r7, r10\n\t"
5689 "MOV r10, #0x0\n\t"
5690 "ADC r10, r10, #0x0\n\t"
5691 "UMLAL r7, r10, r3, r1\n\t"
5692 "ADDS r8, r8, r10\n\t"
5693 "MOV r10, #0x0\n\t"
5694 "ADC r10, r10, #0x0\n\t"
5695 "UMLAL r8, r10, r4, r1\n\t"
5696 "ADDS r9, r9, r10\n\t"
5697 "MOV r10, #0x0\n\t"
5698 "ADC r10, r10, #0x0\n\t"
5699 "UMLAL r9, r10, r5, r1\n\t"
5700 "STM %[s], {r6, r7, r8, r9}\n\t"
5701 "ADD %[s], %[s], #0x4\n\t"
5702 /* * -a2f79cd7 */
5703 "MOV r1, #0x6329\n\t"
5704 "MOVT r1, #0x5d08\n\t"
5705 "MOV r11, #0x0\n\t"
5706 "LDM %[s], {r6, r7, r8, r9}\n\t"
5707 "UMLAL r6, r11, r2, r1\n\t"
5708 "ADDS r7, r7, r11\n\t"
5709 "MOV r11, #0x0\n\t"
5710 "ADC r11, r11, #0x0\n\t"
5711 "UMLAL r7, r11, r3, r1\n\t"
5712 "ADDS r8, r8, r11\n\t"
5713 "MOV r11, #0x0\n\t"
5714 "ADC r11, r11, #0x0\n\t"
5715 "UMLAL r8, r11, r4, r1\n\t"
5716 "ADDS r9, r9, r11\n\t"
5717 "MOV r11, #0x0\n\t"
5718 "ADC r11, r11, #0x0\n\t"
5719 "UMLAL r9, r11, r5, r1\n\t"
5720 "STM %[s], {r6, r7, r8, r9}\n\t"
5721 "ADD %[s], %[s], #0x4\n\t"
5722 /* * -14def9df */
5723 "MOV r1, #0x621\n\t"
5724 "MOVT r1, #0xeb21\n\t"
5725 "MOV r12, #0x0\n\t"
5726 "LDM %[s], {r6, r7, r8, r9}\n\t"
5727 "UMLAL r6, r12, r2, r1\n\t"
5728 "ADDS r7, r7, r12\n\t"
5729 "MOV r12, #0x0\n\t"
5730 "ADC r12, r12, #0x0\n\t"
5731 "UMLAL r7, r12, r3, r1\n\t"
5732 "ADDS r8, r8, r12\n\t"
5733 "MOV r12, #0x0\n\t"
5734 "ADC r12, r12, #0x0\n\t"
5735 "UMLAL r8, r12, r4, r1\n\t"
5736 "ADDS r9, r9, r12\n\t"
5737 "MOV r12, #0x0\n\t"
5738 "ADC r12, r12, #0x0\n\t"
5739 "UMLAL r9, r12, r5, r1\n\t"
5740 "STM %[s], {r6, r7, r8, r9}\n\t"
5741 "ADD %[s], %[s], #0x4\n\t"
5742 /* Add overflows at 4 * 32 */
5743 "LDM %[s], {r6, r7, r8, r9}\n\t"
5744 "BFC r9, #28, #4\n\t"
5745 "ADDS r6, r6, lr\n\t"
5746 "ADCS r7, r7, r10\n\t"
5747 "ADCS r8, r8, r11\n\t"
5748 "ADC r9, r9, r12\n\t"
5749 /* Subtract top at 4 * 32 */
5750 "SUBS r6, r6, r2\n\t"
5751 "SBCS r7, r7, r3\n\t"
5752 "SBCS r8, r8, r4\n\t"
5753 "SBCS r9, r9, r5\n\t"
5754 "SBC r1, r1, r1\n\t"
5755 "SUB %[s], %[s], #0x10\n\t"
5756 "LDM %[s], {r2, r3, r4, r5}\n\t"
5757 "MOV r10, #0xd3ed\n\t"
5758 "MOVT r10, #0x5cf5\n\t"
5759 "MOV r11, #0x631a\n\t"
5760 "MOVT r11, #0x5812\n\t"
5761 "MOV r12, #0x9cd6\n\t"
5762 "MOVT r12, #0xa2f7\n\t"
5763 "MOV lr, #0xf9de\n\t"
5764 "MOVT lr, #0x14de\n\t"
5765 "AND r10, r10, r1\n\t"
5766 "AND r11, r11, r1\n\t"
5767 "AND r12, r12, r1\n\t"
5768 "AND lr, lr, r1\n\t"
5769 "ADDS r2, r2, r10\n\t"
5770 "ADCS r3, r3, r11\n\t"
5771 "ADCS r4, r4, r12\n\t"
5772 "ADCS r5, r5, lr\n\t"
5773 "ADCS r6, r6, #0x0\n\t"
5774 "ADCS r7, r7, #0x0\n\t"
5775 "AND r1, r1, #0x10000000\n\t"
5776 "ADCS r8, r8, #0x0\n\t"
5777 "ADC r9, r9, r1\n\t"
5778 "BFC r9, #28, #4\n\t"
5779 /* Store result */
5780 "LDR %[s], [sp, #52]\n\t"
5781 "STM %[s], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
5782 "ADD sp, sp, #0x38\n\t"
5783#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5784 : [s] "+r" (s)
5785 :
5786#else
5787 :
5788 : [s] "r" (s)
5789#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5790 : "memory", "cc", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
5791 "r10", "r11", "r12", "lr"
5792 );
5793}
5794
5795#else
5796#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5797WC_OMIT_FRAME_POINTER void sc_reduce(byte* s_p)
5798#else
5799WC_OMIT_FRAME_POINTER void sc_reduce(byte* s)
5800#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5801{
5802#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
5803 register byte* s __asm__ ("r0") = (byte*)s_p;
5804#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
5805
5806 __asm__ __volatile__ (
5807 "SUB sp, sp, #0x38\n\t"
5808 "STR %[s], [sp, #52]\n\t"
5809 /* Load bits 252-511 */
5810 "ADD %[s], %[s], #0x1c\n\t"
5811 "LDM %[s], {r1, r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
5812 "LSR lr, r9, #24\n\t"
5813 "LSL r9, r9, #4\n\t"
5814 "ORR r9, r9, r8, LSR #28\n\t"
5815 "LSL r8, r8, #4\n\t"
5816 "ORR r8, r8, r7, LSR #28\n\t"
5817 "LSL r7, r7, #4\n\t"
5818 "ORR r7, r7, r6, LSR #28\n\t"
5819 "LSL r6, r6, #4\n\t"
5820 "ORR r6, r6, r5, LSR #28\n\t"
5821 "LSL r5, r5, #4\n\t"
5822 "ORR r5, r5, r4, LSR #28\n\t"
5823 "LSL r4, r4, #4\n\t"
5824 "ORR r4, r4, r3, LSR #28\n\t"
5825 "LSL r3, r3, #4\n\t"
5826 "ORR r3, r3, r2, LSR #28\n\t"
5827 "LSL r2, r2, #4\n\t"
5828 "ORR r2, r2, r1, LSR #28\n\t"
5829 "BFC r9, #28, #4\n\t"
5830 "SUB %[s], %[s], #0x1c\n\t"
5831 /* Add order times bits 504..511 */
5832 "MOV r10, #0x2c13\n\t"
5833 "MOVT r10, #0xa30a\n\t"
5834 "MOV r11, #0x9ce5\n\t"
5835 "MOVT r11, #0xa7ed\n\t"
5836 "MOV r1, #0x0\n\t"
5837 "UMLAL r2, r1, r10, lr\n\t"
5838 "UMAAL r3, r1, r11, lr\n\t"
5839 "MOV r10, #0x6329\n\t"
5840 "MOVT r10, #0x5d08\n\t"
5841 "MOV r11, #0x621\n\t"
5842 "MOVT r11, #0xeb21\n\t"
5843 "UMAAL r4, r1, r10, lr\n\t"
5844 "UMAAL r5, r1, r11, lr\n\t"
5845 "ADDS r6, r6, r1\n\t"
5846 "ADCS r7, r7, #0x0\n\t"
5847 "ADCS r8, r8, #0x0\n\t"
5848 "ADC r9, r9, #0x0\n\t"
5849 "SUBS r6, r6, lr\n\t"
5850 "SBCS r7, r7, #0x0\n\t"
5851 "SBCS r8, r8, #0x0\n\t"
5852 "SBC r9, r9, #0x0\n\t"
5853 /* Sub product of top 8 words and order */
5854 "MOV r12, sp\n\t"
5855 "MOV r1, #0x2c13\n\t"
5856 "MOVT r1, #0xa30a\n\t"
5857 "MOV lr, #0x0\n\t"
5858 "LDM %[s]!, {r10, r11}\n\t"
5859 "UMLAL r10, lr, r2, r1\n\t"
5860 "UMAAL r11, lr, r3, r1\n\t"
5861 "STM r12!, {r10, r11}\n\t"
5862 "LDM %[s]!, {r10, r11}\n\t"
5863 "UMAAL r10, lr, r4, r1\n\t"
5864 "UMAAL r11, lr, r5, r1\n\t"
5865 "STM r12!, {r10, r11}\n\t"
5866 "LDM %[s]!, {r10, r11}\n\t"
5867 "UMAAL r10, lr, r6, r1\n\t"
5868 "UMAAL r11, lr, r7, r1\n\t"
5869 "STM r12!, {r10, r11}\n\t"
5870 "LDM %[s]!, {r10, r11}\n\t"
5871 "UMAAL r10, lr, r8, r1\n\t"
5872 "BFC r11, #28, #4\n\t"
5873 "UMAAL r11, lr, r9, r1\n\t"
5874 "STM r12!, {r10, r11, lr}\n\t"
5875 "SUB %[s], %[s], #0x10\n\t"
5876 "SUB r12, r12, #0x20\n\t"
5877 "MOV r1, #0x9ce5\n\t"
5878 "MOVT r1, #0xa7ed\n\t"
5879 "MOV lr, #0x0\n\t"
5880 "LDM r12, {r10, r11}\n\t"
5881 "UMLAL r10, lr, r2, r1\n\t"
5882 "UMAAL r11, lr, r3, r1\n\t"
5883 "STM r12!, {r10, r11}\n\t"
5884 "LDM r12, {r10, r11}\n\t"
5885 "UMAAL r10, lr, r4, r1\n\t"
5886 "UMAAL r11, lr, r5, r1\n\t"
5887 "STM r12!, {r10, r11}\n\t"
5888 "LDM r12, {r10, r11}\n\t"
5889 "UMAAL r10, lr, r6, r1\n\t"
5890 "UMAAL r11, lr, r7, r1\n\t"
5891 "STM r12!, {r10, r11}\n\t"
5892 "LDM r12, {r10, r11}\n\t"
5893 "UMAAL r10, lr, r8, r1\n\t"
5894 "UMAAL r11, lr, r9, r1\n\t"
5895 "STM r12!, {r10, r11, lr}\n\t"
5896 "SUB r12, r12, #0x20\n\t"
5897 "MOV r1, #0x6329\n\t"
5898 "MOVT r1, #0x5d08\n\t"
5899 "MOV lr, #0x0\n\t"
5900 "LDM r12, {r10, r11}\n\t"
5901 "UMLAL r10, lr, r2, r1\n\t"
5902 "UMAAL r11, lr, r3, r1\n\t"
5903 "STM r12!, {r10, r11}\n\t"
5904 "LDM r12, {r10, r11}\n\t"
5905 "UMAAL r10, lr, r4, r1\n\t"
5906 "UMAAL r11, lr, r5, r1\n\t"
5907 "STM r12!, {r10, r11}\n\t"
5908 "LDM r12, {r10, r11}\n\t"
5909 "UMAAL r10, lr, r6, r1\n\t"
5910 "UMAAL r11, lr, r7, r1\n\t"
5911 "STM r12!, {r10, r11}\n\t"
5912 "LDM r12, {r10, r11}\n\t"
5913 "UMAAL r10, lr, r8, r1\n\t"
5914 "UMAAL r11, lr, r9, r1\n\t"
5915 "STM r12!, {r10, r11, lr}\n\t"
5916 "SUB r12, r12, #0x20\n\t"
5917 "MOV r1, #0x621\n\t"
5918 "MOVT r1, #0xeb21\n\t"
5919 "MOV lr, #0x0\n\t"
5920 "LDM r12, {r10, r11}\n\t"
5921 "UMLAL r10, lr, r2, r1\n\t"
5922 "UMAAL r11, lr, r3, r1\n\t"
5923 "STM r12!, {r10, r11}\n\t"
5924 "LDM r12, {r10, r11}\n\t"
5925 "UMAAL r10, lr, r4, r1\n\t"
5926 "UMAAL r11, lr, r5, r1\n\t"
5927 "STM r12!, {r10, r11}\n\t"
5928 "LDM r12, {r10, r11}\n\t"
5929 "UMAAL r10, lr, r6, r1\n\t"
5930 "UMAAL r11, lr, r7, r1\n\t"
5931 "STM r12!, {r10, r11}\n\t"
5932 "LDM r12, {r10, r11}\n\t"
5933 "UMAAL r10, lr, r8, r1\n\t"
5934 "UMAAL r11, lr, r9, r1\n\t"
5935 "STM r12!, {r10, r11, lr}\n\t"
5936 "SUB r12, r12, #0x20\n\t"
5937 /* Subtract at 4 * 32 */
5938 "LDM r12, {r10, r11}\n\t"
5939 "SUBS r10, r10, r2\n\t"
5940 "SBCS r11, r11, r3\n\t"
5941 "STM r12!, {r10, r11}\n\t"
5942 "LDM r12, {r10, r11}\n\t"
5943 "SBCS r10, r10, r4\n\t"
5944 "SBCS r11, r11, r5\n\t"
5945 "STM r12!, {r10, r11}\n\t"
5946 "LDM r12, {r10, r11}\n\t"
5947 "SBCS r10, r10, r6\n\t"
5948 "SBCS r11, r11, r7\n\t"
5949 "STM r12!, {r10, r11}\n\t"
5950 "LDM r12, {r10, r11}\n\t"
5951 "SBCS r10, r10, r8\n\t"
5952 "SBC r11, r11, r9\n\t"
5953 "STM r12!, {r10, r11}\n\t"
5954 "SUB r12, r12, #0x24\n\t"
5955 "ASR lr, r11, #25\n\t"
5956 /* Conditionally subtract order starting at bit 125 */
5957 "MOV r1, #0xa0000000\n\t"
5958 "MOV r2, #0xba7d\n\t"
5959 "MOVT r2, #0x4b9e\n\t"
5960 "MOV r3, #0x4c63\n\t"
5961 "MOVT r3, #0xcb02\n\t"
5962 "MOV r4, #0xf39a\n\t"
5963 "MOVT r4, #0xd45e\n\t"
5964 "MOV r5, #0xdf3b\n\t"
5965 "MOVT r5, #0x29b\n\t"
5966 "MOV r9, #0x2000000\n\t"
5967 "AND r1, r1, lr\n\t"
5968 "AND r2, r2, lr\n\t"
5969 "AND r3, r3, lr\n\t"
5970 "AND r4, r4, lr\n\t"
5971 "AND r5, r5, lr\n\t"
5972 "AND r9, r9, lr\n\t"
5973 "LDM r12, {r10, r11}\n\t"
5974 "ADDS r10, r10, r1\n\t"
5975 "ADCS r11, r11, r2\n\t"
5976 "STM r12!, {r10, r11}\n\t"
5977 "LDM r12, {r10, r11}\n\t"
5978 "ADCS r10, r10, r3\n\t"
5979 "ADCS r11, r11, r4\n\t"
5980 "STM r12!, {r10, r11}\n\t"
5981 "LDM r12, {r10, r11}\n\t"
5982 "ADCS r10, r10, r5\n\t"
5983 "ADCS r11, r11, #0x0\n\t"
5984 "STM r12!, {r10, r11}\n\t"
5985 "LDM r12, {r10, r11}\n\t"
5986 "ADCS r10, r10, #0x0\n\t"
5987 "ADCS r11, r11, #0x0\n\t"
5988 "STM r12!, {r10, r11}\n\t"
5989 "LDM r12, {r10}\n\t"
5990 "ADCS r10, r10, #0x0\n\t"
5991 "STM r12!, {r10}\n\t"
5992 "SUB %[s], %[s], #0x10\n\t"
5993 "MOV r12, sp\n\t"
5994 /* Load bits 252-376 */
5995 "ADD r12, r12, #0x1c\n\t"
5996 "LDM r12, {r1, r2, r3, r4, r5}\n\t"
5997 "LSL r5, r5, #4\n\t"
5998 "ORR r5, r5, r4, LSR #28\n\t"
5999 "LSL r4, r4, #4\n\t"
6000 "ORR r4, r4, r3, LSR #28\n\t"
6001 "LSL r3, r3, #4\n\t"
6002 "ORR r3, r3, r2, LSR #28\n\t"
6003 "LSL r2, r2, #4\n\t"
6004 "ORR r2, r2, r1, LSR #28\n\t"
6005 "BFC r5, #29, #3\n\t"
6006 "SUB r12, r12, #0x1c\n\t"
6007 /* Sub product of top 4 words and order */
6008 "MOV %[s], sp\n\t"
6009 /* * -5cf5d3ed */
6010 "MOV r1, #0x2c13\n\t"
6011 "MOVT r1, #0xa30a\n\t"
6012 "MOV lr, #0x0\n\t"
6013 "LDM %[s], {r6, r7, r8, r9}\n\t"
6014 "UMLAL r6, lr, r2, r1\n\t"
6015 "UMAAL r7, lr, r3, r1\n\t"
6016 "UMAAL r8, lr, r4, r1\n\t"
6017 "UMAAL r9, lr, r5, r1\n\t"
6018 "STM %[s], {r6, r7, r8, r9}\n\t"
6019 "ADD %[s], %[s], #0x4\n\t"
6020 /* * -5812631b */
6021 "MOV r1, #0x9ce5\n\t"
6022 "MOVT r1, #0xa7ed\n\t"
6023 "MOV r10, #0x0\n\t"
6024 "LDM %[s], {r6, r7, r8, r9}\n\t"
6025 "UMLAL r6, r10, r2, r1\n\t"
6026 "UMAAL r7, r10, r3, r1\n\t"
6027 "UMAAL r8, r10, r4, r1\n\t"
6028 "UMAAL r9, r10, r5, r1\n\t"
6029 "STM %[s], {r6, r7, r8, r9}\n\t"
6030 "ADD %[s], %[s], #0x4\n\t"
6031 /* * -a2f79cd7 */
6032 "MOV r1, #0x6329\n\t"
6033 "MOVT r1, #0x5d08\n\t"
6034 "MOV r11, #0x0\n\t"
6035 "LDM %[s], {r6, r7, r8, r9}\n\t"
6036 "UMLAL r6, r11, r2, r1\n\t"
6037 "UMAAL r7, r11, r3, r1\n\t"
6038 "UMAAL r8, r11, r4, r1\n\t"
6039 "UMAAL r9, r11, r5, r1\n\t"
6040 "STM %[s], {r6, r7, r8, r9}\n\t"
6041 "ADD %[s], %[s], #0x4\n\t"
6042 /* * -14def9df */
6043 "MOV r1, #0x621\n\t"
6044 "MOVT r1, #0xeb21\n\t"
6045 "MOV r12, #0x0\n\t"
6046 "LDM %[s], {r6, r7, r8, r9}\n\t"
6047 "UMLAL r6, r12, r2, r1\n\t"
6048 "UMAAL r7, r12, r3, r1\n\t"
6049 "UMAAL r8, r12, r4, r1\n\t"
6050 "UMAAL r9, r12, r5, r1\n\t"
6051 "STM %[s], {r6, r7, r8, r9}\n\t"
6052 "ADD %[s], %[s], #0x4\n\t"
6053 /* Add overflows at 4 * 32 */
6054 "LDM %[s], {r6, r7, r8, r9}\n\t"
6055 "BFC r9, #28, #4\n\t"
6056 "ADDS r6, r6, lr\n\t"
6057 "ADCS r7, r7, r10\n\t"
6058 "ADCS r8, r8, r11\n\t"
6059 "ADC r9, r9, r12\n\t"
6060 /* Subtract top at 4 * 32 */
6061 "SUBS r6, r6, r2\n\t"
6062 "SBCS r7, r7, r3\n\t"
6063 "SBCS r8, r8, r4\n\t"
6064 "SBCS r9, r9, r5\n\t"
6065 "SBC r1, r1, r1\n\t"
6066 "SUB %[s], %[s], #0x10\n\t"
6067 "LDM %[s], {r2, r3, r4, r5}\n\t"
6068 "MOV r10, #0xd3ed\n\t"
6069 "MOVT r10, #0x5cf5\n\t"
6070 "MOV r11, #0x631a\n\t"
6071 "MOVT r11, #0x5812\n\t"
6072 "MOV r12, #0x9cd6\n\t"
6073 "MOVT r12, #0xa2f7\n\t"
6074 "MOV lr, #0xf9de\n\t"
6075 "MOVT lr, #0x14de\n\t"
6076 "AND r10, r10, r1\n\t"
6077 "AND r11, r11, r1\n\t"
6078 "AND r12, r12, r1\n\t"
6079 "AND lr, lr, r1\n\t"
6080 "ADDS r2, r2, r10\n\t"
6081 "ADCS r3, r3, r11\n\t"
6082 "ADCS r4, r4, r12\n\t"
6083 "ADCS r5, r5, lr\n\t"
6084 "ADCS r6, r6, #0x0\n\t"
6085 "ADCS r7, r7, #0x0\n\t"
6086 "AND r1, r1, #0x10000000\n\t"
6087 "ADCS r8, r8, #0x0\n\t"
6088 "ADC r9, r9, r1\n\t"
6089 "BFC r9, #28, #4\n\t"
6090 /* Store result */
6091 "LDR %[s], [sp, #52]\n\t"
6092 "STM %[s], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
6093 "ADD sp, sp, #0x38\n\t"
6094#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
6095 : [s] "+r" (s)
6096 :
6097#else
6098 :
6099 : [s] "r" (s)
6100#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
6101 : "memory", "cc", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
6102 "r10", "r11", "r12", "lr"
6103 );
6104}
6105
6106#endif /* WOLFSSL_ARM_ARCH_7M */
6107#ifdef HAVE_ED25519_SIGN
6108#ifdef WOLFSSL_ARM_ARCH_7M
6109#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
6110WC_OMIT_FRAME_POINTER void sc_muladd(byte* s_p, const byte* a_p,
6111 const byte* b_p, const byte* c_p)
6112#else
6113WC_OMIT_FRAME_POINTER void sc_muladd(byte* s, const byte* a, const byte* b,
6114 const byte* c)
6115#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
6116{
6117#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
6118 register byte* s __asm__ ("r0") = (byte*)s_p;
6119 register const byte* a __asm__ ("r1") = (const byte*)a_p;
6120 register const byte* b __asm__ ("r2") = (const byte*)b_p;
6121 register const byte* c __asm__ ("r3") = (const byte*)c_p;
6122#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
6123
6124 __asm__ __volatile__ (
6125 "SUB sp, sp, #0x50\n\t"
6126 "ADD lr, sp, #0x44\n\t"
6127 "STM lr, {%[s], %[a], %[c]}\n\t"
6128 "MOV %[s], #0x0\n\t"
6129 "LDR r12, [%[a]]\n\t"
6130 /* A[0] * B[0] */
6131 "LDR lr, [%[b]]\n\t"
6132 "UMULL %[c], r4, r12, lr\n\t"
6133 /* A[0] * B[2] */
6134 "LDR lr, [%[b], #8]\n\t"
6135 "UMULL r5, r6, r12, lr\n\t"
6136 /* A[0] * B[4] */
6137 "LDR lr, [%[b], #16]\n\t"
6138 "UMULL r7, r8, r12, lr\n\t"
6139 /* A[0] * B[6] */
6140 "LDR lr, [%[b], #24]\n\t"
6141 "UMULL r9, r10, r12, lr\n\t"
6142 "STR %[c], [sp]\n\t"
6143 /* A[0] * B[1] */
6144 "LDR lr, [%[b], #4]\n\t"
6145 "MOV r11, %[s]\n\t"
6146 "UMLAL r4, r11, r12, lr\n\t"
6147 "ADDS r5, r5, r11\n\t"
6148 /* A[0] * B[3] */
6149 "LDR lr, [%[b], #12]\n\t"
6150 "ADCS r6, r6, #0x0\n\t"
6151 "ADC r11, %[s], #0x0\n\t"
6152 "UMLAL r6, r11, r12, lr\n\t"
6153 "ADDS r7, r7, r11\n\t"
6154 /* A[0] * B[5] */
6155 "LDR lr, [%[b], #20]\n\t"
6156 "ADCS r8, r8, #0x0\n\t"
6157 "ADC r11, %[s], #0x0\n\t"
6158 "UMLAL r8, r11, r12, lr\n\t"
6159 "ADDS r9, r9, r11\n\t"
6160 /* A[0] * B[7] */
6161 "LDR lr, [%[b], #28]\n\t"
6162 "ADCS r10, r10, #0x0\n\t"
6163 "ADC %[c], %[s], #0x0\n\t"
6164 "UMLAL r10, %[c], r12, lr\n\t"
6165 /* A[1] * B[0] */
6166 "LDR r12, [%[a], #4]\n\t"
6167 "LDR lr, [%[b]]\n\t"
6168 "MOV r11, #0x0\n\t"
6169 "UMLAL r4, r11, r12, lr\n\t"
6170 "STR r4, [sp, #4]\n\t"
6171 "ADDS r5, r5, r11\n\t"
6172 /* A[1] * B[1] */
6173 "LDR lr, [%[b], #4]\n\t"
6174 "ADC r11, %[s], #0x0\n\t"
6175 "UMLAL r5, r11, r12, lr\n\t"
6176 "ADDS r6, r6, r11\n\t"
6177 /* A[1] * B[2] */
6178 "LDR lr, [%[b], #8]\n\t"
6179 "ADC r11, %[s], #0x0\n\t"
6180 "UMLAL r6, r11, r12, lr\n\t"
6181 "ADDS r7, r7, r11\n\t"
6182 /* A[1] * B[3] */
6183 "LDR lr, [%[b], #12]\n\t"
6184 "ADC r11, %[s], #0x0\n\t"
6185 "UMLAL r7, r11, r12, lr\n\t"
6186 "ADDS r8, r8, r11\n\t"
6187 /* A[1] * B[4] */
6188 "LDR lr, [%[b], #16]\n\t"
6189 "ADC r11, %[s], #0x0\n\t"
6190 "UMLAL r8, r11, r12, lr\n\t"
6191 "ADDS r9, r9, r11\n\t"
6192 /* A[1] * B[5] */
6193 "LDR lr, [%[b], #20]\n\t"
6194 "ADC r11, %[s], #0x0\n\t"
6195 "UMLAL r9, r11, r12, lr\n\t"
6196 "ADDS r10, r10, r11\n\t"
6197 /* A[1] * B[6] */
6198 "LDR lr, [%[b], #24]\n\t"
6199 "ADC r11, %[s], #0x0\n\t"
6200 "UMLAL r10, r11, r12, lr\n\t"
6201 "ADDS %[c], %[c], r11\n\t"
6202 /* A[1] * B[7] */
6203 "LDR lr, [%[b], #28]\n\t"
6204 "ADC r4, %[s], #0x0\n\t"
6205 "UMLAL %[c], r4, r12, lr\n\t"
6206 /* A[2] * B[0] */
6207 "LDR r12, [%[a], #8]\n\t"
6208 "LDR lr, [%[b]]\n\t"
6209 "MOV r11, #0x0\n\t"
6210 "UMLAL r5, r11, r12, lr\n\t"
6211 "STR r5, [sp, #8]\n\t"
6212 "ADDS r6, r6, r11\n\t"
6213 /* A[2] * B[1] */
6214 "LDR lr, [%[b], #4]\n\t"
6215 "ADC r11, %[s], #0x0\n\t"
6216 "UMLAL r6, r11, r12, lr\n\t"
6217 "ADDS r7, r7, r11\n\t"
6218 /* A[2] * B[2] */
6219 "LDR lr, [%[b], #8]\n\t"
6220 "ADC r11, %[s], #0x0\n\t"
6221 "UMLAL r7, r11, r12, lr\n\t"
6222 "ADDS r8, r8, r11\n\t"
6223 /* A[2] * B[3] */
6224 "LDR lr, [%[b], #12]\n\t"
6225 "ADC r11, %[s], #0x0\n\t"
6226 "UMLAL r8, r11, r12, lr\n\t"
6227 "ADDS r9, r9, r11\n\t"
6228 /* A[2] * B[4] */
6229 "LDR lr, [%[b], #16]\n\t"
6230 "ADC r11, %[s], #0x0\n\t"
6231 "UMLAL r9, r11, r12, lr\n\t"
6232 "ADDS r10, r10, r11\n\t"
6233 /* A[2] * B[5] */
6234 "LDR lr, [%[b], #20]\n\t"
6235 "ADC r11, %[s], #0x0\n\t"
6236 "UMLAL r10, r11, r12, lr\n\t"
6237 "ADDS %[c], %[c], r11\n\t"
6238 /* A[2] * B[6] */
6239 "LDR lr, [%[b], #24]\n\t"
6240 "ADC r11, %[s], #0x0\n\t"
6241 "UMLAL %[c], r11, r12, lr\n\t"
6242 "ADDS r4, r4, r11\n\t"
6243 /* A[2] * B[7] */
6244 "LDR lr, [%[b], #28]\n\t"
6245 "ADC r5, %[s], #0x0\n\t"
6246 "UMLAL r4, r5, r12, lr\n\t"
6247 /* A[3] * B[0] */
6248 "LDR r12, [%[a], #12]\n\t"
6249 "LDR lr, [%[b]]\n\t"
6250 "MOV r11, #0x0\n\t"
6251 "UMLAL r6, r11, r12, lr\n\t"
6252 "STR r6, [sp, #12]\n\t"
6253 "ADDS r7, r7, r11\n\t"
6254 /* A[3] * B[1] */
6255 "LDR lr, [%[b], #4]\n\t"
6256 "ADC r11, %[s], #0x0\n\t"
6257 "UMLAL r7, r11, r12, lr\n\t"
6258 "ADDS r8, r8, r11\n\t"
6259 /* A[3] * B[2] */
6260 "LDR lr, [%[b], #8]\n\t"
6261 "ADC r11, %[s], #0x0\n\t"
6262 "UMLAL r8, r11, r12, lr\n\t"
6263 "ADDS r9, r9, r11\n\t"
6264 /* A[3] * B[3] */
6265 "LDR lr, [%[b], #12]\n\t"
6266 "ADC r11, %[s], #0x0\n\t"
6267 "UMLAL r9, r11, r12, lr\n\t"
6268 "ADDS r10, r10, r11\n\t"
6269 /* A[3] * B[4] */
6270 "LDR lr, [%[b], #16]\n\t"
6271 "ADC r11, %[s], #0x0\n\t"
6272 "UMLAL r10, r11, r12, lr\n\t"
6273 "ADDS %[c], %[c], r11\n\t"
6274 /* A[3] * B[5] */
6275 "LDR lr, [%[b], #20]\n\t"
6276 "ADC r11, %[s], #0x0\n\t"
6277 "UMLAL %[c], r11, r12, lr\n\t"
6278 "ADDS r4, r4, r11\n\t"
6279 /* A[3] * B[6] */
6280 "LDR lr, [%[b], #24]\n\t"
6281 "ADC r11, %[s], #0x0\n\t"
6282 "UMLAL r4, r11, r12, lr\n\t"
6283 "ADDS r5, r5, r11\n\t"
6284 /* A[3] * B[7] */
6285 "LDR lr, [%[b], #28]\n\t"
6286 "ADC r6, %[s], #0x0\n\t"
6287 "UMLAL r5, r6, r12, lr\n\t"
6288 /* A[4] * B[0] */
6289 "LDR r12, [%[a], #16]\n\t"
6290 "LDR lr, [%[b]]\n\t"
6291 "MOV r11, #0x0\n\t"
6292 "UMLAL r7, r11, r12, lr\n\t"
6293 "STR r7, [sp, #16]\n\t"
6294 "ADDS r8, r8, r11\n\t"
6295 /* A[4] * B[1] */
6296 "LDR lr, [%[b], #4]\n\t"
6297 "ADC r11, %[s], #0x0\n\t"
6298 "UMLAL r8, r11, r12, lr\n\t"
6299 "ADDS r9, r9, r11\n\t"
6300 /* A[4] * B[2] */
6301 "LDR lr, [%[b], #8]\n\t"
6302 "ADC r11, %[s], #0x0\n\t"
6303 "UMLAL r9, r11, r12, lr\n\t"
6304 "ADDS r10, r10, r11\n\t"
6305 /* A[4] * B[3] */
6306 "LDR lr, [%[b], #12]\n\t"
6307 "ADC r11, %[s], #0x0\n\t"
6308 "UMLAL r10, r11, r12, lr\n\t"
6309 "ADDS %[c], %[c], r11\n\t"
6310 /* A[4] * B[4] */
6311 "LDR lr, [%[b], #16]\n\t"
6312 "ADC r11, %[s], #0x0\n\t"
6313 "UMLAL %[c], r11, r12, lr\n\t"
6314 "ADDS r4, r4, r11\n\t"
6315 /* A[4] * B[5] */
6316 "LDR lr, [%[b], #20]\n\t"
6317 "ADC r11, %[s], #0x0\n\t"
6318 "UMLAL r4, r11, r12, lr\n\t"
6319 "ADDS r5, r5, r11\n\t"
6320 /* A[4] * B[6] */
6321 "LDR lr, [%[b], #24]\n\t"
6322 "ADC r11, %[s], #0x0\n\t"
6323 "UMLAL r5, r11, r12, lr\n\t"
6324 "ADDS r6, r6, r11\n\t"
6325 /* A[4] * B[7] */
6326 "LDR lr, [%[b], #28]\n\t"
6327 "ADC r7, %[s], #0x0\n\t"
6328 "UMLAL r6, r7, r12, lr\n\t"
6329 /* A[5] * B[0] */
6330 "LDR r12, [%[a], #20]\n\t"
6331 "LDR lr, [%[b]]\n\t"
6332 "MOV r11, #0x0\n\t"
6333 "UMLAL r8, r11, r12, lr\n\t"
6334 "STR r8, [sp, #20]\n\t"
6335 "ADDS r9, r9, r11\n\t"
6336 /* A[5] * B[1] */
6337 "LDR lr, [%[b], #4]\n\t"
6338 "ADC r11, %[s], #0x0\n\t"
6339 "UMLAL r9, r11, r12, lr\n\t"
6340 "ADDS r10, r10, r11\n\t"
6341 /* A[5] * B[2] */
6342 "LDR lr, [%[b], #8]\n\t"
6343 "ADC r11, %[s], #0x0\n\t"
6344 "UMLAL r10, r11, r12, lr\n\t"
6345 "ADDS %[c], %[c], r11\n\t"
6346 /* A[5] * B[3] */
6347 "LDR lr, [%[b], #12]\n\t"
6348 "ADC r11, %[s], #0x0\n\t"
6349 "UMLAL %[c], r11, r12, lr\n\t"
6350 "ADDS r4, r4, r11\n\t"
6351 /* A[5] * B[4] */
6352 "LDR lr, [%[b], #16]\n\t"
6353 "ADC r11, %[s], #0x0\n\t"
6354 "UMLAL r4, r11, r12, lr\n\t"
6355 "ADDS r5, r5, r11\n\t"
6356 /* A[5] * B[5] */
6357 "LDR lr, [%[b], #20]\n\t"
6358 "ADC r11, %[s], #0x0\n\t"
6359 "UMLAL r5, r11, r12, lr\n\t"
6360 "ADDS r6, r6, r11\n\t"
6361 /* A[5] * B[6] */
6362 "LDR lr, [%[b], #24]\n\t"
6363 "ADC r11, %[s], #0x0\n\t"
6364 "UMLAL r6, r11, r12, lr\n\t"
6365 "ADDS r7, r7, r11\n\t"
6366 /* A[5] * B[7] */
6367 "LDR lr, [%[b], #28]\n\t"
6368 "ADC r8, %[s], #0x0\n\t"
6369 "UMLAL r7, r8, r12, lr\n\t"
6370 /* A[6] * B[0] */
6371 "LDR r12, [%[a], #24]\n\t"
6372 "LDR lr, [%[b]]\n\t"
6373 "MOV r11, #0x0\n\t"
6374 "UMLAL r9, r11, r12, lr\n\t"
6375 "STR r9, [sp, #24]\n\t"
6376 "ADDS r10, r10, r11\n\t"
6377 /* A[6] * B[1] */
6378 "LDR lr, [%[b], #4]\n\t"
6379 "ADC r11, %[s], #0x0\n\t"
6380 "UMLAL r10, r11, r12, lr\n\t"
6381 "ADDS %[c], %[c], r11\n\t"
6382 /* A[6] * B[2] */
6383 "LDR lr, [%[b], #8]\n\t"
6384 "ADC r11, %[s], #0x0\n\t"
6385 "UMLAL %[c], r11, r12, lr\n\t"
6386 "ADDS r4, r4, r11\n\t"
6387 /* A[6] * B[3] */
6388 "LDR lr, [%[b], #12]\n\t"
6389 "ADC r11, %[s], #0x0\n\t"
6390 "UMLAL r4, r11, r12, lr\n\t"
6391 "ADDS r5, r5, r11\n\t"
6392 /* A[6] * B[4] */
6393 "LDR lr, [%[b], #16]\n\t"
6394 "ADC r11, %[s], #0x0\n\t"
6395 "UMLAL r5, r11, r12, lr\n\t"
6396 "ADDS r6, r6, r11\n\t"
6397 /* A[6] * B[5] */
6398 "LDR lr, [%[b], #20]\n\t"
6399 "ADC r11, %[s], #0x0\n\t"
6400 "UMLAL r6, r11, r12, lr\n\t"
6401 "ADDS r7, r7, r11\n\t"
6402 /* A[6] * B[6] */
6403 "LDR lr, [%[b], #24]\n\t"
6404 "ADC r11, %[s], #0x0\n\t"
6405 "UMLAL r7, r11, r12, lr\n\t"
6406 "ADDS r8, r8, r11\n\t"
6407 /* A[6] * B[7] */
6408 "LDR lr, [%[b], #28]\n\t"
6409 "ADC r9, %[s], #0x0\n\t"
6410 "UMLAL r8, r9, r12, lr\n\t"
6411 /* A[7] * B[0] */
6412 "LDR r12, [%[a], #28]\n\t"
6413 "LDR lr, [%[b]]\n\t"
6414 "MOV r11, #0x0\n\t"
6415 "UMLAL r10, r11, r12, lr\n\t"
6416 "STR r10, [sp, #28]\n\t"
6417 "ADDS %[c], %[c], r11\n\t"
6418 /* A[7] * B[1] */
6419 "LDR lr, [%[b], #4]\n\t"
6420 "ADC r11, %[s], #0x0\n\t"
6421 "UMLAL %[c], r11, r12, lr\n\t"
6422 "ADDS r4, r4, r11\n\t"
6423 /* A[7] * B[2] */
6424 "LDR lr, [%[b], #8]\n\t"
6425 "ADC r11, %[s], #0x0\n\t"
6426 "UMLAL r4, r11, r12, lr\n\t"
6427 "ADDS r5, r5, r11\n\t"
6428 /* A[7] * B[3] */
6429 "LDR lr, [%[b], #12]\n\t"
6430 "ADC r11, %[s], #0x0\n\t"
6431 "UMLAL r5, r11, r12, lr\n\t"
6432 "ADDS r6, r6, r11\n\t"
6433 /* A[7] * B[4] */
6434 "LDR lr, [%[b], #16]\n\t"
6435 "ADC r11, %[s], #0x0\n\t"
6436 "UMLAL r6, r11, r12, lr\n\t"
6437 "ADDS r7, r7, r11\n\t"
6438 /* A[7] * B[5] */
6439 "LDR lr, [%[b], #20]\n\t"
6440 "ADC r11, %[s], #0x0\n\t"
6441 "UMLAL r7, r11, r12, lr\n\t"
6442 "ADDS r8, r8, r11\n\t"
6443 /* A[7] * B[6] */
6444 "LDR lr, [%[b], #24]\n\t"
6445 "ADC r11, %[s], #0x0\n\t"
6446 "UMLAL r8, r11, r12, lr\n\t"
6447 "ADDS r9, r9, r11\n\t"
6448 /* A[7] * B[7] */
6449 "LDR lr, [%[b], #28]\n\t"
6450 "ADC r10, %[s], #0x0\n\t"
6451 "UMLAL r9, r10, r12, lr\n\t"
6452 "ADD lr, sp, #0x20\n\t"
6453 "STM lr, {%[c], r4, r5, r6, r7, r8, r9, r10}\n\t"
6454 "MOV %[s], sp\n\t"
6455 /* Add c to a * b */
6456 "LDR lr, [sp, #76]\n\t"
6457 "LDM %[s], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
6458 "LDM lr!, {r1, r10, r11, r12}\n\t"
6459 "ADDS %[b], %[b], %[a]\n\t"
6460 "ADCS %[c], %[c], r10\n\t"
6461 "ADCS r4, r4, r11\n\t"
6462 "ADCS r5, r5, r12\n\t"
6463 "LDM lr!, {r1, r10, r11, r12}\n\t"
6464 "ADCS r6, r6, %[a]\n\t"
6465 "ADCS r7, r7, r10\n\t"
6466 "ADCS r8, r8, r11\n\t"
6467 "ADCS r9, r9, r12\n\t"
6468 "MOV %[a], r9\n\t"
6469 "STM %[s]!, {%[b], %[c], r4, r5, r6, r7, r8, r9}\n\t"
6470 "LDM %[s], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
6471 "ADCS %[b], %[b], #0x0\n\t"
6472 "ADCS %[c], %[c], #0x0\n\t"
6473 "ADCS r4, r4, #0x0\n\t"
6474 "ADCS r5, r5, #0x0\n\t"
6475 "ADCS r6, r6, #0x0\n\t"
6476 "ADCS r7, r7, #0x0\n\t"
6477 "ADCS r8, r8, #0x0\n\t"
6478 "ADC r9, r9, #0x0\n\t"
6479 "SUB %[s], %[s], #0x20\n\t"
6480 /* Get 252..503 and 504..507 */
6481 "LSR lr, r9, #24\n\t"
6482 "LSL r9, r9, #4\n\t"
6483 "ORR r9, r9, r8, LSR #28\n\t"
6484 "LSL r8, r8, #4\n\t"
6485 "ORR r8, r8, r7, LSR #28\n\t"
6486 "LSL r7, r7, #4\n\t"
6487 "ORR r7, r7, r6, LSR #28\n\t"
6488 "LSL r6, r6, #4\n\t"
6489 "ORR r6, r6, r5, LSR #28\n\t"
6490 "LSL r5, r5, #4\n\t"
6491 "ORR r5, r5, r4, LSR #28\n\t"
6492 "LSL r4, r4, #4\n\t"
6493 "ORR r4, r4, %[c], LSR #28\n\t"
6494 "LSL %[c], %[c], #4\n\t"
6495 "ORR %[c], %[c], %[b], LSR #28\n\t"
6496 "LSL %[b], %[b], #4\n\t"
6497 "ORR %[b], %[b], %[a], LSR #28\n\t"
6498 "BFC r9, #28, #4\n\t"
6499 /* Add order times bits 504..507 */
6500 "MOV r10, #0x2c13\n\t"
6501 "MOVT r10, #0xa30a\n\t"
6502 "MOV r11, #0x9ce5\n\t"
6503 "MOVT r11, #0xa7ed\n\t"
6504 "MOV %[a], #0x0\n\t"
6505 "UMLAL %[b], %[a], r10, lr\n\t"
6506 "ADDS %[c], %[c], %[a]\n\t"
6507 "MOV %[a], #0x0\n\t"
6508 "ADC %[a], %[a], #0x0\n\t"
6509 "UMLAL %[c], %[a], r11, lr\n\t"
6510 "MOV r10, #0x6329\n\t"
6511 "MOVT r10, #0x5d08\n\t"
6512 "MOV r11, #0x621\n\t"
6513 "MOVT r11, #0xeb21\n\t"
6514 "ADDS r4, r4, %[a]\n\t"
6515 "MOV %[a], #0x0\n\t"
6516 "ADC %[a], %[a], #0x0\n\t"
6517 "UMLAL r4, %[a], r10, lr\n\t"
6518 "ADDS r5, r5, %[a]\n\t"
6519 "MOV %[a], #0x0\n\t"
6520 "ADC %[a], %[a], #0x0\n\t"
6521 "UMLAL r5, %[a], r11, lr\n\t"
6522 "ADDS r6, r6, %[a]\n\t"
6523 "ADCS r7, r7, #0x0\n\t"
6524 "ADCS r8, r8, #0x0\n\t"
6525 "ADC r9, r9, #0x0\n\t"
6526 "SUBS r6, r6, lr\n\t"
6527 "SBCS r7, r7, #0x0\n\t"
6528 "SBCS r8, r8, #0x0\n\t"
6529 "SBC r9, r9, #0x0\n\t"
6530 /* Sub product of top 8 words and order */
6531 "MOV r12, sp\n\t"
6532 "MOV %[a], #0x2c13\n\t"
6533 "MOVT %[a], #0xa30a\n\t"
6534 "MOV lr, #0x0\n\t"
6535 "LDM %[s]!, {r10, r11}\n\t"
6536 "UMLAL r10, lr, %[b], %[a]\n\t"
6537 "ADDS r11, r11, lr\n\t"
6538 "MOV lr, #0x0\n\t"
6539 "ADC lr, lr, #0x0\n\t"
6540 "UMLAL r11, lr, %[c], %[a]\n\t"
6541 "STM r12!, {r10, r11}\n\t"
6542 "LDM %[s]!, {r10, r11}\n\t"
6543 "ADDS r10, r10, lr\n\t"
6544 "MOV lr, #0x0\n\t"
6545 "ADC lr, lr, #0x0\n\t"
6546 "UMLAL r10, lr, r4, %[a]\n\t"
6547 "ADDS r11, r11, lr\n\t"
6548 "MOV lr, #0x0\n\t"
6549 "ADC lr, lr, #0x0\n\t"
6550 "UMLAL r11, lr, r5, %[a]\n\t"
6551 "STM r12!, {r10, r11}\n\t"
6552 "LDM %[s]!, {r10, r11}\n\t"
6553 "ADDS r10, r10, lr\n\t"
6554 "MOV lr, #0x0\n\t"
6555 "ADC lr, lr, #0x0\n\t"
6556 "UMLAL r10, lr, r6, %[a]\n\t"
6557 "ADDS r11, r11, lr\n\t"
6558 "MOV lr, #0x0\n\t"
6559 "ADC lr, lr, #0x0\n\t"
6560 "UMLAL r11, lr, r7, %[a]\n\t"
6561 "STM r12!, {r10, r11}\n\t"
6562 "LDM %[s]!, {r10, r11}\n\t"
6563 "ADDS r10, r10, lr\n\t"
6564 "MOV lr, #0x0\n\t"
6565 "ADC lr, lr, #0x0\n\t"
6566 "UMLAL r10, lr, r8, %[a]\n\t"
6567 "BFC r11, #28, #4\n\t"
6568 "ADDS r11, r11, lr\n\t"
6569 "MOV lr, #0x0\n\t"
6570 "ADC lr, lr, #0x0\n\t"
6571 "UMLAL r11, lr, r9, %[a]\n\t"
6572 "STM r12!, {r10, r11, lr}\n\t"
6573 "SUB %[s], %[s], #0x10\n\t"
6574 "SUB r12, r12, #0x20\n\t"
6575 "MOV %[a], #0x9ce5\n\t"
6576 "MOVT %[a], #0xa7ed\n\t"
6577 "MOV lr, #0x0\n\t"
6578 "LDM r12, {r10, r11}\n\t"
6579 "UMLAL r10, lr, %[b], %[a]\n\t"
6580 "ADDS r11, r11, lr\n\t"
6581 "MOV lr, #0x0\n\t"
6582 "ADC lr, lr, #0x0\n\t"
6583 "UMLAL r11, lr, %[c], %[a]\n\t"
6584 "STM r12!, {r10, r11}\n\t"
6585 "LDM r12, {r10, r11}\n\t"
6586 "ADDS r10, r10, lr\n\t"
6587 "MOV lr, #0x0\n\t"
6588 "ADC lr, lr, #0x0\n\t"
6589 "UMLAL r10, lr, r4, %[a]\n\t"
6590 "ADDS r11, r11, lr\n\t"
6591 "MOV lr, #0x0\n\t"
6592 "ADC lr, lr, #0x0\n\t"
6593 "UMLAL r11, lr, r5, %[a]\n\t"
6594 "STM r12!, {r10, r11}\n\t"
6595 "LDM r12, {r10, r11}\n\t"
6596 "ADDS r10, r10, lr\n\t"
6597 "MOV lr, #0x0\n\t"
6598 "ADC lr, lr, #0x0\n\t"
6599 "UMLAL r10, lr, r6, %[a]\n\t"
6600 "ADDS r11, r11, lr\n\t"
6601 "MOV lr, #0x0\n\t"
6602 "ADC lr, lr, #0x0\n\t"
6603 "UMLAL r11, lr, r7, %[a]\n\t"
6604 "STM r12!, {r10, r11}\n\t"
6605 "LDM r12, {r10, r11}\n\t"
6606 "ADDS r10, r10, lr\n\t"
6607 "MOV lr, #0x0\n\t"
6608 "ADC lr, lr, #0x0\n\t"
6609 "UMLAL r10, lr, r8, %[a]\n\t"
6610 "ADDS r11, r11, lr\n\t"
6611 "MOV lr, #0x0\n\t"
6612 "ADC lr, lr, #0x0\n\t"
6613 "UMLAL r11, lr, r9, %[a]\n\t"
6614 "STM r12!, {r10, r11, lr}\n\t"
6615 "SUB r12, r12, #0x20\n\t"
6616 "MOV %[a], #0x6329\n\t"
6617 "MOVT %[a], #0x5d08\n\t"
6618 "MOV lr, #0x0\n\t"
6619 "LDM r12, {r10, r11}\n\t"
6620 "UMLAL r10, lr, %[b], %[a]\n\t"
6621 "ADDS r11, r11, lr\n\t"
6622 "MOV lr, #0x0\n\t"
6623 "ADC lr, lr, #0x0\n\t"
6624 "UMLAL r11, lr, %[c], %[a]\n\t"
6625 "STM r12!, {r10, r11}\n\t"
6626 "LDM r12, {r10, r11}\n\t"
6627 "ADDS r10, r10, lr\n\t"
6628 "MOV lr, #0x0\n\t"
6629 "ADC lr, lr, #0x0\n\t"
6630 "UMLAL r10, lr, r4, %[a]\n\t"
6631 "ADDS r11, r11, lr\n\t"
6632 "MOV lr, #0x0\n\t"
6633 "ADC lr, lr, #0x0\n\t"
6634 "UMLAL r11, lr, r5, %[a]\n\t"
6635 "STM r12!, {r10, r11}\n\t"
6636 "LDM r12, {r10, r11}\n\t"
6637 "ADDS r10, r10, lr\n\t"
6638 "MOV lr, #0x0\n\t"
6639 "ADC lr, lr, #0x0\n\t"
6640 "UMLAL r10, lr, r6, %[a]\n\t"
6641 "ADDS r11, r11, lr\n\t"
6642 "MOV lr, #0x0\n\t"
6643 "ADC lr, lr, #0x0\n\t"
6644 "UMLAL r11, lr, r7, %[a]\n\t"
6645 "STM r12!, {r10, r11}\n\t"
6646 "LDM r12, {r10, r11}\n\t"
6647 "ADDS r10, r10, lr\n\t"
6648 "MOV lr, #0x0\n\t"
6649 "ADC lr, lr, #0x0\n\t"
6650 "UMLAL r10, lr, r8, %[a]\n\t"
6651 "ADDS r11, r11, lr\n\t"
6652 "MOV lr, #0x0\n\t"
6653 "ADC lr, lr, #0x0\n\t"
6654 "UMLAL r11, lr, r9, %[a]\n\t"
6655 "STM r12!, {r10, r11, lr}\n\t"
6656 "SUB r12, r12, #0x20\n\t"
6657 "MOV %[a], #0x621\n\t"
6658 "MOVT %[a], #0xeb21\n\t"
6659 "MOV lr, #0x0\n\t"
6660 "LDM r12, {r10, r11}\n\t"
6661 "UMLAL r10, lr, %[b], %[a]\n\t"
6662 "ADDS r11, r11, lr\n\t"
6663 "MOV lr, #0x0\n\t"
6664 "ADC lr, lr, #0x0\n\t"
6665 "UMLAL r11, lr, %[c], %[a]\n\t"
6666 "STM r12!, {r10, r11}\n\t"
6667 "LDM r12, {r10, r11}\n\t"
6668 "ADDS r10, r10, lr\n\t"
6669 "MOV lr, #0x0\n\t"
6670 "ADC lr, lr, #0x0\n\t"
6671 "UMLAL r10, lr, r4, %[a]\n\t"
6672 "ADDS r11, r11, lr\n\t"
6673 "MOV lr, #0x0\n\t"
6674 "ADC lr, lr, #0x0\n\t"
6675 "UMLAL r11, lr, r5, %[a]\n\t"
6676 "STM r12!, {r10, r11}\n\t"
6677 "LDM r12, {r10, r11}\n\t"
6678 "ADDS r10, r10, lr\n\t"
6679 "MOV lr, #0x0\n\t"
6680 "ADC lr, lr, #0x0\n\t"
6681 "UMLAL r10, lr, r6, %[a]\n\t"
6682 "ADDS r11, r11, lr\n\t"
6683 "MOV lr, #0x0\n\t"
6684 "ADC lr, lr, #0x0\n\t"
6685 "UMLAL r11, lr, r7, %[a]\n\t"
6686 "STM r12!, {r10, r11}\n\t"
6687 "LDM r12, {r10, r11}\n\t"
6688 "ADDS r10, r10, lr\n\t"
6689 "MOV lr, #0x0\n\t"
6690 "ADC lr, lr, #0x0\n\t"
6691 "UMLAL r10, lr, r8, %[a]\n\t"
6692 "ADDS r11, r11, lr\n\t"
6693 "MOV lr, #0x0\n\t"
6694 "ADC lr, lr, #0x0\n\t"
6695 "UMLAL r11, lr, r9, %[a]\n\t"
6696 "STM r12!, {r10, r11, lr}\n\t"
6697 "SUB r12, r12, #0x20\n\t"
6698 /* Subtract at 4 * 32 */
6699 "LDM r12, {r10, r11}\n\t"
6700 "SUBS r10, r10, %[b]\n\t"
6701 "SBCS r11, r11, %[c]\n\t"
6702 "STM r12!, {r10, r11}\n\t"
6703 "LDM r12, {r10, r11}\n\t"
6704 "SBCS r10, r10, r4\n\t"
6705 "SBCS r11, r11, r5\n\t"
6706 "STM r12!, {r10, r11}\n\t"
6707 "LDM r12, {r10, r11}\n\t"
6708 "SBCS r10, r10, r6\n\t"
6709 "SBCS r11, r11, r7\n\t"
6710 "STM r12!, {r10, r11}\n\t"
6711 "LDM r12, {r10, r11}\n\t"
6712 "SBCS r10, r10, r8\n\t"
6713 "SBC r11, r11, r9\n\t"
6714 "STM r12!, {r10, r11}\n\t"
6715 "SUB r12, r12, #0x24\n\t"
6716 "ASR lr, r11, #25\n\t"
6717 /* Conditionally subtract order starting at bit 125 */
6718 "MOV %[a], #0xa0000000\n\t"
6719 "MOV %[b], #0xba7d\n\t"
6720 "MOVT %[b], #0x4b9e\n\t"
6721 "MOV %[c], #0x4c63\n\t"
6722 "MOVT %[c], #0xcb02\n\t"
6723 "MOV r4, #0xf39a\n\t"
6724 "MOVT r4, #0xd45e\n\t"
6725 "MOV r5, #0xdf3b\n\t"
6726 "MOVT r5, #0x29b\n\t"
6727 "MOV r9, #0x2000000\n\t"
6728 "AND %[a], %[a], lr\n\t"
6729 "AND %[b], %[b], lr\n\t"
6730 "AND %[c], %[c], lr\n\t"
6731 "AND r4, r4, lr\n\t"
6732 "AND r5, r5, lr\n\t"
6733 "AND r9, r9, lr\n\t"
6734 "LDM r12, {r10, r11}\n\t"
6735 "ADDS r10, r10, %[a]\n\t"
6736 "ADCS r11, r11, %[b]\n\t"
6737 "STM r12!, {r10, r11}\n\t"
6738 "LDM r12, {r10, r11}\n\t"
6739 "ADCS r10, r10, %[c]\n\t"
6740 "ADCS r11, r11, r4\n\t"
6741 "STM r12!, {r10, r11}\n\t"
6742 "LDM r12, {r10, r11}\n\t"
6743 "ADCS r10, r10, r5\n\t"
6744 "ADCS r11, r11, #0x0\n\t"
6745 "STM r12!, {r10, r11}\n\t"
6746 "LDM r12, {r10, r11}\n\t"
6747 "ADCS r10, r10, #0x0\n\t"
6748 "ADCS r11, r11, #0x0\n\t"
6749 "STM r12!, {r10, r11}\n\t"
6750 "LDM r12, {r10}\n\t"
6751 "ADCS r10, r10, #0x0\n\t"
6752 "STM r12!, {r10}\n\t"
6753 "SUB %[s], %[s], #0x10\n\t"
6754 "MOV r12, sp\n\t"
6755 /* Load bits 252-376 */
6756 "ADD r12, r12, #0x1c\n\t"
6757 "LDM r12, {r1, r2, r3, r4, r5}\n\t"
6758 "LSL r5, r5, #4\n\t"
6759 "ORR r5, r5, r4, LSR #28\n\t"
6760 "LSL r4, r4, #4\n\t"
6761 "ORR r4, r4, %[c], LSR #28\n\t"
6762 "LSL %[c], %[c], #4\n\t"
6763 "ORR %[c], %[c], %[b], LSR #28\n\t"
6764 "LSL %[b], %[b], #4\n\t"
6765 "ORR %[b], %[b], %[a], LSR #28\n\t"
6766 "BFC r5, #29, #3\n\t"
6767 "SUB r12, r12, #0x1c\n\t"
6768 /* Sub product of top 4 words and order */
6769 "MOV %[s], sp\n\t"
6770 /* * -5cf5d3ed */
6771 "MOV %[a], #0x2c13\n\t"
6772 "MOVT %[a], #0xa30a\n\t"
6773 "MOV lr, #0x0\n\t"
6774 "LDM %[s], {r6, r7, r8, r9}\n\t"
6775 "UMLAL r6, lr, %[b], %[a]\n\t"
6776 "ADDS r7, r7, lr\n\t"
6777 "MOV lr, #0x0\n\t"
6778 "ADC lr, lr, #0x0\n\t"
6779 "UMLAL r7, lr, %[c], %[a]\n\t"
6780 "ADDS r8, r8, lr\n\t"
6781 "MOV lr, #0x0\n\t"
6782 "ADC lr, lr, #0x0\n\t"
6783 "UMLAL r8, lr, r4, %[a]\n\t"
6784 "ADDS r9, r9, lr\n\t"
6785 "MOV lr, #0x0\n\t"
6786 "ADC lr, lr, #0x0\n\t"
6787 "UMLAL r9, lr, r5, %[a]\n\t"
6788 "STM %[s], {r6, r7, r8, r9}\n\t"
6789 "ADD %[s], %[s], #0x4\n\t"
6790 /* * -5812631b */
6791 "MOV %[a], #0x9ce5\n\t"
6792 "MOVT %[a], #0xa7ed\n\t"
6793 "MOV r10, #0x0\n\t"
6794 "LDM %[s], {r6, r7, r8, r9}\n\t"
6795 "UMLAL r6, r10, %[b], %[a]\n\t"
6796 "ADDS r7, r7, r10\n\t"
6797 "MOV r10, #0x0\n\t"
6798 "ADC r10, r10, #0x0\n\t"
6799 "UMLAL r7, r10, %[c], %[a]\n\t"
6800 "ADDS r8, r8, r10\n\t"
6801 "MOV r10, #0x0\n\t"
6802 "ADC r10, r10, #0x0\n\t"
6803 "UMLAL r8, r10, r4, %[a]\n\t"
6804 "ADDS r9, r9, r10\n\t"
6805 "MOV r10, #0x0\n\t"
6806 "ADC r10, r10, #0x0\n\t"
6807 "UMLAL r9, r10, r5, %[a]\n\t"
6808 "STM %[s], {r6, r7, r8, r9}\n\t"
6809 "ADD %[s], %[s], #0x4\n\t"
6810 /* * -a2f79cd7 */
6811 "MOV %[a], #0x6329\n\t"
6812 "MOVT %[a], #0x5d08\n\t"
6813 "MOV r11, #0x0\n\t"
6814 "LDM %[s], {r6, r7, r8, r9}\n\t"
6815 "UMLAL r6, r11, %[b], %[a]\n\t"
6816 "ADDS r7, r7, r11\n\t"
6817 "MOV r11, #0x0\n\t"
6818 "ADC r11, r11, #0x0\n\t"
6819 "UMLAL r7, r11, %[c], %[a]\n\t"
6820 "ADDS r8, r8, r11\n\t"
6821 "MOV r11, #0x0\n\t"
6822 "ADC r11, r11, #0x0\n\t"
6823 "UMLAL r8, r11, r4, %[a]\n\t"
6824 "ADDS r9, r9, r11\n\t"
6825 "MOV r11, #0x0\n\t"
6826 "ADC r11, r11, #0x0\n\t"
6827 "UMLAL r9, r11, r5, %[a]\n\t"
6828 "STM %[s], {r6, r7, r8, r9}\n\t"
6829 "ADD %[s], %[s], #0x4\n\t"
6830 /* * -14def9df */
6831 "MOV %[a], #0x621\n\t"
6832 "MOVT %[a], #0xeb21\n\t"
6833 "MOV r12, #0x0\n\t"
6834 "LDM %[s], {r6, r7, r8, r9}\n\t"
6835 "UMLAL r6, r12, %[b], %[a]\n\t"
6836 "ADDS r7, r7, r12\n\t"
6837 "MOV r12, #0x0\n\t"
6838 "ADC r12, r12, #0x0\n\t"
6839 "UMLAL r7, r12, %[c], %[a]\n\t"
6840 "ADDS r8, r8, r12\n\t"
6841 "MOV r12, #0x0\n\t"
6842 "ADC r12, r12, #0x0\n\t"
6843 "UMLAL r8, r12, r4, %[a]\n\t"
6844 "ADDS r9, r9, r12\n\t"
6845 "MOV r12, #0x0\n\t"
6846 "ADC r12, r12, #0x0\n\t"
6847 "UMLAL r9, r12, r5, %[a]\n\t"
6848 "STM %[s], {r6, r7, r8, r9}\n\t"
6849 "ADD %[s], %[s], #0x4\n\t"
6850 /* Add overflows at 4 * 32 */
6851 "LDM %[s], {r6, r7, r8, r9}\n\t"
6852 "BFC r9, #28, #4\n\t"
6853 "ADDS r6, r6, lr\n\t"
6854 "ADCS r7, r7, r10\n\t"
6855 "ADCS r8, r8, r11\n\t"
6856 "ADC r9, r9, r12\n\t"
6857 /* Subtract top at 4 * 32 */
6858 "SUBS r6, r6, %[b]\n\t"
6859 "SBCS r7, r7, %[c]\n\t"
6860 "SBCS r8, r8, r4\n\t"
6861 "SBCS r9, r9, r5\n\t"
6862 "SBC %[a], %[a], %[a]\n\t"
6863 "SUB %[s], %[s], #0x10\n\t"
6864 "LDM %[s], {r2, r3, r4, r5}\n\t"
6865 "MOV r10, #0xd3ed\n\t"
6866 "MOVT r10, #0x5cf5\n\t"
6867 "MOV r11, #0x631a\n\t"
6868 "MOVT r11, #0x5812\n\t"
6869 "MOV r12, #0x9cd6\n\t"
6870 "MOVT r12, #0xa2f7\n\t"
6871 "MOV lr, #0xf9de\n\t"
6872 "MOVT lr, #0x14de\n\t"
6873 "AND r10, r10, %[a]\n\t"
6874 "AND r11, r11, %[a]\n\t"
6875 "AND r12, r12, %[a]\n\t"
6876 "AND lr, lr, %[a]\n\t"
6877 "ADDS %[b], %[b], r10\n\t"
6878 "ADCS %[c], %[c], r11\n\t"
6879 "ADCS r4, r4, r12\n\t"
6880 "ADCS r5, r5, lr\n\t"
6881 "ADCS r6, r6, #0x0\n\t"
6882 "ADCS r7, r7, #0x0\n\t"
6883 "AND %[a], %[a], #0x10000000\n\t"
6884 "ADCS r8, r8, #0x0\n\t"
6885 "ADC r9, r9, %[a]\n\t"
6886 "BFC r9, #28, #4\n\t"
6887 "LDR %[s], [sp, #68]\n\t"
6888 /* Store result */
6889 "STR %[b], [%[s]]\n\t"
6890 "STR %[c], [%[s], #4]\n\t"
6891 "STR r4, [%[s], #8]\n\t"
6892 "STR r5, [%[s], #12]\n\t"
6893 "STR r6, [%[s], #16]\n\t"
6894 "STR r7, [%[s], #20]\n\t"
6895 "STR r8, [%[s], #24]\n\t"
6896 "STR r9, [%[s], #28]\n\t"
6897 "ADD sp, sp, #0x50\n\t"
6898#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
6899 : [s] "+r" (s), [a] "+r" (a), [b] "+r" (b), [c] "+r" (c)
6900 :
6901#else
6902 :
6903 : [s] "r" (s), [a] "r" (a), [b] "r" (b), [c] "r" (c)
6904#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
6905 : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11",
6906 "r12", "lr"
6907 );
6908}
6909
6910#else
6911#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
6912WC_OMIT_FRAME_POINTER void sc_muladd(byte* s_p, const byte* a_p,
6913 const byte* b_p, const byte* c_p)
6914#else
6915WC_OMIT_FRAME_POINTER void sc_muladd(byte* s, const byte* a, const byte* b,
6916 const byte* c)
6917#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
6918{
6919#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
6920 register byte* s __asm__ ("r0") = (byte*)s_p;
6921 register const byte* a __asm__ ("r1") = (const byte*)a_p;
6922 register const byte* b __asm__ ("r2") = (const byte*)b_p;
6923 register const byte* c __asm__ ("r3") = (const byte*)c_p;
6924#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
6925
6926 __asm__ __volatile__ (
6927 "SUB sp, sp, #0x50\n\t"
6928 "ADD lr, sp, #0x44\n\t"
6929 "STM lr, {%[s], %[a], %[c]}\n\t"
6930 "MOV lr, %[b]\n\t"
6931 "LDM %[a], {r0, r1, r2, r3}\n\t"
6932 "LDM lr!, {r4, r5, r6}\n\t"
6933 "UMULL r10, r11, %[s], r4\n\t"
6934 "UMULL r12, r7, %[a], r4\n\t"
6935 "UMAAL r11, r12, %[s], r5\n\t"
6936 "UMULL r8, r9, %[b], r4\n\t"
6937 "UMAAL r12, r8, %[a], r5\n\t"
6938 "UMAAL r12, r7, %[s], r6\n\t"
6939 "UMAAL r8, r9, %[c], r4\n\t"
6940 "STM sp, {r10, r11, r12}\n\t"
6941 "UMAAL r7, r8, %[b], r5\n\t"
6942 "LDM lr!, {r4}\n\t"
6943 "UMULL r10, r11, %[a], r6\n\t"
6944 "UMAAL r8, r9, %[b], r6\n\t"
6945 "UMAAL r7, r10, %[s], r4\n\t"
6946 "UMAAL r8, r11, %[c], r5\n\t"
6947 "STR r7, [sp, #12]\n\t"
6948 "UMAAL r8, r10, %[a], r4\n\t"
6949 "UMAAL r9, r11, %[c], r6\n\t"
6950 "UMAAL r9, r10, %[b], r4\n\t"
6951 "UMAAL r10, r11, %[c], r4\n\t"
6952 "LDM lr, {r4, r5, r6, r7}\n\t"
6953 "MOV r12, #0x0\n\t"
6954 "UMLAL r8, r12, %[s], r4\n\t"
6955 "UMAAL r9, r12, %[a], r4\n\t"
6956 "UMAAL r10, r12, %[b], r4\n\t"
6957 "UMAAL r11, r12, %[c], r4\n\t"
6958 "MOV r4, #0x0\n\t"
6959 "UMLAL r9, r4, %[s], r5\n\t"
6960 "UMAAL r10, r4, %[a], r5\n\t"
6961 "UMAAL r11, r4, %[b], r5\n\t"
6962 "UMAAL r12, r4, %[c], r5\n\t"
6963 "MOV r5, #0x0\n\t"
6964 "UMLAL r10, r5, %[s], r6\n\t"
6965 "UMAAL r11, r5, %[a], r6\n\t"
6966 "UMAAL r12, r5, %[b], r6\n\t"
6967 "UMAAL r4, r5, %[c], r6\n\t"
6968 "MOV r6, #0x0\n\t"
6969 "UMLAL r11, r6, %[s], r7\n\t"
6970 "LDR %[s], [sp, #72]\n\t"
6971 "UMAAL r12, r6, %[a], r7\n\t"
6972 "ADD %[s], %[s], #0x10\n\t"
6973 "UMAAL r4, r6, %[b], r7\n\t"
6974 "SUB lr, lr, #0x10\n\t"
6975 "UMAAL r5, r6, %[c], r7\n\t"
6976 "LDM %[s], {r0, r1, r2, r3}\n\t"
6977 "STR r6, [sp, #64]\n\t"
6978 "LDM lr!, {r6}\n\t"
6979 "MOV r7, #0x0\n\t"
6980 "UMLAL r8, r7, %[s], r6\n\t"
6981 "UMAAL r9, r7, %[a], r6\n\t"
6982 "STR r8, [sp, #16]\n\t"
6983 "UMAAL r10, r7, %[b], r6\n\t"
6984 "UMAAL r11, r7, %[c], r6\n\t"
6985 "LDM lr!, {r6}\n\t"
6986 "MOV r8, #0x0\n\t"
6987 "UMLAL r9, r8, %[s], r6\n\t"
6988 "UMAAL r10, r8, %[a], r6\n\t"
6989 "STR r9, [sp, #20]\n\t"
6990 "UMAAL r11, r8, %[b], r6\n\t"
6991 "UMAAL r12, r8, %[c], r6\n\t"
6992 "LDM lr!, {r6}\n\t"
6993 "MOV r9, #0x0\n\t"
6994 "UMLAL r10, r9, %[s], r6\n\t"
6995 "UMAAL r11, r9, %[a], r6\n\t"
6996 "STR r10, [sp, #24]\n\t"
6997 "UMAAL r12, r9, %[b], r6\n\t"
6998 "UMAAL r4, r9, %[c], r6\n\t"
6999 "LDM lr!, {r6}\n\t"
7000 "MOV r10, #0x0\n\t"
7001 "UMLAL r11, r10, %[s], r6\n\t"
7002 "UMAAL r12, r10, %[a], r6\n\t"
7003 "STR r11, [sp, #28]\n\t"
7004 "UMAAL r4, r10, %[b], r6\n\t"
7005 "UMAAL r5, r10, %[c], r6\n\t"
7006 "LDM lr!, {r11}\n\t"
7007 "UMAAL r12, r7, %[s], r11\n\t"
7008 "UMAAL r4, r7, %[a], r11\n\t"
7009 "LDR r6, [sp, #64]\n\t"
7010 "UMAAL r5, r7, %[b], r11\n\t"
7011 "UMAAL r6, r7, %[c], r11\n\t"
7012 "LDM lr!, {r11}\n\t"
7013 "UMAAL r4, r8, %[s], r11\n\t"
7014 "UMAAL r5, r8, %[a], r11\n\t"
7015 "UMAAL r6, r8, %[b], r11\n\t"
7016 "UMAAL r7, r8, %[c], r11\n\t"
7017 "LDM lr, {r11, lr}\n\t"
7018 "UMAAL r5, r9, %[s], r11\n\t"
7019 "UMAAL r6, r10, %[s], lr\n\t"
7020 "UMAAL r6, r9, %[a], r11\n\t"
7021 "UMAAL r7, r10, %[a], lr\n\t"
7022 "UMAAL r7, r9, %[b], r11\n\t"
7023 "UMAAL r8, r10, %[b], lr\n\t"
7024 "UMAAL r8, r9, %[c], r11\n\t"
7025 "UMAAL r9, r10, %[c], lr\n\t"
7026 "MOV %[c], r12\n\t"
7027 "ADD lr, sp, #0x20\n\t"
7028 "STM lr, {%[c], r4, r5, r6, r7, r8, r9, r10}\n\t"
7029 "MOV %[s], sp\n\t"
7030 /* Add c to a * b */
7031 "LDR lr, [sp, #76]\n\t"
7032 "LDM %[s], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
7033 "LDM lr!, {r1, r10, r11, r12}\n\t"
7034 "ADDS %[b], %[b], %[a]\n\t"
7035 "ADCS %[c], %[c], r10\n\t"
7036 "ADCS r4, r4, r11\n\t"
7037 "ADCS r5, r5, r12\n\t"
7038 "LDM lr!, {r1, r10, r11, r12}\n\t"
7039 "ADCS r6, r6, %[a]\n\t"
7040 "ADCS r7, r7, r10\n\t"
7041 "ADCS r8, r8, r11\n\t"
7042 "ADCS r9, r9, r12\n\t"
7043 "MOV %[a], r9\n\t"
7044 "STM %[s]!, {%[b], %[c], r4, r5, r6, r7, r8, r9}\n\t"
7045 "LDM %[s], {r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
7046 "ADCS %[b], %[b], #0x0\n\t"
7047 "ADCS %[c], %[c], #0x0\n\t"
7048 "ADCS r4, r4, #0x0\n\t"
7049 "ADCS r5, r5, #0x0\n\t"
7050 "ADCS r6, r6, #0x0\n\t"
7051 "ADCS r7, r7, #0x0\n\t"
7052 "ADCS r8, r8, #0x0\n\t"
7053 "ADC r9, r9, #0x0\n\t"
7054 "SUB %[s], %[s], #0x20\n\t"
7055 /* Get 252..503 and 504..507 */
7056 "LSR lr, r9, #24\n\t"
7057 "LSL r9, r9, #4\n\t"
7058 "ORR r9, r9, r8, LSR #28\n\t"
7059 "LSL r8, r8, #4\n\t"
7060 "ORR r8, r8, r7, LSR #28\n\t"
7061 "LSL r7, r7, #4\n\t"
7062 "ORR r7, r7, r6, LSR #28\n\t"
7063 "LSL r6, r6, #4\n\t"
7064 "ORR r6, r6, r5, LSR #28\n\t"
7065 "LSL r5, r5, #4\n\t"
7066 "ORR r5, r5, r4, LSR #28\n\t"
7067 "LSL r4, r4, #4\n\t"
7068 "ORR r4, r4, %[c], LSR #28\n\t"
7069 "LSL %[c], %[c], #4\n\t"
7070 "ORR %[c], %[c], %[b], LSR #28\n\t"
7071 "LSL %[b], %[b], #4\n\t"
7072 "ORR %[b], %[b], %[a], LSR #28\n\t"
7073 "BFC r9, #28, #4\n\t"
7074 /* Add order times bits 504..507 */
7075 "MOV r10, #0x2c13\n\t"
7076 "MOVT r10, #0xa30a\n\t"
7077 "MOV r11, #0x9ce5\n\t"
7078 "MOVT r11, #0xa7ed\n\t"
7079 "MOV %[a], #0x0\n\t"
7080 "UMLAL %[b], %[a], r10, lr\n\t"
7081 "UMAAL %[c], %[a], r11, lr\n\t"
7082 "MOV r10, #0x6329\n\t"
7083 "MOVT r10, #0x5d08\n\t"
7084 "MOV r11, #0x621\n\t"
7085 "MOVT r11, #0xeb21\n\t"
7086 "UMAAL r4, %[a], r10, lr\n\t"
7087 "UMAAL r5, %[a], r11, lr\n\t"
7088 "ADDS r6, r6, %[a]\n\t"
7089 "ADCS r7, r7, #0x0\n\t"
7090 "ADCS r8, r8, #0x0\n\t"
7091 "ADC r9, r9, #0x0\n\t"
7092 "SUBS r6, r6, lr\n\t"
7093 "SBCS r7, r7, #0x0\n\t"
7094 "SBCS r8, r8, #0x0\n\t"
7095 "SBC r9, r9, #0x0\n\t"
7096 /* Sub product of top 8 words and order */
7097 "MOV r12, sp\n\t"
7098 "MOV %[a], #0x2c13\n\t"
7099 "MOVT %[a], #0xa30a\n\t"
7100 "MOV lr, #0x0\n\t"
7101 "LDM %[s]!, {r10, r11}\n\t"
7102 "UMLAL r10, lr, %[b], %[a]\n\t"
7103 "UMAAL r11, lr, %[c], %[a]\n\t"
7104 "STM r12!, {r10, r11}\n\t"
7105 "LDM %[s]!, {r10, r11}\n\t"
7106 "UMAAL r10, lr, r4, %[a]\n\t"
7107 "UMAAL r11, lr, r5, %[a]\n\t"
7108 "STM r12!, {r10, r11}\n\t"
7109 "LDM %[s]!, {r10, r11}\n\t"
7110 "UMAAL r10, lr, r6, %[a]\n\t"
7111 "UMAAL r11, lr, r7, %[a]\n\t"
7112 "STM r12!, {r10, r11}\n\t"
7113 "LDM %[s]!, {r10, r11}\n\t"
7114 "UMAAL r10, lr, r8, %[a]\n\t"
7115 "BFC r11, #28, #4\n\t"
7116 "UMAAL r11, lr, r9, %[a]\n\t"
7117 "STM r12!, {r10, r11, lr}\n\t"
7118 "SUB %[s], %[s], #0x10\n\t"
7119 "SUB r12, r12, #0x20\n\t"
7120 "MOV %[a], #0x9ce5\n\t"
7121 "MOVT %[a], #0xa7ed\n\t"
7122 "MOV lr, #0x0\n\t"
7123 "LDM r12, {r10, r11}\n\t"
7124 "UMLAL r10, lr, %[b], %[a]\n\t"
7125 "UMAAL r11, lr, %[c], %[a]\n\t"
7126 "STM r12!, {r10, r11}\n\t"
7127 "LDM r12, {r10, r11}\n\t"
7128 "UMAAL r10, lr, r4, %[a]\n\t"
7129 "UMAAL r11, lr, r5, %[a]\n\t"
7130 "STM r12!, {r10, r11}\n\t"
7131 "LDM r12, {r10, r11}\n\t"
7132 "UMAAL r10, lr, r6, %[a]\n\t"
7133 "UMAAL r11, lr, r7, %[a]\n\t"
7134 "STM r12!, {r10, r11}\n\t"
7135 "LDM r12, {r10, r11}\n\t"
7136 "UMAAL r10, lr, r8, %[a]\n\t"
7137 "UMAAL r11, lr, r9, %[a]\n\t"
7138 "STM r12!, {r10, r11, lr}\n\t"
7139 "SUB r12, r12, #0x20\n\t"
7140 "MOV %[a], #0x6329\n\t"
7141 "MOVT %[a], #0x5d08\n\t"
7142 "MOV lr, #0x0\n\t"
7143 "LDM r12, {r10, r11}\n\t"
7144 "UMLAL r10, lr, %[b], %[a]\n\t"
7145 "UMAAL r11, lr, %[c], %[a]\n\t"
7146 "STM r12!, {r10, r11}\n\t"
7147 "LDM r12, {r10, r11}\n\t"
7148 "UMAAL r10, lr, r4, %[a]\n\t"
7149 "UMAAL r11, lr, r5, %[a]\n\t"
7150 "STM r12!, {r10, r11}\n\t"
7151 "LDM r12, {r10, r11}\n\t"
7152 "UMAAL r10, lr, r6, %[a]\n\t"
7153 "UMAAL r11, lr, r7, %[a]\n\t"
7154 "STM r12!, {r10, r11}\n\t"
7155 "LDM r12, {r10, r11}\n\t"
7156 "UMAAL r10, lr, r8, %[a]\n\t"
7157 "UMAAL r11, lr, r9, %[a]\n\t"
7158 "STM r12!, {r10, r11, lr}\n\t"
7159 "SUB r12, r12, #0x20\n\t"
7160 "MOV %[a], #0x621\n\t"
7161 "MOVT %[a], #0xeb21\n\t"
7162 "MOV lr, #0x0\n\t"
7163 "LDM r12, {r10, r11}\n\t"
7164 "UMLAL r10, lr, %[b], %[a]\n\t"
7165 "UMAAL r11, lr, %[c], %[a]\n\t"
7166 "STM r12!, {r10, r11}\n\t"
7167 "LDM r12, {r10, r11}\n\t"
7168 "UMAAL r10, lr, r4, %[a]\n\t"
7169 "UMAAL r11, lr, r5, %[a]\n\t"
7170 "STM r12!, {r10, r11}\n\t"
7171 "LDM r12, {r10, r11}\n\t"
7172 "UMAAL r10, lr, r6, %[a]\n\t"
7173 "UMAAL r11, lr, r7, %[a]\n\t"
7174 "STM r12!, {r10, r11}\n\t"
7175 "LDM r12, {r10, r11}\n\t"
7176 "UMAAL r10, lr, r8, %[a]\n\t"
7177 "UMAAL r11, lr, r9, %[a]\n\t"
7178 "STM r12!, {r10, r11, lr}\n\t"
7179 "SUB r12, r12, #0x20\n\t"
7180 /* Subtract at 4 * 32 */
7181 "LDM r12, {r10, r11}\n\t"
7182 "SUBS r10, r10, %[b]\n\t"
7183 "SBCS r11, r11, %[c]\n\t"
7184 "STM r12!, {r10, r11}\n\t"
7185 "LDM r12, {r10, r11}\n\t"
7186 "SBCS r10, r10, r4\n\t"
7187 "SBCS r11, r11, r5\n\t"
7188 "STM r12!, {r10, r11}\n\t"
7189 "LDM r12, {r10, r11}\n\t"
7190 "SBCS r10, r10, r6\n\t"
7191 "SBCS r11, r11, r7\n\t"
7192 "STM r12!, {r10, r11}\n\t"
7193 "LDM r12, {r10, r11}\n\t"
7194 "SBCS r10, r10, r8\n\t"
7195 "SBC r11, r11, r9\n\t"
7196 "STM r12!, {r10, r11}\n\t"
7197 "SUB r12, r12, #0x24\n\t"
7198 "ASR lr, r11, #25\n\t"
7199 /* Conditionally subtract order starting at bit 125 */
7200 "MOV %[a], #0xa0000000\n\t"
7201 "MOV %[b], #0xba7d\n\t"
7202 "MOVT %[b], #0x4b9e\n\t"
7203 "MOV %[c], #0x4c63\n\t"
7204 "MOVT %[c], #0xcb02\n\t"
7205 "MOV r4, #0xf39a\n\t"
7206 "MOVT r4, #0xd45e\n\t"
7207 "MOV r5, #0xdf3b\n\t"
7208 "MOVT r5, #0x29b\n\t"
7209 "MOV r9, #0x2000000\n\t"
7210 "AND %[a], %[a], lr\n\t"
7211 "AND %[b], %[b], lr\n\t"
7212 "AND %[c], %[c], lr\n\t"
7213 "AND r4, r4, lr\n\t"
7214 "AND r5, r5, lr\n\t"
7215 "AND r9, r9, lr\n\t"
7216 "LDM r12, {r10, r11}\n\t"
7217 "ADDS r10, r10, %[a]\n\t"
7218 "ADCS r11, r11, %[b]\n\t"
7219 "STM r12!, {r10, r11}\n\t"
7220 "LDM r12, {r10, r11}\n\t"
7221 "ADCS r10, r10, %[c]\n\t"
7222 "ADCS r11, r11, r4\n\t"
7223 "STM r12!, {r10, r11}\n\t"
7224 "LDM r12, {r10, r11}\n\t"
7225 "ADCS r10, r10, r5\n\t"
7226 "ADCS r11, r11, #0x0\n\t"
7227 "STM r12!, {r10, r11}\n\t"
7228 "LDM r12, {r10, r11}\n\t"
7229 "ADCS r10, r10, #0x0\n\t"
7230 "ADCS r11, r11, #0x0\n\t"
7231 "STM r12!, {r10, r11}\n\t"
7232 "LDM r12, {r10}\n\t"
7233 "ADCS r10, r10, #0x0\n\t"
7234 "STM r12!, {r10}\n\t"
7235 "SUB %[s], %[s], #0x10\n\t"
7236 "MOV r12, sp\n\t"
7237 /* Load bits 252-376 */
7238 "ADD r12, r12, #0x1c\n\t"
7239 "LDM r12, {r1, r2, r3, r4, r5}\n\t"
7240 "LSL r5, r5, #4\n\t"
7241 "ORR r5, r5, r4, LSR #28\n\t"
7242 "LSL r4, r4, #4\n\t"
7243 "ORR r4, r4, %[c], LSR #28\n\t"
7244 "LSL %[c], %[c], #4\n\t"
7245 "ORR %[c], %[c], %[b], LSR #28\n\t"
7246 "LSL %[b], %[b], #4\n\t"
7247 "ORR %[b], %[b], %[a], LSR #28\n\t"
7248 "BFC r5, #29, #3\n\t"
7249 "SUB r12, r12, #0x1c\n\t"
7250 /* Sub product of top 4 words and order */
7251 "MOV %[s], sp\n\t"
7252 /* * -5cf5d3ed */
7253 "MOV %[a], #0x2c13\n\t"
7254 "MOVT %[a], #0xa30a\n\t"
7255 "MOV lr, #0x0\n\t"
7256 "LDM %[s], {r6, r7, r8, r9}\n\t"
7257 "UMLAL r6, lr, %[b], %[a]\n\t"
7258 "UMAAL r7, lr, %[c], %[a]\n\t"
7259 "UMAAL r8, lr, r4, %[a]\n\t"
7260 "UMAAL r9, lr, r5, %[a]\n\t"
7261 "STM %[s], {r6, r7, r8, r9}\n\t"
7262 "ADD %[s], %[s], #0x4\n\t"
7263 /* * -5812631b */
7264 "MOV %[a], #0x9ce5\n\t"
7265 "MOVT %[a], #0xa7ed\n\t"
7266 "MOV r10, #0x0\n\t"
7267 "LDM %[s], {r6, r7, r8, r9}\n\t"
7268 "UMLAL r6, r10, %[b], %[a]\n\t"
7269 "UMAAL r7, r10, %[c], %[a]\n\t"
7270 "UMAAL r8, r10, r4, %[a]\n\t"
7271 "UMAAL r9, r10, r5, %[a]\n\t"
7272 "STM %[s], {r6, r7, r8, r9}\n\t"
7273 "ADD %[s], %[s], #0x4\n\t"
7274 /* * -a2f79cd7 */
7275 "MOV %[a], #0x6329\n\t"
7276 "MOVT %[a], #0x5d08\n\t"
7277 "MOV r11, #0x0\n\t"
7278 "LDM %[s], {r6, r7, r8, r9}\n\t"
7279 "UMLAL r6, r11, %[b], %[a]\n\t"
7280 "UMAAL r7, r11, %[c], %[a]\n\t"
7281 "UMAAL r8, r11, r4, %[a]\n\t"
7282 "UMAAL r9, r11, r5, %[a]\n\t"
7283 "STM %[s], {r6, r7, r8, r9}\n\t"
7284 "ADD %[s], %[s], #0x4\n\t"
7285 /* * -14def9df */
7286 "MOV %[a], #0x621\n\t"
7287 "MOVT %[a], #0xeb21\n\t"
7288 "MOV r12, #0x0\n\t"
7289 "LDM %[s], {r6, r7, r8, r9}\n\t"
7290 "UMLAL r6, r12, %[b], %[a]\n\t"
7291 "UMAAL r7, r12, %[c], %[a]\n\t"
7292 "UMAAL r8, r12, r4, %[a]\n\t"
7293 "UMAAL r9, r12, r5, %[a]\n\t"
7294 "STM %[s], {r6, r7, r8, r9}\n\t"
7295 "ADD %[s], %[s], #0x4\n\t"
7296 /* Add overflows at 4 * 32 */
7297 "LDM %[s], {r6, r7, r8, r9}\n\t"
7298 "BFC r9, #28, #4\n\t"
7299 "ADDS r6, r6, lr\n\t"
7300 "ADCS r7, r7, r10\n\t"
7301 "ADCS r8, r8, r11\n\t"
7302 "ADC r9, r9, r12\n\t"
7303 /* Subtract top at 4 * 32 */
7304 "SUBS r6, r6, %[b]\n\t"
7305 "SBCS r7, r7, %[c]\n\t"
7306 "SBCS r8, r8, r4\n\t"
7307 "SBCS r9, r9, r5\n\t"
7308 "SBC %[a], %[a], %[a]\n\t"
7309 "SUB %[s], %[s], #0x10\n\t"
7310 "LDM %[s], {r2, r3, r4, r5}\n\t"
7311 "MOV r10, #0xd3ed\n\t"
7312 "MOVT r10, #0x5cf5\n\t"
7313 "MOV r11, #0x631a\n\t"
7314 "MOVT r11, #0x5812\n\t"
7315 "MOV r12, #0x9cd6\n\t"
7316 "MOVT r12, #0xa2f7\n\t"
7317 "MOV lr, #0xf9de\n\t"
7318 "MOVT lr, #0x14de\n\t"
7319 "AND r10, r10, %[a]\n\t"
7320 "AND r11, r11, %[a]\n\t"
7321 "AND r12, r12, %[a]\n\t"
7322 "AND lr, lr, %[a]\n\t"
7323 "ADDS %[b], %[b], r10\n\t"
7324 "ADCS %[c], %[c], r11\n\t"
7325 "ADCS r4, r4, r12\n\t"
7326 "ADCS r5, r5, lr\n\t"
7327 "ADCS r6, r6, #0x0\n\t"
7328 "ADCS r7, r7, #0x0\n\t"
7329 "AND %[a], %[a], #0x10000000\n\t"
7330 "ADCS r8, r8, #0x0\n\t"
7331 "ADC r9, r9, %[a]\n\t"
7332 "BFC r9, #28, #4\n\t"
7333 "LDR %[s], [sp, #68]\n\t"
7334 /* Store result */
7335 "STR %[b], [%[s]]\n\t"
7336 "STR %[c], [%[s], #4]\n\t"
7337 "STR r4, [%[s], #8]\n\t"
7338 "STR r5, [%[s], #12]\n\t"
7339 "STR r6, [%[s], #16]\n\t"
7340 "STR r7, [%[s], #20]\n\t"
7341 "STR r8, [%[s], #24]\n\t"
7342 "STR r9, [%[s], #28]\n\t"
7343 "ADD sp, sp, #0x50\n\t"
7344#ifndef WOLFSSL_NO_VAR_ASSIGN_REG
7345 : [s] "+r" (s), [a] "+r" (a), [b] "+r" (b), [c] "+r" (c)
7346 :
7347#else
7348 :
7349 : [s] "r" (s), [a] "r" (a), [b] "r" (b), [c] "r" (c)
7350#endif /* !WOLFSSL_NO_VAR_ASSIGN_REG */
7351 : "memory", "cc", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11",
7352 "r12", "lr"
7353 );
7354}
7355
7356#endif /* WOLFSSL_ARM_ARCH_7M */
7357#endif /* HAVE_ED25519_SIGN */
7358#endif /* HAVE_ED25519 */
7359
7360#endif /* !CURVE25519_SMALL || !ED25519_SMALL */
7361#endif /* HAVE_CURVE25519 || HAVE_ED25519 */
7362#endif /* WOLFSSL_ARMASM_THUMB2 */
7363#endif /* WOLFSSL_ARMASM */
7364
7365#endif /* WOLFSSL_ARMASM_INLINE */